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authorDimitry Andric <dim@FreeBSD.org>2017-04-16 16:01:22 +0000
committerDimitry Andric <dim@FreeBSD.org>2017-04-16 16:01:22 +0000
commit71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch)
tree5343938942df402b49ec7300a1c25a2d4ccd5821 /test/CodeGen/X86/rotate.ll
parent31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff)
Diffstat (limited to 'test/CodeGen/X86/rotate.ll')
-rw-r--r--test/CodeGen/X86/rotate.ll83
1 files changed, 83 insertions, 0 deletions
diff --git a/test/CodeGen/X86/rotate.ll b/test/CodeGen/X86/rotate.ll
index 657b312b06c9..5d5150ad62d6 100644
--- a/test/CodeGen/X86/rotate.ll
+++ b/test/CodeGen/X86/rotate.ll
@@ -541,3 +541,86 @@ define i8 @rotr1_8(i8 %A) nounwind {
%D = or i8 %B, %C
ret i8 %D
}
+
+define void @rotr1_64_mem(i64* %Aptr) nounwind {
+; 32-LABEL: rotr1_64_mem:
+; 32: # BB#0:
+; 32-NEXT: pushl %esi
+; 32-NEXT: movl 8(%esp), %eax
+; 32-NEXT: movl (%eax), %ecx
+; 32-NEXT: movl 4(%eax), %edx
+; 32-NEXT: movl %edx, %esi
+; 32-NEXT: shldl $31, %ecx, %esi
+; 32-NEXT: shldl $31, %edx, %ecx
+; 32-NEXT: movl %ecx, 4(%eax)
+; 32-NEXT: movl %esi, (%eax)
+; 32-NEXT: popl %esi
+
+; 64-LABEL: rotr1_64_mem:
+; 64: # BB#0:
+; 64-NEXT: rorq (%rdi)
+; 64-NEXT: retq
+ %A = load i64, i64 *%Aptr
+ %B = shl i64 %A, 63
+ %C = lshr i64 %A, 1
+ %D = or i64 %B, %C
+ store i64 %D, i64* %Aptr
+ ret void
+}
+
+define void @rotr1_32_mem(i32* %Aptr) nounwind {
+; 32-LABEL: rotr1_32_mem:
+; 32: # BB#0:
+; 32-NEXT: movl 4(%esp), %eax
+; 32-NEXT: rorl (%eax)
+; 32-NEXT: retl
+;
+; 64-LABEL: rotr1_32_mem:
+; 64: # BB#0:
+; 64-NEXT: rorl (%rdi)
+; 64-NEXT: retq
+ %A = load i32, i32 *%Aptr
+ %B = shl i32 %A, 31
+ %C = lshr i32 %A, 1
+ %D = or i32 %B, %C
+ store i32 %D, i32* %Aptr
+ ret void
+}
+
+define void @rotr1_16_mem(i16* %Aptr) nounwind {
+; 32-LABEL: rotr1_16_mem:
+; 32: # BB#0:
+; 32-NEXT: movl 4(%esp), %eax
+; 32-NEXT: rorw (%eax)
+; 32-NEXT: retl
+;
+; 64-LABEL: rotr1_16_mem:
+; 64: # BB#0:
+; 64-NEXT: rorw (%rdi)
+; 64-NEXT: retq
+ %A = load i16, i16 *%Aptr
+ %B = shl i16 %A, 15
+ %C = lshr i16 %A, 1
+ %D = or i16 %B, %C
+ store i16 %D, i16* %Aptr
+ ret void
+}
+
+define void @rotr1_8_mem(i8* %Aptr) nounwind {
+; 32-LABEL: rotr1_8_mem:
+; 32: # BB#0:
+; 32-NEXT: movl 4(%esp), %eax
+; 32-NEXT: rorb (%eax)
+; 32-NEXT: retl
+;
+; 64-LABEL: rotr1_8_mem:
+; 64: # BB#0:
+; 64-NEXT: rorb (%rdi)
+; 64-NEXT: retq
+ %A = load i8, i8 *%Aptr
+ %B = shl i8 %A, 7
+ %C = lshr i8 %A, 1
+ %D = or i8 %B, %C
+ store i8 %D, i8* %Aptr
+ ret void
+}