diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2018-07-28 10:51:19 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-07-28 10:51:19 +0000 |
| commit | eb11fae6d08f479c0799db45860a98af528fa6e7 (patch) | |
| tree | 44d492a50c8c1a7eb8e2d17ea3360ec4d066f042 /test/MC/AArch64/SVE/zip1-diagnostics.s | |
| parent | b8a2042aa938069e862750553db0e4d82d25822c (diff) | |
Notes
Diffstat (limited to 'test/MC/AArch64/SVE/zip1-diagnostics.s')
| -rw-r--r-- | test/MC/AArch64/SVE/zip1-diagnostics.s | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/test/MC/AArch64/SVE/zip1-diagnostics.s b/test/MC/AArch64/SVE/zip1-diagnostics.s index 810ba7ac7622..17670be5de22 100644 --- a/test/MC/AArch64/SVE/zip1-diagnostics.s +++ b/test/MC/AArch64/SVE/zip1-diagnostics.s @@ -2,13 +2,13 @@ // Invalid element kind. zip1 z10.h, z22.h, z31.x -// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid sve vector kind qualifier +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid vector kind qualifier // CHECK-NEXT: zip1 z10.h, z22.h, z31.x // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: // Element size specifiers should match. zip1 z10.h, z3.h, z15.b -// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width // CHECK-NEXT: zip1 z10.h, z3.h, z15.b // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: @@ -26,7 +26,7 @@ zip1 z1.s, z2.s, z32.s // p16 is not a valid SVE predicate register zip1 p1.s, p2.s, p16.s -// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: zip1 p1.s, p2.s, p16.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: @@ -38,6 +38,6 @@ zip1 z1.s, z2.s, p3.s // Combining predicate and data registers as operands zip1 p1.s, p2.s, z3.s -// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register +// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction // CHECK-NEXT: zip1 p1.s, p2.s, z3.s // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: |