diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-20 21:19:10 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-20 21:19:10 +0000 |
| commit | d99dafe2e4a385dd2a6c76da6d8258deb100657b (patch) | |
| tree | ba60bf957558bd114f25dbff3d4996b5d7a61c82 /test/Transforms/InstCombine/shift.ll | |
| parent | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (diff) | |
Notes
Diffstat (limited to 'test/Transforms/InstCombine/shift.ll')
| -rw-r--r-- | test/Transforms/InstCombine/shift.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/shift.ll b/test/Transforms/InstCombine/shift.ll index 60ba35557f70..d5f489280a03 100644 --- a/test/Transforms/InstCombine/shift.ll +++ b/test/Transforms/InstCombine/shift.ll @@ -1268,3 +1268,23 @@ define <2 x i64> @test_64_splat_vec(<2 x i32> %t) { ret <2 x i64> %shl } +define <2 x i8> @ashr_demanded_bits_splat(<2 x i8> %x) { +; CHECK-LABEL: @ashr_demanded_bits_splat( +; CHECK-NEXT: [[SHR:%.*]] = ashr <2 x i8> %x, <i8 7, i8 7> +; CHECK-NEXT: ret <2 x i8> [[SHR]] +; + %and = and <2 x i8> %x, <i8 128, i8 128> + %shr = ashr <2 x i8> %and, <i8 7, i8 7> + ret <2 x i8> %shr +} + +define <2 x i8> @lshr_demanded_bits_splat(<2 x i8> %x) { +; CHECK-LABEL: @lshr_demanded_bits_splat( +; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i8> %x, <i8 7, i8 7> +; CHECK-NEXT: ret <2 x i8> [[SHR]] +; + %and = and <2 x i8> %x, <i8 128, i8 128> + %shr = lshr <2 x i8> %and, <i8 7, i8 7> + ret <2 x i8> %shr +} + |