diff options
| author | Dimitry Andric <dim@FreeBSD.org> | 2015-09-06 18:34:38 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2015-09-06 18:34:38 +0000 |
| commit | 69156b4c20249e7800cc09e0eef0beb3d15ac1ad (patch) | |
| tree | 461d3cf041290f4a99740d540bf0973d6084f98e /test/Transforms/InstCombine/vector-casts.ll | |
| parent | ee8648bdac07986a0f1ec897b02ec82a2f144d46 (diff) | |
Notes
Diffstat (limited to 'test/Transforms/InstCombine/vector-casts.ll')
| -rw-r--r-- | test/Transforms/InstCombine/vector-casts.ll | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/Transforms/InstCombine/vector-casts.ll b/test/Transforms/InstCombine/vector-casts.ll index 727eb4ebb4c8..af18b4cfbdd1 100644 --- a/test/Transforms/InstCombine/vector-casts.ll +++ b/test/Transforms/InstCombine/vector-casts.ll @@ -150,3 +150,14 @@ entry: ret <4 x float> undef } +define <8 x i32> @pr24458(<8 x float> %n) { +; CHECK-LABEL: @pr24458 + %notequal_b_load_.i = fcmp une <8 x float> %n, zeroinitializer + %equal_a_load72_.i = fcmp ueq <8 x float> %n, zeroinitializer + %notequal_b_load__to_boolvec.i = sext <8 x i1> %notequal_b_load_.i to <8 x i32> + %equal_a_load72__to_boolvec.i = sext <8 x i1> %equal_a_load72_.i to <8 x i32> + %wrong = or <8 x i32> %notequal_b_load__to_boolvec.i, %equal_a_load72__to_boolvec.i + ret <8 x i32> %wrong +; CHECK-NEXT: ret <8 x i32> <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> +} + |