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| author | Dimitry Andric <dim@FreeBSD.org> | 2018-07-31 18:25:33 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2018-07-31 18:25:33 +0000 |
| commit | 25194b54ad907eb6ffe37493f2db2d84572f7635 (patch) | |
| tree | 9140e15803bf608e05b1290a05b5b723506d2c4b /usr.bin/clang | |
| parent | 6dfa117f679af38254bf60043ab9b5c72a62c3cb (diff) | |
| download | src-test2-25194b54ad907eb6ffe37493f2db2d84572f7635.tar.gz src-test2-25194b54ad907eb6ffe37493f2db2d84572f7635.zip | |
Make llvm-tblgen and clang-tblgen build.
Notes
Notes:
svn path=/projects/clang700-import/; revision=336989
Diffstat (limited to 'usr.bin/clang')
| -rw-r--r-- | usr.bin/clang/llvm-tblgen/Makefile | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/usr.bin/clang/llvm-tblgen/Makefile b/usr.bin/clang/llvm-tblgen/Makefile index 0cc826a1b729..b0f3f74d2d02 100644 --- a/usr.bin/clang/llvm-tblgen/Makefile +++ b/usr.bin/clang/llvm-tblgen/Makefile @@ -32,7 +32,9 @@ SRCS+= InstrDocsEmitter.cpp SRCS+= InstrInfoEmitter.cpp SRCS+= IntrinsicEmitter.cpp SRCS+= OptParserEmitter.cpp +SRCS+= PredicateExpander.cpp SRCS+= PseudoLoweringEmitter.cpp +SRCS+= RISCVCompressInstEmitter.cpp SRCS+= RegisterBankEmitter.cpp SRCS+= RegisterInfoEmitter.cpp SRCS+= SDNodeProperties.cpp @@ -41,6 +43,7 @@ SRCS+= SubtargetEmitter.cpp SRCS+= SubtargetFeatureInfo.cpp SRCS+= TableGen.cpp SRCS+= Types.cpp +SRCS+= WebAssemblyDisassemblerEmitter.cpp SRCS+= X86DisassemblerTables.cpp SRCS+= X86EVEX2VEXTablesEmitter.cpp SRCS+= X86FoldTablesEmitter.cpp |