diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2017-12-18 20:10:56 +0000 |
commit | 044eb2f6afba375a914ac9d8024f8f5142bb912e (patch) | |
tree | 1475247dc9f9fe5be155ebd4c9069c75aadf8c20 /utils/TableGen/CodeGenTarget.cpp | |
parent | eb70dddbd77e120e5d490bd8fbe7ff3f8fa81c6b (diff) |
Notes
Diffstat (limited to 'utils/TableGen/CodeGenTarget.cpp')
-rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 58df3ceceee7..827b6083c17f 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -82,6 +82,7 @@ StringRef llvm::getEnumName(MVT::SimpleValueType T) { case MVT::v16i1: return "MVT::v16i1"; case MVT::v32i1: return "MVT::v32i1"; case MVT::v64i1: return "MVT::v64i1"; + case MVT::v128i1: return "MVT::v128i1"; case MVT::v512i1: return "MVT::v512i1"; case MVT::v1024i1: return "MVT::v1024i1"; case MVT::v1i8: return "MVT::v1i8"; @@ -191,7 +192,7 @@ std::string llvm::getQualifiedName(const Record *R) { /// getTarget - Return the current instance of the Target class. /// CodeGenTarget::CodeGenTarget(RecordKeeper &records) - : Records(records) { + : Records(records), CGH(records) { std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); if (Targets.size() == 0) PrintFatalError("ERROR: No 'Target' subclasses defined!"); @@ -266,7 +267,7 @@ Record *CodeGenTarget::getAsmWriter() const { CodeGenRegBank &CodeGenTarget::getRegBank() const { if (!RegBank) - RegBank = llvm::make_unique<CodeGenRegBank>(Records); + RegBank = llvm::make_unique<CodeGenRegBank>(Records, getHwModes()); return *RegBank; } @@ -285,19 +286,19 @@ const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { return I->second; } -std::vector<MVT::SimpleValueType> CodeGenTarget:: -getRegisterVTs(Record *R) const { +std::vector<ValueTypeByHwMode> CodeGenTarget::getRegisterVTs(Record *R) + const { const CodeGenRegister *Reg = getRegBank().getReg(R); - std::vector<MVT::SimpleValueType> Result; + std::vector<ValueTypeByHwMode> Result; for (const auto &RC : getRegBank().getRegClasses()) { if (RC.contains(Reg)) { - ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes(); + ArrayRef<ValueTypeByHwMode> InVTs = RC.getValueTypes(); Result.insert(Result.end(), InVTs.begin(), InVTs.end()); } } // Remove duplicates. - array_pod_sort(Result.begin(), Result.end()); + std::sort(Result.begin(), Result.end()); Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); return Result; } @@ -308,7 +309,7 @@ void CodeGenTarget::ReadLegalValueTypes() const { LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end()); // Remove duplicates. - array_pod_sort(LegalValueTypes.begin(), LegalValueTypes.end()); + std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), LegalValueTypes.end()), LegalValueTypes.end()); @@ -348,7 +349,7 @@ GetInstByName(const char *Name, void CodeGenTarget::ComputeInstrsByEnum() const { static const char *const FixedInstrs[] = { #define HANDLE_TARGET_OPCODE(OPC) #OPC, -#include "llvm/Target/TargetOpcodes.def" +#include "llvm/CodeGen/TargetOpcodes.def" nullptr}; const auto &Insts = getInstructions(); for (const char *const *p = FixedInstrs; *p; ++p) { |