diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2012-05-03 16:50:55 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2012-05-03 16:50:55 +0000 |
commit | b61ab53cb789e568acbb2952fbead20ab853a696 (patch) | |
tree | 8575c732129e272992ac5d7b4c2519238fff4735 /utils | |
parent | 63faed5b8e4f2755f127fcb8aa440480c0649327 (diff) | |
download | src-test2-b61ab53cb789e568acbb2952fbead20ab853a696.tar.gz src-test2-b61ab53cb789e568acbb2952fbead20ab853a696.zip |
Notes
Diffstat (limited to 'utils')
-rw-r--r-- | utils/Makefile | 2 | ||||
-rw-r--r-- | utils/TableGen/AsmMatcherEmitter.cpp | 19 | ||||
-rw-r--r-- | utils/TableGen/AsmWriterEmitter.cpp | 7 | ||||
-rw-r--r-- | utils/TableGen/CodeGenDAGPatterns.cpp | 25 | ||||
-rw-r--r-- | utils/TableGen/CodeGenRegisters.cpp | 10 | ||||
-rw-r--r-- | utils/TableGen/EDEmitter.cpp | 1 | ||||
-rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 13 | ||||
-rwxr-xr-x | utils/buildit/build_llvm | 13 | ||||
-rw-r--r-- | utils/json-bench/CMakeLists.txt | 5 | ||||
-rw-r--r-- | utils/json-bench/JSONBench.cpp | 85 | ||||
-rw-r--r-- | utils/json-bench/Makefile | 21 | ||||
-rwxr-xr-x | utils/release/findRegressions-nightly.py | 2 | ||||
-rwxr-xr-x | utils/release/findRegressions-simple.py | 2 | ||||
-rwxr-xr-x | utils/release/tag.sh | 22 | ||||
-rwxr-xr-x | utils/release/test-release.sh | 5 |
15 files changed, 65 insertions, 167 deletions
diff --git a/utils/Makefile b/utils/Makefile index b98376006edf..ecb30bed7c63 100644 --- a/utils/Makefile +++ b/utils/Makefile @@ -9,7 +9,7 @@ LEVEL = .. PARALLEL_DIRS := FileCheck FileUpdate TableGen PerfectShuffle \ - count fpcmp llvm-lit not unittest json-bench + count fpcmp llvm-lit not unittest EXTRA_DIST := check-each-file codegen-diff countloc.sh \ DSAclean.py DSAextract.py emacs findsym.pl GenLibDeps.pl \ diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp index 39a3c25d99da..dc92a6c218e9 100644 --- a/utils/TableGen/AsmMatcherEmitter.cpp +++ b/utils/TableGen/AsmMatcherEmitter.cpp @@ -1181,7 +1181,8 @@ void AsmMatcherInfo::BuildInfo() { unsigned VariantCount = Target.getAsmParserVariantCount(); for (unsigned VC = 0; VC != VariantCount; ++VC) { Record *AsmVariant = Target.getAsmParserVariant(VC); - std::string CommentDelimiter = AsmVariant->getValueAsString("CommentDelimiter"); + std::string CommentDelimiter = + AsmVariant->getValueAsString("CommentDelimiter"); std::string RegisterPrefix = AsmVariant->getValueAsString("RegisterPrefix"); int AsmVariantNo = AsmVariant->getValueAsInt("Variant"); @@ -1208,11 +1209,11 @@ void AsmMatcherInfo::BuildInfo() { // reject it. We reject aliases and ignore instructions for now. if (OI.MINumOperands != 1) { // FIXME: Should reject these. The ARM backend hits this with $lane - // in a bunch of instructions. It is unclear what the right answer is. + // in a bunch of instructions. The right answer is unclear. DEBUG({ errs() << "warning: '" << CGI.TheDef->getName() << "': " - << "ignoring instruction with multi-operand tied operand '" - << OI.Name << "'\n"; + << "ignoring instruction with multi-operand tied operand '" + << OI.Name << "'\n"; }); continue; } @@ -1248,8 +1249,8 @@ void AsmMatcherInfo::BuildInfo() { // If the tblgen -match-prefix option is specified (for tblgen hackers), // filter the set of instruction aliases we consider, based on the target // instruction. - if (!StringRef(Alias->ResultInst->TheDef->getName()).startswith( - MatchPrefix)) + if (!StringRef(Alias->ResultInst->TheDef->getName()) + .startswith( MatchPrefix)) continue; OwningPtr<MatchableInfo> II(new MatchableInfo(Alias)); @@ -1328,6 +1329,9 @@ void AsmMatcherInfo::BuildInfo() { Record *Rec = AllTokenAliases[i]; ClassInfo *FromClass = getTokenClass(Rec->getValueAsString("FromToken")); ClassInfo *ToClass = getTokenClass(Rec->getValueAsString("ToToken")); + if (FromClass == ToClass) + throw TGError(Rec->getLoc(), + "error: Destination value identical to source value."); FromClass->SuperClasses.push_back(ToClass); } @@ -1868,7 +1872,8 @@ static void EmitComputeAvailableFeatures(AsmMatcherInfo &Info, SubtargetFeatureInfo &SFI = *it->second; OS << " if ("; - std::string CondStorage = SFI.TheDef->getValueAsString("AssemblerCondString"); + std::string CondStorage = + SFI.TheDef->getValueAsString("AssemblerCondString"); StringRef Conds = CondStorage; std::pair<StringRef,StringRef> Comma = Conds.split(','); bool First = true; diff --git a/utils/TableGen/AsmWriterEmitter.cpp b/utils/TableGen/AsmWriterEmitter.cpp index e0b0aace33e6..d079b45e8d59 100644 --- a/utils/TableGen/AsmWriterEmitter.cpp +++ b/utils/TableGen/AsmWriterEmitter.cpp @@ -289,7 +289,8 @@ void AsmWriterEmitter::EmitPrintInstruction(raw_ostream &O) { for (unsigned i = 0, e = NumberedInstructions.size(); i != e; ++i) { AsmWriterInst *AWI = CGIAWIMap[NumberedInstructions[i]]; if (AWI != 0 && - AWI->Operands[0].OperandType == AsmWriterOperand::isLiteralTextOperand && + AWI->Operands[0].OperandType == + AsmWriterOperand::isLiteralTextOperand && !AWI->Operands[0].Str.empty()) { std::string Str = AWI->Operands[0].Str; UnescapeString(Str); @@ -589,7 +590,7 @@ class IAPrinter { std::map<StringRef, unsigned> OpMap; std::string Result; std::string AsmString; - std::vector<Record*> ReqFeatures; + SmallVector<Record*, 4> ReqFeatures; public: IAPrinter(std::string R, std::string AS) : Result(R), AsmString(AS) {} @@ -919,7 +920,7 @@ void AsmWriterEmitter::EmitPrintAliasInstruction(raw_ostream &O) { O << " }\n"; O << " }\n"; O << " }\n\n"; - + O << " return true;\n"; O << "}\n\n"; diff --git a/utils/TableGen/CodeGenDAGPatterns.cpp b/utils/TableGen/CodeGenDAGPatterns.cpp index d2ddf232b32a..d4b02fbd2f33 100644 --- a/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/utils/TableGen/CodeGenDAGPatterns.cpp @@ -17,6 +17,7 @@ #include "llvm/TableGen/Record.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/Twine.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include <algorithm> @@ -2483,10 +2484,9 @@ static void InferFromPattern(const CodeGenInstruction &Inst, // If we decided that this is a store from the pattern, then the .td file // entry is redundant. if (MayStore) - fprintf(stderr, - "Warning: mayStore flag explicitly set on instruction '%s'" - " but flag already inferred from pattern.\n", - Inst.TheDef->getName().c_str()); + PrintWarning(Inst.TheDef->getLoc(), + "mayStore flag explicitly set on " + "instruction, but flag already inferred from pattern."); MayStore = true; } @@ -2494,24 +2494,25 @@ static void InferFromPattern(const CodeGenInstruction &Inst, // If we decided that this is a load from the pattern, then the .td file // entry is redundant. if (MayLoad) - fprintf(stderr, - "Warning: mayLoad flag explicitly set on instruction '%s'" - " but flag already inferred from pattern.\n", - Inst.TheDef->getName().c_str()); + PrintWarning(Inst.TheDef->getLoc(), + "mayLoad flag explicitly set on " + "instruction, but flag already inferred from pattern."); MayLoad = true; } if (Inst.neverHasSideEffects) { if (HadPattern) - fprintf(stderr, "Warning: neverHasSideEffects set on instruction '%s' " - "which already has a pattern\n", Inst.TheDef->getName().c_str()); + PrintWarning(Inst.TheDef->getLoc(), + "neverHasSideEffects flag explicitly set on " + "instruction, but flag already inferred from pattern."); HasSideEffects = false; } if (Inst.hasSideEffects) { if (HasSideEffects) - fprintf(stderr, "Warning: hasSideEffects set on instruction '%s' " - "which already inferred this.\n", Inst.TheDef->getName().c_str()); + PrintWarning(Inst.TheDef->getLoc(), + "hasSideEffects flag explicitly set on " + "instruction, but flag already inferred from pattern."); HasSideEffects = true; } diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp index 7ce4f878a3e7..45c5bb8b3a52 100644 --- a/utils/TableGen/CodeGenRegisters.cpp +++ b/utils/TableGen/CodeGenRegisters.cpp @@ -19,6 +19,7 @@ #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/StringExtras.h" +#include "llvm/ADT/Twine.h" using namespace llvm; @@ -896,11 +897,10 @@ void CodeGenRegBank::computeComposites() { if (i1d->second == Reg3) { // Conflicting composition? Emit a warning but allow it. if (CodeGenSubRegIndex *Prev = Idx1->addComposite(Idx2, i1d->first)) - errs() << "Warning: SubRegIndex " << Idx1->getQualifiedName() - << " and " << Idx2->getQualifiedName() - << " compose ambiguously as " - << Prev->getQualifiedName() << " or " - << i1d->first->getQualifiedName() << "\n"; + PrintWarning(Twine("SubRegIndex") + Idx1->getQualifiedName() + + " and " + Idx2->getQualifiedName() + + " compose ambiguously as " + Prev->getQualifiedName() + + " or " + i1d->first->getQualifiedName()); } } } diff --git a/utils/TableGen/EDEmitter.cpp b/utils/TableGen/EDEmitter.cpp index 3809a4576a54..fe484ca8cf18 100644 --- a/utils/TableGen/EDEmitter.cpp +++ b/utils/TableGen/EDEmitter.cpp @@ -594,6 +594,7 @@ static int ARMFlagFromOpName(LiteralConstantEmitter *type, IMM("jtblock_operand"); IMM("nohash_imm"); IMM("p_imm"); + IMM("pf_imm"); IMM("c_imm"); IMM("coproc_option_imm"); IMM("imod_op"); diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index a2478a7330e8..97fcca3a850a 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -17,22 +17,23 @@ #include "CodeGenTarget.h" #include "CodeGenRegisters.h" #include "SequenceToOffsetTable.h" +#include "llvm/TableGen/Error.h" #include "llvm/TableGen/Record.h" #include "llvm/ADT/BitVector.h" #include "llvm/ADT/StringExtras.h" #include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/Twine.h" #include "llvm/Support/Format.h" #include <algorithm> #include <set> using namespace llvm; // runEnums - Print out enum values for all of the registers. -void -RegisterInfoEmitter::runEnums(raw_ostream &OS, - CodeGenTarget &Target, CodeGenRegBank &Bank) { +void RegisterInfoEmitter::runEnums(raw_ostream &OS, + CodeGenTarget &Target, CodeGenRegBank &Bank) { const std::vector<CodeGenRegister*> &Registers = Bank.getRegisters(); - // Register enums are stored as uint16_t in the tables. Make sure we'll fit + // Register enums are stored as uint16_t in the tables. Make sure we'll fit. assert(Registers.size() <= 0xffff && "Too many regs to fit in tables"); std::string Namespace = Registers[0]->TheDef->getValueAsString("Namespace"); @@ -208,8 +209,8 @@ RegisterInfoEmitter::EmitRegMappingTables(raw_ostream &OS, std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers"); maxLength = std::max((size_t)maxLength, RegNums.size()); if (DwarfRegNums.count(Reg)) - errs() << "Warning: DWARF numbers for register " << getQualifiedName(Reg) - << "specified multiple times\n"; + PrintWarning(Reg->getLoc(), Twine("DWARF numbers for register ") + + getQualifiedName(Reg) + "specified multiple times"); DwarfRegNums[Reg] = RegNums; } diff --git a/utils/buildit/build_llvm b/utils/buildit/build_llvm index 88a26d309552..994fb0696ee9 100755 --- a/utils/buildit/build_llvm +++ b/utils/buildit/build_llvm @@ -228,19 +228,6 @@ fi cd $DEST_DIR$DEST_ROOT rm -f bin/.dir etc/llvm/.dir lib/.dir -# Remove PPC64 fat slices. -cd $DEST_DIR$DEST_ROOT/bin -if [ $MACOSX_DEPLOYMENT_TARGET = "10.4" ]; then - find . -perm 755 -type f \! \( -name '*gccas' -o -name '*gccld' -o -name llvm-config \) \ - -exec lipo -extract ppc -extract i386 {} -output {} \; -elif [ $MACOSX_DEPLOYMENT_TARGET = "10.5" ]; then - find . -perm 755 -type f \! \( -name '*gccas' -o -name '*gccld' -o -name llvm-config \) \ - -exec lipo -extract ppc7400 -extract i386 {} -output {} \; -else - find . -perm 755 -type f \! \( -name '*gccas' -o -name '*gccld' -o -name llvm-config \) \ - -exec lipo -extract i386 -extract x86_64 {} -output {} \; -fi - # The Hello dylib is an example of how to build a pass. # The BugpointPasses module is only used to test bugpoint. # These unversioned dylibs cause verification failures, so do not install them. diff --git a/utils/json-bench/CMakeLists.txt b/utils/json-bench/CMakeLists.txt deleted file mode 100644 index 03ac51ce64a9..000000000000 --- a/utils/json-bench/CMakeLists.txt +++ /dev/null @@ -1,5 +0,0 @@ -add_llvm_utility(json-bench - JSONBench.cpp - ) - -target_link_libraries(json-bench LLVMSupport) diff --git a/utils/json-bench/JSONBench.cpp b/utils/json-bench/JSONBench.cpp deleted file mode 100644 index ca8a36a03ab0..000000000000 --- a/utils/json-bench/JSONBench.cpp +++ /dev/null @@ -1,85 +0,0 @@ -//===- JSONBench - Benchmark the JSONParser implementation ----------------===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// -// This program executes the JSONParser on differntly sized JSON texts and -// outputs the run time. -// -//===----------------------------------------------------------------------===// - -#include "llvm/ADT/Twine.h" -#include "llvm/Support/CommandLine.h" -#include "llvm/Support/JSONParser.h" -#include "llvm/Support/Timer.h" -#include "llvm/Support/raw_ostream.h" - -static llvm::cl::opt<bool> -Verify("verify", llvm::cl::desc( - "Run a quick verification useful for regression testing"), - llvm::cl::init(false)); - -static llvm::cl::opt<unsigned> -MemoryLimitMB("memory-limit", llvm::cl::desc( - "Do not use more megabytes of memory"), - llvm::cl::init(1000)); - -void benchmark(llvm::TimerGroup &Group, llvm::StringRef Name, - llvm::StringRef JSONText) { - llvm::Timer BaseLine((Name + ": Loop").str(), Group); - BaseLine.startTimer(); - char C = 0; - for (llvm::StringRef::iterator I = JSONText.begin(), - E = JSONText.end(); - I != E; ++I) { C += *I; } - BaseLine.stopTimer(); - volatile char DontOptimizeOut = C; (void)DontOptimizeOut; - - llvm::Timer Parsing((Name + ": Parsing").str(), Group); - Parsing.startTimer(); - llvm::SourceMgr SM; - llvm::JSONParser Parser(JSONText, &SM); - if (!Parser.validate()) { - llvm::errs() << "Parsing error in JSON parser benchmark.\n"; - exit(1); - } - Parsing.stopTimer(); -} - -std::string createJSONText(size_t MemoryMB, unsigned ValueSize) { - std::string JSONText; - llvm::raw_string_ostream Stream(JSONText); - Stream << "[\n"; - size_t MemoryBytes = MemoryMB * 1024 * 1024; - while (JSONText.size() < MemoryBytes) { - Stream << " {\n" - << " \"key1\": \"" << std::string(ValueSize, '*') << "\",\n" - << " \"key2\": \"" << std::string(ValueSize, '*') << "\",\n" - << " \"key3\": \"" << std::string(ValueSize, '*') << "\"\n" - << " }"; - Stream.flush(); - if (JSONText.size() < MemoryBytes) Stream << ","; - Stream << "\n"; - } - Stream << "]\n"; - Stream.flush(); - return JSONText; -} - -int main(int argc, char **argv) { - llvm::cl::ParseCommandLineOptions(argc, argv); - llvm::TimerGroup Group("JSON parser benchmark"); - if (Verify) { - benchmark(Group, "Fast", createJSONText(10, 500)); - } else { - benchmark(Group, "Small Values", createJSONText(MemoryLimitMB, 5)); - benchmark(Group, "Medium Values", createJSONText(MemoryLimitMB, 500)); - benchmark(Group, "Large Values", createJSONText(MemoryLimitMB, 50000)); - } - return 0; -} - diff --git a/utils/json-bench/Makefile b/utils/json-bench/Makefile deleted file mode 100644 index 6651626f683b..000000000000 --- a/utils/json-bench/Makefile +++ /dev/null @@ -1,21 +0,0 @@ -##===- utils/FileCheck/Makefile ----------------------------*- Makefile -*-===## -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -##===----------------------------------------------------------------------===## - -LEVEL = ../.. -TOOLNAME = json-bench -USEDLIBS = LLVMSupport.a - -# This tool has no plugins, optimize startup time. -TOOL_NO_EXPORTS = 1 - -# Don't install this utility -NO_INSTALL = 1 - -include $(LEVEL)/Makefile.common - diff --git a/utils/release/findRegressions-nightly.py b/utils/release/findRegressions-nightly.py index e801dab4aba7..ddf89835e2c2 100755 --- a/utils/release/findRegressions-nightly.py +++ b/utils/release/findRegressions-nightly.py @@ -1,4 +1,4 @@ -#!/usr/bin/python +#!/usr/bin/env python import re, string, sys, os, time DEBUG = 0 diff --git a/utils/release/findRegressions-simple.py b/utils/release/findRegressions-simple.py index 758623199ff9..8d3b4cfca29b 100755 --- a/utils/release/findRegressions-simple.py +++ b/utils/release/findRegressions-simple.py @@ -1,4 +1,4 @@ -#!/usr/bin/python +#!/usr/bin/env python import re, string, sys, os, time, math DEBUG = 0 diff --git a/utils/release/tag.sh b/utils/release/tag.sh index 80da47a4db0d..399d5c5a7fa9 100755 --- a/utils/release/tag.sh +++ b/utils/release/tag.sh @@ -16,33 +16,40 @@ set -e release="" rc="" +rebranch="no" base_url="https://llvm.org/svn/llvm-project" function usage() { - echo "usage: `basename $0` -release <num>" + echo "usage: `basename $0` -release <num> [-rebranch]" echo "usage: `basename $0` -release <num> -rc <num>" echo " " echo " -release <num> The version number of the release" echo " -rc <num> The release candidate number" + echo " -rebranch Remove existing branch, if present, before branching" echo " -final Tag final release candidate" } function tag_version() { set -x - for proj in llvm cfe dragonegg test-suite compiler-rt libcxx libcxxabi ; do - if ! svn ls $base_url/$proj/branches/release_$release > /dev/null 2>&1 ; then - svn copy -m "Creating release_$release branch" \ - $base_url/$proj/trunk \ + for proj in llvm cfe dragonegg test-suite compiler-rt ; do + if svn ls $base_url/$proj/branches/release_$release > /dev/null 2>&1 ; then + if [ $rebranch = "no" ]; then + continue + fi + svn remove -m "Removing old release_$release branch for rebranching." \ $base_url/$proj/branches/release_$release fi + svn copy -m "Creating release_$release branch" \ + $base_url/$proj/trunk \ + $base_url/$proj/branches/release_$release done set +x } function tag_release_candidate() { set -x - for proj in llvm cfe dragonegg test-suite compiler-rt libcxx libcxxabi ; do + for proj in llvm cfe dragonegg test-suite compiler-rt ; do if ! svn ls $base_url/$proj/tags/RELEASE_$release > /dev/null 2>&1 ; then svn mkdir -m "Creating release directory for release_$release." $base_url/$proj/tags/RELEASE_$release fi @@ -65,6 +72,9 @@ while [ $# -gt 0 ]; do shift rc="rc$1" ;; + -rebranch | --rebranch ) + rebranch="yes" + ;; -final | --final ) rc="final" ;; diff --git a/utils/release/test-release.sh b/utils/release/test-release.sh index ad1af5fef055..d2946d8762ac 100755 --- a/utils/release/test-release.sh +++ b/utils/release/test-release.sh @@ -18,7 +18,7 @@ else MAKE=make fi -projects="llvm cfe dragonegg test-suite" +projects="llvm cfe dragonegg compiler-rt test-suite" # Base SVN URL for the sources. Base_url="http://llvm.org/svn/llvm-project" @@ -214,6 +214,9 @@ function export_sources() { if [ ! -h llvm-test ]; then ln -s ../../test-suite.src llvm-test fi + if [ ! -h compiler-rt ]; then + ln -s ../../compiler-rt.src compiler-rt + fi cd $BuildDir } |