diff options
259 files changed, 9574 insertions, 2337 deletions
@@ -36,6 +36,15 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 11.x IS SLOW: 20141231 entry below for information about prerequisites and upgrading, if you are not already using 3.5.0 or higher. +20150604: + Generation of legacy formatted entries have been disabled by default + in pwd_mkdb(8), as all base system consumers of the legacy formatted + entries were converted to use the new format by default when the new, + machine independent format have been added and supported since FreeBSD + 5.x. + + Please see the pwd_mkdb(8) manual page for further details. + 20150525: Clang and llvm have been upgraded to 3.6.1 release. Please see the 20141231 entry below for information about prerequisites and upgrading, diff --git a/bin/chmod/chmod.c b/bin/chmod/chmod.c index 9b801576efa7..2ccce2d7830e 100644 --- a/bin/chmod/chmod.c +++ b/bin/chmod/chmod.c @@ -162,14 +162,16 @@ done: argv += optind; atflag = AT_SYMLINK_NOFOLLOW; switch (p->fts_info) { - case FTS_D: /* Change it at FTS_DP. */ + case FTS_D: if (!Rflag) fts_set(ftsp, p, FTS_SKIP); - continue; + break; case FTS_DNR: /* Warn, chmod. */ warnx("%s: %s", p->fts_path, strerror(p->fts_errno)); rval = 1; break; + case FTS_DP: /* Already changed at FTS_D. */ + continue; case FTS_ERR: /* Warn, continue. */ case FTS_NS: warnx("%s: %s", p->fts_path, strerror(p->fts_errno)); diff --git a/bin/cp/cp.1 b/bin/cp/cp.1 index 169f350cc0bc..9bbd9d614b6c 100644 --- a/bin/cp/cp.1 +++ b/bin/cp/cp.1 @@ -32,7 +32,7 @@ .\" @(#)cp.1 8.3 (Berkeley) 4/18/94 .\" $FreeBSD$ .\" -.Dd March 15, 2013 +.Dd June 6, 2015 .Dt CP 1 .Os .Sh NAME @@ -45,7 +45,7 @@ .Op Fl H | Fl L | Fl P .Oc .Op Fl f | i | n -.Op Fl alpvx +.Op Fl alpsvx .Ar source_file target_file .Nm .Oo @@ -53,7 +53,7 @@ .Op Fl H | Fl L | Fl P .Oc .Op Fl f | i | n -.Op Fl alpvx +.Op Fl alpsvx .Ar source_file ... target_directory .Sh DESCRIPTION In the first synopsis form, the @@ -179,6 +179,8 @@ If the source file has both its set-user-ID and set-group-ID bits on, and either the user ID or group ID cannot be preserved, neither the set-user-ID nor set-group-ID bits are preserved in the copy's permissions. +.It Fl s +Create symbolic links to regular files in a hierarchy instead of copying. .It Fl v Cause .Nm @@ -298,7 +300,10 @@ differ as they copy special files as normal files while recreating a hierarchy. .Pp The -.Fl v +.Fl l, +.Fl s, +.Fl v, +.Fl x and .Fl n options are non-standard and their use in scripts is not recommended. diff --git a/bin/cp/cp.c b/bin/cp/cp.c index 2ad5f4a43414..11e36333c827 100644 --- a/bin/cp/cp.c +++ b/bin/cp/cp.c @@ -75,15 +75,15 @@ __FBSDID("$FreeBSD$"); #include "extern.h" #define STRIP_TRAILING_SLASH(p) { \ - while ((p).p_end > (p).p_path + 1 && (p).p_end[-1] == '/') \ - *--(p).p_end = 0; \ + while ((p).p_end > (p).p_path + 1 && (p).p_end[-1] == '/') \ + *--(p).p_end = 0; \ } static char emptystring[] = ""; PATH_T to = { to.p_path, emptystring, "" }; -int fflag, iflag, lflag, nflag, pflag, vflag; +int fflag, iflag, lflag, nflag, pflag, sflag, vflag; static int Rflag, rflag; volatile sig_atomic_t info; @@ -102,7 +102,7 @@ main(int argc, char *argv[]) fts_options = FTS_NOCHDIR | FTS_PHYSICAL; Hflag = Lflag = 0; - while ((ch = getopt(argc, argv, "HLPRafilnprvx")) != -1) + while ((ch = getopt(argc, argv, "HLPRafilnprsvx")) != -1) switch (ch) { case 'H': Hflag = 1; @@ -145,6 +145,9 @@ main(int argc, char *argv[]) rflag = Lflag = 1; Hflag = 0; break; + case 's': + sflag = 1; + break; case 'v': vflag = 1; break; @@ -163,6 +166,8 @@ main(int argc, char *argv[]) if (Rflag && rflag) errx(1, "the -R and -r options may not be specified together"); + if (lflag && sflag) + errx(1, "the -l and -s options may not be specified together"); if (rflag) Rflag = 1; if (Rflag) { @@ -183,7 +188,7 @@ main(int argc, char *argv[]) if (strlcpy(to.p_path, target, sizeof(to.p_path)) >= sizeof(to.p_path)) errx(1, "%s: name too long", target); to.p_end = to.p_path + strlen(to.p_path); - if (to.p_path == to.p_end) { + if (to.p_path == to.p_end) { *to.p_end++ = '.'; *to.p_end = 0; } @@ -240,10 +245,10 @@ main(int argc, char *argv[]) type = FILE_TO_FILE; if (have_trailing_slash && type == FILE_TO_FILE) { - if (r == -1) + if (r == -1) { errx(1, "directory %s does not exist", - to.p_path); - else + to.p_path); + } else errx(1, "%s is not a directory", to.p_path); } } else @@ -294,8 +299,8 @@ copy(char *argv[], enum op type, int fts_options) /* * If we are in case (2) or (3) above, we need to append the - * source name to the target name. - */ + * source name to the target name. + */ if (type != FILE_TO_FILE) { /* * Need to remember the roots of traversals to create @@ -374,7 +379,8 @@ copy(char *argv[], enum op type, int fts_options) mode = curr->fts_statp->st_mode; if ((mode & (S_ISUID | S_ISGID | S_ISTXT)) || ((mode | S_IRWXU) & mask) != (mode & mask)) - if (chmod(to.p_path, mode & mask) != 0){ + if (chmod(to.p_path, mode & mask) != + 0) { warn("chmod: %s", to.p_path); rval = 1; } @@ -382,7 +388,7 @@ copy(char *argv[], enum op type, int fts_options) continue; } - /* Not an error but need to remember it happened */ + /* Not an error but need to remember it happened. */ if (stat(to.p_path, &to_stat) == -1) dne = 1; else { @@ -408,7 +414,7 @@ copy(char *argv[], enum op type, int fts_options) switch (curr->fts_statp->st_mode & S_IFMT) { case S_IFLNK: - /* Catch special case of a non-dangling symlink */ + /* Catch special case of a non-dangling symlink. */ if ((fts_options & FTS_LOGICAL) || ((fts_options & FTS_COMFOLLOW) && curr->fts_level == 0)) { @@ -433,7 +439,7 @@ copy(char *argv[], enum op type, int fts_options) * modified by the umask. Trade-off between being * able to write the directory (if from directory is * 555) and not causing a permissions race. If the - * umask blocks owner writes, we fail.. + * umask blocks owner writes, we fail. */ if (dne) { if (mkdir(to.p_path, @@ -452,7 +458,7 @@ copy(char *argv[], enum op type, int fts_options) break; case S_IFBLK: case S_IFCHR: - if (Rflag) { + if (Rflag && !sflag) { if (copy_special(curr->fts_statp, !dne)) badcp = rval = 1; } else { @@ -462,10 +468,10 @@ copy(char *argv[], enum op type, int fts_options) break; case S_IFSOCK: warnx("%s is a socket (not copied).", - curr->fts_path); + curr->fts_path); break; case S_IFIFO: - if (Rflag) { + if (Rflag && !sflag) { if (copy_fifo(curr->fts_statp, !dne)) badcp = rval = 1; } else { diff --git a/bin/cp/extern.h b/bin/cp/extern.h index 94c416b048ec..f8c20daa893e 100644 --- a/bin/cp/extern.h +++ b/bin/cp/extern.h @@ -37,7 +37,7 @@ typedef struct { } PATH_T; extern PATH_T to; -extern int fflag, iflag, lflag, nflag, pflag, vflag; +extern int fflag, iflag, lflag, nflag, pflag, sflag, vflag; extern volatile sig_atomic_t info; __BEGIN_DECLS diff --git a/bin/cp/utils.c b/bin/cp/utils.c index f58ed7a96f9b..11a35682c7f5 100644 --- a/bin/cp/utils.c +++ b/bin/cp/utils.c @@ -57,15 +57,19 @@ __FBSDID("$FreeBSD$"); #define cp_pct(x, y) ((y == 0) ? 0 : (int)(100.0 * (x) / (y))) -/* Memory strategy threshold, in pages: if physmem is larger then this, use a - * large buffer */ +/* + * Memory strategy threshold, in pages: if physmem is larger then this, use a + * large buffer. + */ #define PHYSPAGES_THRESHOLD (32*1024) -/* Maximum buffer size in bytes - do not allow it to grow larger than this */ +/* Maximum buffer size in bytes - do not allow it to grow larger than this. */ #define BUFSIZE_MAX (2*1024*1024) -/* Small (default) buffer size in bytes. It's inefficient for this to be - * smaller than MAXPHYS */ +/* + * Small (default) buffer size in bytes. It's inefficient for this to be + * smaller than MAXPHYS. + */ #define BUFSIZE_SMALL (MAXPHYS) int @@ -77,13 +81,15 @@ copy_file(const FTSENT *entp, int dne) ssize_t wcount; size_t wresid; off_t wtotal; - int ch, checkch, from_fd = 0, rcount, rval, to_fd = 0; + int ch, checkch, from_fd, rcount, rval, to_fd; char *bufp; #ifdef VM_AND_BUFFER_CACHE_SYNCHRONIZED char *p; #endif - if ((from_fd = open(entp->fts_path, O_RDONLY, 0)) == -1) { + from_fd = to_fd = -1; + if (!lflag && !sflag && + (from_fd = open(entp->fts_path, O_RDONLY, 0)) == -1) { warn("%s", entp->fts_path); return (1); } @@ -103,63 +109,65 @@ copy_file(const FTSENT *entp, int dne) if (nflag) { if (vflag) printf("%s not overwritten\n", to.p_path); - (void)close(from_fd); - return (1); + rval = 1; + goto done; } else if (iflag) { (void)fprintf(stderr, "overwrite %s? %s", - to.p_path, YESNO); + to.p_path, YESNO); checkch = ch = getchar(); while (ch != '\n' && ch != EOF) ch = getchar(); if (checkch != 'y' && checkch != 'Y') { - (void)close(from_fd); (void)fprintf(stderr, "not overwritten\n"); - return (1); + rval = 1; + goto done; } } - + if (fflag) { - /* remove existing destination file name, - * create a new file */ - (void)unlink(to.p_path); - if (!lflag) - to_fd = open(to.p_path, O_WRONLY | O_TRUNC | O_CREAT, - fs->st_mode & ~(S_ISUID | S_ISGID)); - } else { - if (!lflag) - /* overwrite existing destination file name */ - to_fd = open(to.p_path, O_WRONLY | O_TRUNC, 0); + /* + * Remove existing destination file name create a new + * file. + */ + (void)unlink(to.p_path); + if (!lflag && !sflag) { + to_fd = open(to.p_path, + O_WRONLY | O_TRUNC | O_CREAT, + fs->st_mode & ~(S_ISUID | S_ISGID)); + } + } else if (!lflag && !sflag) { + /* Overwrite existing destination file name. */ + to_fd = open(to.p_path, O_WRONLY | O_TRUNC, 0); } - } else { - if (!lflag) - to_fd = open(to.p_path, O_WRONLY | O_TRUNC | O_CREAT, - fs->st_mode & ~(S_ISUID | S_ISGID)); + } else if (!lflag && !sflag) { + to_fd = open(to.p_path, O_WRONLY | O_TRUNC | O_CREAT, + fs->st_mode & ~(S_ISUID | S_ISGID)); } - - if (to_fd == -1) { + + if (!lflag && !sflag && to_fd == -1) { warn("%s", to.p_path); - (void)close(from_fd); - return (1); + rval = 1; + goto done; } rval = 0; - if (!lflag) { + if (!lflag && !sflag) { /* - * Mmap and write if less than 8M (the limit is so we don't totally - * trash memory on big files. This is really a minor hack, but it - * wins some CPU back. + * Mmap and write if less than 8M (the limit is so we don't + * totally trash memory on big files. This is really a minor + * hack, but it wins some CPU back. * Some filesystems, such as smbnetfs, don't support mmap, * so this is a best-effort attempt. */ #ifdef VM_AND_BUFFER_CACHE_SYNCHRONIZED if (S_ISREG(fs->st_mode) && fs->st_size > 0 && - fs->st_size <= 8 * 1024 * 1024 && + fs->st_size <= 8 * 1024 * 1024 && (p = mmap(NULL, (size_t)fs->st_size, PROT_READ, MAP_SHARED, from_fd, (off_t)0)) != MAP_FAILED) { wtotal = 0; for (bufp = p, wresid = fs->st_size; ; - bufp += wcount, wresid -= (size_t)wcount) { + bufp += wcount, wresid -= (size_t)wcount) { wcount = write(to_fd, bufp, wresid); if (wcount <= 0) break; @@ -204,7 +212,7 @@ copy_file(const FTSENT *entp, int dne) wtotal = 0; while ((rcount = read(from_fd, buf, bufsize)) > 0) { for (bufp = buf, wresid = rcount; ; - bufp += wcount, wresid -= wcount) { + bufp += wcount, wresid -= wcount) { wcount = write(to_fd, bufp, wresid); if (wcount <= 0) break; @@ -230,13 +238,18 @@ copy_file(const FTSENT *entp, int dne) rval = 1; } } - } else { + } else if (lflag) { if (link(entp->fts_path, to.p_path)) { warn("%s", to.p_path); rval = 1; } + } else if (sflag) { + if (symlink(entp->fts_path, to.p_path)) { + warn("%s", to.p_path); + rval = 1; + } } - + /* * Don't remove the target even after an error. The target might * not be a regular file, or its attributes might be important, @@ -244,7 +257,7 @@ copy_file(const FTSENT *entp, int dne) * to remove it if we created it and its length is 0. */ - if (!lflag) { + if (!lflag && !sflag) { if (pflag && setfile(fs, to_fd)) rval = 1; if (pflag && preserve_fd_acls(from_fd, to_fd) != 0) @@ -255,8 +268,9 @@ copy_file(const FTSENT *entp, int dne) } } - (void)close(from_fd); - +done: + if (from_fd != -1) + (void)close(from_fd); return (rval); } @@ -338,7 +352,7 @@ setfile(struct stat *fs, int fd) fdval = fd != -1; islink = !fdval && S_ISLNK(fs->st_mode); fs->st_mode &= S_ISUID | S_ISGID | S_ISVTX | - S_IRWXU | S_IRWXG | S_IRWXO; + S_IRWXU | S_IRWXG | S_IRWXO; tspec[0] = fs->st_atim; tspec[1] = fs->st_mtim; @@ -353,7 +367,7 @@ setfile(struct stat *fs, int fd) else { gotstat = 1; ts.st_mode &= S_ISUID | S_ISGID | S_ISVTX | - S_IRWXU | S_IRWXG | S_IRWXO; + S_IRWXU | S_IRWXG | S_IRWXO; } /* * Changing the ownership probably won't succeed, unless we're root @@ -477,7 +491,7 @@ preserve_dir_acls(struct stat *fs, char *source_dir, char *dest_dir) return (0); /* - * If the file is a link we will not follow it + * If the file is a link we will not follow it. */ if (S_ISLNK(fs->st_mode)) { aclgetf = acl_get_link_np; @@ -536,8 +550,10 @@ usage(void) { (void)fprintf(stderr, "%s\n%s\n", -"usage: cp [-R [-H | -L | -P]] [-f | -i | -n] [-alpvx] source_file target_file", -" cp [-R [-H | -L | -P]] [-f | -i | -n] [-alpvx] source_file ... " -"target_directory"); + "usage: cp [-R [-H | -L | -P]] [-f | -i | -n] [-alpsvx] " + "source_file target_file", + " cp [-R [-H | -L | -P]] [-f | -i | -n] [-alpsvx] " + "source_file ... " + "target_directory"); exit(EX_USAGE); } diff --git a/bin/ls/ls.c b/bin/ls/ls.c index a46f358bd0c6..74276c1448ff 100644 --- a/bin/ls/ls.c +++ b/bin/ls/ls.c @@ -413,9 +413,14 @@ main(int argc, char *argv[]) /* * If not -F, -P, -d or -l options, follow any symbolic links listed on - * the command line. + * the command line, unless in color mode in which case we need to + * distinguish file type for a symbolic link itself and its target. */ - if (!f_nofollow && !f_longform && !f_listdir && (!f_type || f_slash)) + if (!f_nofollow && !f_longform && !f_listdir && (!f_type || f_slash) +#ifdef COLORLS + && !f_color +#endif + ) fts_options |= FTS_COMFOLLOW; /* diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_impl.h b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_impl.h index 51bed72556d0..36cc5396e214 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_impl.h +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_impl.h @@ -156,6 +156,21 @@ typedef struct dt_module { #define DT_DM_KERNEL 0x2 /* module is associated with a kernel object */ #define DT_DM_PRIMARY 0x4 /* module is a krtld primary kernel object */ +#ifdef __FreeBSD__ +/* + * A representation of a FreeBSD kernel module, used when checking module + * dependencies. This differs from dt_module_t, which refers to a KLD in the + * case of kernel probes. Since modules can be identified regardless of whether + * they've been compiled into the kernel, we use them to identify DTrace + * modules. + */ +typedef struct dt_kmodule { + struct dt_kmodule *dkm_next; /* hash table entry */ + char *dkm_name; /* string name of module */ + dt_module_t *dkm_module; /* corresponding KLD module */ +} dt_kmodule_t; +#endif + typedef struct dt_provmod { char *dp_name; /* name of provider module */ struct dt_provmod *dp_next; /* next module */ @@ -235,6 +250,9 @@ struct dtrace_hdl { dt_idhash_t *dt_tls; /* hash table of thread-local identifiers */ dt_list_t dt_modlist; /* linked list of dt_module_t's */ dt_module_t **dt_mods; /* hash table of dt_module_t's */ +#ifdef __FreeBSD__ + dt_kmodule_t **dt_kmods; /* hash table of dt_kmodule_t's */ +#endif uint_t dt_modbuckets; /* number of module hash buckets */ uint_t dt_nmods; /* number of modules in hash and list */ dt_provmod_t *dt_provmod; /* linked list of provider modules */ diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.c b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.c index b3fe51669cc0..77f92237e210 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.c +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.c @@ -37,6 +37,7 @@ #else #include <sys/param.h> #include <sys/linker.h> +#include <sys/module.h> #include <sys/stat.h> #endif @@ -542,6 +543,22 @@ dt_module_lookup_by_ctf(dtrace_hdl_t *dtp, ctf_file_t *ctfp) return (ctfp ? ctf_getspecific(ctfp) : NULL); } +#ifdef __FreeBSD__ +dt_kmodule_t * +dt_kmodule_lookup(dtrace_hdl_t *dtp, const char *name) +{ + uint_t h = dt_strtab_hash(name, NULL) % dtp->dt_modbuckets; + dt_kmodule_t *dkmp; + + for (dkmp = dtp->dt_kmods[h]; dkmp != NULL; dkmp = dkmp->dkm_next) { + if (strcmp(dkmp->dkm_name, name) == 0) + return (dkmp); + } + + return (NULL); +} +#endif + static int dt_module_load_sect(dtrace_hdl_t *dtp, dt_module_t *dmp, ctf_sect_t *ctsp) { @@ -1124,6 +1141,12 @@ dt_module_update(dtrace_hdl_t *dtp, struct kld_file_stat *k_stat) char fname[MAXPATHLEN]; struct stat64 st; int fd, err, bits; +#ifdef __FreeBSD__ + struct module_stat ms; + dt_kmodule_t *dkmp; + uint_t h; + int modid; +#endif dt_module_t *dmp; const char *s; @@ -1270,6 +1293,33 @@ dt_module_update(dtrace_hdl_t *dtp, struct kld_file_stat *k_stat) if (dmp->dm_info.objfs_info_primary) dmp->dm_flags |= DT_DM_PRIMARY; +#ifdef __FreeBSD__ + ms.version = sizeof(ms); + for (modid = kldfirstmod(k_stat->id); modid > 0; + modid = modnext(modid)) { + if (modstat(modid, &ms) != 0) { + dt_dprintf("modstat failed for id %d in %s: %s\n", + modid, k_stat->name, strerror(errno)); + continue; + } + if (dt_kmodule_lookup(dtp, ms.name) != NULL) + continue; + + dkmp = malloc(sizeof (*dkmp)); + if (dkmp == NULL) { + dt_dprintf("failed to allocate memory\n"); + dt_module_destroy(dtp, dmp); + return; + } + + h = dt_strtab_hash(ms.name, NULL) % dtp->dt_modbuckets; + dkmp->dkm_next = dtp->dt_kmods[h]; + dkmp->dkm_name = strdup(ms.name); + dkmp->dkm_module = dmp; + dtp->dt_kmods[h] = dkmp; + } +#endif + dt_dprintf("opened %d-bit module %s (%s) [%d]\n", bits, dmp->dm_name, dmp->dm_file, dmp->dm_modid); } diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.h b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.h index d103e028e425..6db16cced373 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.h +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_module.h @@ -44,6 +44,10 @@ extern void dt_module_destroy(dtrace_hdl_t *, dt_module_t *); extern dt_module_t *dt_module_lookup_by_name(dtrace_hdl_t *, const char *); extern dt_module_t *dt_module_lookup_by_ctf(dtrace_hdl_t *, ctf_file_t *); +#ifdef __FreeBSD__ +extern dt_kmodule_t *dt_kmodule_lookup(dtrace_hdl_t *, const char *); +#endif + extern int dt_module_hasctf(dtrace_hdl_t *, dt_module_t *); extern ctf_file_t *dt_module_getctf(dtrace_hdl_t *, dt_module_t *); extern dt_ident_t *dt_module_extern(dtrace_hdl_t *, dt_module_t *, diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c index 80e4be9a32d9..ac0524b07050 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_open.c @@ -1178,6 +1178,9 @@ alloc: #endif dtp->dt_modbuckets = _dtrace_strbuckets; dtp->dt_mods = calloc(dtp->dt_modbuckets, sizeof (dt_module_t *)); +#ifdef __FreeBSD__ + dtp->dt_kmods = calloc(dtp->dt_modbuckets, sizeof (dt_module_t *)); +#endif dtp->dt_provbuckets = _dtrace_strbuckets; dtp->dt_provs = calloc(dtp->dt_provbuckets, sizeof (dt_provider_t *)); dt_proc_hash_create(dtp); @@ -1199,6 +1202,7 @@ alloc: if (dtp->dt_mods == NULL || dtp->dt_provs == NULL || dtp->dt_procs == NULL || dtp->dt_ld_path == NULL || #ifdef __FreeBSD__ + dtp->dt_kmods == NULL || dtp->dt_objcopy_path == NULL || #endif dtp->dt_cpp_path == NULL || dtp->dt_cpp_argv == NULL) @@ -1621,6 +1625,10 @@ dtrace_close(dtrace_hdl_t *dtp) dtrace_prog_t *pgp; dt_xlator_t *dxp; dt_dirpath_t *dirp; +#ifdef __FreeBSD__ + dt_kmodule_t *dkm; + uint_t h; +#endif int i; if (dtp->dt_procs != NULL) @@ -1648,6 +1656,15 @@ dtrace_close(dtrace_hdl_t *dtp) if (dtp->dt_tls != NULL) dt_idhash_destroy(dtp->dt_tls); +#ifdef __FreeBSD__ + for (h = 0; h < dtp->dt_modbuckets; h++) + while ((dkm = dtp->dt_kmods[h]) != NULL) { + dtp->dt_kmods[h] = dkm->dkm_next; + free(dkm->dkm_name); + free(dkm); + } +#endif + while ((dmp = dt_list_next(&dtp->dt_modlist)) != NULL) dt_module_destroy(dtp, dmp); @@ -1697,6 +1714,9 @@ dtrace_close(dtrace_hdl_t *dtp) #endif free(dtp->dt_mods); +#ifdef __FreeBSD__ + free(dtp->dt_kmods); +#endif free(dtp->dt_provs); free(dtp); } diff --git a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_pragma.c b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_pragma.c index bd0d708bde5a..550a436e0b0c 100644 --- a/cddl/contrib/opensolaris/lib/libdtrace/common/dt_pragma.c +++ b/cddl/contrib/opensolaris/lib/libdtrace/common/dt_pragma.c @@ -278,6 +278,14 @@ dt_pragma_depends(const char *prname, dt_node_t *cnp) } else if (strcmp(cnp->dn_string, "module") == 0) { dt_module_t *mp = dt_module_lookup_by_name(dtp, nnp->dn_string); found = mp != NULL && dt_module_getctf(dtp, mp) != NULL; +#ifdef __FreeBSD__ + if (!found) { + dt_kmodule_t *dkmp = dt_kmodule_lookup(dtp, + nnp->dn_string); + found = dkmp != NULL && + dt_module_getctf(dtp, dkmp->dkm_module) != NULL; + } +#endif } else if (strcmp(cnp->dn_string, "library") == 0) { if (yypcb->pcb_cflags & DTRACE_C_CTL) { assert(dtp->dt_filetag != NULL); diff --git a/contrib/dtc/checks.c b/contrib/dtc/checks.c index 11a40861e401..f70469477554 100644 --- a/contrib/dtc/checks.c +++ b/contrib/dtc/checks.c @@ -624,11 +624,11 @@ static void check_avoid_default_addr_size(struct check *c, struct node *dt, if (!reg && !ranges) return; - if ((node->parent->addr_cells == -1)) + if (node->parent->addr_cells == -1) FAIL(c, "Relying on default #address-cells value for %s", node->fullpath); - if ((node->parent->size_cells == -1)) + if (node->parent->size_cells == -1) FAIL(c, "Relying on default #size-cells value for %s", node->fullpath); } diff --git a/contrib/mdocml/read.c b/contrib/mdocml/read.c index 471d415019f5..a34c9ffdedca 100644 --- a/contrib/mdocml/read.c +++ b/contrib/mdocml/read.c @@ -28,6 +28,7 @@ #include <assert.h> #include <ctype.h> #include <errno.h> +#include <err.h> #include <fcntl.h> #include <stdarg.h> #include <stdint.h> @@ -35,6 +36,7 @@ #include <stdlib.h> #include <string.h> #include <unistd.h> +#include <zlib.h> #include "mandoc.h" #include "mandoc_aux.h" @@ -792,6 +794,27 @@ mparse_readfd(struct mparse *curp, int fd, const char *file) return(curp->file_status); } +/* + * hack to avoid depending on gnuzip(1) waiting for upstream proper + * support + */ +static int +gunzip(const char *file) +{ + gzFile gz; + char buf[8192]; + int r; + + gz = gzopen(file, "r"); + if (gz == NULL) + err(EXIT_FAILURE, "cannot open %s", file); + + while ((r = gzread(gz, buf, sizeof(buf))) > 0) + fwrite(buf, 1, r, stdout); + + gzclose(gz); + return (EXIT_SUCCESS); +} enum mandoclevel mparse_open(struct mparse *curp, int *fd, const char *file) { @@ -846,9 +869,7 @@ mparse_open(struct mparse *curp, int *fd, const char *file) perror("dup"); exit((int)MANDOCLEVEL_SYSERR); } - execlp("gunzip", "gunzip", "-c", file, NULL); - perror("exec"); - exit((int)MANDOCLEVEL_SYSERR); + exit(gunzip(file)); default: close(pfd[1]); *fd = pfd[0]; diff --git a/contrib/top/top.local.H b/contrib/top/top.local.hs index 9eb7a64e532a..9eb7a64e532a 100644 --- a/contrib/top/top.local.H +++ b/contrib/top/top.local.hs diff --git a/contrib/top/top.X b/contrib/top/top.xs index 15cf2dcb5119..15cf2dcb5119 100644 --- a/contrib/top/top.X +++ b/contrib/top/top.xs diff --git a/etc/Makefile b/etc/Makefile index e5195f67b7dc..7f0ca56aae02 100644 --- a/etc/Makefile +++ b/etc/Makefile @@ -188,13 +188,10 @@ distribute: .include <bsd.endian.mk> .if ${TARGET_ENDIANNESS} == "1234" CAP_MKDB_ENDIAN?= -l -PWD_MKDB_ENDIAN?= -L .elif ${TARGET_ENDIANNESS} == "4321" CAP_MKDB_ENDIAN?= -b -PWD_MKDB_ENDIAN?= -B .else CAP_MKDB_ENDIAN?= -PWD_MKDB_ENDIAN?= .endif .if defined(NO_ROOT) @@ -210,6 +207,8 @@ distribution: ${INSTALL} -o ${BINOWN} -g ${BINGRP} -m 644 \ ${BIN1} ${DESTDIR}/etc; \ cap_mkdb ${CAP_MKDB_ENDIAN} ${DESTDIR}/etc/login.conf; \ + services_mkdb ${CAP_MKDB_ENDIAN} -q -o ${DESTDIR}/var/db/services.db \ + ${DESTDIR}/etc/services; \ ${INSTALL} -o ${BINOWN} -g ${BINGRP} -m 755 \ ${BIN2} ${DESTDIR}/etc; \ ${INSTALL} -o ${BINOWN} -g ${BINGRP} -m 600 \ @@ -220,8 +219,7 @@ distribution: .if ${MK_TCSH} == "no" sed -i "" -e 's;/bin/csh;/bin/sh;' ${DESTDIR}/etc/master.passwd .endif - pwd_mkdb ${PWD_MKDB_ENDIAN} -i -p -d ${DESTDIR}/etc \ - ${DESTDIR}/etc/master.passwd + pwd_mkdb -i -p -d ${DESTDIR}/etc ${DESTDIR}/etc/master.passwd .if defined(NO_ROOT) ( \ echo "./etc/login.conf.db type=file mode=0644 uname=root gname=wheel"; \ diff --git a/games/grdc/grdc.c b/games/grdc/grdc.c index 4632c79ca9ff..04cc00b37d6f 100644 --- a/games/grdc/grdc.c +++ b/games/grdc/grdc.c @@ -150,14 +150,14 @@ main(int argc, char *argv[]) set(tm->tm_min/10, 14); if (t12) { - if (tm->tm_hour > 12) { - tm->tm_hour -= 12; - mvaddstr(YBASE + 5, XBASE + 52, "PM"); - } else { + if (tm->tm_hour < 12) { if (tm->tm_hour == 0) tm->tm_hour = 12; - mvaddstr(YBASE + 5, XBASE + 52, "AM"); + } else { + if (tm->tm_hour > 12) + tm->tm_hour -= 12; + mvaddstr(YBASE + 5, XBASE + 52, "PM"); } } diff --git a/lib/libc/aarch64/gen/setjmp.S b/lib/libc/aarch64/gen/setjmp.S index 80a94842b37f..790ed732a4fa 100644 --- a/lib/libc/aarch64/gen/setjmp.S +++ b/lib/libc/aarch64/gen/setjmp.S @@ -80,7 +80,7 @@ ENTRY(longjmp) str x1, [sp, #16] /* Restore the signal mask */ - mov x1, #0 /* oset */ + mov x2, #0 /* oset */ add x1, x0, #(_JB_SIGMASK * 8) /* set */ mov x0, #3 /* SIG_BLOCK */ bl sigprocmask diff --git a/lib/libc/string/strchr.3 b/lib/libc/string/strchr.3 index 6117831233a1..a39ea3e79d71 100644 --- a/lib/libc/string/strchr.3 +++ b/lib/libc/string/strchr.3 @@ -113,10 +113,12 @@ and .Fn strrchr conform to .St -isoC . -The +The function .Fn strchrnul -is a GNU extension . -.Sh History +is a +.Tn GNU +extension. +.Sh HISTORY The .Fn strchrnul function first appeared in glibc 2.1.1 and was added in diff --git a/lib/libdevstat/devstat.c b/lib/libdevstat/devstat.c index d52332bd5931..68b5028c7c9a 100644 --- a/lib/libdevstat/devstat.c +++ b/lib/libdevstat/devstat.c @@ -334,7 +334,6 @@ devstat_getdevs(kvm_t *kd, struct statinfo *stats) { int error; size_t dssize; - int oldnumdevs; long oldgeneration; int retval = 0; struct devinfo *dinfo; @@ -348,7 +347,6 @@ devstat_getdevs(kvm_t *kd, struct statinfo *stats) return(-1); } - oldnumdevs = dinfo->numdevs; oldgeneration = dinfo->generation; if (kd == NULL) { diff --git a/lib/libdpv/dprompt.c b/lib/libdpv/dprompt.c index 031f550e6a37..e3d636a840df 100644 --- a/lib/libdpv/dprompt.c +++ b/lib/libdpv/dprompt.c @@ -391,7 +391,6 @@ dprompt_add_files(struct dpv_file_node *file_list, enum dprompt_state dstate; int estext_lsize; int estext_rsize; - int estext_size; int flabel_size; int hlen; int lsize; @@ -559,13 +558,11 @@ dprompt_add_files(struct dpv_file_node *file_list, bg_code = "\\Zr\\Z1"; /* Red */ estext_lsize = fail_lsize; estext_rsize = fail_rsize; - estext_size = fail_size; estext = fail; } else { /* e.g., DPV_STATUS_DONE */ bg_code = "\\Zr\\Z2"; /* Green */ estext_lsize = done_lsize; estext_rsize = done_rsize; - estext_size = done_size; estext = done; } switch (dstate) { diff --git a/lib/libedit/edit/readline/readline.h b/lib/libedit/edit/readline/readline.h index 4371457b7862..e25781b1ad60 100644 --- a/lib/libedit/edit/readline/readline.h +++ b/lib/libedit/edit/readline/readline.h @@ -1,4 +1,4 @@ -/* $NetBSD: readline.h,v 1.34 2013/05/28 00:10:34 christos Exp $ */ +/* $NetBSD: readline.h,v 1.37 2015/06/02 15:36:45 christos Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -41,9 +41,8 @@ /* typedefs */ typedef int Function(const char *, int); typedef void VFunction(void); -typedef void VCPFunction(char *); -typedef char *CPFunction(const char *, int); -typedef char **CPPFunction(const char *, int, int); +typedef void rl_vcpfunc_t(char *); +typedef char **rl_completion_func_t(const char *, int, int); typedef char *rl_compentry_func_t(const char *, int); typedef int rl_command_func_t(int, int); @@ -110,9 +109,9 @@ extern int max_input_history; extern char *rl_basic_word_break_characters; extern char *rl_completer_word_break_characters; extern char *rl_completer_quote_characters; -extern Function *rl_completion_entry_function; +extern rl_compentry_func_t *rl_completion_entry_function; extern char *(*rl_completion_word_break_hook)(void); -extern CPPFunction *rl_attempted_completion_function; +extern rl_completion_func_t *rl_attempted_completion_function; extern int rl_attempted_completion_over; extern int rl_completion_type; extern int rl_completion_query_items; @@ -177,7 +176,7 @@ char *filename_completion_function(const char *, int); char *username_completion_function(const char *, int); int rl_complete(int, int); int rl_read_key(void); -char **completion_matches(const char *, CPFunction *); +char **completion_matches(const char *, rl_compentry_func_t *); void rl_display_match_list(char **, int, int); int rl_insert(int, int); @@ -186,7 +185,7 @@ void rl_reset_terminal(const char *); int rl_bind_key(int, rl_command_func_t *); int rl_newline(int, int); void rl_callback_read_char(void); -void rl_callback_handler_install(const char *, VCPFunction *); +void rl_callback_handler_install(const char *, rl_vcpfunc_t *); void rl_callback_handler_remove(void); void rl_redisplay(void); int rl_get_previous_history(int, int); @@ -196,7 +195,7 @@ int rl_read_init_file(const char *); int rl_parse_and_bind(const char *); int rl_variable_bind(const char *, const char *); void rl_stuff_char(int); -int rl_add_defun(const char *, Function *, int); +int rl_add_defun(const char *, rl_command_func_t *, int); HISTORY_STATE *history_get_history_state(void); void rl_get_screen_size(int *, int *); void rl_set_screen_size(int, int); diff --git a/lib/libedit/readline.c b/lib/libedit/readline.c index 2dd7f4f59614..caddb9fee1f7 100644 --- a/lib/libedit/readline.c +++ b/lib/libedit/readline.c @@ -1,4 +1,4 @@ -/* $NetBSD: readline.c,v 1.115 2015/04/01 15:23:15 christos Exp $ */ +/* $NetBSD: readline.c,v 1.117 2015/06/02 15:35:31 christos Exp $ */ /*- * Copyright (c) 1997 The NetBSD Foundation, Inc. @@ -31,7 +31,7 @@ #include "config.h" #if !defined(lint) && !defined(SCCSID) -__RCSID("$NetBSD: readline.c,v 1.115 2015/04/01 15:23:15 christos Exp $"); +__RCSID("$NetBSD: readline.c,v 1.117 2015/06/02 15:35:31 christos Exp $"); #endif /* not lint && not SCCSID */ #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); @@ -80,7 +80,7 @@ FILE *rl_outstream = NULL; int rl_point = 0; int rl_end = 0; char *rl_line_buffer = NULL; -VCPFunction *rl_linefunc = NULL; +rl_vcpfunc_t *rl_linefunc = NULL; int rl_done = 0; VFunction *rl_event_hook = NULL; KEYMAP_ENTRY_ARRAY emacs_standard_keymap, @@ -109,9 +109,9 @@ int rl_attempted_completion_over = 0; char *rl_basic_word_break_characters = break_chars; char *rl_completer_word_break_characters = NULL; char *rl_completer_quote_characters = NULL; -Function *rl_completion_entry_function = NULL; +rl_compentry_func_t *rl_completion_entry_function = NULL; char *(*rl_completion_word_break_hook)(void) = NULL; -CPPFunction *rl_attempted_completion_function = NULL; +rl_completion_func_t *rl_attempted_completion_function = NULL; Function *rl_pre_input_hook = NULL; Function *rl_startup1_hook = NULL; int (*rl_getc_function)(FILE *) = NULL; @@ -162,7 +162,7 @@ int rl_completion_append_character = ' '; static History *h = NULL; static EditLine *e = NULL; -static Function *map[256]; +static rl_command_func_t *map[256]; static jmp_buf topbuf; /* internal functions */ @@ -1829,9 +1829,11 @@ rl_complete(int ignore __attribute__((__unused__)), int invoking_key) else breakchars = rl_basic_word_break_characters; + _rl_update_pos(); + /* Just look at how many global variables modify this operation! */ return fn_complete(e, - (CPFunction *)rl_completion_entry_function, + (rl_compentry_func_t *)rl_completion_entry_function, rl_attempted_completion_function, ct_decode_string(rl_basic_word_break_characters, &wbreak_conv), ct_decode_string(breakchars, &sprefix_conv), @@ -1960,7 +1962,7 @@ rl_bind_wrapper(EditLine *el __attribute__((__unused__)), unsigned char c) _rl_update_pos(); - (*map[c])(NULL, c); + (*map[c])(1, c); /* If rl_done was set by the above call, deal with it here */ if (rl_done) @@ -1970,7 +1972,7 @@ rl_bind_wrapper(EditLine *el __attribute__((__unused__)), unsigned char c) } int -rl_add_defun(const char *name, Function *fun, int c) +rl_add_defun(const char *name, rl_command_func_t *fun, int c) { char dest[8]; if ((size_t)c >= sizeof(map) / sizeof(map[0]) || c < 0) @@ -2009,7 +2011,7 @@ rl_callback_read_char(void) } void -rl_callback_handler_install(const char *prompt, VCPFunction *linefunc) +rl_callback_handler_install(const char *prompt, rl_vcpfunc_t *linefunc) { if (e == NULL) { rl_initialize(); diff --git a/lib/libgssapi/gss_accept_sec_context.c b/lib/libgssapi/gss_accept_sec_context.c index b4240920c59e..930da7f656fd 100644 --- a/lib/libgssapi/gss_accept_sec_context.c +++ b/lib/libgssapi/gss_accept_sec_context.c @@ -165,7 +165,6 @@ OM_uint32 gss_accept_sec_context(OM_uint32 *minor_status, struct _gss_mechanism_cred *mc; gss_cred_id_t acceptor_mc, delegated_mc; gss_name_t src_mn; - int allocated_ctx; *minor_status = 0; if (src_name) @@ -206,11 +205,8 @@ OM_uint32 gss_accept_sec_context(OM_uint32 *minor_status, free(ctx); return (GSS_S_BAD_MECH); } - allocated_ctx = 1; - } else { + } else m = ctx->gc_mech; - allocated_ctx = 0; - } if (cred) { SLIST_FOREACH(mc, &cred->gc_mc, gmc_link) diff --git a/lib/libugidfw/ugidfw.c b/lib/libugidfw/ugidfw.c index 0dc423d00574..df7c799263e5 100644 --- a/lib/libugidfw/ugidfw.c +++ b/lib/libugidfw/ugidfw.c @@ -64,11 +64,10 @@ bsde_rule_to_string(struct mac_bsdextended_rule *rule, char *buf, size_t buflen) struct statfs *mntbuf; char *cur, type[sizeof(rule->mbr_object.mbo_type) * CHAR_BIT + 1]; size_t left, len; - int anymode, unknownmode, truncated, numfs, i, notdone; + int anymode, unknownmode, numfs, i, notdone; cur = buf; left = buflen; - truncated = 0; len = snprintf(cur, left, "subject "); if (len < 0 || len > left) @@ -1216,7 +1215,7 @@ bsde_delete_rule(int rulenum, size_t buflen, char *errstr) { struct mac_bsdextended_rule rule; int name[10]; - size_t len, size; + size_t len; int error; if (bsde_check_version(buflen, errstr) != 0) @@ -1233,7 +1232,6 @@ bsde_delete_rule(int rulenum, size_t buflen, char *errstr) name[len] = rulenum; len++; - size = sizeof(rule); error = sysctl(name, len, NULL, NULL, &rule, 0); if (error) { len = snprintf(errstr, buflen, "%s.%d: %s", MIB ".rules", diff --git a/lib/libutil/pw_util.3 b/lib/libutil/pw_util.3 index 0d8c76325722..706368fbffed 100644 --- a/lib/libutil/pw_util.3 +++ b/lib/libutil/pw_util.3 @@ -24,7 +24,7 @@ .\" .\" $FreeBSD$ .\" -.Dd October 30, 2012 +.Dd June 06, 2015 .Dt PW_UTIL 3 .Os .Sh NAME @@ -222,7 +222,7 @@ and it is the caller's responsibility to free it with The .Fn pw_mkdb function regenerates the password database by running -.Xr pw_mkdb 8 . +.Xr pwd_mkdb 8 . If .Fa user only the record corresponding to that user will be updated. diff --git a/release/Makefile.ec2 b/release/Makefile.ec2 index a781bc6d346a..4efdc7fa27b6 100644 --- a/release/Makefile.ec2 +++ b/release/Makefile.ec2 @@ -51,9 +51,9 @@ ec2ami: cw-ec2 ${CW_EC2_PORTINSTALL} @echo "--------------------------------------------------------------" @false .endif - /usr/local/bin/bsdec2-image-upload ${PUBLISH} \ - ${.OBJDIR}/ec2.raw \ - "${TYPE} ${REVISION}-${BRANCH}-${TARGET}${AMINAMESUFFIX}" \ - "${TYPE} ${REVISION}-${BRANCH}-${TARGET}" \ + /usr/local/bin/bsdec2-image-upload ${PUBLISH} \ + ${.OBJDIR}/ec2.raw \ + "${TYPE} ${REVISION}-${BRANCH}-${TARGET}${AMINAMESUFFIX}" \ + "${TYPE} ${REVISION}-${BRANCH}-${TARGET}" \ ${AWSREGION} ${AWSBUCKET} ${AWSKEYFILE} @touch ${.TARGET} diff --git a/release/arm/BEAGLEBONE.conf b/release/arm/BEAGLEBONE.conf index 3ae48714fc33..4fcb07d21d72 100644 --- a/release/arm/BEAGLEBONE.conf +++ b/release/arm/BEAGLEBONE.conf @@ -23,7 +23,7 @@ arm_install_uboot() { chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} - chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot diff --git a/release/arm/CUBOX-HUMMINGBOARD.conf b/release/arm/CUBOX-HUMMINGBOARD.conf new file mode 100644 index 000000000000..79e9389a5389 --- /dev/null +++ b/release/arm/CUBOX-HUMMINGBOARD.conf @@ -0,0 +1,39 @@ +#!/bin/sh +# +# $FreeBSD$ +# + +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-cubox-hummingboard" +KERNEL="IMX6" +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x12000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="50m -b 16384" +FAT_TYPE="16" +MD_ARGS="-x 63 -y 255" +NODOC=1 +export BOARDNAME="CUBOX-HUMMINGBOARD" + +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-cubox-hummingboard" + UBOOT_FILES="u-boot.imx" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} dd if=${UBOOT_DIR}/${UBOOT_FILES} \ + of=/dev/${mddev} bs=512 seek=2 + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 +} diff --git a/release/arm/GUMSTIX.conf b/release/arm/GUMSTIX.conf new file mode 100644 index 000000000000..6812a5f49963 --- /dev/null +++ b/release/arm/GUMSTIX.conf @@ -0,0 +1,37 @@ +#!/bin/sh +# +# $FreeBSD$ +# + +EMBEDDEDBUILD=1 +EMBEDDED_TARGET="arm" +EMBEDDED_TARGET_ARCH="armv6" +EMBEDDEDPORTS="sysutils/u-boot-duovero" +KERNEL="GUMSTIX" +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x88000000" +IMAGE_SIZE="1G" +PART_SCHEME="MBR" +FAT_SIZE="2m" +FAT_TYPE="12" +MD_ARGS="-x 63 -y 255" +NODOC=1 + +arm_install_uboot() { + UBOOT_DIR="/usr/local/share/u-boot/u-boot-duovero" + FATMOUNT="${DESTDIR%${KERNEL}}/fat" + UFSMOUNT="${DESTDIR%${KERNEL}}/ufs" + chroot ${CHROOTDIR} mkdir -p "${FATMOUNT}" "${UFSMOUNT}" + chroot ${CHROOTDIR} mount_msdosfs /dev/${mddev}s1 ${FATMOUNT} + chroot ${CHROOTDIR} mount /dev/${mddev}s2a ${UFSMOUNT} + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/MLO ${FATMOUNT}/MLO + chroot ${CHROOTDIR} cp -p ${UBOOT_DIR}/u-boot.img ${FATMOUNT}/u-boot.img + chroot ${CHROOTDIR} cp -p ${UFSMOUNT}/boot/ubldr ${FATMOUNT}/ubldr + chroot ${CHROOTDIR} touch ${UFSMOUNT}/firstboot + sync + umount_loop ${CHROOTDIR}/${FATMOUNT} + umount_loop ${CHROOTDIR}/${UFSMOUNT} + chroot ${CHROOTDIR} rmdir ${FATMOUNT} + chroot ${CHROOTDIR} rmdir ${UFSMOUNT} + + return 0 +} diff --git a/release/arm/WANDBOARD.conf b/release/arm/WANDBOARD.conf index 7ea3807a9dbd..211844c3e549 100644 --- a/release/arm/WANDBOARD.conf +++ b/release/arm/WANDBOARD.conf @@ -8,7 +8,7 @@ EMBEDDED_TARGET="arm" EMBEDDED_TARGET_ARCH="armv6" EMBEDDEDPORTS="sysutils/u-boot-wandboard" KERNEL="IMX6" -WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x11000000" +WORLD_FLAGS="${WORLD_FLAGS} UBLDR_LOADADDR=0x12000000" IMAGE_SIZE="1G" PART_SCHEME="MBR" FAT_SIZE="50m -b 16384" diff --git a/release/tools/arm.subr b/release/tools/arm.subr index 5cc61e3708b0..564d9b66b1db 100644 --- a/release/tools/arm.subr +++ b/release/tools/arm.subr @@ -72,7 +72,7 @@ arm_create_disk() { chroot ${CHROOTDIR} gpart create -s bsd ${mddev}s2 chroot ${CHROOTDIR} gpart add -t freebsd-ufs -a 64k /dev/${mddev}s2 chroot ${CHROOTDIR} newfs -U -L rootfs /dev/${mddev}s2a - chroot ${CHROOTDIR} tunefs -j enable -N enable /dev/${mddev}s2a + chroot ${CHROOTDIR} tunefs -N enable /dev/${mddev}s2a return 0 } @@ -80,11 +80,15 @@ arm_create_disk() { arm_create_user() { # Create a default user account 'freebsd' with the password 'freebsd', # and set the default password for the 'root' user to 'root'. - chroot ${CHROOTDIR} /usr/sbin/pw groupadd freebsd -g 1001 - chroot ${CHROOTDIR} /usr/sbin/pw useradd freebsd \ + chroot ${CHROOTDIR} /usr/sbin/pw -R ${DESTDIR} \ + groupadd freebsd -g 1001 + chroot ${CHROOTDIR} mkdir -p ${DESTDIR}/home/freebsd + chroot ${CHROOTDIR} /usr/sbin/pw -R ${DESTDIR} \ + useradd freebsd \ -m -M 0755 -w yes -n freebsd -u 1001 -g 1001 -G 0 \ -c 'FreeBSD User' -d '/home/freebsd' -s '/bin/csh' - chroot ${CHROOTDIR} /usr/sbin/pw usermod root -w yes + chroot ${CHROOTDIR} /usr/sbin/pw -R ${DESTDIR} \ + usermod root -w yes return 0 } diff --git a/sbin/badsect/Makefile b/sbin/badsect/Makefile index c11f8cba506a..68e29645a512 100644 --- a/sbin/badsect/Makefile +++ b/sbin/badsect/Makefile @@ -4,6 +4,5 @@ PROG= badsect LIBADD= ufs MAN= badsect.8 -WARNS?= 2 .include <bsd.prog.mk> diff --git a/sbin/camcontrol/camcontrol.c b/sbin/camcontrol/camcontrol.c index c0a13446c9c5..84a0101b796a 100644 --- a/sbin/camcontrol/camcontrol.c +++ b/sbin/camcontrol/camcontrol.c @@ -2566,12 +2566,11 @@ atahpa(struct cam_device *device, int retry_count, int timeout, struct ata_params *ident_buf; struct ccb_getdev cgd; struct ata_set_max_pwd pwd; - int error, confirm, quiet, c, action, actions, setpwd, persist; + int error, confirm, quiet, c, action, actions, persist; int security, is48bit, pwdsize; u_int64_t hpasize, maxsize; actions = 0; - setpwd = 0; confirm = 0; quiet = 0; maxsize = 0; diff --git a/sbin/camcontrol/persist.c b/sbin/camcontrol/persist.c index bcc1073d2c05..c7e16c714f6e 100644 --- a/sbin/camcontrol/persist.c +++ b/sbin/camcontrol/persist.c @@ -432,7 +432,7 @@ scsipersist(struct cam_device *device, int argc, char **argv, char *combinedopt, uint32_t res_len = 0; unsigned long rel_tgt_port = 0; uint8_t *res_buf = NULL; - int scope = SPR_LU_SCOPE, res_type = 0, key_set = 0, sa_key_set = 0; + int scope = SPR_LU_SCOPE, res_type = 0; struct persist_transport_id *id, *id2; STAILQ_HEAD(, persist_transport_id) transport_id_list; uint64_t key = 0, sa_key = 0; @@ -510,10 +510,8 @@ scsipersist(struct cam_device *device, int argc, char **argv, char *combinedopt, } if (c == 'k') { key = tmpval; - key_set = 1; } else { sa_key = tmpval; - sa_key_set = 1; } break; } diff --git a/share/doc/papers/bufbio/bio.ms b/share/doc/papers/bufbio/bio.ms index 32e29170903e..02ea08daf929 100644 --- a/share/doc/papers/bufbio/bio.ms +++ b/share/doc/papers/bufbio/bio.ms @@ -40,7 +40,7 @@ This paper contains the road-map for a stackable "BIO" system in FreeBSD, which will support these facilities. .AE .NH -The miseducation of \f(CW.)struct buf\fP. +The miseducation of \f(CWstruct buf\fP. .PP To fully appreciate the topic, I include a little historic overview of struct buf, it is a most enlightening case of not exactly bit-rot @@ -215,7 +215,7 @@ and Vinum. They all basically do the same: they map I/O requests from a logical space to a physical space, and the mappings they perform can be 1:1 or 1:N. \** .FS -It is interesting to note that Lions in his comments to the \f(CW.)rkaddr\fP +It is interesting to note that Lions in his comments to the \f(CWrkaddr\fP routine (p. 16-2) writes \fIThe code in this procedure incorporates a special feature for files which extend over more than one disk drive. This feature is described in the UPM Section "RK(IV)". Its @@ -258,7 +258,7 @@ limited extent diskslice/label, which need only the I/O aspect, not the vnode, caching or VM linkage. .IP .I -The I/O aspect of struct buf should be put in a separate \f(CW.)struct bio\fP. +The I/O aspect of struct buf should be put in a separate \f(CWstruct bio\fP. .R .NH 1 Implications for future struct buf improvements @@ -296,7 +296,7 @@ Anything that could be added to or done with the I/O aspect of struct buf can also be added to or done with the I/O aspect if it lives in a new "struct bio". .NH 1 -Implementing a \f(CW.)struct bio\fP +Implementing a \f(CWstruct bio\fP .PP The first decision to be made was who got to use the name "struct buf", and considering the fact that it is the I/O aspect which gets separated diff --git a/share/examples/bhyve/vmrun.sh b/share/examples/bhyve/vmrun.sh index 901404b8b432..88cbd7c0ca91 100755 --- a/share/examples/bhyve/vmrun.sh +++ b/share/examples/bhyve/vmrun.sh @@ -104,7 +104,10 @@ while getopts ac:C:d:e:g:hH:iI:m:p:t: c ; do console=${OPTARG} ;; d) - eval "disk_dev${disk_total}=\"${OPTARG}\"" + disk_dev=${OPTARG%%,*} + disk_opts=${OPTARG#${disk_dev}} + eval "disk_dev${disk_total}=\"${disk_dev}\"" + eval "disk_opts${disk_total}=\"${disk_opts}\"" disk_total=$(($disk_total + 1)) ;; e) @@ -183,16 +186,16 @@ make_and_check_diskdev() echo "Launching virtual machine \"$vmname\" ..." -virtio_diskdev="$disk_dev0" +first_diskdev="$disk_dev0" ${BHYVECTL} --vm=${vmname} --destroy > /dev/null 2>&1 while [ 1 ]; do - file -s ${virtio_diskdev} | grep "boot sector" > /dev/null + file -s ${first_diskdev} | grep "boot sector" > /dev/null rc=$? if [ $rc -ne 0 ]; then - file -s ${virtio_diskdev} | grep ": Unix Fast File sys" > /dev/null + file -s ${first_diskdev} | grep ": Unix Fast File sys" > /dev/null rc=$? fi if [ $rc -ne 0 ]; then @@ -207,14 +210,22 @@ while [ 1 ]; do echo "is not readable" exit 1 fi - BOOTDISK=${isofile} - installer_opt="-s 31:0,ahci-cd,${BOOTDISK}" + BOOTDISKS="-d ${isofile}" + installer_opt="-s 31:0,ahci-cd,${isofile}" else - BOOTDISK=${virtio_diskdev} + BOOTDISKS="" + i=0 + while [ $i -lt $disk_total ] ; do + eval "disk=\$disk_dev${i}" + if [ -r ${disk} ] ; then + BOOTDISKS="$BOOTDISKS -d ${disk} " + fi + i=$(($i + 1)) + done installer_opt="" fi - ${LOADER} -c ${console} -m ${memsize} -d ${BOOTDISK} ${loader_opt} \ + ${LOADER} -c ${console} -m ${memsize} ${BOOTDISKS} ${loader_opt} \ ${vmname} bhyve_exit=$? if [ $bhyve_exit -ne 0 ]; then @@ -237,8 +248,9 @@ while [ 1 ]; do i=0 while [ $i -lt $disk_total ] ; do eval "disk=\$disk_dev${i}" + eval "opts=\$disk_opts${i}" make_and_check_diskdev "${disk}" - devargs="$devargs -s $nextslot:0,virtio-blk,${disk} " + devargs="$devargs -s $nextslot:0,virtio-blk,${disk}${opts} " nextslot=$(($nextslot + 1)) i=$(($i + 1)) done diff --git a/share/man/man4/em.4 b/share/man/man4/em.4 index ab50ab13a4e3..aa0db1a44d0e 100644 --- a/share/man/man4/em.4 +++ b/share/man/man4/em.4 @@ -45,6 +45,14 @@ kernel configuration file: .Cd "device em" .Ed .Pp +Optional multiqueue support is available via the following kernel +compile options: +.Bd -ragged -offset indent +.Cd "options EM_MULTIQUEUE" +.Ed +.Pp +Note: Activating EM_MULTIQUEUE support is not supported by Intel. +.Pp Alternatively, to load the driver as a module at boot time, place the following line in .Xr loader.conf 5 : @@ -197,6 +205,18 @@ Tunables can be set at the prompt before booting the kernel or stored in .Xr loader.conf 5 . .Bl -tag -width indent +.It Va hw.em.eee_setting +Disable or enable Energy Efficient Ethernet. +Default 1 (disabled). +.It Va hw.em.msix +Enable or disable MSI-X style interrupts. +Default 1 (enabled). +.It Va hw.em.smart_pwr_down +Enable or disable smart power down features on newer adapters. +Default 0 (disabled). +.It Va hw.em.sbp +Show bad packets when in promiscuous mode. +Default 0 (off). .It Va hw.em.rxd Number of receive descriptors allocated by the driver. The default value is 1024 for adapters newer than 82547, @@ -228,6 +248,11 @@ If .Va hw.em.tx_int_delay is non-zero, this tunable limits the maximum delay in which a transmit interrupt is generated. +.It Va hw.em.num_queues +Number of hardware queues that will be configured on this adapter (maximum of 2) +Defaults to 1. +Only valid with kernel configuration +.Cd "options EM_MULTIQUEUE". .El .Sh FILES .Bl -tag -width /dev/led/em* @@ -287,3 +312,5 @@ You can enable it on an .Nm interface using .Xr ifconfig 8 . +.Pp +Activating EM_MULTIQUEUE support requires MSI-X features. diff --git a/share/man/man4/geom.4 b/share/man/man4/geom.4 index 8f42f1b1b00a..05d483907c60 100644 --- a/share/man/man4/geom.4 +++ b/share/man/man4/geom.4 @@ -34,7 +34,7 @@ .\" .\" $FreeBSD$ .\" -.Dd September 10, 2013 +.Dd June 8, 2015 .Dt GEOM 4 .Os .Sh NAME @@ -52,12 +52,14 @@ .Cd options GEOM_JOURNAL .Cd options GEOM_LABEL .Cd options GEOM_LINUX_LVM +.Cd options GEOM_MAP .Cd options GEOM_MBR .Cd options GEOM_MIRROR .Cd options GEOM_MULTIPATH .Cd options GEOM_NOP .Cd options GEOM_PART_APM .Cd options GEOM_PART_BSD +.Cd options GEOM_PART_BSD64 .Cd options GEOM_PART_EBR .Cd options GEOM_PART_EBR_COMPAT .Cd options GEOM_PART_GPT @@ -71,6 +73,7 @@ .Cd options GEOM_SHSEC .Cd options GEOM_STRIPE .Cd options GEOM_SUNLABEL +.Cd options GEOM_UNCOMPRESS .Cd options GEOM_UZIP .Cd options GEOM_VIRSTOR .Cd options GEOM_VOL diff --git a/share/man/man4/geom_map.4 b/share/man/man4/geom_map.4 index 51b15c79f8d7..47b2aa878f8d 100644 --- a/share/man/man4/geom_map.4 +++ b/share/man/man4/geom_map.4 @@ -25,7 +25,7 @@ .\" .\" $FreeBSD$ .\" -.Dd May 17, 2011 +.Dd June 8, 2015 .Dt GEOM_MAP 4 .Os .Sh NAME @@ -36,7 +36,7 @@ To compile this driver into the kernel, place the following line in your kernel configuration file: .Bd -ragged -offset indent -.Cd "device geom_map" +.Cd "options geom_map" .Ed .Sh DESCRIPTION The diff --git a/share/man/man4/gre.4 b/share/man/man4/gre.4 index b8b47b10905a..1b99e4d1cb43 100644 --- a/share/man/man4/gre.4 +++ b/share/man/man4/gre.4 @@ -29,7 +29,7 @@ .\" .\" $FreeBSD$ .\" -.Dd November 7, 2014 +.Dd June 2, 2015 .Dt GRE 4 .Os .Sh NAME @@ -117,6 +117,44 @@ ifconfig greN inet 192.168.2.1 192.168.1.1 ifconfig greN inet tunnel B A route add -net 192.168.1 -netmask 255.255.255.0 192.168.1.1 .Ed +.Pp +In case when internal and external IP addresses are the same, +different routing tables (FIB) should be used. +The default FIB will be applied to IP packets before GRE encapsulation. +After encapsulation GRE interface should set different FIB number to +outgoing packet. +Then different FIB will be applied to such encapsulated packets. +According to this FIB packet should be routed to tunnel endpoint. +.Bd -literal +Host X -- Host A (198.51.100.1) ---tunnel--- Cisco D (203.0.113.1) -- Host E + \\ / + \\ / + +----- Host B ----- Host C -----+ + (198.51.100.254) +.Ed +.Pp +On Host A (FreeBSD): +.Pp +First of multiple FIBs should be configured via loader.conf: +.Bd -literal -offset indent +net.fibs=2 +net.add_addr_allfibs=0 +.Ed +.Pp +Then routes to the gateway and remote tunnel endpoint via this gateway +should be added to the second FIB: +.Bd -literal -offset indent +route add -net 198.51.100.0 -netmask 255.255.255.0 -fib 1 -iface em0 +route add -host 203.0.113.1 -fib 1 198.51.100.254 +.Ed +.Pp +And GRE tunnel should be configured to change FIB for encapsulated packets: +.Bd -literal -offset indent +ifconfig greN create +ifconfig greN inet 198.51.100.1 203.0.113.1 +ifconfig greN inet tunnel 198.51.100.1 203.0.113.1 tunnelfib 1 +.Ed +.Pp .Sh NOTES The MTU of .Nm diff --git a/share/man/man8/Makefile b/share/man/man8/Makefile index 2b803b62909e..dc119b556c0f 100644 --- a/share/man/man8/Makefile +++ b/share/man/man8/Makefile @@ -13,7 +13,9 @@ MAN= crash.8 \ ${_uefi.8} \ yp.8 -MLINKS= rc.8 rc.atm.8 \ +MLINKS= \ + nanobsd.8 nanobsd.sh.8 \ + rc.8 rc.atm.8 \ rc.8 rc.d.8 \ rc.8 rc.firewall.8 \ rc.8 rc.local.8 \ diff --git a/share/misc/committers-ports.dot b/share/misc/committers-ports.dot index 00e85f755bfe..b007609f3789 100644 --- a/share/misc/committers-ports.dot +++ b/share/misc/committers-ports.dot @@ -68,6 +68,7 @@ bf [label="Brendan Fabeny\nbf@FreeBSD.org\n2010/06/02"] bland [label="Alexander Nedotsukov\nbland@FreeBSD.org\n2003/08/14"] bmah [label="Bruce A. Mah\nbmah@FreeBSD.org\n2000/08/23"] bofh [label="Muhammad Moinur Rahman\nbofh@FreeBSD.org\n2014/12/23"] +brnrd [label="Bernard Spil\nbrnrd@FreeBSD.org\n2015/05/24"] brix [label="Henrik Brix Andersen\nbrix@FreeBSD.org\n2007/10/31"] brooks [label="Brooks Davies\nbrooks@FreeBSD.org\n2004/05/03"] bsam [label="Boris Samorodov\nbsam@FreeBSD.org\n2006/07/20"] @@ -224,6 +225,7 @@ trociny [label="Mikolaj Golub\ntrociny@FreeBSD.org\n2013/10/17"] uqs [label="Ulrich Spoerlein\nuqs@FreeBSD.org\n2012/01/19"] vd [label="Vasil Dimov\nvd@FreeBSD.org\n2006/01/19"] vg [label="Veniamin Gvozdikov\nvg@FreeBSD.org\n2013/06/11"] +vsevolod [label="Vsevolod Stakhov\nvsevolod@FreeBSD.org\n2005/07/22"] wen [label="Wen Heping\nwen@FreeBSD.org\n2010/12/13"] wg [label="William Grzybowski\nwg@FreeBSD.org\n2013/04/01"] wxs [label="Wesley Shields\nwxs@FreeBSD.org\n2008/01/03"] @@ -404,6 +406,7 @@ knu -> maho knu -> nobutaka knu -> nork +koobs -> brnrd koobs -> kami koobs -> xmj @@ -576,6 +579,8 @@ thierry -> riggs tmclaugh -> itetcu tmclaugh -> xride +vsevolod -> brnrd + wen -> cs wen -> culot wen -> pawel diff --git a/share/mk/bsd.lib.mk b/share/mk/bsd.lib.mk index 2c8ab36317a1..d22e78ce7f9d 100644 --- a/share/mk/bsd.lib.mk +++ b/share/mk/bsd.lib.mk @@ -169,7 +169,7 @@ _LIBS= lib${LIB_PRIVATE}${LIB}.a lib${LIB_PRIVATE}${LIB}.a: ${OBJS} ${STATICOBJS} @${ECHO} building static ${LIB} library @rm -f ${.TARGET} - @${AR} ${ARFLAGS} ${.TARGET} `NM='${NM}' lorder ${OBJS} ${STATICOBJS} | tsort -q` ${ARADD} + ${AR} ${ARFLAGS} ${.TARGET} `NM='${NM}' lorder ${OBJS} ${STATICOBJS} | tsort -q` ${ARADD} ${RANLIB} ${RANLIBFLAGS} ${.TARGET} .endif @@ -183,7 +183,7 @@ NOPATH_FILES+= ${POBJS} lib${LIB_PRIVATE}${LIB}_p.a: ${POBJS} @${ECHO} building profiled ${LIB} library @rm -f ${.TARGET} - @${AR} ${ARFLAGS} ${.TARGET} `NM='${NM}' lorder ${POBJS} | tsort -q` ${ARADD} + ${AR} ${ARFLAGS} ${.TARGET} `NM='${NM}' lorder ${POBJS} | tsort -q` ${ARADD} ${RANLIB} ${RANLIBFLAGS} ${.TARGET} .endif @@ -240,7 +240,7 @@ _LIBS+= lib${LIB_PRIVATE}${LIB}_pic.a lib${LIB_PRIVATE}${LIB}_pic.a: ${SOBJS} @${ECHO} building special pic ${LIB} library @rm -f ${.TARGET} - @${AR} ${ARFLAGS} ${.TARGET} ${SOBJS} ${ARADD} + ${AR} ${ARFLAGS} ${.TARGET} ${SOBJS} ${ARADD} ${RANLIB} ${RANLIBFLAGS} ${.TARGET} .endif diff --git a/share/mk/bsd.mkopt.mk b/share/mk/bsd.mkopt.mk index f0d9add75479..6a41dbe43b5b 100644 --- a/share/mk/bsd.mkopt.mk +++ b/share/mk/bsd.mkopt.mk @@ -70,3 +70,16 @@ MK_${var}:= no .for var in ${BROKEN_OPTIONS} MK_${var}:= no .endfor + +.for vv in ${__DEFAULT_DEPENDENT_OPTIONS} +.if defined(WITH_${vv:H}) && defined(WITHOUT_${vv:H}) +MK_${vv:H}?= no +.elif defined(WITH_${vv:H}) +MK_${vv:H}?= yes +.elif defined(WITHOUT_${vv:H}) +MK_${vv:H}?= no +.else +MK_${vv:H}?= ${MK_${vv:T}} +.endif +.endfor +.undef __DEFAULT_DEPENDENT_OPTIONS diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 8551d27906c3..36f2d0f027b2 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -74,6 +74,7 @@ u_int cpu_fxsr; /* SSE enabled */ u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ u_int cpu_clflush_line_size = 32; u_int cpu_stdext_feature; +u_int cpu_stdext_feature2; u_int cpu_max_ext_state_size; u_int cpu_mon_mwait_flags; /* MONITOR/MWAIT flags (CPUID.05H.ECX) */ u_int cpu_mon_min_size; /* MONITOR minimum range size, bytes */ diff --git a/sys/amd64/amd64/pmap.c b/sys/amd64/amd64/pmap.c index 7f256cd5bd4e..6a3de60af982 100644 --- a/sys/amd64/amd64/pmap.c +++ b/sys/amd64/amd64/pmap.c @@ -4844,6 +4844,7 @@ pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, PG_PS_FRAME, &lock))) { *pde = srcptepaddr & ~PG_W; pmap_resident_count_inc(dst_pmap, NBPDR / PAGE_SIZE); + atomic_add_long(&pmap_pde_mappings, 1); } else dstmpde->wire_count--; continue; diff --git a/sys/amd64/include/md_var.h b/sys/amd64/include/md_var.h index 0813e5fb74d3..954df3ec9c06 100644 --- a/sys/amd64/include/md_var.h +++ b/sys/amd64/include/md_var.h @@ -49,6 +49,7 @@ extern u_int via_feature_rng; extern u_int via_feature_xcrypt; extern u_int cpu_clflush_line_size; extern u_int cpu_stdext_feature; +extern u_int cpu_stdext_feature2; extern u_int cpu_fxsr; extern u_int cpu_high; extern u_int cpu_id; diff --git a/sys/amd64/include/vmparam.h b/sys/amd64/include/vmparam.h index a92dd4eb26c0..07158e88d8cc 100644 --- a/sys/amd64/include/vmparam.h +++ b/sys/amd64/include/vmparam.h @@ -90,13 +90,12 @@ #define VM_PHYSSEG_MAX 63 /* - * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool + * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool * from which physical pages are allocated and VM_FREEPOOL_DIRECT is * the pool from which physical pages for page tables and small UMA * objects are allocated. */ -#define VM_NFREEPOOL 3 -#define VM_FREEPOOL_CACHE 2 +#define VM_NFREEPOOL 2 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 1 diff --git a/sys/amd64/linux/linux_support.s b/sys/amd64/linux/linux_support.s index f809d1199b03..2a3ba1a47f11 100644 --- a/sys/amd64/linux/linux_support.s +++ b/sys/amd64/linux/linux_support.s @@ -45,9 +45,9 @@ ENTRY(futex_xchgl) movq $VM_MAXUSER_ADDRESS-4,%rax cmpq %rax,%rsi ja futex_fault - xchgq %rdi,(%rsi) - movq %rdi,(%rdx) - xorq %rax,%rax + xchgl %edi,(%rsi) + movl %edi,(%rdx) + xorl %eax,%eax movq %rax,PCB_ONFAULT(%r8) ret @@ -60,9 +60,9 @@ ENTRY(futex_addl) #ifdef SMP lock #endif - xaddq %rdi,(%rsi) - movq %rdi,(%rdx) - xorq %rax,%rax + xaddl %edi,(%rsi) + movl %edi,(%rdx) + xorl %eax,%eax movq %rax,PCB_ONFAULT(%r8) ret @@ -72,16 +72,16 @@ ENTRY(futex_orl) movq $VM_MAXUSER_ADDRESS-4,%rax cmpq %rax,%rsi ja futex_fault - movq (%rsi),%rax -1: movq %rax,%rcx - orq %rdi,%rcx + movl (%rsi),%eax +1: movl %eax,%ecx + orl %edi,%ecx #ifdef SMP lock #endif - cmpxchgq %rcx,(%rsi) + cmpxchgl %ecx,(%rsi) jnz 1b - movq %rax,(%rdx) - xorq %rax,%rax + movl %eax,(%rdx) + xorl %eax,%eax movq %rax,PCB_ONFAULT(%r8) ret @@ -91,16 +91,16 @@ ENTRY(futex_andl) movq $VM_MAXUSER_ADDRESS-4,%rax cmpq %rax,%rsi ja futex_fault - movq (%rsi),%rax -1: movq %rax,%rcx - andq %rdi,%rcx + movl (%rsi),%eax +1: movl %eax,%ecx + andl %edi,%ecx #ifdef SMP lock #endif - cmpxchgq %rcx,(%rsi) + cmpxchgl %ecx,(%rsi) jnz 1b - movq %rax,(%rdx) - xorq %rax,%rax + movl %eax,(%rdx) + xorl %eax,%eax movq %rax,PCB_ONFAULT(%r8) ret @@ -110,15 +110,15 @@ ENTRY(futex_xorl) movq $VM_MAXUSER_ADDRESS-4,%rax cmpq %rax,%rsi ja futex_fault - movq (%rsi),%rax -1: movq %rax,%rcx - xorq %rdi,%rcx + movl (%rsi),%eax +1: movl %eax,%ecx + xorl %edi,%ecx #ifdef SMP lock #endif - cmpxchgq %rcx,(%rsi) + cmpxchgl %ecx,(%rsi) jnz 1b - movq %rax,(%rdx) - xorq %rax,%rax + movl %eax,(%rdx) + xorl %eax,%eax movq %rax,PCB_ONFAULT(%r8) ret diff --git a/sys/amd64/vmm/amd/svm.c b/sys/amd64/vmm/amd/svm.c index 53b12b72c93d..b25d69d4b2eb 100644 --- a/sys/amd64/vmm/amd/svm.c +++ b/sys/amd64/vmm/amd/svm.c @@ -102,8 +102,8 @@ static MALLOC_DEFINE(M_SVM_VLAPIC, "svm-vlapic", "svm-vlapic"); /* Per-CPU context area. */ extern struct pcpu __pcpu[]; -static uint32_t svm_feature; /* AMD SVM features. */ -SYSCTL_UINT(_hw_vmm_svm, OID_AUTO, features, CTLFLAG_RD, &svm_feature, 0, +static uint32_t svm_feature = ~0U; /* AMD SVM features. */ +SYSCTL_UINT(_hw_vmm_svm, OID_AUTO, features, CTLFLAG_RDTUN, &svm_feature, 0, "SVM features advertised by CPUID.8000000AH:EDX"); static int disable_npf_assist; @@ -112,7 +112,7 @@ SYSCTL_INT(_hw_vmm_svm, OID_AUTO, disable_npf_assist, CTLFLAG_RWTUN, /* Maximum ASIDs supported by the processor */ static uint32_t nasid; -SYSCTL_UINT(_hw_vmm_svm, OID_AUTO, num_asids, CTLFLAG_RD, &nasid, 0, +SYSCTL_UINT(_hw_vmm_svm, OID_AUTO, num_asids, CTLFLAG_RDTUN, &nasid, 0, "Number of ASIDs supported by this processor"); /* Current ASID generation for each host cpu */ @@ -174,9 +174,14 @@ check_svm_features(void) /* CPUID Fn8000_000A is for SVM */ do_cpuid(0x8000000A, regs); - svm_feature = regs[3]; + svm_feature &= regs[3]; - nasid = regs[1]; + /* + * The number of ASIDs can be configured to be less than what is + * supported by the hardware but not more. + */ + if (nasid == 0 || nasid > regs[1]) + nasid = regs[1]; KASSERT(nasid > 1, ("Insufficient ASIDs for guests: %#x", nasid)); /* bhyve requires the Nested Paging feature */ diff --git a/sys/amd64/vmm/intel/vmx.c b/sys/amd64/vmm/intel/vmx.c index 7ee50d4fb30e..f590586c44b3 100644 --- a/sys/amd64/vmm/intel/vmx.c +++ b/sys/amd64/vmm/intel/vmx.c @@ -856,10 +856,11 @@ vmx_vminit(struct vm *vm, pmap_t pmap) * VM exit and entry respectively. It is also restored from the * host VMCS area on a VM exit. * - * The TSC MSR is exposed read-only. Writes are disallowed as that - * will impact the host TSC. - * XXX Writes would be implemented with a wrmsr trap, and - * then modifying the TSC offset in the VMCS. + * The TSC MSR is exposed read-only. Writes are disallowed as + * that will impact the host TSC. If the guest does a write + * the "use TSC offsetting" execution control is enabled and the + * difference between the host TSC and the guest TSC is written + * into the TSC offset in the VMCS. */ if (guest_msr_rw(vmx, MSR_GSBASE) || guest_msr_rw(vmx, MSR_FSBASE) || @@ -1130,6 +1131,22 @@ vmx_clear_nmi_window_exiting(struct vmx *vmx, int vcpu) VCPU_CTR0(vmx->vm, vcpu, "Disabling NMI window exiting"); } +int +vmx_set_tsc_offset(struct vmx *vmx, int vcpu, uint64_t offset) +{ + int error; + + if ((vmx->cap[vcpu].proc_ctls & PROCBASED_TSC_OFFSET) == 0) { + vmx->cap[vcpu].proc_ctls |= PROCBASED_TSC_OFFSET; + vmcs_write(VMCS_PRI_PROC_BASED_CTLS, vmx->cap[vcpu].proc_ctls); + VCPU_CTR0(vmx->vm, vcpu, "Enabling TSC offsetting"); + } + + error = vmwrite(VMCS_TSC_OFFSET, offset); + + return (error); +} + #define NMI_BLOCKING (VMCS_INTERRUPTIBILITY_NMI_BLOCKING | \ VMCS_INTERRUPTIBILITY_MOVSS_BLOCKING) #define HWINTR_BLOCKING (VMCS_INTERRUPTIBILITY_STI_BLOCKING | \ diff --git a/sys/amd64/vmm/intel/vmx.h b/sys/amd64/vmm/intel/vmx.h index bc488614ff74..57f5b28461f6 100644 --- a/sys/amd64/vmm/intel/vmx.h +++ b/sys/amd64/vmm/intel/vmx.h @@ -135,6 +135,8 @@ void vmx_call_isr(uintptr_t entry); u_long vmx_fix_cr0(u_long cr0); u_long vmx_fix_cr4(u_long cr4); +int vmx_set_tsc_offset(struct vmx *vmx, int vcpu, uint64_t offset); + extern char vmx_exit_guest[]; #endif diff --git a/sys/amd64/vmm/intel/vmx_msr.c b/sys/amd64/vmm/intel/vmx_msr.c index 3091f687d2c0..91b2c01b24e2 100644 --- a/sys/amd64/vmm/intel/vmx_msr.c +++ b/sys/amd64/vmm/intel/vmx_msr.c @@ -474,6 +474,9 @@ vmx_wrmsr(struct vmx *vmx, int vcpuid, u_int num, uint64_t val, bool *retu) else vm_inject_gp(vmx->vm, vcpuid); break; + case MSR_TSC: + error = vmx_set_tsc_offset(vmx, vcpuid, val - rdtsc()); + break; default: error = EINVAL; break; diff --git a/sys/amd64/vmm/vmm_instruction_emul.c b/sys/amd64/vmm/vmm_instruction_emul.c index 9b5713d5dbb3..758b7e80f77c 100644 --- a/sys/amd64/vmm/vmm_instruction_emul.c +++ b/sys/amd64/vmm/vmm_instruction_emul.c @@ -2342,7 +2342,7 @@ verify_gla(struct vm *vm, int cpuid, uint64_t gla, struct vie *vie) * instruction */ if (vie->base_register == VM_REG_GUEST_RIP) - base += vie->num_valid; + base += vie->num_processed; } idx = 0; diff --git a/sys/arm/arm/cpu_asm-v6.S b/sys/arm/arm/cpu_asm-v6.S index 842dae348b26..e3dce4cd6377 100644 --- a/sys/arm/arm/cpu_asm-v6.S +++ b/sys/arm/arm/cpu_asm-v6.S @@ -26,6 +26,7 @@ * * $FreeBSD$ */ +#include "assym.s" #include <machine/acle-compat.h> #include <machine/asm.h> @@ -33,6 +34,17 @@ #include <machine/armreg.h> #include <machine/sysreg.h> +#if __ARM_ARCH >= 6 +#define GET_PCB(tmp) \ + mrc CP15_TPIDRPRW(tmp); \ + add tmp, tmp, #(TD_PCB) +#else +.Lcurpcb: + .word _C_LABEL(__pcpu) + PC_CURPCB +#define GET_PCB(tmp) \ + ldr tmp, .Lcurpcb +#endif + /* * Define cache functions used by startup code, which counts on the fact that * only r0-r3,r12 (ip) are modified and no stack space is used. These functions @@ -208,3 +220,59 @@ ASENTRY_NP(dcache_wbinv_poc_all) bx lr #endif /* __ARM_ARCH == 6 */ END(dcache_wbinv_poc_all) + +ASENTRY_NP(dcache_wb_pou_checked) + ldr ip, .Lcpuinfo + ldr ip, [ip, #DCACHE_LINE_SIZE] + + GET_PCB(r2) + ldr r2, [r2] + + adr r3, _C_LABEL(cachebailout) + str r3, [r2, #PCB_ONFAULT] +1: + mcr CP15_DCCMVAC(r0) + add r0, r0, ip + subs r1, r1, ip + bhi 1b + DSB + mov r0, #0 + str r0, [r2, #PCB_ONFAULT] + mov r0, #1 /* cannot be faulting address */ + RET + +.Lcpuinfo: + .word cpuinfo +END(dcache_wb_pou_checked) + +ASENTRY_NP(icache_inv_pou_checked) + ldr ip, .Lcpuinfo + ldr ip, [ip, #ICACHE_LINE_SIZE] + + GET_PCB(r2) + ldr r2, [r2] + + adr r3, _C_LABEL(cachebailout) + str r3, [r2, #PCB_ONFAULT] + +1: + mcr CP15_ICIMVAU(r0) + add r0, r0, ip + subs r1, r1, ip + bhi 1b + DSB + ISB + mov r0, #0 + str r0, [r2, #PCB_ONFAULT] + mov r0, #1 /* cannot be faulting address */ + RET +END(icache_inv_pou_checked) + +/* label must be global as trap-v6.c references it */ + .global _C_LABEL(cachebailout) +_C_LABEL(cachebailout): + DSB + ISB + mov r1, #0 + str r1, [r2, #PCB_ONFAULT] + RET diff --git a/sys/arm/arm/elf_trampoline.c b/sys/arm/arm/elf_trampoline.c index 296aee1bd0b8..c3a7eeddfc93 100644 --- a/sys/arm/arm/elf_trampoline.c +++ b/sys/arm/arm/elf_trampoline.c @@ -725,7 +725,6 @@ __start(void) (unsigned int)(&load_kernel) + 800, sp); } -#ifdef __ARM_EABI__ /* We need to provide these functions but never call them */ void __aeabi_unwind_cpp_pr0(void); void __aeabi_unwind_cpp_pr1(void); @@ -737,5 +736,3 @@ void __aeabi_unwind_cpp_pr0(void) { } -#endif - diff --git a/sys/arm/arm/exception.S b/sys/arm/arm/exception.S index 2d0ad8c83e8c..5f1dff7ec03e 100644 --- a/sys/arm/arm/exception.S +++ b/sys/arm/arm/exception.S @@ -49,6 +49,7 @@ #include "assym.s" #include "opt_kdtrace.h" +#include <machine/acle-compat.h> #include <machine/asm.h> #include <machine/armreg.h> #include <machine/asmacros.h> @@ -80,7 +81,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): * NOTE: r13 and r14 are stored separately as a work around for the * SA110 rev 2 STM^ bug */ -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH < 6 #define PUSHFRAME \ sub sp, sp, #4; /* Align the stack */ \ str lr, [sp, #-4]!; /* Push the return address */ \ @@ -114,7 +115,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): * Since the current mode is used, the SVC lr field is ignored. */ -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH < 6 #define PULLFRAME \ ldr r0, [sp], #4; /* Get the SPSR from stack */ \ msr spsr_fsxc, r0; \ @@ -145,7 +146,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): * NOTE: r13 and r14 are stored separately as a work around for the * SA110 rev 2 STM^ bug */ -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH < 6 #define PUSHFRAMEINSVC \ stmdb sp, {r0-r3}; /* Save 4 registers */ \ mov r0, lr; /* Save xxx32 r14 */ \ @@ -218,7 +219,7 @@ _C_LABEL(dtrace_invop_calltrap_addr): * exit. */ -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH < 6 #define PULLFRAMEFROMSVCANDEXIT \ ldr r0, [sp], #4; /* Get the SPSR from stack */ \ msr spsr_fsxc, r0; /* restore SPSR */ \ @@ -237,7 +238,6 @@ _C_LABEL(dtrace_invop_calltrap_addr): ldmia sp, {sp, lr, pc}^ /* Restore lr and exit */ #endif -#if defined(__ARM_EABI__) /* * Unwind hints so we can unwind past functions that use * PULLFRAMEFROMSVCANDEXIT. They are run in reverse order. @@ -249,9 +249,6 @@ _C_LABEL(dtrace_invop_calltrap_addr): .pad #(2*4); /* Skip user sp and lr */ \ .save {r0-r12}; /* Restore r0-r12 */ \ .pad #(4) /* Skip spsr */ -#else -#define UNWINDSVCFRAME -#endif #define DO_AST \ ldr r0, [sp]; /* Get the SPSR from stack */ \ diff --git a/sys/arm/arm/genassym.c b/sys/arm/arm/genassym.c index 3301ce156d51..11bb90fb2953 100644 --- a/sys/arm/arm/genassym.c +++ b/sys/arm/arm/genassym.c @@ -38,6 +38,8 @@ __FBSDID("$FreeBSD$"); #include <vm/vm_param.h> #include <vm/pmap.h> #include <vm/vm_map.h> + +#include <machine/acle-compat.h> #include <machine/vmparam.h> #include <machine/armreg.h> #include <machine/frame.h> @@ -124,7 +126,7 @@ ASSYM(P_FLAG, offsetof(struct proc, p_flag)); ASSYM(SIGF_UC, offsetof(struct sigframe, sf_uc)); -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH < 6 ASSYM(ARM_TP_ADDRESS, ARM_TP_ADDRESS); ASSYM(ARM_RAS_START, ARM_RAS_START); ASSYM(ARM_RAS_END, ARM_RAS_END); @@ -133,8 +135,6 @@ ASSYM(ARM_RAS_END, ARM_RAS_END); #ifdef VFP ASSYM(PCB_VFPSTATE, offsetof(struct pcb, pcb_vfpstate)); -ASSYM(PC_CPU, offsetof(struct pcpu, pc_cpu)); - ASSYM(PC_CURPMAP, offsetof(struct pcpu, pc_curpmap)); #endif diff --git a/sys/arm/arm/machdep.c b/sys/arm/arm/machdep.c index 985ca0cd6f1e..55b4cb92383b 100644 --- a/sys/arm/arm/machdep.c +++ b/sys/arm/arm/machdep.c @@ -741,10 +741,13 @@ get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) struct trapframe *tf = td->td_frame; __greg_t *gr = mcp->__gregs; - if (clear_ret & GET_MC_CLEAR_RET) + if (clear_ret & GET_MC_CLEAR_RET) { gr[_REG_R0] = 0; - else + gr[_REG_CPSR] = tf->tf_spsr & ~PSR_C; + } else { gr[_REG_R0] = tf->tf_r0; + gr[_REG_CPSR] = tf->tf_spsr; + } gr[_REG_R1] = tf->tf_r1; gr[_REG_R2] = tf->tf_r2; gr[_REG_R3] = tf->tf_r3; @@ -760,7 +763,6 @@ get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret) gr[_REG_SP] = tf->tf_usr_sp; gr[_REG_LR] = tf->tf_usr_lr; gr[_REG_PC] = tf->tf_pc; - gr[_REG_CPSR] = tf->tf_spsr; return (0); } @@ -914,9 +916,6 @@ pcpu0_init(void) #endif pcpu_init(pcpup, 0, sizeof(struct pcpu)); PCPU_SET(curthread, &thread0); -#ifdef VFP - PCPU_SET(cpu, 0); -#endif } #if defined(LINUX_BOOT_ABI) diff --git a/sys/arm/arm/mp_machdep.c b/sys/arm/arm/mp_machdep.c index 7a77bc2c34ab..083e62efb8f4 100644 --- a/sys/arm/arm/mp_machdep.c +++ b/sys/arm/arm/mp_machdep.c @@ -197,8 +197,6 @@ init_secondary(int cpu) pc->pc_curpcb = pc->pc_idlethread->td_pcb; set_curthread(pc->pc_idlethread); #ifdef VFP - pc->pc_cpu = cpu; - vfp_init(); #endif diff --git a/sys/arm/arm/pmap-v6-new.c b/sys/arm/arm/pmap-v6-new.c index 89a806cfe757..13a97dea5186 100644 --- a/sys/arm/arm/pmap-v6-new.c +++ b/sys/arm/arm/pmap-v6-new.c @@ -5768,6 +5768,7 @@ pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, ~PTE1_W; dst_pmap->pm_stats.resident_count += PTE1_SIZE / PAGE_SIZE; + pmap_pte1_mappings++; } continue; } else if (!pte1_is_link(src_pte1)) diff --git a/sys/arm/arm/stack_machdep.c b/sys/arm/arm/stack_machdep.c index 9c984a9b4ac8..9e68023e8d92 100644 --- a/sys/arm/arm/stack_machdep.c +++ b/sys/arm/arm/stack_machdep.c @@ -49,16 +49,6 @@ extern vm_offset_t kernel_vm_end; static void stack_capture(struct stack *st, u_int32_t *frame) { -#if !defined(__ARM_EABI__) && !defined(__clang__) - vm_offset_t callpc; - - while (INKERNEL(frame) && (vm_offset_t)frame < kernel_vm_end) { - callpc = frame[FR_SCP]; - if (stack_put(st, callpc) == -1) - break; - frame = (u_int32_t *)(frame[FR_RFP]); - } -#endif } void diff --git a/sys/arm/arm/swtch.S b/sys/arm/arm/swtch.S index 1d7b8f3ae008..ee6368553bcc 100644 --- a/sys/arm/arm/swtch.S +++ b/sys/arm/arm/swtch.S @@ -198,20 +198,20 @@ ENTRY(cpu_throw) str r7, [r6, #PC_CURPCB] /* We have a new curthread now so make a note it */ str r5, [r6, #PC_CURTHREAD] -#ifndef ARM_TP_ADDRESS +#if __ARM_ARCH >= 6 mcr p15, 0, r5, c13, c0, 4 #endif /* Set the new tp */ ldr r6, [r5, #(TD_MD + MD_TP)] -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH >= 6 + mcr p15, 0, r6, c13, c0, 3 +#else ldr r4, =ARM_TP_ADDRESS str r6, [r4] ldr r6, [r5, #(TD_MD + MD_RAS_START)] str r6, [r4, #4] /* ARM_RAS_START */ ldr r6, [r5, #(TD_MD + MD_RAS_END)] str r6, [r4, #8] /* ARM_RAS_END */ -#else - mcr p15, 0, r6, c13, c0, 3 #endif /* Restore all the saved registers and exit */ add r3, r7, #PCB_R4 @@ -245,7 +245,7 @@ ENTRY(cpu_switch) /* We have a new curthread now so make a note it */ GET_PCPU(r7, r2) str r1, [r7, #PC_CURTHREAD] -#ifndef ARM_TP_ADDRESS +#if __ARM_ARCH >= 6 mcr p15, 0, r1, c13, c0, 4 #endif @@ -259,7 +259,14 @@ ENTRY(cpu_switch) ldr r2, [r0, #(TD_PCB)] mov r4, r0 /* Save the old thread. */ -#ifdef ARM_TP_ADDRESS +#if __ARM_ARCH >= 6 + /* + * Set new tp. No need to store the old one first, userland can't + * change it directly on armv6. + */ + ldr r9, [r1, #(TD_MD + MD_TP)] + mcr p15, 0, r9, c13, c0, 3 +#else /* Store the old tp; userland can change it on armv4. */ ldr r3, =ARM_TP_ADDRESS ldr r9, [r3] @@ -276,13 +283,6 @@ ENTRY(cpu_switch) str r9, [r3, #4] ldr r9, [r1, #(TD_MD + MD_RAS_END)] str r9, [r3, #8] -#else - /* - * Set new tp. No need to store the old one first, userland can't - * change it directly on armv6. - */ - ldr r9, [r1, #(TD_MD + MD_TP)] - mcr p15, 0, r9, c13, c0, 3 #endif /* Get the user structure for the new process in r9 */ diff --git a/sys/arm/arm/sys_machdep.c b/sys/arm/arm/sys_machdep.c index b12cdd57e924..efebda32262e 100644 --- a/sys/arm/arm/sys_machdep.c +++ b/sys/arm/arm/sys_machdep.c @@ -41,8 +41,13 @@ __FBSDID("$FreeBSD$"); #include <sys/sysproto.h> #include <sys/syscall.h> #include <sys/sysent.h> +#include <vm/vm.h> +#include <vm/vm_extern.h> +#include <machine/acle-compat.h> +#include <machine/cpu-v6.h> #include <machine/sysarch.h> +#include <machine/vmparam.h> #ifndef _SYS_SYSPROTO_H_ struct sysarch_args { @@ -55,16 +60,89 @@ struct sysarch_args { static int arm32_sync_icache (struct thread *, void *); static int arm32_drain_writebuf(struct thread *, void *); +#if __ARM_ARCH >= 6 +static int +sync_icache(uintptr_t addr, size_t len) +{ + size_t size; + vm_offset_t rv; + + /* + * Align starting address to even number because value of "1" + * is used as return value for success. + */ + len += addr & 1; + addr &= ~1; + + /* Break whole range to pages. */ + do { + size = PAGE_SIZE - (addr & PAGE_MASK); + size = min(size, len); + rv = dcache_wb_pou_checked(addr, size); + if (rv == 1) /* see dcache_wb_pou_checked() */ + rv = icache_inv_pou_checked(addr, size); + if (rv != 1) { + if (!useracc((void *)addr, size, VM_PROT_READ)) { + /* Invalid access */ + return (rv); + } + /* Valid but unmapped page - skip it. */ + } + len -= size; + addr += size; + } while (len > 0); + + /* Invalidate branch predictor buffer. */ + bpb_inv_all(); + return (1); +} +#endif + static int arm32_sync_icache(struct thread *td, void *args) { struct arm_sync_icache_args ua; int error; + ksiginfo_t ksi; +#if __ARM_ARCH >= 6 + vm_offset_t rv; +#endif if ((error = copyin(args, &ua, sizeof(ua))) != 0) return (error); + if (ua.len == 0) { + td->td_retval[0] = 0; + return (0); + } + + /* + * Validate arguments. Address and length are unsigned, + * so we can use wrapped overflow check. + */ + if (((ua.addr + ua.len) < ua.addr) || + ((ua.addr + ua.len) > VM_MAXUSER_ADDRESS)) { + ksiginfo_init_trap(&ksi); + ksi.ksi_signo = SIGSEGV; + ksi.ksi_code = SEGV_ACCERR; + ksi.ksi_addr = (void *)max(ua.addr, VM_MAXUSER_ADDRESS); + trapsignal(td, &ksi); + return (EINVAL); + } + +#if __ARM_ARCH >= 6 + rv = sync_icache(ua.addr, ua.len); + if (rv != 1) { + ksiginfo_init_trap(&ksi); + ksi.ksi_signo = SIGSEGV; + ksi.ksi_code = SEGV_MAPERR; + ksi.ksi_addr = (void *)rv; + trapsignal(td, &ksi); + return (EINVAL); + } +#else cpu_icache_sync_range(ua.addr, ua.len); +#endif td->td_retval[0] = 0; return (0); @@ -85,7 +163,7 @@ arm32_set_tp(struct thread *td, void *args) { td->td_md.md_tp = (register_t)args; -#ifndef ARM_TP_ADDRESS +#if __ARM_ARCH >= 6 set_tls(args); #else *(register_t *)ARM_TP_ADDRESS = (register_t)args; @@ -97,7 +175,7 @@ static int arm32_get_tp(struct thread *td, void *args) { -#ifndef ARM_TP_ADDRESS +#if __ARM_ARCH >= 6 td->td_retval[0] = td->td_md.md_tp; #else td->td_retval[0] = *(register_t *)ARM_TP_ADDRESS; diff --git a/sys/arm/arm/trap-v6.c b/sys/arm/arm/trap-v6.c index abafa8619f45..833b42f7846b 100644 --- a/sys/arm/arm/trap-v6.c +++ b/sys/arm/arm/trap-v6.c @@ -67,6 +67,7 @@ __FBSDID("$FreeBSD$"); #endif extern char fusubailout[]; +extern char cachebailout[]; #ifdef DEBUG int last_fault_code; /* For the benefit of pmap_fault_fixup() */ @@ -133,7 +134,7 @@ static const struct abort aborts[] = { {abort_align, "Alignment Fault"}, {abort_fatal, "Debug Event"}, {NULL, "Access Bit (L1)"}, - {abort_icache, "Instruction cache maintenance"}, + {NULL, "Instruction cache maintenance"}, {NULL, "Translation Fault (L1)"}, {NULL, "Access Bit (L2)"}, {NULL, "Translation Fault (L2)"}, @@ -406,6 +407,24 @@ abort_handler(struct trapframe *tf, int prefetch) } /* + * Don't pass faulting cache operation to vm_fault(). We don't want + * to handle all vm stuff at this moment. + */ + pcb = td->td_pcb; + if (__predict_false(pcb->pcb_onfault == cachebailout)) { + tf->tf_r0 = far; /* return failing address */ + tf->tf_pc = (register_t)pcb->pcb_onfault; + return; + } + + /* Handle remaining I cache aborts. */ + if (idx == FAULT_ICACHE) { + if (abort_icache(tf, idx, fsr, far, prefetch, td, &ksig)) + goto do_trapsignal; + goto out; + } + + /* * At this point, we're dealing with one of the following aborts: * * FAULT_TRAN_xx - Translation diff --git a/sys/arm/arm/vfp.c b/sys/arm/arm/vfp.c index cd2c14ff5df2..2494461c1158 100644 --- a/sys/arm/arm/vfp.c +++ b/sys/arm/arm/vfp.c @@ -199,7 +199,7 @@ vfp_bounce(u_int addr, u_int insn, struct trapframe *frame, int code) */ fmxr(fpexc, fpexc | VFPEXC_EN); curpcb = curthread->td_pcb; - cpu = PCPU_GET(cpu); + cpu = PCPU_GET(cpuid); if (curpcb->pcb_vfpcpu != cpu || curthread != PCPU_GET(fpcurthread)) { vfp_restore(&curpcb->pcb_vfpstate); curpcb->pcb_vfpcpu = cpu; diff --git a/sys/arm/arm/vm_machdep.c b/sys/arm/arm/vm_machdep.c index f38d708bc41a..223ad96cfb39 100644 --- a/sys/arm/arm/vm_machdep.c +++ b/sys/arm/arm/vm_machdep.c @@ -54,6 +54,8 @@ __FBSDID("$FreeBSD$"); #include <sys/sysctl.h> #include <sys/sysent.h> #include <sys/unistd.h> + +#include <machine/acle-compat.h> #include <machine/cpu.h> #include <machine/frame.h> #include <machine/pcb.h> @@ -143,10 +145,10 @@ cpu_fork(register struct thread *td1, register struct proc *p2, /* Setup to release spin count in fork_exit(). */ td2->td_md.md_spinlock_count = 1; td2->td_md.md_saved_cspr = PSR_SVC32_MODE;; -#ifdef ARM_TP_ADDRESS - td2->td_md.md_tp = *(register_t *)ARM_TP_ADDRESS; -#else +#if __ARM_ARCH >= 6 td2->td_md.md_tp = td1->td_md.md_tp; +#else + td2->td_md.md_tp = *(register_t *)ARM_TP_ADDRESS; #endif } @@ -273,10 +275,10 @@ cpu_set_user_tls(struct thread *td, void *tls_base) td->td_md.md_tp = (register_t)tls_base; if (td == curthread) { critical_enter(); -#ifdef ARM_TP_ADDRESS - *(register_t *)ARM_TP_ADDRESS = (register_t)tls_base; -#else +#if __ARM_ARCH >= 6 set_tls(tls_base); +#else + *(register_t *)ARM_TP_ADDRESS = (register_t)tls_base; #endif critical_exit(); } diff --git a/sys/arm/broadcom/bcm2835/bcm2835_spi.c b/sys/arm/broadcom/bcm2835/bcm2835_spi.c index 3692c6770cec..99de5e7d6c38 100644 --- a/sys/arm/broadcom/bcm2835/bcm2835_spi.c +++ b/sys/arm/broadcom/bcm2835/bcm2835_spi.c @@ -427,6 +427,15 @@ bcm_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) KASSERT(cmd->tx_data_sz == cmd->rx_data_sz, ("TX/RX data sizes should be equal")); + /* Get the proper chip select for this child. */ + spibus_get_cs(child, &cs); + if (cs < 0 || cs > 2) { + device_printf(dev, + "Invalid chip select %d requested by %s\n", cs, + device_get_nameunit(child)); + return (EINVAL); + } + BCM_SPI_LOCK(sc); /* If the controller is in use wait until it is available. */ @@ -441,16 +450,6 @@ bcm_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) SPI_CS_CLEAR_RXFIFO | SPI_CS_CLEAR_TXFIFO, SPI_CS_CLEAR_RXFIFO | SPI_CS_CLEAR_TXFIFO); - /* Get the proper chip select for this child. */ - spibus_get_cs(child, &cs); - if (cs < 0 || cs > 2) { - device_printf(dev, - "Invalid chip select %d requested by %s\n", cs, - device_get_nameunit(child)); - BCM_SPI_UNLOCK(sc); - return (EINVAL); - } - /* Save a pointer to the SPI command. */ sc->sc_cmd = cmd; sc->sc_read = 0; @@ -471,8 +470,10 @@ bcm_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) /* Make sure the SPI engine and interrupts are disabled. */ bcm_spi_modifyreg(sc, SPI_CS, SPI_CS_TA | SPI_CS_INTR | SPI_CS_INTD, 0); - /* Clear the controller flags. */ + /* Release the controller and wakeup the next thread waiting for it. */ sc->sc_flags = 0; + wakeup_one(dev); + BCM_SPI_UNLOCK(sc); /* * Check for transfer timeout. The SPI controller doesn't @@ -483,8 +484,6 @@ bcm_spi_transfer(device_t dev, device_t child, struct spi_command *cmd) err = EIO; } - BCM_SPI_UNLOCK(sc); - return (err); } diff --git a/sys/arm/freescale/imx/imx6_sdma.c b/sys/arm/freescale/imx/imx6_sdma.c index 91d66afc12eb..ae9a3390cc50 100644 --- a/sys/arm/freescale/imx/imx6_sdma.c +++ b/sys/arm/freescale/imx/imx6_sdma.c @@ -48,6 +48,7 @@ __FBSDID("$FreeBSD$"); #include <vm/vm.h> #include <vm/vm_extern.h> #include <vm/vm_kern.h> +#include <vm/pmap.h> #include <dev/fdt/fdt_common.h> #include <dev/ofw/openfirm.h> diff --git a/sys/arm/include/pcpu.h b/sys/arm/include/pcpu.h index ee79343af01a..4ce8b3aecde8 100644 --- a/sys/arm/include/pcpu.h +++ b/sys/arm/include/pcpu.h @@ -42,12 +42,11 @@ struct vmspace; #ifdef VFP #define PCPU_MD_FIELDS \ - unsigned int pc_cpu; \ unsigned int pc_vfpsid; \ unsigned int pc_vfpmvfr0; \ unsigned int pc_vfpmvfr1; \ struct pmap *pc_curpmap; \ - char __pad[137] + char __pad[141] #else #define PCPU_MD_FIELDS \ char __pad[157] diff --git a/sys/arm/include/vmparam.h b/sys/arm/include/vmparam.h index 91b6a63dd476..b6e76bf35758 100644 --- a/sys/arm/include/vmparam.h +++ b/sys/arm/include/vmparam.h @@ -84,13 +84,12 @@ #define VM_PHYSSEG_SPARSE /* - * Create two free page pools. Since the ARM kernel virtual address + * Create one free page pool. Since the ARM kernel virtual address * space does not include a mapping onto the machine's entire physical * memory, VM_FREEPOOL_DIRECT is defined as an alias for the default * pool, VM_FREEPOOL_DEFAULT. */ -#define VM_NFREEPOOL 2 -#define VM_FREEPOOL_CACHE 1 +#define VM_NFREEPOOL 1 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 0 diff --git a/sys/arm/ti/am335x/am335x_pmic.c b/sys/arm/ti/am335x/am335x_pmic.c index 18bc438a9141..06d4a1abd310 100644 --- a/sys/arm/ti/am335x/am335x_pmic.c +++ b/sys/arm/ti/am335x/am335x_pmic.c @@ -27,7 +27,7 @@ #include <sys/cdefs.h> __FBSDID("$FreeBSD$"); /* -* TPS65217 PMIC companion chip for AM335x SoC sitting on I2C bus +* TI TPS65217 PMIC companion chip for AM335x SoC sitting on I2C bus */ #include <sys/param.h> #include <sys/systm.h> @@ -50,30 +50,10 @@ __FBSDID("$FreeBSD$"); #include <dev/ofw/ofw_bus_subr.h> #include <arm/ti/am335x/am335x_rtcvar.h> +#include <arm/ti/am335x/tps65217x.h> #include "iicbus_if.h" -#define TPS65217A 0x7 -#define TPS65217B 0xF -#define TPS65217C 0xE -#define TPS65217D 0x6 - -/* TPS65217 Reisters */ -#define TPS65217_CHIPID_REG 0x00 -#define TPS65217_INT_REG 0x02 -#define TPS65217_INT_PBM (1U << 6) -#define TPS65217_INT_ACM (1U << 5) -#define TPS65217_INT_USBM (1U << 4) -#define TPS65217_INT_PBI (1U << 2) -#define TPS65217_INT_ACI (1U << 1) -#define TPS65217_INT_USBI (1U << 0) - -#define TPS65217_STATUS_REG 0x0A -#define TPS65217_STATUS_OFF (1U << 7) -#define TPS65217_STATUS_ACPWR (1U << 3) -#define TPS65217_STATUS_USBPWR (1U << 2) -#define TPS65217_STATUS_BT (1U << 0) - #define MAX_IIC_DATA_SIZE 2 @@ -85,6 +65,13 @@ struct am335x_pmic_softc { void *sc_intrhand; }; +static const char *tps65217_voreg_c[4] = {"4.10V", "4.15V", "4.20V", "4.25V"}; + +static int am335x_pmic_bootverbose = 0; +TUNABLE_INT("hw.am335x_pmic.bootverbose", &am335x_pmic_bootverbose); +static char am335x_pmic_vo[6]; +TUNABLE_STR("hw.am335x_pmic.vo", am335x_pmic_vo, sizeof(am335x_pmic_vo)); + static void am335x_pmic_shutdown(void *, int); static int @@ -120,18 +107,19 @@ static void am335x_pmic_intr(void *arg) { struct am335x_pmic_softc *sc = (struct am335x_pmic_softc *)arg; - uint8_t int_reg, status_reg; + struct tps65217_status_reg status_reg; + struct tps65217_int_reg int_reg; int rv; char notify_buf[16]; THREAD_SLEEPING_OK(); - rv = am335x_pmic_read(sc->sc_dev, TPS65217_INT_REG, &int_reg, 1); + rv = am335x_pmic_read(sc->sc_dev, TPS65217_INT_REG, (uint8_t *)&int_reg, 1); if (rv != 0) { device_printf(sc->sc_dev, "Cannot read interrupt register\n"); THREAD_NO_SLEEPING(); return; } - rv = am335x_pmic_read(sc->sc_dev, TPS65217_STATUS_REG, &status_reg, 1); + rv = am335x_pmic_read(sc->sc_dev, TPS65217_STATUS_REG, (uint8_t *)&status_reg, 1); if (rv != 0) { device_printf(sc->sc_dev, "Cannot read status register\n"); THREAD_NO_SLEEPING(); @@ -139,11 +127,11 @@ am335x_pmic_intr(void *arg) } THREAD_NO_SLEEPING(); - if ((int_reg & TPS65217_INT_PBI) && (status_reg & TPS65217_STATUS_BT)) + if (int_reg.pbi && status_reg.pb) shutdown_nice(RB_POWEROFF); - if (int_reg & TPS65217_INT_ACI) { + if (int_reg.aci) { snprintf(notify_buf, sizeof(notify_buf), "notify=0x%02x", - (status_reg & TPS65217_STATUS_ACPWR) ? 1 : 0); + status_reg.acpwr ? 1 : 0); devctl_notify_f("ACPI", "ACAD", "power", notify_buf, M_NOWAIT); } } @@ -167,37 +155,120 @@ am335x_pmic_probe(device_t dev) } static void +am335x_pmic_dump_chgconfig(device_t dev) +{ + struct tps65217_chgconfig0_reg reg0; + struct tps65217_chgconfig1_reg reg1; + struct tps65217_chgconfig2_reg reg2; + struct tps65217_chgconfig3_reg reg3; + const char *e_d[] = {"enabled", "disabled"}; + const char *d_e[] = {"disabled", "enabled"}; + const char *i_a[] = {"inactive", "active"}; + const char *f_t[] = {"false", "true"}; + const char *timer_c[] = {"4h", "5h", "6h", "8h"}; + const char *ntc_type_c[] = {"100k", "10k"}; + const char *vprechg_c[] = {"2.9V", "2.5V"}; + const char *trange_c[] = {"0-45 C", "0-60 C"}; + const char *termif_c[] = {"2.5%", "7.5%", "15%", "18%"}; + const char *pchrgt_c[] = {"30 min", "60 min"}; + const char *dppmth_c[] = {"3.50V", "3.75V", "4.00V", "4.25V"}; + const char *ichrg_c[] = {"300mA", "400mA", "500mA", "700mA"}; + + am335x_pmic_read(dev, TPS65217_CHGCONFIG0_REG, (uint8_t *)®0, 1); + device_printf(dev, " BAT TEMP/NTC ERROR: %s\n", f_t[reg0.battemp]); + device_printf(dev, " Pre-charge timer time-out: %s\n", f_t[reg0.pchgtout]); + device_printf(dev, " Charge timer time-out: %s\n", f_t[reg0.chgtout]); + device_printf(dev, " Charger active: %s\n", f_t[reg0.active]); + device_printf(dev, " Termination current detected: %s\n", f_t[reg0.termi]); + device_printf(dev, " Thermal suspend: %s\n", f_t[reg0.tsusp]); + device_printf(dev, " DPPM active: %s\n", f_t[reg0.dppm]); + device_printf(dev, " Thermal regulation: %s\n", i_a[reg0.treg]); + + am335x_pmic_read(dev, TPS65217_CHGCONFIG1_REG, (uint8_t *)®1, 1); + device_printf(dev, " Charger: %s\n", d_e[reg1.chg_en]); + device_printf(dev, " Suspend charge: %s\n", i_a[reg1.susp]); + device_printf(dev, " Charge termination: %s\n", e_d[reg1.term]); + device_printf(dev, " Charger reset: %s\n", i_a[reg1.reset]); + device_printf(dev, " NTC TYPE: %s\n", ntc_type_c[reg1.ntc_type]); + device_printf(dev, " Safety timer: %s\n", d_e[reg1.tmr_en]); + device_printf(dev, " Charge safety timer: %s\n", timer_c[reg1.timer]); + + am335x_pmic_read(dev, TPS65217_CHGCONFIG2_REG, (uint8_t *)®2, 1); + device_printf(dev, " Charge voltage: %s\n", tps65217_voreg_c[reg2.voreg]); + device_printf(dev, " Pre-charge to fast charge transition voltage: %s\n", + vprechg_c[reg2.vprechg]); + device_printf(dev, " Dynamic timer function: %s\n", d_e[reg2.dyntmr]); + + am335x_pmic_read(dev, TPS65217_CHGCONFIG3_REG, (uint8_t *)®3, 1); + device_printf(dev, " Temperature range for charging: %s\n", trange_c[reg3.trange]); + device_printf(dev, " Termination current factor: %s\n", termif_c[reg3.termif]); + device_printf(dev, " Pre-charge time: %s\n", pchrgt_c[reg3.pchrgt]); + device_printf(dev, " Power path DPPM threshold: %s\n", dppmth_c[reg3.dppmth]); + device_printf(dev, " Charge current: %s\n", ichrg_c[reg3.ichrg]); +} + +static void +am335x_pmic_setvo(device_t dev, uint8_t vo) +{ + struct tps65217_chgconfig2_reg reg2; + + am335x_pmic_read(dev, TPS65217_CHGCONFIG2_REG, (uint8_t *)®2, 1); + reg2.voreg = vo; + am335x_pmic_write(dev, TPS65217_CHGCONFIG2_REG, (uint8_t *)®2, 1); +} + +static void am335x_pmic_start(void *xdev) { struct am335x_pmic_softc *sc; device_t dev = (device_t)xdev; - uint8_t reg; + struct tps65217_status_reg status_reg; + struct tps65217_chipid_reg chipid_reg; + uint8_t reg, vo; char name[20]; - char pwr[4][11] = {"Unknown", "USB", "AC", "USB and AC"}; + char pwr[4][11] = {"Battery", "USB", "AC", "USB and AC"}; int rv; sc = device_get_softc(dev); - am335x_pmic_read(dev, TPS65217_CHIPID_REG, ®, 1); - switch (reg>>4) { + am335x_pmic_read(dev, TPS65217_CHIPID_REG, (uint8_t *)&chipid_reg, 1); + switch (chipid_reg.chip) { case TPS65217A: - sprintf(name, "TPS65217A ver 1.%u", reg & 0xF); + sprintf(name, "TPS65217A ver 1.%u", chipid_reg.rev); break; case TPS65217B: - sprintf(name, "TPS65217B ver 1.%u", reg & 0xF); + sprintf(name, "TPS65217B ver 1.%u", chipid_reg.rev); break; case TPS65217C: - sprintf(name, "TPS65217C ver 1.%u", reg & 0xF); + sprintf(name, "TPS65217C ver 1.%u", chipid_reg.rev); break; case TPS65217D: - sprintf(name, "TPS65217D ver 1.%u", reg & 0xF); + sprintf(name, "TPS65217D ver 1.%u", chipid_reg.rev); break; default: sprintf(name, "Unknown PMIC"); } - am335x_pmic_read(dev, TPS65217_STATUS_REG, ®, 1); - device_printf(dev, "%s powered by %s\n", name, pwr[(reg>>2)&0x03]); + am335x_pmic_read(dev, TPS65217_STATUS_REG, (uint8_t *)&status_reg, 1); + device_printf(dev, "%s powered by %s\n", name, + pwr[status_reg.usbpwr | (status_reg.acpwr << 1)]); + + if (am335x_pmic_vo[0] != '\0') { + for (vo = 0; vo < 4; vo++) { + if (strcmp(tps65217_voreg_c[vo], am335x_pmic_vo) == 0) + break; + } + if (vo == 4) { + device_printf(dev, "WARNING: hw.am335x_pmic.vo=\"%s\"" + ": unsupported value\n", am335x_pmic_vo); + } else { + am335x_pmic_setvo(dev, vo); + } + } + + if (bootverbose || am335x_pmic_bootverbose) { + am335x_pmic_dump_chgconfig(dev); + } EVENTHANDLER_REGISTER(shutdown_final, am335x_pmic_shutdown, dev, SHUTDOWN_PRI_LAST); @@ -248,14 +319,15 @@ static void am335x_pmic_shutdown(void *xdev, int howto) { device_t dev; - uint8_t reg; + struct tps65217_status_reg reg; if (!(howto & RB_POWEROFF)) return; dev = (device_t)xdev; + am335x_pmic_read(dev, TPS65217_STATUS_REG, (uint8_t *)®, 1); /* Set the OFF bit on status register to start the shutdown sequence. */ - reg = TPS65217_STATUS_OFF; - am335x_pmic_write(dev, TPS65217_STATUS_REG, ®, 1); + reg.off = 1; + am335x_pmic_write(dev, TPS65217_STATUS_REG, (uint8_t *)®, 1); /* Toggle pmic_pwr_enable to shutdown the PMIC. */ am335x_rtc_pmic_pwr_toggle(); } diff --git a/sys/arm/ti/am335x/tps65217x.h b/sys/arm/ti/am335x/tps65217x.h new file mode 100644 index 000000000000..96f16dd34b4d --- /dev/null +++ b/sys/arm/ti/am335x/tps65217x.h @@ -0,0 +1,114 @@ +/*- + * Copyright (c) 2012 Damjan Marion <dmarion@FreeBSD.org> + * Copyright (c) 2015 Maksym Sobolyev <sobomax@FreeBSD.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef __TPS65217X_H__ +#define __TPS65217X_H__ + +/* + * TPS65217 PMIC is a companion chip for AM335x SoC sitting on I2C bus + */ + +/* TPS65217 Reisters */ +#define TPS65217_CHIPID_REG 0x00 +struct tps65217_chipid_reg { + unsigned int rev:4; + unsigned int chip:4; +#define TPS65217A 0x7 +#define TPS65217B 0xF +#define TPS65217C 0xE +#define TPS65217D 0x6 +} __attribute__((__packed__)); + +#define TPS65217_INT_REG 0x02 +struct tps65217_int_reg { + unsigned int usbi:1; + unsigned int aci:1; + unsigned int pbi:1; + unsigned int reserved3:1; + unsigned int usbm:1; + unsigned int acm:1; + unsigned int pbm:1; + unsigned int reserved7:1; +} __attribute__((__packed__)); + +#define TPS65217_STATUS_REG 0x0A +struct tps65217_status_reg { + unsigned int pb:1; + unsigned int reserved1:1; + unsigned int usbpwr:1; + unsigned int acpwr:1; + unsigned int reserved4:3; + unsigned int off:1; +} __attribute__((__packed__)); + +#define TPS65217_CHGCONFIG0_REG 0x03 +struct tps65217_chgconfig0_reg { + unsigned int battemp:1; + unsigned int pchgtout:1; + unsigned int chgtout:1; + unsigned int active:1; + unsigned int termi:1; + unsigned int tsusp:1; + unsigned int dppm:1; + unsigned int treg:1; +} __attribute__((__packed__)); + +#define TPS65217_CHGCONFIG1_REG 0x04 +struct tps65217_chgconfig1_reg { + unsigned int chg_en:1; + unsigned int susp:1; + unsigned int term:1; + unsigned int reset:1; + unsigned int ntc_type:1; + unsigned int tmr_en:1; + unsigned int timer:2; +} __attribute__((__packed__)); + +#define TPS65217_CHGCONFIG2_REG 0x05 +struct tps65217_chgconfig2_reg { + unsigned int reserved:4; + unsigned int voreg:2; +#define TPS65217_VO_410V 0b00 +#define TPS65217_VO_415V 0b01 +#define TPS65217_VO_420V 0b10 +#define TPS65217_VO_425V 0b11 + unsigned int vprechg:1; + unsigned int dyntmr:1; +} __attribute__((__packed__)); + +#define TPS65217_CHGCONFIG3_REG 0x06 +struct tps65217_chgconfig3_reg { + unsigned int trange:1; + unsigned int termif:2; + unsigned int pchrgt:1; + unsigned int dppmth:2; + unsigned int ichrg:2; +} __attribute__((__packed__)); + +#endif /* __TPS65217X_H__ */ diff --git a/sys/arm64/arm64/exception.S b/sys/arm64/arm64/exception.S index efb13645c08c..9568075edc94 100644 --- a/sys/arm64/arm64/exception.S +++ b/sys/arm64/arm64/exception.S @@ -33,6 +33,9 @@ __FBSDID("$FreeBSD$"); .text .macro save_registers el +.if \el == 1 + mov x18, sp +.endif stp x28, x29, [sp, #-16]! stp x26, x27, [sp, #-16]! stp x24, x25, [sp, #-16]! @@ -51,22 +54,20 @@ __FBSDID("$FreeBSD$"); mrs x10, elr_el1 mrs x11, spsr_el1 .if \el == 0 - mrs x12, sp_el0 -.else - mov x12, sp + mrs x18, sp_el0 .endif stp x10, x11, [sp, #-16]! - stp x12, lr, [sp, #-16]! + stp x18, lr, [sp, #-16]! mrs x18, tpidr_el1 .endm .macro restore_registers el - ldp x12, lr, [sp], #16 + msr daifset, #2 /* Disable interrupts, x18 may change + * in the interrupt exception handler */ + ldp x18, lr, [sp], #16 ldp x10, x11, [sp], #16 .if \el == 0 - msr sp_el0, x12 -.else - mov sp, x12 + msr sp_el0, x18 .endif msr spsr_el1, x11 msr elr_el1, x10 @@ -89,6 +90,10 @@ __FBSDID("$FreeBSD$"); ldp x24, x25, [sp], #16 ldp x26, x27, [sp], #16 ldp x28, x29, [sp], #16 +.if \el == 1 + mov sp, x18 + mrs x18, tpidr_el1 +.endif .endm .macro do_ast diff --git a/sys/arm64/include/vmparam.h b/sys/arm64/include/vmparam.h index 2065fda7dbe2..9a2d6e544596 100644 --- a/sys/arm64/include/vmparam.h +++ b/sys/arm64/include/vmparam.h @@ -75,13 +75,12 @@ #define VM_PHYSSEG_MAX 64 /* - * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool + * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool * from which physical pages are allocated and VM_FREEPOOL_DIRECT is * the pool from which physical pages for small UMA objects are * allocated. */ -#define VM_NFREEPOOL 3 -#define VM_FREEPOOL_CACHE 2 +#define VM_NFREEPOOL 2 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 1 diff --git a/sys/boot/forth/support.4th b/sys/boot/forth/support.4th index 367d157d0a60..08f500496d92 100644 --- a/sys/boot/forth/support.4th +++ b/sys/boot/forth/support.4th @@ -1437,12 +1437,12 @@ also builtins abort" Unable to load a kernel!" ; -: load_xen ( -- ) +: load_xen ( -- flag ) s" xen_kernel" getenv dup -1 <> if - 1 1 load + 1 1 load ( c-addr/u flag N -- flag ) else drop - 0 + 0 ( -1 -- flag ) then ; diff --git a/sys/boot/userboot/userboot/conf.c b/sys/boot/userboot/userboot/conf.c index 6727a223e327..b8daa7396ca3 100644 --- a/sys/boot/userboot/userboot/conf.c +++ b/sys/boot/userboot/userboot/conf.c @@ -65,10 +65,11 @@ struct fs_ops *file_system[] = { &host_fsops, &ufs_fsops, &cd9660_fsops, - &gzipfs_fsops, #if defined(USERBOOT_ZFS_SUPPORT) &zfs_fsops, #endif + &gzipfs_fsops, + &bzipfs_fsops, NULL }; diff --git a/sys/boot/zfs/zfsimpl.c b/sys/boot/zfs/zfsimpl.c index 8d21c5714302..d889047ffbd5 100644 --- a/sys/boot/zfs/zfsimpl.c +++ b/sys/boot/zfs/zfsimpl.c @@ -1255,6 +1255,10 @@ dnode_read(const spa_t *spa, const dnode_phys_t *dnode, off_t offset, void *buf, ibn = bn >> ((nlevels - i - 1) * ibshift); ibn &= ((1 << ibshift) - 1); bp = indbp[ibn]; + if (BP_IS_HOLE(&bp)) { + memset(dnode_cache_buf, 0, bsize); + break; + } rc = zio_read(spa, &bp, dnode_cache_buf); if (rc) return (rc); diff --git a/sys/cam/ctl/ctl.c b/sys/cam/ctl/ctl.c index b2cdb71304ae..62767741f5ee 100644 --- a/sys/cam/ctl/ctl.c +++ b/sys/cam/ctl/ctl.c @@ -5011,9 +5011,9 @@ ctl_disable_lun(struct ctl_be_lun *be_lun) lun->lun); mtx_lock(&softc->ctl_lock); if (retval != 0) { - printf("ctl_alloc_lun: FETD %s port %d returned error " + printf("%s: FETD %s port %d returned error " "%d for lun_disable on target %ju lun %jd\n", - port->port_name, port->targ_port, retval, + __func__, port->port_name, port->targ_port, retval, (uintmax_t)lun->target.id, (intmax_t)lun->lun); } } diff --git a/sys/cam/ctl/scsi_ctl.c b/sys/cam/ctl/scsi_ctl.c index ba595508bde4..74ec3df1f0cd 100644 --- a/sys/cam/ctl/scsi_ctl.c +++ b/sys/cam/ctl/scsi_ctl.c @@ -1657,16 +1657,24 @@ ctlfe_onoffline(void *arg, int online) * down to the SIM. Otherwise, record what the SIM * has reported. */ - if ((bus_softc->port.wwnn != 0) - && (bus_softc->port.wwpn != 0)) { + if (bus_softc->port.wwnn != 0 && bus_softc->port.wwnn + != ccb->knob.xport_specific.fc.wwnn) { ccb->knob.xport_specific.fc.wwnn = - bus_softc->port.wwnn; - ccb->knob.xport_specific.fc.wwpn = - bus_softc->port.wwpn; + bus_softc->port.wwnn; set_wwnn = 1; } else { ctl_port_set_wwns(&bus_softc->port, true, ccb->knob.xport_specific.fc.wwnn, + false, 0); + } + if (bus_softc->port.wwpn != 0 && bus_softc->port.wwpn + != ccb->knob.xport_specific.fc.wwpn) { + ccb->knob.xport_specific.fc.wwpn = + bus_softc->port.wwpn; + set_wwnn = 1; + } else { + ctl_port_set_wwns(&bus_softc->port, + false, 0, true, ccb->knob.xport_specific.fc.wwpn); } #endif /* RANDOM_WWNN */ diff --git a/sys/cddl/compat/opensolaris/sys/nvpair.h b/sys/cddl/compat/opensolaris/sys/nvpair.h index fcb0c87a3d84..c90ab70d0df2 100644 --- a/sys/cddl/compat/opensolaris/sys/nvpair.h +++ b/sys/cddl/compat/opensolaris/sys/nvpair.h @@ -29,6 +29,8 @@ #ifndef _OPENSOLARIS_SYS_NVPAIR_H_ #define _OPENSOLARIS_SYS_NVPAIR_H_ +#ifdef _KERNEL + /* * Some of the symbols in the Illumos nvpair library conflict with symbols * provided by nv(9), so we use this preprocessor hack to avoid the conflict. @@ -254,6 +256,8 @@ #define nvpair_unpack illumos_nvpair_unpack #define nvpair_unpack_descriptor illumos_nvpair_unpack_descriptor +#endif /* _KERNEL */ + #include_next <sys/nvpair.h> #endif diff --git a/sys/compat/linprocfs/linprocfs.c b/sys/compat/linprocfs/linprocfs.c index 00d02865e713..25a832586c01 100644 --- a/sys/compat/linprocfs/linprocfs.c +++ b/sys/compat/linprocfs/linprocfs.c @@ -1025,20 +1025,16 @@ linprocfs_doprocmaps(PFS_FILL_ARGS) ino = 0; if (lobj) { off = IDX_TO_OFF(lobj->size); - if (lobj->type == OBJT_VNODE) { - vp = lobj->handle; - if (vp) - vref(vp); - } - else - vp = NULL; + vp = vm_object_vnode(lobj); + if (vp != NULL) + vref(vp); if (lobj != obj) VM_OBJECT_RUNLOCK(lobj); flags = obj->flags; ref_count = obj->ref_count; shadow_count = obj->shadow_count; VM_OBJECT_RUNLOCK(obj); - if (vp) { + if (vp != NULL) { vn_fullpath(td, vp, &name, &freename); vn_lock(vp, LK_SHARED | LK_RETRY); VOP_GETATTR(vp, &vat, td->td_ucred); diff --git a/sys/compat/linux/linux_emul.c b/sys/compat/linux/linux_emul.c index a28da8d5b5d3..c2bf3aeb80a3 100644 --- a/sys/compat/linux/linux_emul.c +++ b/sys/compat/linux/linux_emul.c @@ -219,6 +219,18 @@ void linux_proc_exec(void *arg __unused, struct proc *p, struct image_params *imgp) { struct thread *td = curthread; + struct thread *othertd; + + /* + * In a case of execing from linux binary properly detach + * other threads from the user space. + */ + if (__predict_false(SV_PROC_ABI(p) == SV_ABI_LINUX)) { + FOREACH_THREAD_IN_PROC(p, othertd) { + if (td != othertd) + (p->p_sysent->sv_thread_detach)(othertd); + } + } /* * In a case of execing to linux binary we create linux diff --git a/sys/compat/linux/linux_socket.c b/sys/compat/linux/linux_socket.c index 7d52943a131f..34d69ff7626d 100644 --- a/sys/compat/linux/linux_socket.c +++ b/sys/compat/linux/linux_socket.c @@ -787,6 +787,7 @@ linux_accept_common(struct thread *td, int s, l_uintptr_t addr, /* XXX: */ bsd_args.name = (struct sockaddr * __restrict)PTRIN(addr); bsd_args.anamelen = PTRIN(namelen);/* XXX */ + bsd_args.flags = 0; error = linux_set_socket_flags(flags, &bsd_args.flags); if (error != 0) return (error); diff --git a/sys/conf/NOTES b/sys/conf/NOTES index 8f00f59d9d7c..90fc66e95caa 100644 --- a/sys/conf/NOTES +++ b/sys/conf/NOTES @@ -156,6 +156,7 @@ options GEOM_GATE # Userland services. options GEOM_JOURNAL # Journaling. options GEOM_LABEL # Providers labelization. options GEOM_LINUX_LVM # Linux LVM2 volumes +options GEOM_MAP # Map based partitioning options GEOM_MBR # DOS/MBR partitioning options GEOM_MIRROR # Disk mirroring. options GEOM_MULTIPATH # Disk multipath @@ -176,6 +177,7 @@ options GEOM_RAID3 # RAID3 functionality. options GEOM_SHSEC # Shared secret. options GEOM_STRIPE # Disk striping. options GEOM_SUNLABEL # Sun/Solaris partitioning +options GEOM_UNCOMPRESS # Read-only compressed disks (lzma, zip) options GEOM_UZIP # Read-only compressed disks options GEOM_VINUM # Vinum logical volume manager options GEOM_VIRSTOR # Virtual storage. @@ -2980,6 +2982,9 @@ options RANDOM_DEBUG # Debugging messages # Module to enable execution of application via emulators like QEMU options IMAGACT_BINMISC +# Intel em(4) driver +options EM_MULTIQUEUE # Activate multiqueue features/disable MSI-X + # zlib I/O stream support # This enables support for compressed core dumps. options GZIO diff --git a/sys/conf/files b/sys/conf/files index 9660751b428f..aa97dde244cc 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -2561,6 +2561,7 @@ dev/usb/template/usb_template_msc.c optional usb_template dev/usb/template/usb_template_mtp.c optional usb_template dev/usb/template/usb_template_phone.c optional usb_template dev/usb/template/usb_template_serialnet.c optional usb_template +dev/usb/template/usb_template_midi.c optional usb_template # # USB video drivers # diff --git a/sys/conf/options b/sys/conf/options index eabd73c0e69f..511e57c0be5e 100644 --- a/sys/conf/options +++ b/sys/conf/options @@ -108,6 +108,7 @@ GEOM_JOURNAL opt_geom.h GEOM_LABEL opt_geom.h GEOM_LABEL_GPT opt_geom.h GEOM_LINUX_LVM opt_geom.h +GEOM_MAP opt_geom.h GEOM_MBR opt_geom.h GEOM_MIRROR opt_geom.h GEOM_MULTIPATH opt_geom.h @@ -940,3 +941,6 @@ RCTL opt_global.h RANDOM_YARROW opt_random.h RANDOM_FORTUNA opt_random.h RANDOM_DEBUG opt_random.h + +# Intel em(4) driver +EM_MULTIQUEUE opt_em.h diff --git a/sys/contrib/dev/acpica/common/ahuuids.c b/sys/contrib/dev/acpica/common/ahuuids.c index a96ab8f4f577..eeec8b855b4e 100644 --- a/sys/contrib/dev/acpica/common/ahuuids.c +++ b/sys/contrib/dev/acpica/common/ahuuids.c @@ -43,6 +43,7 @@ #include <contrib/dev/acpica/include/acpi.h> #include <contrib/dev/acpica/include/accommon.h> +#include <contrib/dev/acpica/include/acuuid.h> #define _COMPONENT ACPI_UTILITIES ACPI_MODULE_NAME ("ahuuids") @@ -52,44 +53,36 @@ */ const AH_UUID AcpiUuids[] = { - {"PCI Host Bridge Device", - "33db4d5b-1ff7-401c-9657-7441c03dd766"}, - - {"Platform-wide Capabilities", - "0811b06e-4a27-44f9-8d60-3cbbc22e7b48"}, - - {"Dynamic Enumeration", - "d8c1a3a6-be9b-4c9b-91bf-c3cb81fc5daf"}, - - {"GPIO Controller", - "4f248f40-d5e2-499f-834c-27758ea1cd3f"}, - - {"Battery Thermal Limit", - "4c2067e3-887d-475c-9720-4af1d3ed602e"}, - - {"Thermal Extensions", - "14d399cd-7a27-4b18-8fb4-7cb7b9f4e500"}, - - {"USB Controller", - "ce2ee385-00e6-48cb-9f05-2edb927c4899"}, - - {"HID I2C Device", - "3cdff6f7-4267-4555-ad05-b30a3d8938de"}, - - {"Power Button Device", - "dfbcf3c5-e7a5-44e6-9c1f-29c76f6e059c"}, - - {"Device Labeling Interface", - "e5c937d0-3553-4d7a-9117-ea4d19c3434d"}, - - {"SATA Controller", - "e4db149b-fcfe-425b-a6d8-92357d78fc7f"}, - - {"Physical Presence Interface", - "3dddfaa6-361b-4eb4-a424-8d10089d1653"}, - - {"Device Properties for _DSD", - "daffd814-6eba-4d8c-8a91-bc9bbf4aa301"}, + {"[Controllers]", NULL}, + {"GPIO Controller", UUID_GPIO_CONTROLLER}, + {"USB Controller", UUID_USB_CONTROLLER}, + {"SATA Controller", UUID_SATA_CONTROLLER}, + + {"[Devices]", NULL}, + {"PCI Host Bridge Device", UUID_PCI_HOST_BRIDGE}, + {"HID I2C Device", UUID_I2C_DEVICE}, + {"Power Button Device", UUID_POWER_BUTTON}, + + {"[Interfaces]", NULL}, + {"Device Labeling Interface", UUID_DEVICE_LABELING}, + {"Physical Presence Interface", UUID_PHYSICAL_PRESENCE}, + + {"[Non-volatile DIMM and NFIT table]", NULL}, + {"Volatile Memory Region", UUID_VOLATILE_MEMORY}, + {"Persistent Memory Region", UUID_PERSISTENT_MEMORY}, + {"NVDIMM Control Region", UUID_CONTROL_REGION}, + {"NVDIMM Data Region", UUID_DATA_REGION}, + {"Volatile Virtual Disk", UUID_VOLATILE_VIRTUAL_DISK}, + {"Volatile Virtual CD", UUID_VOLATILE_VIRTUAL_CD}, + {"Persistent Virtual Disk", UUID_PERSISTENT_VIRTUAL_DISK}, + {"Persistent Virtual CD", UUID_PERSISTENT_VIRTUAL_CD}, + + {"[Miscellaneous]", NULL}, + {"Platform-wide Capabilities", UUID_PLATFORM_CAPABILITIES}, + {"Dynamic Enumeration", UUID_DYNAMIC_ENUMERATION}, + {"Battery Thermal Limit", UUID_BATTERY_THERMAL_LIMIT}, + {"Thermal Extensions", UUID_THERMAL_EXTENSIONS}, + {"Device Properties for _DSD", UUID_DEVICE_PROPERTIES}, {NULL, NULL} }; @@ -120,6 +113,13 @@ AcpiAhMatchUuid ( for (Info = AcpiUuids; Info->Description; Info++) { + /* Null string means desciption is a UUID class */ + + if (!Info->String) + { + continue; + } + AcpiUtConvertStringToUuid (Info->String, UuidBuffer); if (!ACPI_MEMCMP (Data, UuidBuffer, UUID_BUFFER_LENGTH)) diff --git a/sys/contrib/dev/acpica/include/acuuid.h b/sys/contrib/dev/acpica/include/acuuid.h index cfc4363336ec..59c1768fc7a9 100644 --- a/sys/contrib/dev/acpica/include/acuuid.h +++ b/sys/contrib/dev/acpica/include/acuuid.h @@ -50,15 +50,41 @@ * Note2: This file is standalone and should remain that way. */ -/* NFIT/NVDIMM */ +/* Controllers */ + +#define UUID_GPIO_CONTROLLER "4f248f40-d5e2-499f-834c-27758ea1cd3f" +#define UUID_USB_CONTROLLER "ce2ee385-00e6-48cb-9f05-2edb927c4899" +#define UUID_SATA_CONTROLLER "e4db149b-fcfe-425b-a6d8-92357d78fc7f" + +/* Devices */ + +#define UUID_PCI_HOST_BRIDGE "33db4d5b-1ff7-401c-9657-7441c03dd766" +#define UUID_I2C_DEVICE "3cdff6f7-4267-4555-ad05-b30a3d8938de" +#define UUID_POWER_BUTTON "dfbcf3c5-e7a5-44e6-9c1f-29c76f6e059c" + +/* Interfaces */ + +#define UUID_DEVICE_LABELING "e5c937d0-3553-4d7a-9117-ea4d19c3434d" +#define UUID_PHYSICAL_PRESENCE "3dddfaa6-361b-4eb4-a424-8d10089d1653" + +/* NVDIMM - NFIT table */ + +#define UUID_VOLATILE_MEMORY "7305944f-fdda-44e3-b16c-3f22d252e5d0" +#define UUID_PERSISTENT_MEMORY "66f0d379-b4f3-4074-ac43-0d3318b78cdb" +#define UUID_CONTROL_REGION "92f701f6-13b4-405d-910b-299367e8234c" +#define UUID_DATA_REGION "91af0530-5d86-470e-a6b0-0a2db9408249" +#define UUID_VOLATILE_VIRTUAL_DISK "77ab535a-45fc-624b-5560-f7b281d1f96e" +#define UUID_VOLATILE_VIRTUAL_CD "3d5abd30-4175-87ce-6d64-d2ade523c4bb" +#define UUID_PERSISTENT_VIRTUAL_DISK "5cea02c9-4d07-69d3-269f-4496fbe096f9" +#define UUID_PERSISTENT_VIRTUAL_CD "08018188-42cd-bb48-100f-5387d53ded3d" + +/* Miscellaneous */ + +#define UUID_PLATFORM_CAPABILITIES "0811b06e-4a27-44f9-8d60-3cbbc22e7b48" +#define UUID_DYNAMIC_ENUMERATION "d8c1a3a6-be9b-4c9b-91bf-c3cb81fc5daf" +#define UUID_BATTERY_THERMAL_LIMIT "4c2067e3-887d-475c-9720-4af1d3ed602e" +#define UUID_THERMAL_EXTENSIONS "14d399cd-7a27-4b18-8fb4-7cb7b9f4e500" +#define UUID_DEVICE_PROPERTIES "daffd814-6eba-4d8c-8a91-bc9bbf4aa301" -#define UUID_VOLATILE_MEMORY "4F940573-DAFD-E344-B16C-3F22D252E5D0" -#define UUID_PERSISTENT_MEMORY "79D3F066-F3B4-7440-AC43-0D3318B78CDB" -#define UUID_CONTROL_REGION "F601F792-B413-5D40-910B-299367E8234C" -#define UUID_DATA_REGION "3005AF91-865D-0E47-A6B0-0A2DB9408249" -#define UUID_VOLATILE_VIRTUAL_DISK "5A53AB77-FC45-4B62-5560-F7B281D1F96E" -#define UUID_VOLATILE_VIRTUAL_CD "30BD5A3D-7541-CE87-6D64-D2ADE523C4BB" -#define UUID_PERSISTENT_VIRTUAL_DISK "C902EA5C-074D-69D3-269F-4496FBE096F9" -#define UUID_PERSISTENT_VIRTUAL_CD "88810108-CD42-48BB-100F-5387D53DED3D" #endif /* __AUUID_H__ */ diff --git a/sys/dev/ahci/ahci.h b/sys/dev/ahci/ahci.h index 33de2f9353c0..68925273b445 100644 --- a/sys/dev/ahci/ahci.h +++ b/sys/dev/ahci/ahci.h @@ -578,7 +578,7 @@ enum ahci_err_type { #define AHCI_Q_RESTORE_CAP 0x00080000 #define AHCI_Q_BIT_STRING \ - "\021" \ + "\020" \ "\001NOFORCE" \ "\002NOPMP" \ "\003NONCQ" \ diff --git a/sys/dev/aic7xxx/aic79xx_pci.c b/sys/dev/aic7xxx/aic79xx_pci.c index cb2dbc31b42b..0b8ca400441a 100644 --- a/sys/dev/aic7xxx/aic79xx_pci.c +++ b/sys/dev/aic7xxx/aic79xx_pci.c @@ -93,6 +93,11 @@ ahd_compose_id(u_int device, u_int vendor, u_int subdevice, u_int subvendor) #define ID_AIC7902_PCI_REV_A4 0x3 #define ID_AIC7902_PCI_REV_B0 0x10 #define SUBID_HP 0x0E11 +#define DEVICE8081 0x8081 +#define DEVICE8088 0x8088 +#define DEVICE8089 0x8089 +#define ADAPTECVENDORID 0x9005 +#define SUBVENDOR9005 0x9005 #define DEVID_9005_HOSTRAID(id) ((id) & 0x80) @@ -292,6 +297,15 @@ ahd_find_pci_device(aic_dev_softc_t pci) device = aic_pci_read_config(pci, PCIR_DEVICE, /*bytes*/2); subvendor = aic_pci_read_config(pci, PCIR_SUBVEND_0, /*bytes*/2); subdevice = aic_pci_read_config(pci, PCIR_SUBDEV_0, /*bytes*/2); + + if ((vendor == ADAPTECVENDORID) && (subvendor == SUBVENDOR9005)) { + if ((device == DEVICE8081) || (device == DEVICE8088) || + (device == DEVICE8089)) { + printf("Controller device ID conflict with PMC Adaptec HBA\n"); + return (NULL); + } + } + full_id = ahd_compose_id(device, vendor, subdevice, diff --git a/sys/dev/cxgbe/t4_netmap.c b/sys/dev/cxgbe/t4_netmap.c index 7d4860381222..c73914605df7 100644 --- a/sys/dev/cxgbe/t4_netmap.c +++ b/sys/dev/cxgbe/t4_netmap.c @@ -297,7 +297,7 @@ alloc_nm_rxq_hwq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int cong) (fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) | (black_hole == 2 ? F_FW_IQ_CMD_FL0PACKEN : 0)); c.fl0dcaen_to_fl0cidxfthresh = - htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) | + htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_128B) | V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B)); c.fl0size = htobe16(na->num_rx_desc / 8 + spg_len / EQ_ESIZE); c.fl0addr = htobe64(nm_rxq->fl_ba); diff --git a/sys/dev/drm/drmP.h b/sys/dev/drm/drmP.h index bf5feedc7e6e..7725884693a8 100644 --- a/sys/dev/drm/drmP.h +++ b/sys/dev/drm/drmP.h @@ -51,9 +51,7 @@ struct drm_file; #include <sys/conf.h> #include <sys/sglist.h> #include <sys/stat.h> -#if __FreeBSD_version >= 700000 #include <sys/priv.h> -#endif #include <sys/proc.h> #include <sys/lock.h> #include <sys/fcntl.h> @@ -94,11 +92,7 @@ struct drm_file; #include <sys/mman.h> #include <sys/rman.h> #include <sys/memrange.h> -#if __FreeBSD_version >= 800004 #include <dev/agp/agpvar.h> -#else /* __FreeBSD_version >= 800004 */ -#include <pci/agpvar.h> -#endif /* __FreeBSD_version >= 800004 */ #include <sys/agpio.h> #include <sys/mutex.h> #include <dev/pci/pcivar.h> @@ -227,11 +221,7 @@ enum { #define PAGE_ALIGN(addr) round_page(addr) /* DRM_SUSER returns true if the user is superuser */ -#if __FreeBSD_version >= 700000 #define DRM_SUSER(p) (priv_check(p, PRIV_DRIVER) == 0) -#else -#define DRM_SUSER(p) (suser(p) == 0) -#endif #define DRM_AGP_FIND_DEVICE() agp_find_device() #define DRM_MTRR_WC MDF_WRITECOMBINE #define jiffies ticks diff --git a/sys/dev/drm/drm_agpsupport.c b/sys/dev/drm/drm_agpsupport.c index 6a7ebcf5e9ef..4bb4e7a6ca1d 100644 --- a/sys/dev/drm/drm_agpsupport.c +++ b/sys/dev/drm/drm_agpsupport.c @@ -38,50 +38,15 @@ __FBSDID("$FreeBSD$"); #include "dev/drm/drmP.h" -#if __FreeBSD_version >= 800004 #include <dev/agp/agpreg.h> -#else /* __FreeBSD_version >= 800004 */ -#include <pci/agpreg.h> -#endif /* __FreeBSD_version >= 800004 */ #include <dev/pci/pcireg.h> /* Returns 1 if AGP or 0 if not. */ static int drm_device_find_capability(struct drm_device *dev, int cap) { -#if __FreeBSD_version >= 602102 return (pci_find_cap(dev->device, cap, NULL) == 0); -#else - /* Code taken from agp.c. IWBNI that was a public interface. */ - u_int32_t status; - u_int8_t ptr, next; - - /* - * Check the CAP_LIST bit of the PCI status register first. - */ - status = pci_read_config(dev->device, PCIR_STATUS, 2); - if (!(status & 0x10)) - return 0; - - /* - * Traverse the capabilities list. - */ - for (ptr = pci_read_config(dev->device, AGP_CAPPTR, 1); - ptr != 0; - ptr = next) { - u_int32_t capid = pci_read_config(dev->device, ptr, 4); - next = AGP_CAPID_GET_NEXT_PTR(capid); - - /* - * If this capability entry ID is cap, then we are done. - */ - if (AGP_CAPID_GET_CAP_ID(capid) == cap) - return 1; - } - - return 0; -#endif } int drm_device_is_agp(struct drm_device *dev) diff --git a/sys/dev/drm/drm_bufs.c b/sys/dev/drm/drm_bufs.c index 2d27cd4b88b5..b685a591c01f 100644 --- a/sys/dev/drm/drm_bufs.c +++ b/sys/dev/drm/drm_bufs.c @@ -1066,15 +1066,9 @@ int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv) } vaddr = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ); -#if __FreeBSD_version >= 600023 - retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE, - VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, + retcode = vm_mmap(&vms->vm_map, &vaddr, size, VM_PROT_READ | + VM_PROT_WRITE, VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, dev->devnode, foff); -#else - retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE, - VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, - SLIST_FIRST(&dev->devnode->si_hlist), foff); -#endif if (retcode) goto done; diff --git a/sys/dev/drm/drm_drv.c b/sys/dev/drm/drm_drv.c index 75983766f379..6874d45d0335 100644 --- a/sys/dev/drm/drm_drv.c +++ b/sys/dev/drm/drm_drv.c @@ -161,19 +161,8 @@ int drm_probe(device_t kdev, drm_pci_id_list_t *idlist) { drm_pci_id_list_t *id_entry; int vendor, device; -#if __FreeBSD_version < 700010 - device_t realdev; - - if (!strcmp(device_get_name(kdev), "drmsub")) - realdev = device_get_parent(kdev); - else - realdev = kdev; - vendor = pci_get_vendor(realdev); - device = pci_get_device(realdev); -#else vendor = pci_get_vendor(kdev); device = pci_get_device(kdev); -#endif if (pci_get_class(kdev) != PCIC_DISPLAY || pci_get_subclass(kdev) != PCIS_DISPLAY_VGA) @@ -200,14 +189,7 @@ int drm_attach(device_t kdev, drm_pci_id_list_t *idlist) unit = device_get_unit(kdev); dev = device_get_softc(kdev); -#if __FreeBSD_version < 700010 - if (!strcmp(device_get_name(kdev), "drmsub")) - dev->device = device_get_parent(kdev); - else - dev->device = kdev; -#else dev->device = kdev; -#endif dev->devnode = make_dev(&drm_cdevsw, 0, DRM_DEV_UID, @@ -216,11 +198,7 @@ int drm_attach(device_t kdev, drm_pci_id_list_t *idlist) "dri/card%d", unit); dev->devnode->si_drv1 = dev; -#if __FreeBSD_version >= 700053 dev->pci_domain = pci_get_domain(dev->device); -#else - dev->pci_domain = 0; -#endif dev->pci_bus = pci_get_bus(dev->device); dev->pci_slot = pci_get_slot(dev->device); dev->pci_func = pci_get_function(dev->device); diff --git a/sys/dev/drm/drm_irq.c b/sys/dev/drm/drm_irq.c index 8977bcf8a562..596569952bbb 100644 --- a/sys/dev/drm/drm_irq.c +++ b/sys/dev/drm/drm_irq.c @@ -175,15 +175,9 @@ int drm_irq_install(struct drm_device *dev) DRM_UNLOCK(); /* Install handler */ -#if __FreeBSD_version >= 700031 retcode = bus_setup_intr(dev->device, dev->irqr, INTR_TYPE_TTY | INTR_MPSAFE, NULL, drm_irq_handler_wrap, dev, &dev->irqh); -#else - retcode = bus_setup_intr(dev->device, dev->irqr, - INTR_TYPE_TTY | INTR_MPSAFE, - drm_irq_handler_wrap, dev, &dev->irqh); -#endif if (retcode != 0) goto err; diff --git a/sys/dev/drm/i915_drv.c b/sys/dev/drm/i915_drv.c index 8638df14bd32..244c7feec85a 100644 --- a/sys/dev/drm/i915_drv.c +++ b/sys/dev/drm/i915_drv.c @@ -147,19 +147,11 @@ static device_method_t i915_methods[] = { }; static driver_t i915_driver = { -#if __FreeBSD_version >= 700010 "drm", -#else - "drmsub", -#endif i915_methods, sizeof(struct drm_device) }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(i915, vgapci, i915_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(i915, agp, i915_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(i915, drm, 1, 1, 1); diff --git a/sys/dev/drm/mach64_drv.c b/sys/dev/drm/mach64_drv.c index 6f859ec953fe..f4f61cdd3e3a 100644 --- a/sys/dev/drm/mach64_drv.c +++ b/sys/dev/drm/mach64_drv.c @@ -130,9 +130,5 @@ static driver_t mach64_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(mach64, vgapci, mach64_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(mach64, pci, mach64_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(mach64, drm, 1, 1, 1); diff --git a/sys/dev/drm/mga_drv.c b/sys/dev/drm/mga_drv.c index 6bb7e2b11ee9..bc585b476096 100644 --- a/sys/dev/drm/mga_drv.c +++ b/sys/dev/drm/mga_drv.c @@ -74,11 +74,7 @@ static int mga_driver_device_is_agp(struct drm_device * dev) * device is 0x0021 (HB6 Universal PCI-PCI bridge), we reject the * device. */ -#if __FreeBSD_version >= 700010 bus = device_get_parent(device_get_parent(dev->device)); -#else - bus = device_get_parent(dev->device); -#endif if (pci_get_device(dev->device) == 0x0525 && pci_get_vendor(bus) == 0x3388 && pci_get_device(bus) == 0x0021) @@ -167,9 +163,5 @@ static driver_t mga_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(mga, vgapci, mga_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(mga, pci, mga_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(mga, drm, 1, 1, 1); diff --git a/sys/dev/drm/r128_drv.c b/sys/dev/drm/r128_drv.c index 8aebb0c07982..a112aebe2410 100644 --- a/sys/dev/drm/r128_drv.c +++ b/sys/dev/drm/r128_drv.c @@ -128,9 +128,5 @@ static driver_t r128_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(r128, vgapci, r128_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(r128, pci, r128_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(r128, drm, 1, 1, 1); diff --git a/sys/dev/drm/radeon_drv.c b/sys/dev/drm/radeon_drv.c index 53443bc99d93..a37c641dc878 100644 --- a/sys/dev/drm/radeon_drv.c +++ b/sys/dev/drm/radeon_drv.c @@ -127,9 +127,5 @@ static driver_t radeon_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(radeon, vgapci, radeon_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(radeon, pci, radeon_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(radeon, drm, 1, 1, 1); diff --git a/sys/dev/drm/savage_drv.c b/sys/dev/drm/savage_drv.c index 3c5e7c89c805..f6accaed7fac 100644 --- a/sys/dev/drm/savage_drv.c +++ b/sys/dev/drm/savage_drv.c @@ -113,9 +113,5 @@ static driver_t savage_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(savage, vgapci, savage_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(savage, pci, savage_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(savage, drm, 1, 1, 1); diff --git a/sys/dev/drm/sis_drv.c b/sys/dev/drm/sis_drv.c index 8da88ba30304..8e82ac09fae2 100644 --- a/sys/dev/drm/sis_drv.c +++ b/sys/dev/drm/sis_drv.c @@ -107,9 +107,5 @@ static driver_t sis_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(sisdrm, vgapci, sis_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(sisdrm, pci, sis_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(sisdrm, drm, 1, 1, 1); diff --git a/sys/dev/drm/tdfx_drv.c b/sys/dev/drm/tdfx_drv.c index 75b7acaa751f..2fe9eee634c8 100644 --- a/sys/dev/drm/tdfx_drv.c +++ b/sys/dev/drm/tdfx_drv.c @@ -109,9 +109,5 @@ static driver_t tdfx_driver = { }; extern devclass_t drm_devclass; -#if __FreeBSD_version >= 700010 DRIVER_MODULE(tdfx, vgapci, tdfx_driver, drm_devclass, 0, 0); -#else -DRIVER_MODULE(tdfx, pci, tdfx_driver, drm_devclass, 0, 0); -#endif MODULE_DEPEND(tdfx, drm, 1, 1, 1); diff --git a/sys/dev/drm2/drm_bufs.c b/sys/dev/drm2/drm_bufs.c index 135946685cba..483ee55e06d1 100644 --- a/sys/dev/drm2/drm_bufs.c +++ b/sys/dev/drm2/drm_bufs.c @@ -1635,12 +1635,12 @@ int drm_mapbufs(struct drm_device *dev, void *data, goto done; } retcode = vm_mmap(&vms->vm_map, &virtual, map->size, - PROT_READ | PROT_WRITE, VM_PROT_ALL, + VM_PROT_READ | VM_PROT_WRITE, VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, file_priv->minor->device, token); } else { retcode = vm_mmap(&vms->vm_map, &virtual, dma->byte_count, - PROT_READ | PROT_WRITE, VM_PROT_ALL, + VM_PROT_READ | VM_PROT_WRITE, VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, file_priv->minor->device, 0); } diff --git a/sys/dev/dwc/if_dwc.c b/sys/dev/dwc/if_dwc.c index 57e6b44eee9e..7ca16ace8e09 100644 --- a/sys/dev/dwc/if_dwc.c +++ b/sys/dev/dwc/if_dwc.c @@ -741,9 +741,11 @@ dwc_txfinish_locked(struct dwc_softc *sc) { struct dwc_bufmap *bmap; struct dwc_hwdesc *desc; + struct ifnet *ifp; DWC_ASSERT_LOCKED(sc); + ifp = sc->ifp; while (sc->tx_idx_tail != sc->tx_idx_head) { desc = &sc->txdesc_ring[sc->tx_idx_tail]; if ((desc->tdes0 & DDESC_TDES0_OWN) != 0) @@ -756,6 +758,7 @@ dwc_txfinish_locked(struct dwc_softc *sc) bmap->mbuf = NULL; dwc_setup_txdesc(sc, sc->tx_idx_tail, 0, 0); sc->tx_idx_tail = next_txidx(sc, sc->tx_idx_tail); + ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; } /* If there are no buffers outstanding, muzzle the watchdog. */ @@ -838,8 +841,10 @@ dwc_intr(void *arg) if (reg & DMA_STATUS_RI) dwc_rxfinish_locked(sc); - if (reg & DMA_STATUS_TI) + if (reg & DMA_STATUS_TI) { dwc_txfinish_locked(sc); + dwc_txstart_locked(sc); + } } if (reg & DMA_STATUS_AIS) { diff --git a/sys/dev/e1000/e1000_defines.h b/sys/dev/e1000/e1000_defines.h index 77589ed7cefe..5deada2a094b 100644 --- a/sys/dev/e1000/e1000_defines.h +++ b/sys/dev/e1000/e1000_defines.h @@ -158,10 +158,12 @@ E1000_RXDEXT_STATERR_CXE | \ E1000_RXDEXT_STATERR_RXE) +#define E1000_MRQC_RSS_ENABLE_2Q 0x00000001 #define E1000_MRQC_RSS_FIELD_MASK 0xFFFF0000 #define E1000_MRQC_RSS_FIELD_IPV4_TCP 0x00010000 #define E1000_MRQC_RSS_FIELD_IPV4 0x00020000 #define E1000_MRQC_RSS_FIELD_IPV6_TCP_EX 0x00040000 +#define E1000_MRQC_RSS_FIELD_IPV6_EX 0x00080000 #define E1000_MRQC_RSS_FIELD_IPV6 0x00100000 #define E1000_MRQC_RSS_FIELD_IPV6_TCP 0x00200000 diff --git a/sys/dev/e1000/if_em.c b/sys/dev/e1000/if_em.c index ab39c4355782..8032345d09ae 100644 --- a/sys/dev/e1000/if_em.c +++ b/sys/dev/e1000/if_em.c @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2001-2014, Intel Corporation + Copyright (c) 2001-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -32,6 +32,8 @@ ******************************************************************************/ /*$FreeBSD$*/ +#include "opt_em.h" +#include "opt_ddb.h" #include "opt_inet.h" #include "opt_inet6.h" @@ -41,6 +43,10 @@ #include <sys/param.h> #include <sys/systm.h> +#ifdef DDB +#include <sys/types.h> +#include <ddb/ddb.h> +#endif #if __FreeBSD_version >= 800000 #include <sys/buf_ring.h> #endif @@ -52,6 +58,7 @@ #include <sys/mbuf.h> #include <sys/module.h> #include <sys/rman.h> +#include <sys/smp.h> #include <sys/socket.h> #include <sys/sockio.h> #include <sys/sysctl.h> @@ -208,7 +215,7 @@ static int em_resume(device_t); #ifdef EM_MULTIQUEUE static int em_mq_start(if_t, struct mbuf *); static int em_mq_start_locked(if_t, - struct tx_ring *, struct mbuf *); + struct tx_ring *); static void em_qflush(if_t); #else static void em_start(if_t); @@ -299,6 +306,10 @@ static void em_handle_tx(void *context, int pending); static void em_handle_rx(void *context, int pending); static void em_handle_link(void *context, int pending); +#ifdef EM_MULTIQUEUE +static void em_enable_vectors_82574(struct adapter *); +#endif + static void em_set_sysctl_value(struct adapter *, const char *, const char *, int *, int); static int em_set_flowcntl(SYSCTL_HANDLER_ARGS); @@ -388,6 +399,19 @@ static int em_enable_msix = TRUE; SYSCTL_INT(_hw_em, OID_AUTO, enable_msix, CTLFLAG_RDTUN, &em_enable_msix, 0, "Enable MSI-X interrupts"); +#ifdef EM_MULTIQUEUE +static int em_num_queues = 1; +SYSCTL_INT(_hw_em, OID_AUTO, num_queues, CTLFLAG_RDTUN, &em_num_queues, 0, + "82574 only: Number of queues to configure, 0 indicates autoconfigure"); +#endif + +/* +** Global variable to store last used CPU when binding queues +** to CPUs in igb_allocate_msix. Starts at CPU_FIRST and increments when a +** queue is bound to a cpu. +*/ +static int em_last_bind_cpu = -1; + /* How many packets rxeof tries to clean at a time */ static int em_rx_process_limit = 100; SYSCTL_INT(_hw_em, OID_AUTO, rx_process_limit, CTLFLAG_RDTUN, @@ -420,10 +444,10 @@ static int em_probe(device_t dev) { char adapter_name[60]; - u16 pci_vendor_id = 0; - u16 pci_device_id = 0; - u16 pci_subvendor_id = 0; - u16 pci_subdevice_id = 0; + uint16_t pci_vendor_id = 0; + uint16_t pci_device_id = 0; + uint16_t pci_subvendor_id = 0; + uint16_t pci_subdevice_id = 0; em_vendor_info_t *ent; INIT_DEBUGOUT("em_probe: begin"); @@ -550,6 +574,11 @@ em_attach(device_t dev) goto err_pci; } + /* + * Setup MSI/X or MSI if PCI Express + */ + adapter->msix = em_setup_msix(adapter); + e1000_get_bus_info(hw); /* Set up some sysctls for the tunable interrupt delays */ @@ -880,7 +909,7 @@ em_resume(device_t dev) EM_TX_LOCK(txr); #ifdef EM_MULTIQUEUE if (!drbr_empty(ifp, txr->br)) - em_mq_start_locked(ifp, txr, NULL); + em_mq_start_locked(ifp, txr); #else if (!if_sendq_empty(ifp)) em_start_locked(ifp, txr); @@ -894,107 +923,7 @@ em_resume(device_t dev) } -#ifdef EM_MULTIQUEUE -/********************************************************************* - * Multiqueue Transmit routines - * - * em_mq_start is called by the stack to initiate a transmit. - * however, if busy the driver can queue the request rather - * than do an immediate send. It is this that is an advantage - * in this driver, rather than also having multiple tx queues. - **********************************************************************/ -static int -em_mq_start_locked(if_t ifp, struct tx_ring *txr, struct mbuf *m) -{ - struct adapter *adapter = txr->adapter; - struct mbuf *next; - int err = 0, enq = 0; - - if ((if_getdrvflags(ifp) & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) != - IFF_DRV_RUNNING || adapter->link_active == 0) { - if (m != NULL) - err = drbr_enqueue(ifp, txr->br, m); - return (err); - } - - enq = 0; - if (m != NULL) { - err = drbr_enqueue(ifp, txr->br, m); - if (err) - return (err); - } - - /* Process the queue */ - while ((next = drbr_peek(ifp, txr->br)) != NULL) { - if ((err = em_xmit(txr, &next)) != 0) { - if (next == NULL) - drbr_advance(ifp, txr->br); - else - drbr_putback(ifp, txr->br, next); - break; - } - drbr_advance(ifp, txr->br); - enq++; - if_inc_counter(ifp, IFCOUNTER_OBYTES, next->m_pkthdr.len); - if (next->m_flags & M_MCAST) - if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1); - if_etherbpfmtap(ifp, next); - if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) - break; - } - - if (enq > 0) { - /* Set the watchdog */ - txr->queue_status = EM_QUEUE_WORKING; - txr->watchdog_time = ticks; - } - - if (txr->tx_avail < EM_MAX_SCATTER) - em_txeof(txr); - if (txr->tx_avail < EM_MAX_SCATTER) - if_setdrvflagbits(ifp, IFF_DRV_OACTIVE,0); - return (err); -} - -/* -** Multiqueue capable stack interface -*/ -static int -em_mq_start(if_t ifp, struct mbuf *m) -{ - struct adapter *adapter = if_getsoftc(ifp); - struct tx_ring *txr = adapter->tx_rings; - int error; - - if (EM_TX_TRYLOCK(txr)) { - error = em_mq_start_locked(ifp, txr, m); - EM_TX_UNLOCK(txr); - } else - error = drbr_enqueue(ifp, txr->br, m); - - return (error); -} - -/* -** Flush all ring buffers -*/ -static void -em_qflush(if_t ifp) -{ - struct adapter *adapter = if_getsoftc(ifp); - struct tx_ring *txr = adapter->tx_rings; - struct mbuf *m; - - for (int i = 0; i < adapter->num_queues; i++, txr++) { - EM_TX_LOCK(txr); - while ((m = buf_ring_dequeue_sc(txr->br)) != NULL) - m_freem(m); - EM_TX_UNLOCK(txr); - } - if_qflush(ifp); -} -#else /* !EM_MULTIQUEUE */ - +#ifndef EM_MULTIQUEUE static void em_start_locked(if_t ifp, struct tx_ring *txr) { @@ -1032,12 +961,13 @@ em_start_locked(if_t ifp, struct tx_ring *txr) break; } + /* Mark the queue as having work */ + if (txr->busy == EM_TX_IDLE) + txr->busy = EM_TX_BUSY; + /* Send a copy of the frame to the BPF listener */ - if_etherbpfmtap(ifp, m_head); + ETHER_BPF_MTAP(ifp, m_head); - /* Set timeout in case hardware has problems transmitting. */ - txr->watchdog_time = ticks; - txr->queue_status = EM_QUEUE_WORKING; } return; @@ -1056,6 +986,115 @@ em_start(if_t ifp) } return; } +#else /* EM_MULTIQUEUE */ +/********************************************************************* + * Multiqueue Transmit routines + * + * em_mq_start is called by the stack to initiate a transmit. + * however, if busy the driver can queue the request rather + * than do an immediate send. It is this that is an advantage + * in this driver, rather than also having multiple tx queues. + **********************************************************************/ +/* +** Multiqueue capable stack interface +*/ +static int +em_mq_start(if_t ifp, struct mbuf *m) +{ + struct adapter *adapter = if_getsoftc(ifp); + struct tx_ring *txr = adapter->tx_rings; + unsigned int i, error; + + if (M_HASHTYPE_GET(m) != M_HASHTYPE_NONE) + i = m->m_pkthdr.flowid % adapter->num_queues; + else + i = curcpu % adapter->num_queues; + + txr = &adapter->tx_rings[i]; + + error = drbr_enqueue(ifp, txr->br, m); + if (error) + return (error); + + if (EM_TX_TRYLOCK(txr)) { + em_mq_start_locked(ifp, txr); + EM_TX_UNLOCK(txr); + } else + taskqueue_enqueue(txr->tq, &txr->tx_task); + + return (0); +} + +static int +em_mq_start_locked(if_t ifp, struct tx_ring *txr) +{ + struct adapter *adapter = txr->adapter; + struct mbuf *next; + int err = 0, enq = 0; + + EM_TX_LOCK_ASSERT(txr); + + if (((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) || + adapter->link_active == 0) { + return (ENETDOWN); + } + + /* Process the queue */ + while ((next = drbr_peek(ifp, txr->br)) != NULL) { + if ((err = em_xmit(txr, &next)) != 0) { + if (next == NULL) { + /* It was freed, move forward */ + drbr_advance(ifp, txr->br); + } else { + /* + * Still have one left, it may not be + * the same since the transmit function + * may have changed it. + */ + drbr_putback(ifp, txr->br, next); + } + break; + } + drbr_advance(ifp, txr->br); + enq++; + if_inc_counter(ifp, IFCOUNTER_OBYTES, next->m_pkthdr.len); + if (next->m_flags & M_MCAST) + if_inc_counter(ifp, IFCOUNTER_OMCASTS, 1); + ETHER_BPF_MTAP(ifp, next); + if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) + break; + } + + /* Mark the queue as having work */ + if ((enq > 0) && (txr->busy == EM_TX_IDLE)) + txr->busy = EM_TX_BUSY; + + if (txr->tx_avail < EM_MAX_SCATTER) + em_txeof(txr); + if (txr->tx_avail < EM_MAX_SCATTER) { + if_setdrvflagbits(ifp, IFF_DRV_OACTIVE,0); + } + return (err); +} + +/* +** Flush all ring buffers +*/ +static void +em_qflush(if_t ifp) +{ + struct adapter *adapter = if_getsoftc(ifp); + struct tx_ring *txr = adapter->tx_rings; + struct mbuf *m; + + for (int i = 0; i < adapter->num_queues; i++, txr++) { + EM_TX_LOCK(txr); + while ((m = buf_ring_dequeue_sc(txr->br)) != NULL) + m_freem(m); + EM_TX_UNLOCK(txr); + } + if_qflush(ifp); +} #endif /* EM_MULTIQUEUE */ /********************************************************************* @@ -1451,7 +1490,7 @@ em_poll(if_t ifp, enum poll_cmd cmd, int count) em_txeof(txr); #ifdef EM_MULTIQUEUE if (!drbr_empty(ifp, txr->br)) - em_mq_start_locked(ifp, txr, NULL); + em_mq_start_locked(ifp, txr); #else if (!if_sendq_empty(ifp)) em_start_locked(ifp, txr); @@ -1518,14 +1557,14 @@ em_handle_que(void *context, int pending) struct tx_ring *txr = adapter->tx_rings; struct rx_ring *rxr = adapter->rx_rings; - if (if_getdrvflags(ifp) & IFF_DRV_RUNNING) { bool more = em_rxeof(rxr, adapter->rx_process_limit, NULL); + EM_TX_LOCK(txr); em_txeof(txr); #ifdef EM_MULTIQUEUE if (!drbr_empty(ifp, txr->br)) - em_mq_start_locked(ifp, txr, NULL); + em_mq_start_locked(ifp, txr); #else if (!if_sendq_empty(ifp)) em_start_locked(ifp, txr); @@ -1559,11 +1598,12 @@ em_msix_tx(void *arg) em_txeof(txr); #ifdef EM_MULTIQUEUE if (!drbr_empty(ifp, txr->br)) - em_mq_start_locked(ifp, txr, NULL); + em_mq_start_locked(ifp, txr); #else if (!if_sendq_empty(ifp)) em_start_locked(ifp, txr); #endif + /* Reenable this interrupt */ E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims); EM_TX_UNLOCK(txr); @@ -1589,9 +1629,10 @@ em_msix_rx(void *arg) more = em_rxeof(rxr, adapter->rx_process_limit, NULL); if (more) taskqueue_enqueue(rxr->tq, &rxr->rx_task); - else + else { /* Reenable this interrupt */ E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxr->ims); + } return; } @@ -1618,6 +1659,16 @@ em_msix_link(void *arg) } else E1000_WRITE_REG(&adapter->hw, E1000_IMS, EM_MSIX_LINK | E1000_IMS_LSC); + /* + ** Because we must read the ICR for this interrupt + ** it may clear other causes using autoclear, for + ** this reason we simply create a soft interrupt + ** for all these vectors. + */ + if (reg_icr) { + E1000_WRITE_REG(&adapter->hw, + E1000_ICS, adapter->ims); + } return; } @@ -1631,9 +1682,10 @@ em_handle_rx(void *context, int pending) more = em_rxeof(rxr, adapter->rx_process_limit, NULL); if (more) taskqueue_enqueue(rxr->tq, &rxr->rx_task); - else + else { /* Reenable this interrupt */ E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxr->ims); + } } static void @@ -1647,7 +1699,7 @@ em_handle_tx(void *context, int pending) em_txeof(txr); #ifdef EM_MULTIQUEUE if (!drbr_empty(ifp, txr->br)) - em_mq_start_locked(ifp, txr, NULL); + em_mq_start_locked(ifp, txr); #else if (!if_sendq_empty(ifp)) em_start_locked(ifp, txr); @@ -1677,7 +1729,7 @@ em_handle_link(void *context, int pending) EM_TX_LOCK(txr); #ifdef EM_MULTIQUEUE if (!drbr_empty(ifp, txr->br)) - em_mq_start_locked(ifp, txr, NULL); + em_mq_start_locked(ifp, txr); #else if (if_sendq_empty(ifp)) em_start_locked(ifp, txr); @@ -2102,8 +2154,6 @@ retry: */ tx_buffer = &txr->tx_buffers[first]; tx_buffer->next_eop = last; - /* Update the watchdog time early and often */ - txr->watchdog_time = ticks; /* * Advance the Transmit Descriptor Tail (TDT), this tells the E1000 @@ -2223,7 +2273,7 @@ em_local_timer(void *arg) if_t ifp = adapter->ifp; struct tx_ring *txr = adapter->tx_rings; struct rx_ring *rxr = adapter->rx_rings; - u32 trigger; + u32 trigger = 0; EM_CORE_LOCK_ASSERT(adapter); @@ -2236,9 +2286,11 @@ em_local_timer(void *arg) e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0); /* Mask to use in the irq trigger */ - if (adapter->msix_mem) - trigger = rxr->ims; - else + if (adapter->msix_mem) { + for (int i = 0; i < adapter->num_queues; i++, rxr++) + trigger |= rxr->ims; + rxr = adapter->rx_rings; + } else trigger = E1000_ICS_RXDMT0; /* @@ -2247,15 +2299,15 @@ em_local_timer(void *arg) ** and the HUNG state will be static if set. */ for (int i = 0; i < adapter->num_queues; i++, txr++) { - if ((txr->queue_status == EM_QUEUE_HUNG) && - (adapter->pause_frames == 0)) + if (txr->busy == EM_TX_HUNG) goto hung; + if (txr->busy >= EM_TX_MAXTRIES) + txr->busy = EM_TX_HUNG; /* Schedule a TX tasklet if needed */ if (txr->tx_avail <= EM_MAX_SCATTER) taskqueue_enqueue(txr->tq, &txr->tx_task); } - adapter->pause_frames = 0; callout_reset(&adapter->timer, hz, em_local_timer, adapter); #ifndef DEVICE_POLLING /* Trigger an RX interrupt to guarantee mbuf refresh */ @@ -2264,17 +2316,11 @@ em_local_timer(void *arg) return; hung: /* Looks like we're hung */ - device_printf(adapter->dev, "Watchdog timeout -- resetting\n"); - device_printf(adapter->dev, - "Queue(%d) tdh = %d, hw tdt = %d\n", txr->me, - E1000_READ_REG(&adapter->hw, E1000_TDH(txr->me)), - E1000_READ_REG(&adapter->hw, E1000_TDT(txr->me))); - device_printf(adapter->dev,"TX(%d) desc avail = %d," - "Next TX to Clean = %d\n", - txr->me, txr->tx_avail, txr->next_to_clean); + device_printf(adapter->dev, "Watchdog timeout Queue[%d]-- resetting\n", + txr->me); + em_print_debug_info(adapter); if_setdrvflagbits(ifp, 0, IFF_DRV_RUNNING); adapter->watchdog_events++; - adapter->pause_frames = 0; em_init_locked(adapter); } @@ -2324,7 +2370,7 @@ em_update_link_status(struct adapter *adapter) (hw->mac.type == e1000_82572))) { int tarc0; tarc0 = E1000_READ_REG(hw, E1000_TARC(0)); - tarc0 &= ~SPEED_MODE_BIT; + tarc0 &= ~TARC_SPEED_MODE_BIT; E1000_WRITE_REG(hw, E1000_TARC(0), tarc0); } if (bootverbose) @@ -2343,9 +2389,9 @@ em_update_link_status(struct adapter *adapter) if (bootverbose) device_printf(dev, "Link is Down\n"); adapter->link_active = 0; - /* Link down, disable watchdog */ + /* Link down, disable hang detection */ for (int i = 0; i < adapter->num_queues; i++, txr++) - txr->queue_status = EM_QUEUE_IDLE; + txr->busy = EM_TX_IDLE; if_link_state_change(ifp, LINK_STATE_DOWN); } } @@ -2376,10 +2422,10 @@ em_stop(void *arg) /* Tell the stack that the interface is no longer active */ if_setdrvflagbits(ifp, IFF_DRV_OACTIVE, IFF_DRV_RUNNING); - /* Unarm watchdog timer. */ + /* Disarm Hang Detection. */ for (int i = 0; i < adapter->num_queues; i++, txr++) { EM_TX_LOCK(txr); - txr->queue_status = EM_QUEUE_IDLE; + txr->busy = EM_TX_IDLE; EM_TX_UNLOCK(txr); } @@ -2440,14 +2486,6 @@ em_allocate_pci_resources(struct adapter *adapter) rman_get_bushandle(adapter->memory); adapter->hw.hw_addr = (u8 *)&adapter->osdep.mem_bus_space_handle; - /* Default to a single queue */ - adapter->num_queues = 1; - - /* - * Setup MSI/X or MSI if PCI Express - */ - adapter->msix = em_setup_msix(adapter); - adapter->hw.back = &adapter->osdep; return (0); @@ -2522,13 +2560,14 @@ em_allocate_msix(struct adapter *adapter) struct tx_ring *txr = adapter->tx_rings; struct rx_ring *rxr = adapter->rx_rings; int error, rid, vector = 0; + int cpu_id = 0; /* Make sure all interrupts are disabled */ E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff); /* First set up ring resources */ - for (int i = 0; i < adapter->num_queues; i++, txr++, rxr++) { + for (int i = 0; i < adapter->num_queues; i++, rxr++, vector++) { /* RX ring */ rid = vector + 1; @@ -2548,14 +2587,20 @@ em_allocate_msix(struct adapter *adapter) return (error); } #if __FreeBSD_version >= 800504 - bus_describe_intr(dev, rxr->res, rxr->tag, "rx %d", i); + bus_describe_intr(dev, rxr->res, rxr->tag, "rx%d", i); #endif - rxr->msix = vector++; /* NOTE increment vector for TX */ + rxr->msix = vector; + + if (em_last_bind_cpu < 0) + em_last_bind_cpu = CPU_FIRST(); + cpu_id = em_last_bind_cpu; + bus_bind_intr(dev, rxr->res, cpu_id); + TASK_INIT(&rxr->rx_task, 0, em_handle_rx, rxr); rxr->tq = taskqueue_create_fast("em_rxq", M_NOWAIT, taskqueue_thread_enqueue, &rxr->tq); - taskqueue_start_threads(&rxr->tq, 1, PI_NET, "%s rxq", - device_get_nameunit(adapter->dev)); + taskqueue_start_threads(&rxr->tq, 1, PI_NET, "%s rxq (cpuid %d)", + device_get_nameunit(adapter->dev), cpu_id); /* ** Set the bit to enable interrupt ** in E1000_IMS -- bits 20 and 21 @@ -2563,8 +2608,13 @@ em_allocate_msix(struct adapter *adapter) ** NOTHING to do with the MSIX vector */ rxr->ims = 1 << (20 + i); + adapter->ims |= rxr->ims; adapter->ivars |= (8 | rxr->msix) << (i * 4); + em_last_bind_cpu = CPU_NEXT(em_last_bind_cpu); + } + + for (int i = 0; i < adapter->num_queues; i++, txr++, vector++) { /* TX ring */ rid = vector + 1; txr->res = bus_alloc_resource_any(dev, @@ -2582,14 +2632,20 @@ em_allocate_msix(struct adapter *adapter) return (error); } #if __FreeBSD_version >= 800504 - bus_describe_intr(dev, txr->res, txr->tag, "tx %d", i); + bus_describe_intr(dev, txr->res, txr->tag, "tx%d", i); #endif - txr->msix = vector++; /* Increment vector for next pass */ + txr->msix = vector; + + if (em_last_bind_cpu < 0) + em_last_bind_cpu = CPU_FIRST(); + cpu_id = em_last_bind_cpu; + bus_bind_intr(dev, txr->res, cpu_id); + TASK_INIT(&txr->tx_task, 0, em_handle_tx, txr); txr->tq = taskqueue_create_fast("em_txq", M_NOWAIT, taskqueue_thread_enqueue, &txr->tq); - taskqueue_start_threads(&txr->tq, 1, PI_NET, "%s txq", - device_get_nameunit(adapter->dev)); + taskqueue_start_threads(&txr->tq, 1, PI_NET, "%s txq (cpuid %d)", + device_get_nameunit(adapter->dev), cpu_id); /* ** Set the bit to enable interrupt ** in E1000_IMS -- bits 22 and 23 @@ -2597,13 +2653,16 @@ em_allocate_msix(struct adapter *adapter) ** NOTHING to do with the MSIX vector */ txr->ims = 1 << (22 + i); + adapter->ims |= txr->ims; adapter->ivars |= (8 | txr->msix) << (8 + (i * 4)); + + em_last_bind_cpu = CPU_NEXT(em_last_bind_cpu); } /* Link interrupt */ - ++rid; + rid = vector + 1; adapter->res = bus_alloc_resource_any(dev, - SYS_RES_IRQ, &rid, RF_ACTIVE); + SYS_RES_IRQ, &rid, RF_SHAREABLE | RF_ACTIVE); if (!adapter->res) { device_printf(dev,"Unable to allocate " "bus resource: Link interrupt [%d]\n", rid); @@ -2619,7 +2678,7 @@ em_allocate_msix(struct adapter *adapter) return (error); } #if __FreeBSD_version >= 800504 - bus_describe_intr(dev, adapter->res, adapter->tag, "link"); + bus_describe_intr(dev, adapter->res, adapter->tag, "link"); #endif adapter->linkvec = vector; adapter->ivars |= (8 | vector) << 16; @@ -2643,9 +2702,8 @@ em_free_pci_resources(struct adapter *adapter) */ for (int i = 0; i < adapter->num_queues; i++) { txr = &adapter->tx_rings[i]; - rxr = &adapter->rx_rings[i]; /* an early abort? */ - if ((txr == NULL) || (rxr == NULL)) + if (txr == NULL) break; rid = txr->msix +1; if (txr->tag != NULL) { @@ -2655,6 +2713,11 @@ em_free_pci_resources(struct adapter *adapter) if (txr->res != NULL) bus_release_resource(dev, SYS_RES_IRQ, rid, txr->res); + + rxr = &adapter->rx_rings[i]; + /* an early abort? */ + if (rxr == NULL) + break; rid = rxr->msix +1; if (rxr->tag != NULL) { bus_teardown_intr(dev, rxr->res, rxr->tag); @@ -2704,14 +2767,19 @@ em_setup_msix(struct adapter *adapter) device_t dev = adapter->dev; int val; + /* Nearly always going to use one queue */ + adapter->num_queues = 1; + /* - ** Setup MSI/X for Hartwell: tests have shown - ** use of two queues to be unstable, and to - ** provide no great gain anyway, so we simply - ** seperate the interrupts and use a single queue. + ** Try using MSI-X for Hartwell adapters */ if ((adapter->hw.mac.type == e1000_82574) && (em_enable_msix == TRUE)) { +#ifdef EM_MULTIQUEUE + adapter->num_queues = (em_num_queues == 1) ? 1 : 2; + if (adapter->num_queues > 1) + em_enable_vectors_82574(adapter); +#endif /* Map the MSIX BAR */ int rid = PCIR_BAR(EM_MSIX_BAR); adapter->msix_mem = bus_alloc_resource_any(dev, @@ -2723,16 +2791,34 @@ em_setup_msix(struct adapter *adapter) goto msi; } val = pci_msix_count(dev); - /* We only need/want 3 vectors */ - if (val >= 3) - val = 3; - else { - device_printf(adapter->dev, - "MSIX: insufficient vectors, using MSI\n"); - goto msi; + +#ifdef EM_MULTIQUEUE + /* We need 5 vectors in the multiqueue case */ + if (adapter->num_queues > 1 ) { + if (val >= 5) + val = 5; + else { + adapter->num_queues = 1; + device_printf(adapter->dev, + "Insufficient MSIX vectors for >1 queue, " + "using single queue...\n"); + goto msix_one; + } + } else { +msix_one: +#endif + if (val >= 3) + val = 3; + else { + device_printf(adapter->dev, + "Insufficient MSIX vectors, using MSI\n"); + goto msi; + } +#ifdef EM_MULTIQUEUE } +#endif - if ((pci_alloc_msix(dev, &val) == 0) && (val == 3)) { + if ((pci_alloc_msix(dev, &val) == 0)) { device_printf(adapter->dev, "Using MSIX interrupts " "with %d vectors\n", val); @@ -2753,7 +2839,7 @@ msi: } val = 1; if (pci_alloc_msi(dev, &val) == 0) { - device_printf(adapter->dev,"Using an MSI interrupt\n"); + device_printf(adapter->dev, "Using an MSI interrupt\n"); return (val); } /* Should only happen due to manual configuration */ @@ -3358,7 +3444,7 @@ em_setup_transmit_ring(struct tx_ring *txr) /* Set number of descriptors available */ txr->tx_avail = adapter->num_tx_desc; - txr->queue_status = EM_QUEUE_IDLE; + txr->busy = EM_TX_IDLE; /* Clear checksum offload context. */ txr->last_hw_offload = 0; @@ -3398,7 +3484,7 @@ em_initialize_transmit_unit(struct adapter *adapter) { struct tx_ring *txr = adapter->tx_rings; struct e1000_hw *hw = &adapter->hw; - u32 tctl, tarc, tipg = 0; + u32 tctl, txdctl = 0, tarc, tipg = 0; INIT_DEBUGOUT("em_initialize_transmit_unit: begin"); @@ -3419,7 +3505,16 @@ em_initialize_transmit_unit(struct adapter *adapter) E1000_READ_REG(&adapter->hw, E1000_TDBAL(i)), E1000_READ_REG(&adapter->hw, E1000_TDLEN(i))); - txr->queue_status = EM_QUEUE_IDLE; + txr->busy = EM_TX_IDLE; + txdctl = 0; /* clear txdctl */ + txdctl |= 0x1f; /* PTHRESH */ + txdctl |= 1 << 8; /* HTHRESH */ + txdctl |= 1 << 16;/* WTHRESH */ + txdctl |= 1 << 22; /* Reserved bit 22 must always be 1 */ + txdctl |= E1000_TXDCTL_GRAN; + txdctl |= 1 << 25; /* LWTHRESH */ + + E1000_WRITE_REG(hw, E1000_TXDCTL(i), txdctl); } /* Set the default values for the Tx Inter Packet Gap timer */ @@ -3450,15 +3545,25 @@ em_initialize_transmit_unit(struct adapter *adapter) if ((adapter->hw.mac.type == e1000_82571) || (adapter->hw.mac.type == e1000_82572)) { tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); - tarc |= SPEED_MODE_BIT; + tarc |= TARC_SPEED_MODE_BIT; E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); } else if (adapter->hw.mac.type == e1000_80003es2lan) { + /* errata: program both queues to unweighted RR */ tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); tarc |= 1; E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1)); tarc |= 1; E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); + } else if (adapter->hw.mac.type == e1000_82574) { + tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0)); + tarc |= TARC_ERRATA_BIT; + if ( adapter->num_queues > 1) { + tarc |= (TARC_COMPENSATION_MODE | TARC_MQ_FIX); + E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); + E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc); + } else + E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc); } adapter->txd_cmd = E1000_TXD_CMD_IFCS; @@ -3802,9 +3907,9 @@ em_txeof(struct tx_ring *txr) return; #endif /* DEV_NETMAP */ - /* No work, make sure watchdog is off */ + /* No work, make sure hang detection is disabled */ if (txr->tx_avail == adapter->num_tx_desc) { - txr->queue_status = EM_QUEUE_IDLE; + txr->busy = EM_TX_IDLE; return; } @@ -3847,7 +3952,6 @@ em_txeof(struct tx_ring *txr) tx_buffer->m_head = NULL; } tx_buffer->next_eop = -1; - txr->watchdog_time = ticks; if (++first == adapter->num_tx_desc) first = 0; @@ -3872,14 +3976,16 @@ em_txeof(struct tx_ring *txr) txr->next_to_clean = first; /* - ** Watchdog calculation, we know there's - ** work outstanding or the first return - ** would have been taken, so none processed - ** for too long indicates a hang. local timer - ** will examine this and do a reset if needed. + ** Hang detection: we know there's work outstanding + ** or the entry return would have been taken, so no + ** descriptor processed here indicates a potential hang. + ** The local timer will examine this and do a reset if needed. */ - if ((!processed) && ((ticks - txr->watchdog_time) > EM_WATCHDOG)) - txr->queue_status = EM_QUEUE_HUNG; + if (processed == 0) { + if (txr->busy != EM_TX_HUNG) + ++txr->busy; + } else /* At least one descriptor was cleaned */ + txr->busy = EM_TX_BUSY; /* note this clears HUNG */ /* * If we have a minimum free, clear IFF_DRV_OACTIVE @@ -3888,13 +3994,13 @@ em_txeof(struct tx_ring *txr) * TX lock which, with a single queue, guarantees * sanity. */ - if (txr->tx_avail >= EM_MAX_SCATTER) + if (txr->tx_avail >= EM_MAX_SCATTER) { if_setdrvflagbits(ifp, 0, IFF_DRV_OACTIVE); + } - /* Disable watchdog if all clean */ - if (txr->tx_avail == adapter->num_tx_desc) { - txr->queue_status = EM_QUEUE_IDLE; - } + /* Disable hang detection if all clean */ + if (txr->tx_avail == adapter->num_tx_desc) + txr->busy = EM_TX_IDLE; } @@ -4262,6 +4368,9 @@ em_initialize_receive_unit(struct adapter *adapter) E1000_WRITE_REG(&adapter->hw, E1000_RADV, adapter->rx_abs_int_delay.value); + + E1000_WRITE_REG(&adapter->hw, E1000_RDTR, + adapter->rx_int_delay.value); /* * Set the interrupt throttling rate. Value is calculated * as DEFAULT_ITR = 1/(MAX_INTS_PER_SEC * 256ns) @@ -4273,20 +4382,65 @@ em_initialize_receive_unit(struct adapter *adapter) ** using the EITR register (82574 only) */ if (hw->mac.type == e1000_82574) { + u32 rfctl; for (int i = 0; i < 4; i++) E1000_WRITE_REG(hw, E1000_EITR_82574(i), DEFAULT_ITR); /* Disable accelerated acknowledge */ - E1000_WRITE_REG(hw, E1000_RFCTL, E1000_RFCTL_ACK_DIS); + rfctl = E1000_READ_REG(hw, E1000_RFCTL); + rfctl |= E1000_RFCTL_ACK_DIS; + E1000_WRITE_REG(hw, E1000_RFCTL, rfctl); } rxcsum = E1000_READ_REG(hw, E1000_RXCSUM); - if (if_getcapenable(ifp) & IFCAP_RXCSUM) + if (if_getcapenable(ifp) & IFCAP_RXCSUM) { +#ifdef EM_MULTIQUEUE + rxcsum |= E1000_RXCSUM_TUOFL | + E1000_RXCSUM_IPOFL | + E1000_RXCSUM_PCSD; +#else rxcsum |= E1000_RXCSUM_TUOFL; - else +#endif + } else rxcsum &= ~E1000_RXCSUM_TUOFL; + E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum); +#ifdef EM_MULTIQUEUE + if (adapter->num_queues > 1) { + uint32_t rss_key[10]; + uint32_t reta; + int i; + + /* + * Configure RSS key + */ + arc4rand(rss_key, sizeof(rss_key), 0); + for (i = 0; i < 10; ++i) + E1000_WRITE_REG_ARRAY(hw,E1000_RSSRK(0), i, rss_key[i]); + + /* + * Configure RSS redirect table in following fashion: + * (hash & ring_cnt_mask) == rdr_table[(hash & rdr_table_mask)] + */ + reta = 0; + for (i = 0; i < 4; ++i) { + uint32_t q; + q = (i % adapter->num_queues) << 7; + reta |= q << (8 * i); + } + for (i = 0; i < 32; ++i) + E1000_WRITE_REG(hw, E1000_RETA(i), reta); + + E1000_WRITE_REG(hw, E1000_MRQC, E1000_MRQC_RSS_ENABLE_2Q | + E1000_MRQC_RSS_FIELD_IPV4_TCP | + E1000_MRQC_RSS_FIELD_IPV4 | + E1000_MRQC_RSS_FIELD_IPV6_TCP_EX | + E1000_MRQC_RSS_FIELD_IPV6_EX | + E1000_MRQC_RSS_FIELD_IPV6 | + E1000_MRQC_RSS_FIELD_IPV6_TCP); + } +#endif /* ** XXX TEMPORARY WORKAROUND: on some systems with 82573 ** long latencies are observed, like Lenovo X60. This @@ -4321,13 +4475,30 @@ em_initialize_receive_unit(struct adapter *adapter) E1000_WRITE_REG(hw, E1000_RDT(i), rdt); } - /* Set PTHRESH for improved jumbo performance */ + /* + * Set PTHRESH for improved jumbo performance + * According to 10.2.5.11 of Intel 82574 Datasheet, + * RXDCTL(1) is written whenever RXDCTL(0) is written. + * Only write to RXDCTL(1) if there is a need for different + * settings. + */ if (((adapter->hw.mac.type == e1000_ich9lan) || (adapter->hw.mac.type == e1000_pch2lan) || (adapter->hw.mac.type == e1000_ich10lan)) && (if_getmtu(ifp) > ETHERMTU)) { u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0)); E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 3); + } else if ((adapter->hw.mac.type == e1000_82574) && + (if_getmtu(ifp) > ETHERMTU)) { + for (int i = 0; i < adapter->num_queues; i++) { + u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i)); + + rxdctl |= 0x20; /* PTHRESH */ + rxdctl |= 4 << 8; /* HTHRESH */ + rxdctl |= 4 << 16;/* WTHRESH */ + rxdctl |= 1 << 24; /* Switch to granularity */ + E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl); + } } if (adapter->hw.mac.type >= e1000_pch2lan) { @@ -4394,6 +4565,11 @@ em_rxeof(struct rx_ring *rxr, int count, int *done) EM_RX_LOCK(rxr); + /* Sync the ring */ + bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + + #ifdef DEV_NETMAP if (netmap_rx_irq(ifp, rxr->me, &processed)) { EM_RX_UNLOCK(rxr); @@ -4406,9 +4582,6 @@ em_rxeof(struct rx_ring *rxr, int count, int *done) if ((if_getdrvflags(ifp) & IFF_DRV_RUNNING) == 0) break; - bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, - BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); - cur = &rxr->rx_base[i]; status = cur->status; mp = sendmp = NULL; @@ -4474,6 +4647,10 @@ skip: rxr->fmp = rxr->lmp = NULL; } next_desc: + /* Sync the ring */ + bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map, + BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); + /* Zero out the receive descriptors status. */ cur->status = 0; ++rxdone; /* cumulative for POLL */ @@ -5130,12 +5307,7 @@ em_update_stats_counters(struct adapter *adapter) adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC); adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC); adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC); - /* - ** For watchdog management we need to know if we have been - ** paused during the last interval, so capture that here. - */ - adapter->pause_frames = E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); - adapter->stats.xoffrxc += adapter->pause_frames; + adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC); adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC); adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC); adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64); @@ -5300,10 +5472,10 @@ em_add_hw_stats(struct adapter *adapter) CTLFLAG_RD, &adapter->hw.fc.low_water, 0, "Flow Control Low Watermark"); - for (int i = 0; i < adapter->num_queues; i++, rxr++, txr++) { - snprintf(namebuf, QUEUE_NAME_LEN, "queue%d", i); + for (int i = 0; i < adapter->num_queues; i++, txr++, rxr++) { + snprintf(namebuf, QUEUE_NAME_LEN, "queue_tx_%d", i); queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, - CTLFLAG_RD, NULL, "Queue Name"); + CTLFLAG_RD, NULL, "TX Queue Name"); queue_list = SYSCTL_CHILDREN(queue_node); SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "txd_head", @@ -5322,7 +5494,12 @@ em_add_hw_stats(struct adapter *adapter) SYSCTL_ADD_ULONG(ctx, queue_list, OID_AUTO, "no_desc_avail", CTLFLAG_RD, &txr->no_desc_avail, "Queue No Descriptor Available"); - + + snprintf(namebuf, QUEUE_NAME_LEN, "queue_rx_%d", i); + queue_node = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, namebuf, + CTLFLAG_RD, NULL, "RX Queue Name"); + queue_list = SYSCTL_CHILDREN(queue_node); + SYSCTL_ADD_PROC(ctx, queue_list, OID_AUTO, "rxd_head", CTLTYPE_UINT | CTLFLAG_RD, adapter, E1000_RDH(rxr->me), @@ -5756,19 +5933,86 @@ em_print_debug_info(struct adapter *adapter) else printf("and ACTIVE\n"); - device_printf(dev, "hw tdh = %d, hw tdt = %d\n", - E1000_READ_REG(&adapter->hw, E1000_TDH(0)), - E1000_READ_REG(&adapter->hw, E1000_TDT(0))); - device_printf(dev, "hw rdh = %d, hw rdt = %d\n", - E1000_READ_REG(&adapter->hw, E1000_RDH(0)), - E1000_READ_REG(&adapter->hw, E1000_RDT(0))); - device_printf(dev, "Tx Queue Status = %d\n", txr->queue_status); - device_printf(dev, "TX descriptors avail = %d\n", - txr->tx_avail); - device_printf(dev, "Tx Descriptors avail failure = %ld\n", - txr->no_desc_avail); - device_printf(dev, "RX discarded packets = %ld\n", - rxr->rx_discarded); - device_printf(dev, "RX Next to Check = %d\n", rxr->next_to_check); - device_printf(dev, "RX Next to Refresh = %d\n", rxr->next_to_refresh); + for (int i = 0; i < adapter->num_queues; i++, txr++, rxr++) { + device_printf(dev, "TX Queue %d ------\n", i); + device_printf(dev, "hw tdh = %d, hw tdt = %d\n", + E1000_READ_REG(&adapter->hw, E1000_TDH(i)), + E1000_READ_REG(&adapter->hw, E1000_TDT(i))); + device_printf(dev, "Tx Queue Status = %d\n", txr->busy); + device_printf(dev, "TX descriptors avail = %d\n", + txr->tx_avail); + device_printf(dev, "Tx Descriptors avail failure = %ld\n", + txr->no_desc_avail); + device_printf(dev, "RX Queue %d ------\n", i); + device_printf(dev, "hw rdh = %d, hw rdt = %d\n", + E1000_READ_REG(&adapter->hw, E1000_RDH(i)), + E1000_READ_REG(&adapter->hw, E1000_RDT(i))); + device_printf(dev, "RX discarded packets = %ld\n", + rxr->rx_discarded); + device_printf(dev, "RX Next to Check = %d\n", rxr->next_to_check); + device_printf(dev, "RX Next to Refresh = %d\n", rxr->next_to_refresh); + } +} + +#ifdef EM_MULTIQUEUE +/* + * 82574 only: + * Write a new value to the EEPROM increasing the number of MSIX + * vectors from 3 to 5, for proper multiqueue support. + */ +static void +em_enable_vectors_82574(struct adapter *adapter) +{ + struct e1000_hw *hw = &adapter->hw; + device_t dev = adapter->dev; + u16 edata; + + e1000_read_nvm(hw, EM_NVM_PCIE_CTRL, 1, &edata); + printf("Current cap: %#06x\n", edata); + if (((edata & EM_NVM_MSIX_N_MASK) >> EM_NVM_MSIX_N_SHIFT) != 4) { + device_printf(dev, "Writing to eeprom: increasing " + "reported MSIX vectors from 3 to 5...\n"); + edata &= ~(EM_NVM_MSIX_N_MASK); + edata |= 4 << EM_NVM_MSIX_N_SHIFT; + e1000_write_nvm(hw, EM_NVM_PCIE_CTRL, 1, &edata); + e1000_update_nvm_checksum(hw); + device_printf(dev, "Writing to eeprom: done\n"); + } +} +#endif + +#ifdef DDB +DB_COMMAND(em_reset_dev, em_ddb_reset_dev) +{ + devclass_t dc; + int max_em; + + dc = devclass_find("em"); + max_em = devclass_get_maxunit(dc); + + for (int index = 0; index < (max_em - 1); index++) { + device_t dev; + dev = devclass_get_device(dc, index); + if (device_get_driver(dev) == &em_driver) { + struct adapter *adapter = device_get_softc(dev); + em_init_locked(adapter); + } + } +} +DB_COMMAND(em_dump_queue, em_ddb_dump_queue) +{ + devclass_t dc; + int max_em; + + dc = devclass_find("em"); + max_em = devclass_get_maxunit(dc); + + for (int index = 0; index < (max_em - 1); index++) { + device_t dev; + dev = devclass_get_device(dc, index); + if (device_get_driver(dev) == &em_driver) + em_print_debug_info(device_get_softc(dev)); + } + } +#endif diff --git a/sys/dev/e1000/if_em.h b/sys/dev/e1000/if_em.h index a73981561ed4..be18a6c9af94 100644 --- a/sys/dev/e1000/if_em.h +++ b/sys/dev/e1000/if_em.h @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2001-2011, Intel Corporation + Copyright (c) 2001-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -53,7 +53,11 @@ */ #define EM_MIN_TXD 80 #define EM_MAX_TXD 4096 +#ifdef EM_MULTIQUEUE +#define EM_DEFAULT_TXD 4096 +#else #define EM_DEFAULT_TXD 1024 +#endif /* * EM_RXD - Maximum number of receive Descriptors @@ -70,7 +74,11 @@ */ #define EM_MIN_RXD 80 #define EM_MAX_RXD 4096 +#ifdef EM_MULTIQUEUE +#define EM_DEFAULT_RXD 4096 +#else #define EM_DEFAULT_RXD 1024 +#endif /* * EM_TIDV - Transmit Interrupt Delay Value @@ -117,7 +125,11 @@ * restoring the network connection. To eliminate the potential * for the hang ensure that EM_RDTR is set to 0. */ +#ifdef EM_MULTIQUEUE +#define EM_RDTR 64 +#else #define EM_RDTR 0 +#endif /* * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544) @@ -130,7 +142,11 @@ * along with EM_RDTR, may improve traffic throughput in specific network * conditions. */ +#ifdef EM_MULTIQUEUE +#define EM_RADV 128 +#else #define EM_RADV 64 +#endif /* * This parameter controls the max duration of transmit watchdog. @@ -188,9 +204,19 @@ #define EM_EEPROM_APME 0x400; #define EM_82544_APME 0x0004; -#define EM_QUEUE_IDLE 0 -#define EM_QUEUE_WORKING 1 -#define EM_QUEUE_HUNG 2 +/* + * Driver state logic for the detection of a hung state + * in hardware. Set TX_HUNG whenever a TX packet is used + * (data is sent) and clear it when txeof() is invoked if + * any descriptors from the ring are cleaned/reclaimed. + * Increment internal counter if no descriptors are cleaned + * and compare to TX_MAXTRIES. When counter > TX_MAXTRIES, + * reset adapter. + */ +#define EM_TX_IDLE 0x00000000 +#define EM_TX_BUSY 0x00000001 +#define EM_TX_HUNG 0x80000000 +#define EM_TX_MAXTRIES 10 /* * TDBA/RDBA should be aligned on 16 byte boundary. But TDLEN/RDLEN should be @@ -199,7 +225,15 @@ */ #define EM_DBA_ALIGN 128 -#define SPEED_MODE_BIT (1<<21) /* On PCI-E MACs only */ +/* + * See Intel 82574 Driver Programming Interface Manual, Section 10.2.6.9 + */ +#define TARC_COMPENSATION_MODE (1 << 7) /* Compensation Mode */ +#define TARC_SPEED_MODE_BIT (1 << 21) /* On PCI-E MACs only */ +#define TARC_MQ_FIX (1 << 23) | \ + (1 << 24) | \ + (1 << 25) /* Handle errata in MQ mode */ +#define TARC_ERRATA_BIT (1 << 26) /* Note from errata on 82574 */ /* PCI Config defines */ #define EM_BAR_TYPE(v) ((v) & EM_BAR_TYPE_MASK) @@ -249,6 +283,14 @@ * solve it just using this define. */ #define EM_EIAC 0x000DC +/* + * 82574 only reports 3 MSI-X vectors by default; + * defines assisting with making it report 5 are + * located here. + */ +#define EM_NVM_PCIE_CTRL 0x1B +#define EM_NVM_MSIX_N_MASK (0x7 << EM_NVM_MSIX_N_SHIFT) +#define EM_NVM_MSIX_N_SHIFT 7 /* * Bus dma allocation structure used by @@ -281,8 +323,7 @@ struct tx_ring { u32 me; u32 msix; u32 ims; - int queue_status; - int watchdog_time; + int busy; struct em_dma_alloc txdma; struct e1000_tx_desc *tx_base; struct task tx_task; @@ -368,7 +409,6 @@ struct adapter { int if_flags; int max_frame_size; int min_frame_size; - int pause_frames; struct mtx core_mtx; int em_insert_vlan_header; u32 ims; @@ -383,7 +423,7 @@ struct adapter { eventhandler_tag vlan_detach; u16 num_vlans; - u16 num_queues; + u8 num_queues; /* * Transmit rings: diff --git a/sys/dev/hwpmc/hwpmc_mod.c b/sys/dev/hwpmc/hwpmc_mod.c index d1b56f10835c..131eb3575e24 100644 --- a/sys/dev/hwpmc/hwpmc_mod.c +++ b/sys/dev/hwpmc/hwpmc_mod.c @@ -1655,7 +1655,8 @@ pmc_log_process_mappings(struct pmc_owner *po, struct proc *p) continue; } - if (lobj->type != OBJT_VNODE || lobj->handle == NULL) { + vp = vm_object_vnode(lobj); + if (vp == NULL) { if (lobj != obj) VM_OBJECT_RUNLOCK(lobj); VM_OBJECT_RUNLOCK(obj); @@ -1667,7 +1668,7 @@ pmc_log_process_mappings(struct pmc_owner *po, struct proc *p) * vnode, so we don't emit redundant MAP-IN * directives. */ - if (entry->start == last_end && lobj->handle == last_vp) { + if (entry->start == last_end && vp == last_vp) { last_end = entry->end; if (lobj != obj) VM_OBJECT_RUNLOCK(lobj); @@ -1690,7 +1691,6 @@ pmc_log_process_mappings(struct pmc_owner *po, struct proc *p) last_timestamp = map->timestamp; vm_map_unlock_read(map); - vp = lobj->handle; vref(vp); if (lobj != obj) VM_OBJECT_RUNLOCK(lobj); diff --git a/sys/dev/iwi/if_iwi.c b/sys/dev/iwi/if_iwi.c index bc95802956d2..fecbe89c4562 100644 --- a/sys/dev/iwi/if_iwi.c +++ b/sys/dev/iwi/if_iwi.c @@ -154,7 +154,7 @@ static void iwi_node_free(struct ieee80211_node *); static void iwi_media_status(struct ifnet *, struct ifmediareq *); static int iwi_newstate(struct ieee80211vap *, enum ieee80211_state, int); static void iwi_wme_init(struct iwi_softc *); -static int iwi_wme_setparams(struct iwi_softc *, struct ieee80211com *); +static int iwi_wme_setparams(struct iwi_softc *); static void iwi_update_wme(void *, int); static int iwi_wme_update(struct ieee80211com *); static uint16_t iwi_read_prom_word(struct iwi_softc *, uint8_t); @@ -1059,8 +1059,9 @@ iwi_wme_init(struct iwi_softc *sc) } static int -iwi_wme_setparams(struct iwi_softc *sc, struct ieee80211com *ic) +iwi_wme_setparams(struct iwi_softc *sc) { + struct ieee80211com *ic = sc->sc_ifp->if_l2com; const struct wmeParams *wmep; int ac; @@ -1083,12 +1084,11 @@ iwi_wme_setparams(struct iwi_softc *sc, struct ieee80211com *ic) static void iwi_update_wme(void *arg, int npending) { - struct ieee80211com *ic = arg; - struct iwi_softc *sc = ic->ic_ifp->if_softc; + struct iwi_softc *sc = arg; IWI_LOCK_DECL; IWI_LOCK(sc); - (void) iwi_wme_setparams(sc, ic); + (void) iwi_wme_setparams(sc); IWI_UNLOCK(sc); } @@ -2947,7 +2947,7 @@ iwi_auth_and_assoc(struct iwi_softc *sc, struct ieee80211vap *vap) if ((vap->iv_flags & IEEE80211_F_WME) && ni->ni_ies.wme_ie != NULL) { /* NB: don't treat WME setup as failure */ - if (iwi_wme_setparams(sc, ic) == 0 && iwi_wme_setie(sc) == 0) + if (iwi_wme_setparams(sc) == 0 && iwi_wme_setie(sc) == 0) assoc->policy |= htole16(IWI_POLICY_WME); /* XXX complain on failure? */ } diff --git a/sys/dev/iwn/if_iwn.c b/sys/dev/iwn/if_iwn.c index fd91f8d1ff97..a04d44648692 100644 --- a/sys/dev/iwn/if_iwn.c +++ b/sys/dev/iwn/if_iwn.c @@ -565,7 +565,9 @@ iwn_attach(device_t dev) ic->ic_caps = IEEE80211_C_STA /* station mode supported */ | IEEE80211_C_MONITOR /* monitor mode supported */ +#if 0 | IEEE80211_C_BGSCAN /* background scanning */ +#endif | IEEE80211_C_TXPMGT /* tx power management */ | IEEE80211_C_SHSLOT /* short slot time supported */ | IEEE80211_C_WPA diff --git a/sys/dev/ixgbe/if_ix.c b/sys/dev/ixgbe/if_ix.c index b9bba31a5908..77556267fa15 100644 --- a/sys/dev/ixgbe/if_ix.c +++ b/sys/dev/ixgbe/if_ix.c @@ -54,7 +54,7 @@ int ixgbe_display_debug_stats = 0; /********************************************************************* * Driver version *********************************************************************/ -char ixgbe_driver_version[] = "2.8.3"; +char ixgbe_driver_version[] = "3.1.0"; /********************************************************************* * PCI Device ID Table @@ -138,6 +138,7 @@ static int ixgbe_setup_msix(struct adapter *); static void ixgbe_free_pci_resources(struct adapter *); static void ixgbe_local_timer(void *); static int ixgbe_setup_interface(device_t, struct adapter *); +static void ixgbe_config_gpie(struct adapter *); static void ixgbe_config_dmac(struct adapter *); static void ixgbe_config_delay_values(struct adapter *); static void ixgbe_config_link(struct adapter *); @@ -204,6 +205,18 @@ static void ixgbe_handle_phy(void *, int); static void ixgbe_reinit_fdir(void *, int); #endif +#ifdef PCI_IOV +static void ixgbe_ping_all_vfs(struct adapter *); +static void ixgbe_handle_mbx(void *, int); +static int ixgbe_init_iov(device_t, u16, const nvlist_t *); +static void ixgbe_uninit_iov(device_t); +static int ixgbe_add_vf(device_t, u16, const nvlist_t *); +static void ixgbe_initialize_iov(struct adapter *); +static void ixgbe_recalculate_max_frame(struct adapter *); +static void ixgbe_init_vf(struct adapter *, struct ixgbe_vf *); +#endif /* PCI_IOV */ + + /********************************************************************* * FreeBSD Device Interface Entry Points *********************************************************************/ @@ -216,6 +229,11 @@ static device_method_t ix_methods[] = { DEVMETHOD(device_shutdown, ixgbe_shutdown), DEVMETHOD(device_suspend, ixgbe_suspend), DEVMETHOD(device_resume, ixgbe_resume), +#ifdef PCI_IOV + DEVMETHOD(pci_iov_init, ixgbe_init_iov), + DEVMETHOD(pci_iov_uninit, ixgbe_uninit_iov), + DEVMETHOD(pci_iov_add_vf, ixgbe_add_vf), +#endif /* PCI_IOV */ DEVMETHOD_END }; @@ -341,6 +359,8 @@ static int fdir_pballoc = 1; #include <dev/netmap/ixgbe_netmap.h> #endif /* DEV_NETMAP */ +static MALLOC_DEFINE(M_IXGBE, "ix", "ix driver allocations"); + /********************************************************************* * Device identification routine * @@ -472,7 +492,7 @@ ixgbe_attach(device_t dev) } /* Allocate multicast array memory. */ - adapter->mta = malloc(sizeof(u8) * IXGBE_ETH_LENGTH_OF_ADDRESS * + adapter->mta = malloc(sizeof(*adapter->mta) * MAX_NUM_MULTICAST_ADDRESSES, M_DEVBUF, M_NOWAIT); if (adapter->mta == NULL) { device_printf(dev, "Can not allocate multicast setup array\n"); @@ -558,6 +578,28 @@ ixgbe_attach(device_t dev) /* Set an initial default flow control value */ adapter->fc = ixgbe_fc_full; +#ifdef PCI_IOV + if ((hw->mac.type != ixgbe_mac_82598EB) && (adapter->msix > 1)) { + nvlist_t *pf_schema, *vf_schema; + + hw->mbx.ops.init_params(hw); + pf_schema = pci_iov_schema_alloc_node(); + vf_schema = pci_iov_schema_alloc_node(); + pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); + pci_iov_schema_add_bool(vf_schema, "mac-anti-spoof", + IOV_SCHEMA_HASDEFAULT, TRUE); + pci_iov_schema_add_bool(vf_schema, "allow-set-mac", + IOV_SCHEMA_HASDEFAULT, FALSE); + pci_iov_schema_add_bool(vf_schema, "allow-promisc", + IOV_SCHEMA_HASDEFAULT, FALSE); + error = pci_iov_attach(dev, pf_schema, vf_schema); + if (error != 0) { + device_printf(dev, + "Error %d setting up SR-IOV\n", error); + } + } +#endif /* PCI_IOV */ + /* Check for certain supported features */ ixgbe_check_wol_support(adapter); ixgbe_check_eee_support(adapter); @@ -614,6 +656,13 @@ ixgbe_detach(device_t dev) return (EBUSY); } +#ifdef PCI_IOV + if (pci_iov_detach(dev) != 0) { + device_printf(dev, "SR-IOV in use; detach first.\n"); + return (EBUSY); + } +#endif /* PCI_IOV */ + /* Stop the adapter */ IXGBE_CORE_LOCK(adapter); ixgbe_setup_low_power_mode(adapter); @@ -634,6 +683,9 @@ ixgbe_detach(device_t dev) taskqueue_drain(adapter->tq, &adapter->link_task); taskqueue_drain(adapter->tq, &adapter->mod_task); taskqueue_drain(adapter->tq, &adapter->msf_task); +#ifdef PCI_IOV + taskqueue_drain(adapter->tq, &adapter->mbx_task); +#endif taskqueue_drain(adapter->tq, &adapter->phy_task); #ifdef IXGBE_FDIR taskqueue_drain(adapter->tq, &adapter->fdir_task); @@ -810,6 +862,9 @@ ixgbe_ioctl(struct ifnet * ifp, u_long command, caddr_t data) adapter->max_frame_size = ifp->if_mtu + IXGBE_MTU_HDR; ixgbe_init_locked(adapter); +#ifdef PCI_IOV + ixgbe_recalculate_max_frame(adapter); +#endif IXGBE_CORE_UNLOCK(adapter); } break; @@ -925,22 +980,36 @@ ixgbe_init_locked(struct adapter *adapter) struct ifnet *ifp = adapter->ifp; device_t dev = adapter->dev; struct ixgbe_hw *hw = &adapter->hw; - u32 k, txdctl, mhadd, gpie; + struct tx_ring *txr; + struct rx_ring *rxr; + u32 txdctl, mhadd; u32 rxdctl, rxctrl; +#ifdef PCI_IOV + enum ixgbe_iov_mode mode; +#endif mtx_assert(&adapter->core_mtx, MA_OWNED); INIT_DEBUGOUT("ixgbe_init_locked: begin"); + hw->adapter_stopped = FALSE; ixgbe_stop_adapter(hw); callout_stop(&adapter->timer); +#ifdef PCI_IOV + mode = ixgbe_get_iov_mode(adapter); + adapter->pool = ixgbe_max_vfs(mode); + /* Queue indices may change with IOV mode */ + for (int i = 0; i < adapter->num_queues; i++) { + adapter->rx_rings[i].me = ixgbe_pf_que_index(mode, i); + adapter->tx_rings[i].me = ixgbe_pf_que_index(mode, i); + } +#endif /* reprogram the RAR[0] in case user changed it. */ - ixgbe_set_rar(hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV); + ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, IXGBE_RAH_AV); /* Get the latest mac address, User can use a LAA */ - bcopy(IF_LLADDR(adapter->ifp), hw->mac.addr, - IXGBE_ETH_LENGTH_OF_ADDRESS); - ixgbe_set_rar(hw, 0, hw->mac.addr, 0, 1); + bcopy(IF_LLADDR(ifp), hw->mac.addr, IXGBE_ETH_LENGTH_OF_ADDRESS); + ixgbe_set_rar(hw, 0, hw->mac.addr, adapter->pool, 1); hw->addr_ctrl.rar_used_count = 1; /* Set the various hardware offload abilities */ @@ -963,6 +1032,9 @@ ixgbe_init_locked(struct adapter *adapter) } ixgbe_init_hw(hw); +#ifdef PCI_IOV + ixgbe_initialize_iov(adapter); +#endif ixgbe_initialize_transmit_units(adapter); /* Setup Multicast table */ @@ -972,14 +1044,10 @@ ixgbe_init_locked(struct adapter *adapter) ** Determine the correct mbuf pool ** for doing jumbo frames */ - if (adapter->max_frame_size <= 2048) + if (adapter->max_frame_size <= MCLBYTES) adapter->rx_mbuf_sz = MCLBYTES; - else if (adapter->max_frame_size <= 4096) - adapter->rx_mbuf_sz = MJUMPAGESIZE; - else if (adapter->max_frame_size <= 9216) - adapter->rx_mbuf_sz = MJUM9BYTES; else - adapter->rx_mbuf_sz = MJUM16BYTES; + adapter->rx_mbuf_sz = MJUMPAGESIZE; /* Prepare receive descriptors and buffers */ if (ixgbe_setup_receive_structures(adapter)) { @@ -991,31 +1059,8 @@ ixgbe_init_locked(struct adapter *adapter) /* Configure RX settings */ ixgbe_initialize_receive_units(adapter); - gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE); - - /* Enable Fan Failure Interrupt */ - gpie |= IXGBE_SDP1_GPIEN_BY_MAC(hw); - - /* Add for Module detection */ - if (hw->mac.type == ixgbe_mac_82599EB) - gpie |= IXGBE_SDP2_GPIEN; - - /* - * Thermal Failure Detection (X540) - * Link Detection (X552) - */ - if (hw->mac.type == ixgbe_mac_X540 || - hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || - hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) - gpie |= IXGBE_SDP0_GPIEN_X540; - - if (adapter->msix > 1) { - /* Enable Enhanced MSIX mode */ - gpie |= IXGBE_GPIE_MSIX_MODE; - gpie |= IXGBE_GPIE_EIAME | IXGBE_GPIE_PBA_SUPPORT | - IXGBE_GPIE_OCD; - } - IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); + /* Enable SDP & MSIX interrupts based on adapter */ + ixgbe_config_gpie(adapter); /* Set MTU size */ if (ifp->if_mtu > ETHERMTU) { @@ -1028,7 +1073,8 @@ ixgbe_init_locked(struct adapter *adapter) /* Now enable all the queues */ for (int i = 0; i < adapter->num_queues; i++) { - txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); + txr = &adapter->tx_rings[i]; + txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me)); txdctl |= IXGBE_TXDCTL_ENABLE; /* Set WTHRESH to 8, burst writeback */ txdctl |= (8 << 16); @@ -1040,11 +1086,12 @@ ixgbe_init_locked(struct adapter *adapter) * Prefetching enables tx line rate even with 1 queue. */ txdctl |= (32 << 0) | (1 << 8); - IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(i), txdctl); + IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl); } - for (int i = 0; i < adapter->num_queues; i++) { - rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); + for (int i = 0, j = 0; i < adapter->num_queues; i++) { + rxr = &adapter->rx_rings[i]; + rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); if (hw->mac.type == ixgbe_mac_82598EB) { /* ** PTHRESH = 21 @@ -1055,9 +1102,9 @@ ixgbe_init_locked(struct adapter *adapter) rxdctl |= 0x080420; } rxdctl |= IXGBE_RXDCTL_ENABLE; - IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), rxdctl); - for (k = 0; k < 10; k++) { - if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)) & + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), rxdctl); + for (; j < 10; j++) { + if (IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)) & IXGBE_RXDCTL_ENABLE) break; else @@ -1086,10 +1133,10 @@ ixgbe_init_locked(struct adapter *adapter) struct netmap_kring *kring = &na->rx_rings[i]; int t = na->num_rx_desc - 1 - nm_kr_rxspace(kring); - IXGBE_WRITE_REG(hw, IXGBE_RDT(i), t); + IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), t); } else #endif /* DEV_NETMAP */ - IXGBE_WRITE_REG(hw, IXGBE_RDT(i), adapter->num_rx_desc - 1); + IXGBE_WRITE_REG(hw, IXGBE_RDT(rxr->me), adapter->num_rx_desc - 1); } /* Enable Receive engine */ @@ -1128,9 +1175,9 @@ ixgbe_init_locked(struct adapter *adapter) #endif /* - ** Check on any SFP devices that - ** need to be kick-started - */ + * Check on any SFP devices that + * need to be kick-started + */ if (hw->phy.type == ixgbe_phy_none) { int err = hw->phy.ops.identify(hw); if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { @@ -1144,8 +1191,7 @@ ixgbe_init_locked(struct adapter *adapter) IXGBE_WRITE_REG(hw, IXGBE_EITR(adapter->vector), IXGBE_LINK_ITR); /* Configure Energy Efficient Ethernet for supported devices */ - if (adapter->eee_support) - ixgbe_setup_eee(hw, adapter->eee_enabled); + ixgbe_setup_eee(hw, adapter->eee_enabled); /* Config/Enable Link */ ixgbe_config_link(adapter); @@ -1165,6 +1211,15 @@ ixgbe_init_locked(struct adapter *adapter) /* And now turn on interrupts */ ixgbe_enable_intr(adapter); +#ifdef PCI_IOV + /* Enable the use of the MBX by the VF's */ + { + u32 reg = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); + reg |= IXGBE_CTRL_EXT_PFRSTD; + IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, reg); + } +#endif + /* Now inform the stack we're ready */ ifp->if_drv_flags |= IFF_DRV_RUNNING; @@ -1183,6 +1238,51 @@ ixgbe_init(void *arg) } static void +ixgbe_config_gpie(struct adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + u32 gpie; + + gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); + + /* Fan Failure Interrupt */ + if (hw->device_id == IXGBE_DEV_ID_82598AT) + gpie |= IXGBE_SDP1_GPIEN; + + /* + * Module detection (SDP2) + * Media ready (SDP1) + */ + if (hw->mac.type == ixgbe_mac_82599EB) { + gpie |= IXGBE_SDP2_GPIEN; + if (hw->device_id != IXGBE_DEV_ID_82599_QSFP_SF_QP) + gpie |= IXGBE_SDP1_GPIEN; + } + + /* + * Thermal Failure Detection (X540) + * Link Detection (X557) + */ + if (hw->mac.type == ixgbe_mac_X540 || + hw->device_id == IXGBE_DEV_ID_X550EM_X_SFP || + hw->device_id == IXGBE_DEV_ID_X550EM_X_10G_T) + gpie |= IXGBE_SDP0_GPIEN_X540; + + if (adapter->msix > 1) { + /* Enable Enhanced MSIX mode */ + gpie |= IXGBE_GPIE_MSIX_MODE; + gpie |= IXGBE_GPIE_EIAME | IXGBE_GPIE_PBA_SUPPORT | + IXGBE_GPIE_OCD; + } + + IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); + return; +} + +/* + * Requires adapter->max_frame_size to be set. + */ +static void ixgbe_config_delay_values(struct adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; @@ -1276,10 +1376,9 @@ ixgbe_handle_que(void *context, int pending) struct adapter *adapter = que->adapter; struct tx_ring *txr = que->txr; struct ifnet *ifp = adapter->ifp; - bool more; if (ifp->if_drv_flags & IFF_DRV_RUNNING) { - more = ixgbe_rxeof(que); + ixgbe_rxeof(que); IXGBE_TX_LOCK(txr); ixgbe_txeof(txr); #ifndef IXGBE_LEGACY_TX @@ -1341,8 +1440,8 @@ ixgbe_legacy_irq(void *arg) IXGBE_TX_UNLOCK(txr); /* Check for fan failure */ - if ((hw->phy.media_type == ixgbe_media_type_copper) && - (reg_eicr & IXGBE_EICR_GPI_SDP1_BY_MAC(hw))) { + if ((hw->device_id == IXGBE_DEV_ID_82598AT) && + (reg_eicr & IXGBE_EICR_GPI_SDP1)) { device_printf(adapter->dev, "\nCRITICAL: FAN FAILURE!! " "REPLACE IMMEDIATELY!!\n"); IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_GPI_SDP1_BY_MAC(hw)); @@ -1381,6 +1480,7 @@ ixgbe_msix_que(void *arg) bool more; u32 newitr = 0; + /* Protect against spurious interrupts */ if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) return; @@ -1504,6 +1604,10 @@ ixgbe_msix_link(void *arg) device_printf(adapter->dev, "System shutdown required!\n"); IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_TS); } +#ifdef PCI_IOV + if (reg_eicr & IXGBE_EICR_MAILBOX) + taskqueue_enqueue(adapter->tq, &adapter->mbx_task); +#endif } /* Pluggable optics-related interrupt */ @@ -1569,7 +1673,7 @@ ixgbe_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) } ifmr->ifm_status |= IFM_ACTIVE; - layer = ixgbe_get_supported_physical_layer(hw); + layer = adapter->phy_layer; if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T || layer & IXGBE_PHYSICAL_LAYER_1000BASE_T || @@ -1802,18 +1906,17 @@ ixgbe_set_promisc(struct adapter *adapter) static void ixgbe_set_multi(struct adapter *adapter) { - u32 fctrl; - u8 *mta; - u8 *update_ptr; - struct ifmultiaddr *ifma; - int mcnt = 0; - struct ifnet *ifp = adapter->ifp; + u32 fctrl; + u8 *update_ptr; + struct ifmultiaddr *ifma; + struct ixgbe_mc_addr *mta; + int mcnt = 0; + struct ifnet *ifp = adapter->ifp; IOCTL_DEBUGOUT("ixgbe_set_multi: begin"); mta = adapter->mta; - bzero(mta, sizeof(u8) * IXGBE_ETH_LENGTH_OF_ADDRESS * - MAX_NUM_MULTICAST_ADDRESSES); + bzero(mta, sizeof(*mta) * MAX_NUM_MULTICAST_ADDRESSES); #if __FreeBSD_version < 800000 IF_ADDR_LOCK(ifp); @@ -1826,8 +1929,8 @@ ixgbe_set_multi(struct adapter *adapter) if (mcnt == MAX_NUM_MULTICAST_ADDRESSES) break; bcopy(LLADDR((struct sockaddr_dl *) ifma->ifma_addr), - &mta[mcnt * IXGBE_ETH_LENGTH_OF_ADDRESS], - IXGBE_ETH_LENGTH_OF_ADDRESS); + mta[mcnt].addr, IXGBE_ETH_LENGTH_OF_ADDRESS); + mta[mcnt].vmdq = adapter->pool; mcnt++; } #if __FreeBSD_version < 800000 @@ -1850,7 +1953,7 @@ ixgbe_set_multi(struct adapter *adapter) IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl); if (mcnt < MAX_NUM_MULTICAST_ADDRESSES) { - update_ptr = mta; + update_ptr = (u8 *)mta; ixgbe_update_mc_addr_list(&adapter->hw, update_ptr, mcnt, ixgbe_mc_array_itr, TRUE); } @@ -1866,13 +1969,13 @@ ixgbe_set_multi(struct adapter *adapter) static u8 * ixgbe_mc_array_itr(struct ixgbe_hw *hw, u8 **update_ptr, u32 *vmdq) { - u8 *addr = *update_ptr; - u8 *newptr; - *vmdq = 0; + struct ixgbe_mc_addr *mta; - newptr = addr + IXGBE_ETH_LENGTH_OF_ADDRESS; - *update_ptr = newptr; - return addr; + mta = (struct ixgbe_mc_addr *)*update_ptr; + *vmdq = mta->vmdq; + + *update_ptr = (u8*)(mta + 1);; + return (mta->addr); } @@ -1954,6 +2057,7 @@ watchdog: ixgbe_init_locked(adapter); } + /* ** Note: this routine updates the OS on the link state ** the real check of the hardware only happens with @@ -1977,6 +2081,9 @@ ixgbe_update_link_status(struct adapter *adapter) /* Update DMA coalescing config */ ixgbe_config_dmac(adapter); if_link_state_change(ifp, LINK_STATE_UP); +#ifdef PCI_IOV + ixgbe_ping_all_vfs(adapter); +#endif } } else { /* Link down */ if (adapter->link_active == TRUE) { @@ -1984,6 +2091,9 @@ ixgbe_update_link_status(struct adapter *adapter) device_printf(dev,"Link is Down\n"); if_link_state_change(ifp, LINK_STATE_DOWN); adapter->link_active = FALSE; +#ifdef PCI_IOV + ixgbe_ping_all_vfs(adapter); +#endif } } @@ -2083,7 +2193,7 @@ ixgbe_setup_optics(struct adapter *adapter) struct ixgbe_hw *hw = &adapter->hw; int layer; - layer = ixgbe_get_supported_physical_layer(hw); + layer = adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) { adapter->optics = IFM_10G_T; @@ -2281,17 +2391,19 @@ ixgbe_allocate_msix(struct adapter *adapter) #endif if (adapter->num_queues > 1) bus_bind_intr(dev, que->res, cpu_id); - +#ifdef IXGBE_DEBUG #ifdef RSS device_printf(dev, "Bound RSS bucket %d to CPU %d\n", i, cpu_id); #else - if (bootverbose) - device_printf(dev, - "Bound queue %d to cpu %d\n", - i, cpu_id); + device_printf(dev, + "Bound queue %d to cpu %d\n", + i, cpu_id); #endif +#endif /* IXGBE_DEBUG */ + + #ifndef IXGBE_LEGACY_TX TASK_INIT(&txr->txq_task, 0, ixgbe_deferred_mq_start, txr); #endif @@ -2337,6 +2449,9 @@ ixgbe_allocate_msix(struct adapter *adapter) TASK_INIT(&adapter->link_task, 0, ixgbe_handle_link, adapter); TASK_INIT(&adapter->mod_task, 0, ixgbe_handle_mod, adapter); TASK_INIT(&adapter->msf_task, 0, ixgbe_handle_msf, adapter); +#ifdef PCI_IOV + TASK_INIT(&adapter->mbx_task, 0, ixgbe_handle_mbx, adapter); +#endif TASK_INIT(&adapter->phy_task, 0, ixgbe_handle_phy, adapter); #ifdef IXGBE_FDIR TASK_INIT(&adapter->fdir_task, 0, ixgbe_reinit_fdir, adapter); @@ -2630,7 +2745,7 @@ ixgbe_add_media_types(struct adapter *adapter) device_t dev = adapter->dev; int layer; - layer = ixgbe_get_supported_physical_layer(hw); + layer = adapter->phy_layer = ixgbe_get_supported_physical_layer(hw); /* Media types with matching FreeBSD media defines */ if (layer & IXGBE_PHYSICAL_LAYER_10GBASE_T) @@ -2741,19 +2856,20 @@ ixgbe_initialize_transmit_units(struct adapter *adapter) for (int i = 0; i < adapter->num_queues; i++, txr++) { u64 tdba = txr->txdma.dma_paddr; u32 txctrl = 0; + int j = txr->me; - IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), + IXGBE_WRITE_REG(hw, IXGBE_TDBAL(j), (tdba & 0x00000000ffffffffULL)); - IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32)); - IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), + IXGBE_WRITE_REG(hw, IXGBE_TDBAH(j), (tdba >> 32)); + IXGBE_WRITE_REG(hw, IXGBE_TDLEN(j), adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc)); /* Setup the HW Tx Head and Tail descriptor pointers */ - IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0); - IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_TDH(j), 0); + IXGBE_WRITE_REG(hw, IXGBE_TDT(j), 0); /* Cache the tail address */ - txr->tail = IXGBE_TDT(txr->me); + txr->tail = IXGBE_TDT(j); /* Set the processing limit */ txr->process_limit = ixgbe_tx_process_limit; @@ -2761,23 +2877,23 @@ ixgbe_initialize_transmit_units(struct adapter *adapter) /* Disable Head Writeback */ switch (hw->mac.type) { case ixgbe_mac_82598EB: - txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); + txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(j)); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: default: - txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i)); + txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(j)); break; } txctrl &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; switch (hw->mac.type) { case ixgbe_mac_82598EB: - IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), txctrl); + IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(j), txctrl); break; case ixgbe_mac_82599EB: case ixgbe_mac_X540: default: - IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), txctrl); + IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(j), txctrl); break; } @@ -2785,6 +2901,9 @@ ixgbe_initialize_transmit_units(struct adapter *adapter) if (hw->mac.type != ixgbe_mac_82598EB) { u32 dmatxctl, rttdcs; +#ifdef PCI_IOV + enum ixgbe_iov_mode mode = ixgbe_get_iov_mode(adapter); +#endif dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL); dmatxctl |= IXGBE_DMATXCTL_TE; IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl); @@ -2792,7 +2911,11 @@ ixgbe_initialize_transmit_units(struct adapter *adapter) rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); rttdcs |= IXGBE_RTTDCS_ARBDIS; IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); +#ifdef PCI_IOV + IXGBE_WRITE_REG(hw, IXGBE_MTQC, ixgbe_get_mtqc(mode)); +#else IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); +#endif rttdcs &= ~IXGBE_RTTDCS_ARBDIS; IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); } @@ -2804,17 +2927,14 @@ static void ixgbe_initialise_rss_mapping(struct adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; - uint32_t reta; - int i, j, queue_id, table_size; - int index_mult; - uint32_t rss_key[10]; - uint32_t mrqc; + u32 reta = 0, mrqc, rss_key[10]; + int queue_id, table_size, index_mult; #ifdef RSS - uint32_t rss_hash_config; + u32 rss_hash_config; +#endif +#ifdef PCI_IOV + enum ixgbe_iov_mode mode; #endif - - /* Setup RSS */ - reta = 0; #ifdef RSS /* Fetch the configured RSS key */ @@ -2840,7 +2960,7 @@ ixgbe_initialise_rss_mapping(struct adapter *adapter) } /* Set up the redirection table */ - for (i = 0, j = 0; i < table_size; i++, j++) { + for (int i = 0, j = 0; i < table_size; i++, j++) { if (j == adapter->num_queues) j = 0; #ifdef RSS /* @@ -2907,19 +3027,16 @@ ixgbe_initialise_rss_mapping(struct adapter *adapter) mrqc = IXGBE_MRQC_RSSEN | IXGBE_MRQC_RSS_FIELD_IPV4 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP -#if 0 - | IXGBE_MRQC_RSS_FIELD_IPV4_UDP -#endif | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP | IXGBE_MRQC_RSS_FIELD_IPV6_EX | IXGBE_MRQC_RSS_FIELD_IPV6 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP -#if 0 - | IXGBE_MRQC_RSS_FIELD_IPV6_UDP - | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP -#endif ; #endif /* RSS */ +#ifdef PCI_IOV + mode = ixgbe_get_iov_mode(adapter); + mrqc |= ixgbe_get_mrqc(mode); +#endif IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); } @@ -2978,16 +3095,17 @@ ixgbe_initialize_receive_units(struct adapter *adapter) for (int i = 0; i < adapter->num_queues; i++, rxr++) { u64 rdba = rxr->rxdma.dma_paddr; + int j = rxr->me; /* Setup the Base and Length of the Rx Descriptor Ring */ - IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), + IXGBE_WRITE_REG(hw, IXGBE_RDBAL(j), (rdba & 0x00000000ffffffffULL)); - IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32)); - IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), + IXGBE_WRITE_REG(hw, IXGBE_RDBAH(j), (rdba >> 32)); + IXGBE_WRITE_REG(hw, IXGBE_RDLEN(j), adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); /* Set up the SRRCTL register */ - srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); + srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(j)); srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK; srrctl |= bufsz; @@ -3006,11 +3124,11 @@ ixgbe_initialize_receive_units(struct adapter *adapter) srrctl &= ~IXGBE_SRRCTL_DROP_EN; } - IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(i), srrctl); + IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(j), srrctl); /* Setup the HW Rx Head and Tail Descriptor Pointers */ - IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0); - IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0); + IXGBE_WRITE_REG(hw, IXGBE_RDH(j), 0); + IXGBE_WRITE_REG(hw, IXGBE_RDT(j), 0); /* Set the processing limit */ rxr->process_limit = ixgbe_rx_process_limit; @@ -3126,9 +3244,9 @@ ixgbe_setup_vlan_hw_support(struct adapter *adapter) rxr = &adapter->rx_rings[i]; /* On 82599 the VLAN enable is per/queue in RXDCTL */ if (hw->mac.type != ixgbe_mac_82598EB) { - ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); + ctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(rxr->me)); ctrl |= IXGBE_RXDCTL_VME; - IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), ctrl); + IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(rxr->me), ctrl); } rxr->vtag_strip = TRUE; } @@ -3178,6 +3296,9 @@ ixgbe_enable_intr(struct adapter *adapter) #ifdef IXGBE_FDIR mask |= IXGBE_EIMS_FLOW_DIR; #endif +#ifdef PCI_IOV + mask |= IXGBE_EIMS_MAILBOX; +#endif break; case ixgbe_mac_X540: /* Detect if Thermal Sensor is enabled */ @@ -3201,6 +3322,9 @@ ixgbe_enable_intr(struct adapter *adapter) #ifdef IXGBE_FDIR mask |= IXGBE_EIMS_FLOW_DIR; #endif +#ifdef PCI_IOV + mask |= IXGBE_EIMS_MAILBOX; +#endif /* falls through */ default: break; @@ -3214,6 +3338,9 @@ ixgbe_enable_intr(struct adapter *adapter) /* Don't autoclear Link */ mask &= ~IXGBE_EIMS_OTHER; mask &= ~IXGBE_EIMS_LSC; +#ifdef PCI_IOV + mask &= ~IXGBE_EIMS_MAILBOX; +#endif IXGBE_WRITE_REG(hw, IXGBE_EIAC, mask); } @@ -3412,8 +3539,8 @@ ixgbe_set_ivar(struct adapter *adapter, u8 entry, u8 vector, s8 type) static void ixgbe_configure_ivars(struct adapter *adapter) { - struct ix_queue *que = adapter->queues; - u32 newitr; + struct ix_queue *que = adapter->queues; + u32 newitr; if (ixgbe_max_interrupt_rate > 0) newitr = (4000000 / ixgbe_max_interrupt_rate) & 0x0FF8; @@ -3427,10 +3554,12 @@ ixgbe_configure_ivars(struct adapter *adapter) } for (int i = 0; i < adapter->num_queues; i++, que++) { + struct rx_ring *rxr = &adapter->rx_rings[i]; + struct tx_ring *txr = &adapter->tx_rings[i]; /* First the RX queue entry */ - ixgbe_set_ivar(adapter, i, que->msix, 0); + ixgbe_set_ivar(adapter, rxr->me, que->msix, 0); /* ... and the TX */ - ixgbe_set_ivar(adapter, i, que->msix, 1); + ixgbe_set_ivar(adapter, txr->me, que->msix, 1); /* Set an Initial EITR value */ IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(que->msix), newitr); @@ -3444,7 +3573,8 @@ ixgbe_configure_ivars(struct adapter *adapter) ** ixgbe_sfp_probe - called in the local timer to ** determine if a port had optics inserted. */ -static bool ixgbe_sfp_probe(struct adapter *adapter) +static bool +ixgbe_sfp_probe(struct adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; device_t dev = adapter->dev; @@ -3504,6 +3634,7 @@ ixgbe_handle_mod(void *context, int pending) "Unsupported SFP+ module type was detected.\n"); return; } + err = hw->mac.ops.setup_sfp(hw); if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) { device_printf(dev, @@ -3626,9 +3757,7 @@ ixgbe_check_eee_support(struct adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; - adapter->eee_support = adapter->eee_enabled = - (hw->device_id == IXGBE_DEV_ID_X550T || - hw->device_id == IXGBE_DEV_ID_X550EM_X_KR); + adapter->eee_enabled = !!(hw->mac.ops.setup_eee); } /* @@ -4004,8 +4133,7 @@ ixgbe_add_device_sysctls(struct adapter *adapter) ixgbe_sysctl_dmac, "I", "DMA Coalesce"); /* for X550T and X550EM backplane devices */ - if (hw->device_id == IXGBE_DEV_ID_X550T || - hw->device_id == IXGBE_DEV_ID_X550EM_X_KR) { + if (hw->mac.ops.setup_eee) { struct sysctl_oid *eee_node; struct sysctl_oid_list *eee_list; @@ -4625,6 +4753,7 @@ static int ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS) { struct adapter *adapter = (struct adapter *) arg1; + struct ixgbe_hw *hw = &adapter->hw; struct ifnet *ifp = adapter->ifp; int new_eee_enabled, error = 0; @@ -4635,7 +4764,7 @@ ixgbe_sysctl_eee_enable(SYSCTL_HANDLER_ARGS) if (new_eee_enabled == adapter->eee_enabled) return (0); - if (new_eee_enabled > 0 && !adapter->eee_support) + if (new_eee_enabled > 0 && !hw->mac.ops.setup_eee) return (ENODEV); else adapter->eee_enabled = !!(new_eee_enabled); @@ -4751,10 +4880,19 @@ ixgbe_enable_rx_drop(struct adapter *adapter) struct ixgbe_hw *hw = &adapter->hw; for (int i = 0; i < adapter->num_queues; i++) { - u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); + struct rx_ring *rxr = &adapter->rx_rings[i]; + u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); srrctl |= IXGBE_SRRCTL_DROP_EN; - IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(i), srrctl); + IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); } +#ifdef PCI_IOV + /* enable drop for each vf */ + for (int i = 0; i < adapter->num_vfs; i++) { + IXGBE_WRITE_REG(hw, IXGBE_QDE, + (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT) | + IXGBE_QDE_ENABLE)); + } +#endif } static void @@ -4763,10 +4901,18 @@ ixgbe_disable_rx_drop(struct adapter *adapter) struct ixgbe_hw *hw = &adapter->hw; for (int i = 0; i < adapter->num_queues; i++) { - u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); + struct rx_ring *rxr = &adapter->rx_rings[i]; + u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(rxr->me)); srrctl &= ~IXGBE_SRRCTL_DROP_EN; - IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(i), srrctl); + IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(rxr->me), srrctl); } +#ifdef PCI_IOV + /* disable drop for each vf */ + for (int i = 0; i < adapter->num_vfs; i++) { + IXGBE_WRITE_REG(hw, IXGBE_QDE, + (IXGBE_QDE_WRITE | (i << IXGBE_QDE_IDX_SHIFT))); + } +#endif } static void @@ -4793,4 +4939,722 @@ ixgbe_rearm_queues(struct adapter *adapter, u64 queues) } } +#ifdef PCI_IOV + +/* +** Support functions for SRIOV/VF management +*/ + +static void +ixgbe_ping_all_vfs(struct adapter *adapter) +{ + struct ixgbe_vf *vf; + + for (int i = 0; i < adapter->num_vfs; i++) { + vf = &adapter->vfs[i]; + if (vf->flags & IXGBE_VF_ACTIVE) + ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); + } +} + + +static void +ixgbe_vf_set_default_vlan(struct adapter *adapter, struct ixgbe_vf *vf, + uint16_t tag) +{ + struct ixgbe_hw *hw; + uint32_t vmolr, vmvir; + + hw = &adapter->hw; + + vf->vlan_tag = tag; + + vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf->pool)); + + /* Do not receive packets that pass inexact filters. */ + vmolr &= ~(IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_ROPE); + + /* Disable Multicast Promicuous Mode. */ + vmolr &= ~IXGBE_VMOLR_MPE; + + /* Accept broadcasts. */ + vmolr |= IXGBE_VMOLR_BAM; + + if (tag == 0) { + /* Accept non-vlan tagged traffic. */ + //vmolr |= IXGBE_VMOLR_AUPE; + + /* Allow VM to tag outgoing traffic; no default tag. */ + vmvir = 0; + } else { + /* Require vlan-tagged traffic. */ + vmolr &= ~IXGBE_VMOLR_AUPE; + + /* Tag all traffic with provided vlan tag. */ + vmvir = (tag | IXGBE_VMVIR_VLANA_DEFAULT); + } + IXGBE_WRITE_REG(hw, IXGBE_VMOLR(vf->pool), vmolr); + IXGBE_WRITE_REG(hw, IXGBE_VMVIR(vf->pool), vmvir); +} + + +static boolean_t +ixgbe_vf_frame_size_compatible(struct adapter *adapter, struct ixgbe_vf *vf) +{ + + /* + * Frame size compatibility between PF and VF is only a problem on + * 82599-based cards. X540 and later support any combination of jumbo + * frames on PFs and VFs. + */ + if (adapter->hw.mac.type != ixgbe_mac_82599EB) + return (TRUE); + + switch (vf->api_ver) { + case IXGBE_API_VER_1_0: + case IXGBE_API_VER_UNKNOWN: + /* + * On legacy (1.0 and older) VF versions, we don't support jumbo + * frames on either the PF or the VF. + */ + if (adapter->max_frame_size > ETHER_MAX_LEN || + vf->max_frame_size > ETHER_MAX_LEN) + return (FALSE); + + return (TRUE); + + break; + case IXGBE_API_VER_1_1: + default: + /* + * 1.1 or later VF versions always work if they aren't using + * jumbo frames. + */ + if (vf->max_frame_size <= ETHER_MAX_LEN) + return (TRUE); + + /* + * Jumbo frames only work with VFs if the PF is also using jumbo + * frames. + */ + if (adapter->max_frame_size <= ETHER_MAX_LEN) + return (TRUE); + + return (FALSE); + + } +} + + +static void +ixgbe_process_vf_reset(struct adapter *adapter, struct ixgbe_vf *vf) +{ + ixgbe_vf_set_default_vlan(adapter, vf, vf->default_vlan); + + // XXX clear multicast addresses + + ixgbe_clear_rar(&adapter->hw, vf->rar_index); + + vf->api_ver = IXGBE_API_VER_UNKNOWN; +} + + +static void +ixgbe_vf_enable_transmit(struct adapter *adapter, struct ixgbe_vf *vf) +{ + struct ixgbe_hw *hw; + uint32_t vf_index, vfte; + + hw = &adapter->hw; + + vf_index = IXGBE_VF_INDEX(vf->pool); + vfte = IXGBE_READ_REG(hw, IXGBE_VFTE(vf_index)); + vfte |= IXGBE_VF_BIT(vf->pool); + IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_index), vfte); +} + + +static void +ixgbe_vf_enable_receive(struct adapter *adapter, struct ixgbe_vf *vf) +{ + struct ixgbe_hw *hw; + uint32_t vf_index, vfre; + + hw = &adapter->hw; + + vf_index = IXGBE_VF_INDEX(vf->pool); + vfre = IXGBE_READ_REG(hw, IXGBE_VFRE(vf_index)); + if (ixgbe_vf_frame_size_compatible(adapter, vf)) + vfre |= IXGBE_VF_BIT(vf->pool); + else + vfre &= ~IXGBE_VF_BIT(vf->pool); + IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_index), vfre); +} + + +static void +ixgbe_vf_reset_msg(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) +{ + struct ixgbe_hw *hw; + uint32_t ack; + uint32_t resp[IXGBE_VF_PERMADDR_MSG_LEN]; + + hw = &adapter->hw; + + ixgbe_process_vf_reset(adapter, vf); + + if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { + ixgbe_set_rar(&adapter->hw, vf->rar_index, + vf->ether_addr, vf->pool, TRUE); + ack = IXGBE_VT_MSGTYPE_ACK; + } else + ack = IXGBE_VT_MSGTYPE_NACK; + + ixgbe_vf_enable_transmit(adapter, vf); + ixgbe_vf_enable_receive(adapter, vf); + + vf->flags |= IXGBE_VF_CTS; + + resp[0] = IXGBE_VF_RESET | ack | IXGBE_VT_MSGTYPE_CTS; + bcopy(vf->ether_addr, &resp[1], ETHER_ADDR_LEN); + resp[3] = hw->mac.mc_filter_type; + ixgbe_write_mbx(hw, resp, IXGBE_VF_PERMADDR_MSG_LEN, vf->pool); +} + + +static void +ixgbe_vf_set_mac(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) +{ + uint8_t *mac; + + mac = (uint8_t*)&msg[1]; + + /* Check that the VF has permission to change the MAC address. */ + if (!(vf->flags & IXGBE_VF_CAP_MAC) && ixgbe_vf_mac_changed(vf, mac)) { + ixgbe_send_vf_nack(adapter, vf, msg[0]); + return; + } + + if (ixgbe_validate_mac_addr(mac) != 0) { + ixgbe_send_vf_nack(adapter, vf, msg[0]); + return; + } + + bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); + + ixgbe_set_rar(&adapter->hw, vf->rar_index, vf->ether_addr, + vf->pool, TRUE); + + ixgbe_send_vf_ack(adapter, vf, msg[0]); +} + + +/* +** VF multicast addresses are set by using the appropriate bit in +** 1 of 128 32 bit addresses (4096 possible). +*/ +static void +ixgbe_vf_set_mc_addr(struct adapter *adapter, struct ixgbe_vf *vf, u32 *msg) +{ + u16 *list = (u16*)&msg[1]; + int entries; + u32 vmolr, vec_bit, vec_reg, mta_reg; + + entries = (msg[0] & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT; + entries = min(entries, IXGBE_MAX_VF_MC); + + vmolr = IXGBE_READ_REG(&adapter->hw, IXGBE_VMOLR(vf->pool)); + + vf->num_mc_hashes = entries; + + /* Set the appropriate MTA bit */ + for (int i = 0; i < entries; i++) { + vf->mc_hash[i] = list[i]; + vec_reg = (vf->mc_hash[i] >> 5) & 0x7F; + vec_bit = vf->mc_hash[i] & 0x1F; + mta_reg = IXGBE_READ_REG(&adapter->hw, IXGBE_MTA(vec_reg)); + mta_reg |= (1 << vec_bit); + IXGBE_WRITE_REG(&adapter->hw, IXGBE_MTA(vec_reg), mta_reg); + } + + vmolr |= IXGBE_VMOLR_ROMPE; + IXGBE_WRITE_REG(&adapter->hw, IXGBE_VMOLR(vf->pool), vmolr); + ixgbe_send_vf_ack(adapter, vf, msg[0]); + return; +} + + +static void +ixgbe_vf_set_vlan(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) +{ + struct ixgbe_hw *hw; + int enable; + uint16_t tag; + + hw = &adapter->hw; + enable = IXGBE_VT_MSGINFO(msg[0]); + tag = msg[1] & IXGBE_VLVF_VLANID_MASK; + + if (!(vf->flags & IXGBE_VF_CAP_VLAN)) { + ixgbe_send_vf_nack(adapter, vf, msg[0]); + return; + } + + /* It is illegal to enable vlan tag 0. */ + if (tag == 0 && enable != 0){ + ixgbe_send_vf_nack(adapter, vf, msg[0]); + return; + } + + ixgbe_set_vfta(hw, tag, vf->pool, enable); + ixgbe_send_vf_ack(adapter, vf, msg[0]); +} + + +static void +ixgbe_vf_set_lpe(struct adapter *adapter, struct ixgbe_vf *vf, uint32_t *msg) +{ + struct ixgbe_hw *hw; + uint32_t vf_max_size, pf_max_size, mhadd; + + hw = &adapter->hw; + vf_max_size = msg[1]; + + if (vf_max_size < ETHER_CRC_LEN) { + /* We intentionally ACK invalid LPE requests. */ + ixgbe_send_vf_ack(adapter, vf, msg[0]); + return; + } + + vf_max_size -= ETHER_CRC_LEN; + + if (vf_max_size > IXGBE_MAX_FRAME_SIZE) { + /* We intentionally ACK invalid LPE requests. */ + ixgbe_send_vf_ack(adapter, vf, msg[0]); + return; + } + + vf->max_frame_size = vf_max_size; + ixgbe_update_max_frame(adapter, vf->max_frame_size); + + /* + * We might have to disable reception to this VF if the frame size is + * not compatible with the config on the PF. + */ + ixgbe_vf_enable_receive(adapter, vf); + + mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD); + pf_max_size = (mhadd & IXGBE_MHADD_MFS_MASK) >> IXGBE_MHADD_MFS_SHIFT; + + if (pf_max_size < adapter->max_frame_size) { + mhadd &= ~IXGBE_MHADD_MFS_MASK; + mhadd |= adapter->max_frame_size << IXGBE_MHADD_MFS_SHIFT; + IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd); + } + + ixgbe_send_vf_ack(adapter, vf, msg[0]); +} + + +static void +ixgbe_vf_set_macvlan(struct adapter *adapter, struct ixgbe_vf *vf, + uint32_t *msg) +{ + //XXX implement this + ixgbe_send_vf_nack(adapter, vf, msg[0]); +} + + +static void +ixgbe_vf_api_negotiate(struct adapter *adapter, struct ixgbe_vf *vf, + uint32_t *msg) +{ + + switch (msg[0]) { + case IXGBE_API_VER_1_0: + case IXGBE_API_VER_1_1: + vf->api_ver = msg[0]; + ixgbe_send_vf_ack(adapter, vf, msg[0]); + break; + default: + vf->api_ver = IXGBE_API_VER_UNKNOWN; + ixgbe_send_vf_nack(adapter, vf, msg[0]); + break; + } +} + + +static void +ixgbe_vf_get_queues(struct adapter *adapter, struct ixgbe_vf *vf, + uint32_t *msg) +{ + struct ixgbe_hw *hw; + uint32_t resp[IXGBE_VF_GET_QUEUES_RESP_LEN]; + int num_queues; + + hw = &adapter->hw; + + /* GET_QUEUES is not supported on pre-1.1 APIs. */ + switch (msg[0]) { + case IXGBE_API_VER_1_0: + case IXGBE_API_VER_UNKNOWN: + ixgbe_send_vf_nack(adapter, vf, msg[0]); + return; + } + + resp[0] = IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK | + IXGBE_VT_MSGTYPE_CTS; + + num_queues = ixgbe_vf_queues(ixgbe_get_iov_mode(adapter)); + resp[IXGBE_VF_TX_QUEUES] = num_queues; + resp[IXGBE_VF_RX_QUEUES] = num_queues; + resp[IXGBE_VF_TRANS_VLAN] = (vf->default_vlan != 0); + resp[IXGBE_VF_DEF_QUEUE] = 0; + + ixgbe_write_mbx(hw, resp, IXGBE_VF_GET_QUEUES_RESP_LEN, vf->pool); +} + + +static void +ixgbe_process_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf) +{ + struct ixgbe_hw *hw; + uint32_t msg[IXGBE_VFMAILBOX_SIZE]; + int error; + + hw = &adapter->hw; + + error = ixgbe_read_mbx(hw, msg, IXGBE_VFMAILBOX_SIZE, vf->pool); + + if (error != 0) + return; + + CTR3(KTR_MALLOC, "%s: received msg %x from %d", + adapter->ifp->if_xname, msg[0], vf->pool); + if (msg[0] == IXGBE_VF_RESET) { + ixgbe_vf_reset_msg(adapter, vf, msg); + return; + } + + if (!(vf->flags & IXGBE_VF_CTS)) { + ixgbe_send_vf_nack(adapter, vf, msg[0]); + return; + } + + switch (msg[0] & IXGBE_VT_MSG_MASK) { + case IXGBE_VF_SET_MAC_ADDR: + ixgbe_vf_set_mac(adapter, vf, msg); + break; + case IXGBE_VF_SET_MULTICAST: + ixgbe_vf_set_mc_addr(adapter, vf, msg); + break; + case IXGBE_VF_SET_VLAN: + ixgbe_vf_set_vlan(adapter, vf, msg); + break; + case IXGBE_VF_SET_LPE: + ixgbe_vf_set_lpe(adapter, vf, msg); + break; + case IXGBE_VF_SET_MACVLAN: + ixgbe_vf_set_macvlan(adapter, vf, msg); + break; + case IXGBE_VF_API_NEGOTIATE: + ixgbe_vf_api_negotiate(adapter, vf, msg); + break; + case IXGBE_VF_GET_QUEUES: + ixgbe_vf_get_queues(adapter, vf, msg); + break; + default: + ixgbe_send_vf_nack(adapter, vf, msg[0]); + } +} + + +/* + * Tasklet for handling VF -> PF mailbox messages. + */ +static void +ixgbe_handle_mbx(void *context, int pending) +{ + struct adapter *adapter; + struct ixgbe_hw *hw; + struct ixgbe_vf *vf; + int i; + + adapter = context; + hw = &adapter->hw; + + IXGBE_CORE_LOCK(adapter); + for (i = 0; i < adapter->num_vfs; i++) { + vf = &adapter->vfs[i]; + + if (vf->flags & IXGBE_VF_ACTIVE) { + if (ixgbe_check_for_rst(hw, vf->pool) == 0) + ixgbe_process_vf_reset(adapter, vf); + + if (ixgbe_check_for_msg(hw, vf->pool) == 0) + ixgbe_process_vf_msg(adapter, vf); + + if (ixgbe_check_for_ack(hw, vf->pool) == 0) + ixgbe_process_vf_ack(adapter, vf); + } + } + IXGBE_CORE_UNLOCK(adapter); +} + + +static int +ixgbe_init_iov(device_t dev, u16 num_vfs, const nvlist_t *config) +{ + struct adapter *adapter; + enum ixgbe_iov_mode mode; + + adapter = device_get_softc(dev); + adapter->num_vfs = num_vfs; + mode = ixgbe_get_iov_mode(adapter); + + if (num_vfs > ixgbe_max_vfs(mode)) { + adapter->num_vfs = 0; + return (ENOSPC); + } + + IXGBE_CORE_LOCK(adapter); + + adapter->vfs = malloc(sizeof(*adapter->vfs) * num_vfs, M_IXGBE, + M_NOWAIT | M_ZERO); + + if (adapter->vfs == NULL) { + adapter->num_vfs = 0; + IXGBE_CORE_UNLOCK(adapter); + return (ENOMEM); + } + + ixgbe_init_locked(adapter); + + IXGBE_CORE_UNLOCK(adapter); + + return (0); +} + + +static void +ixgbe_uninit_iov(device_t dev) +{ + struct ixgbe_hw *hw; + struct adapter *adapter; + uint32_t pf_reg, vf_reg; + + adapter = device_get_softc(dev); + hw = &adapter->hw; + + IXGBE_CORE_LOCK(adapter); + + /* Enable rx/tx for the PF and disable it for all VFs. */ + pf_reg = IXGBE_VF_INDEX(adapter->pool); + IXGBE_WRITE_REG(hw, IXGBE_VFRE(pf_reg), + IXGBE_VF_BIT(adapter->pool)); + IXGBE_WRITE_REG(hw, IXGBE_VFTE(pf_reg), + IXGBE_VF_BIT(adapter->pool)); + + if (pf_reg == 0) + vf_reg = 1; + else + vf_reg = 0; + IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), 0); + IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), 0); + + IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, 0); + + free(adapter->vfs, M_IXGBE); + adapter->vfs = NULL; + adapter->num_vfs = 0; + + IXGBE_CORE_UNLOCK(adapter); +} + + +static void +ixgbe_initialize_iov(struct adapter *adapter) +{ + struct ixgbe_hw *hw = &adapter->hw; + uint32_t mrqc, mtqc, vt_ctl, vf_reg, gcr_ext, gpie; + enum ixgbe_iov_mode mode; + int i; + + mode = ixgbe_get_iov_mode(adapter); + if (mode == IXGBE_NO_VM) + return; + + IXGBE_CORE_LOCK_ASSERT(adapter); + + mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); + mrqc &= ~IXGBE_MRQC_MRQE_MASK; + + switch (mode) { + case IXGBE_64_VM: + mrqc |= IXGBE_MRQC_VMDQRSS64EN; + break; + case IXGBE_32_VM: + mrqc |= IXGBE_MRQC_VMDQRSS32EN; + break; + default: + panic("Unexpected SR-IOV mode %d", mode); + } + IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); + + mtqc = IXGBE_MTQC_VT_ENA; + switch (mode) { + case IXGBE_64_VM: + mtqc |= IXGBE_MTQC_64VF; + break; + case IXGBE_32_VM: + mtqc |= IXGBE_MTQC_32VF; + break; + default: + panic("Unexpected SR-IOV mode %d", mode); + } + IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc); + + + gcr_ext = IXGBE_READ_REG(hw, IXGBE_GCR_EXT); + gcr_ext |= IXGBE_GCR_EXT_MSIX_EN; + gcr_ext &= ~IXGBE_GCR_EXT_VT_MODE_MASK; + switch (mode) { + case IXGBE_64_VM: + gcr_ext |= IXGBE_GCR_EXT_VT_MODE_64; + break; + case IXGBE_32_VM: + gcr_ext |= IXGBE_GCR_EXT_VT_MODE_32; + break; + default: + panic("Unexpected SR-IOV mode %d", mode); + } + IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); + + + gpie = IXGBE_READ_REG(hw, IXGBE_GPIE); + gcr_ext &= ~IXGBE_GPIE_VTMODE_MASK; + switch (mode) { + case IXGBE_64_VM: + gpie |= IXGBE_GPIE_VTMODE_64; + break; + case IXGBE_32_VM: + gpie |= IXGBE_GPIE_VTMODE_32; + break; + default: + panic("Unexpected SR-IOV mode %d", mode); + } + IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie); + + /* Enable rx/tx for the PF. */ + vf_reg = IXGBE_VF_INDEX(adapter->pool); + IXGBE_WRITE_REG(hw, IXGBE_VFRE(vf_reg), + IXGBE_VF_BIT(adapter->pool)); + IXGBE_WRITE_REG(hw, IXGBE_VFTE(vf_reg), + IXGBE_VF_BIT(adapter->pool)); + + /* Allow VM-to-VM communication. */ + IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN); + + vt_ctl = IXGBE_VT_CTL_VT_ENABLE | IXGBE_VT_CTL_REPLEN; + vt_ctl |= (adapter->pool << IXGBE_VT_CTL_POOL_SHIFT); + IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vt_ctl); + + for (i = 0; i < adapter->num_vfs; i++) + ixgbe_init_vf(adapter, &adapter->vfs[i]); +} + + +/* +** Check the max frame setting of all active VF's +*/ +static void +ixgbe_recalculate_max_frame(struct adapter *adapter) +{ + struct ixgbe_vf *vf; + + IXGBE_CORE_LOCK_ASSERT(adapter); + + for (int i = 0; i < adapter->num_vfs; i++) { + vf = &adapter->vfs[i]; + if (vf->flags & IXGBE_VF_ACTIVE) + ixgbe_update_max_frame(adapter, vf->max_frame_size); + } +} + + +static void +ixgbe_init_vf(struct adapter *adapter, struct ixgbe_vf *vf) +{ + struct ixgbe_hw *hw; + uint32_t vf_index, pfmbimr; + + IXGBE_CORE_LOCK_ASSERT(adapter); + + hw = &adapter->hw; + + if (!(vf->flags & IXGBE_VF_ACTIVE)) + return; + + vf_index = IXGBE_VF_INDEX(vf->pool); + pfmbimr = IXGBE_READ_REG(hw, IXGBE_PFMBIMR(vf_index)); + pfmbimr |= IXGBE_VF_BIT(vf->pool); + IXGBE_WRITE_REG(hw, IXGBE_PFMBIMR(vf_index), pfmbimr); + + ixgbe_vf_set_default_vlan(adapter, vf, vf->vlan_tag); + + // XXX multicast addresses + + if (ixgbe_validate_mac_addr(vf->ether_addr) == 0) { + ixgbe_set_rar(&adapter->hw, vf->rar_index, + vf->ether_addr, vf->pool, TRUE); + } + + ixgbe_vf_enable_transmit(adapter, vf); + ixgbe_vf_enable_receive(adapter, vf); + + ixgbe_send_vf_msg(adapter, vf, IXGBE_PF_CONTROL_MSG); +} + +static int +ixgbe_add_vf(device_t dev, u16 vfnum, const nvlist_t *config) +{ + struct adapter *adapter; + struct ixgbe_vf *vf; + const void *mac; + + adapter = device_get_softc(dev); + + KASSERT(vfnum < adapter->num_vfs, ("VF index %d is out of range %d", + vfnum, adapter->num_vfs)); + + IXGBE_CORE_LOCK(adapter); + vf = &adapter->vfs[vfnum]; + vf->pool= vfnum; + + /* RAR[0] is used by the PF so use vfnum + 1 for VF RAR. */ + vf->rar_index = vfnum + 1; + vf->default_vlan = 0; + vf->max_frame_size = ETHER_MAX_LEN; + ixgbe_update_max_frame(adapter, vf->max_frame_size); + + if (nvlist_exists_binary(config, "mac-addr")) { + mac = nvlist_get_binary(config, "mac-addr", NULL); + bcopy(mac, vf->ether_addr, ETHER_ADDR_LEN); + if (nvlist_get_bool(config, "allow-set-mac")) + vf->flags |= IXGBE_VF_CAP_MAC; + } else + /* + * If the administrator has not specified a MAC address then + * we must allow the VF to choose one. + */ + vf->flags |= IXGBE_VF_CAP_MAC; + + vf->flags = IXGBE_VF_ACTIVE; + + ixgbe_init_vf(adapter, vf); + IXGBE_CORE_UNLOCK(adapter); + + return (0); +} +#endif /* PCI_IOV */ diff --git a/sys/dev/ixgbe/if_ixv.c b/sys/dev/ixgbe/if_ixv.c index a550a856e6f8..cc2d63f1c9ba 100644 --- a/sys/dev/ixgbe/if_ixv.c +++ b/sys/dev/ixgbe/if_ixv.c @@ -43,7 +43,7 @@ /********************************************************************* * Driver version *********************************************************************/ -char ixv_driver_version[] = "1.2.5"; +char ixv_driver_version[] = "1.4.0"; /********************************************************************* * PCI Device ID Table @@ -151,6 +151,10 @@ MODULE_DEPEND(ixv, ether, 1, 1, 1); ** TUNEABLE PARAMETERS: */ +/* Number of Queues - do not exceed MSIX vectors - 1 */ +static int ixv_num_queues = 1; +TUNABLE_INT("hw.ixv.num_queues", &ixv_num_queues); + /* ** AIM: Adaptive Interrupt Moderation ** which means that the interrupt rate @@ -338,6 +342,11 @@ ixv_attach(device_t dev) ixgbe_reset_hw(hw); + /* Get the Mailbox API version */ + device_printf(dev,"MBX API %d negotiation: %d\n", + ixgbe_mbox_api_11, + ixgbevf_negotiate_api_version(hw, ixgbe_mbox_api_11)); + error = ixgbe_init_hw(hw); if (error) { device_printf(dev,"Hardware Initialization Failure\n"); @@ -1313,10 +1322,13 @@ static int ixv_setup_msix(struct adapter *adapter) { device_t dev = adapter->dev; - int rid, want; + int rid, want, msgs; - /* First try MSI/X */ + /* Must have at least 2 MSIX vectors */ + msgs = pci_msix_count(dev); + if (msgs < 2) + goto out; rid = PCIR_BAR(3); adapter->msix_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE); @@ -1327,11 +1339,16 @@ ixv_setup_msix(struct adapter *adapter) } /* - ** Want two vectors: one for a queue, + ** Want vectors for the queues, ** plus an additional for mailbox. */ - want = 2; - if ((pci_alloc_msix(dev, &want) == 0) && (want == 2)) { + want = adapter->num_queues + 1; + if (want > msgs) { + want = msgs; + adapter->num_queues = msgs - 1; + } else + msgs = want; + if ((pci_alloc_msix(dev, &msgs) == 0) && (msgs == want)) { device_printf(adapter->dev, "Using MSIX interrupts with %d vectors\n", want); return (want); @@ -1370,7 +1387,9 @@ ixv_allocate_pci_resources(struct adapter *adapter) rman_get_bushandle(adapter->pci_mem); adapter->hw.hw_addr = (u8 *) &adapter->osdep.mem_bus_space_handle; - adapter->num_queues = 1; + /* Pick up the tuneable queues */ + adapter->num_queues = ixv_num_queues; + adapter->hw.back = &adapter->osdep; /* @@ -1591,32 +1610,41 @@ ixv_initialize_receive_units(struct adapter *adapter) { struct rx_ring *rxr = adapter->rx_rings; struct ixgbe_hw *hw = &adapter->hw; - struct ifnet *ifp = adapter->ifp; - u32 bufsz, fctrl, rxcsum, hlreg; - - - /* Enable broadcasts */ - fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL); - fctrl |= IXGBE_FCTRL_BAM; - fctrl |= IXGBE_FCTRL_DPF; - fctrl |= IXGBE_FCTRL_PMCF; - IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl); + struct ifnet *ifp = adapter->ifp; + u32 bufsz, rxcsum, psrtype; + int max_frame; - /* Set for Jumbo Frames? */ - hlreg = IXGBE_READ_REG(hw, IXGBE_HLREG0); - if (ifp->if_mtu > ETHERMTU) { - hlreg |= IXGBE_HLREG0_JUMBOEN; + if (ifp->if_mtu > ETHERMTU) bufsz = 4096 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; - } else { - hlreg &= ~IXGBE_HLREG0_JUMBOEN; + else bufsz = 2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; - } - IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg); + + psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR | + IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR | + IXGBE_PSRTYPE_L2HDR; + + IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype); + + /* Tell PF our expected packet-size */ + max_frame = ifp->if_mtu + IXGBE_MTU_HDR; + ixgbevf_rlpml_set_vf(hw, max_frame); for (int i = 0; i < adapter->num_queues; i++, rxr++) { u64 rdba = rxr->rxdma.dma_paddr; u32 reg, rxdctl; + /* Disable the queue */ + rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); + rxdctl &= ~(IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME); + IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), rxdctl); + for (int j = 0; j < 10; j++) { + if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)) & + IXGBE_RXDCTL_ENABLE) + msec_delay(1); + else + break; + } + wmb(); /* Setup the Base and Length of the Rx Descriptor Ring */ IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(i), (rdba & 0x00000000ffffffffULL)); @@ -1625,6 +1653,10 @@ ixv_initialize_receive_units(struct adapter *adapter) IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(i), adapter->num_rx_desc * sizeof(union ixgbe_adv_rx_desc)); + /* Reset the ring indices */ + IXGBE_WRITE_REG(hw, IXGBE_VFRDH(rxr->me), 0); + IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me), 0); + /* Set up the SRRCTL register */ reg = IXGBE_READ_REG(hw, IXGBE_VFSRRCTL(i)); reg &= ~IXGBE_SRRCTL_BSIZEHDR_MASK; @@ -1633,14 +1665,14 @@ ixv_initialize_receive_units(struct adapter *adapter) reg |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF; IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), reg); - /* Setup the HW Rx Head and Tail Descriptor Pointers */ - IXGBE_WRITE_REG(hw, IXGBE_VFRDH(rxr->me), 0); + /* Set the Tail Pointer */ IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rxr->me), adapter->num_rx_desc - 1); + /* Set the processing limit */ rxr->process_limit = ixv_rx_process_limit; - /* Set Rx Tail register */ + /* Capture Rx Tail index */ rxr->tail = IXGBE_VFRDT(rxr->me); /* Do the queue enabling last */ @@ -2033,9 +2065,7 @@ ixv_add_stats_sysctls(struct adapter *adapter) SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_packets", CTLFLAG_RD, &(txr->total_packets), "TX Packets"); - SYSCTL_ADD_UINT(ctx, queue_list, OID_AUTO, "tx_bytes", - CTLFLAG_RD, &(txr->bytes), 0, - "TX Bytes"); + SYSCTL_ADD_UQUAD(ctx, queue_list, OID_AUTO, "tx_no_desc", CTLFLAG_RD, &(txr->no_desc_avail), "# of times not enough descriptors were available during TX"); diff --git a/sys/dev/ixgbe/ix_txrx.c b/sys/dev/ixgbe/ix_txrx.c index bfe16070e374..c20b24e7064c 100644 --- a/sys/dev/ixgbe/ix_txrx.c +++ b/sys/dev/ixgbe/ix_txrx.c @@ -578,7 +578,6 @@ ixgbe_setup_transmit_ring(struct tx_ring *txr) { struct adapter *adapter = txr->adapter; struct ixgbe_tx_buf *txbuf; - int i; #ifdef DEV_NETMAP struct netmap_adapter *na = NA(adapter->ifp); struct netmap_slot *slot; @@ -601,7 +600,7 @@ ixgbe_setup_transmit_ring(struct tx_ring *txr) /* Free any existing tx buffers. */ txbuf = txr->tx_buffers; - for (i = 0; i < txr->num_desc; i++, txbuf++) { + for (int i = 0; i < txr->num_desc; i++, txbuf++) { if (txbuf->m_head != NULL) { bus_dmamap_sync(txr->txtag, txbuf->map, BUS_DMASYNC_POSTWRITE); @@ -622,7 +621,8 @@ ixgbe_setup_transmit_ring(struct tx_ring *txr) */ if (slot) { int si = netmap_idx_n2k(&na->tx_rings[txr->me], i); - netmap_load_map(na, txr->txtag, txbuf->map, NMB(na, slot + si)); + netmap_load_map(na, txr->txtag, + txbuf->map, NMB(na, slot + si)); } #endif /* DEV_NETMAP */ /* Clear the EOP descriptor pointer */ @@ -777,8 +777,7 @@ ixgbe_tx_ctx_setup(struct tx_ring *txr, struct mbuf *mp, if (mp->m_flags & M_VLANTAG) { vtag = htole16(mp->m_pkthdr.ether_vtag); vlan_macip_lens |= (vtag << IXGBE_ADVTXD_VLAN_SHIFT); - } - else if (!IXGBE_IS_X550VF(adapter) && (offload == FALSE)) + } else if (!IXGBE_IS_X550VF(adapter) && (offload == FALSE)) return (0); /* @@ -1379,7 +1378,7 @@ ixgbe_allocate_receive_buffers(struct rx_ring *rxr) struct adapter *adapter = rxr->adapter; device_t dev = adapter->dev; struct ixgbe_rx_buf *rxbuf; - int i, bsize, error; + int bsize, error; bsize = sizeof(struct ixgbe_rx_buf) * rxr->num_desc; if (!(rxr->rx_buffers = @@ -1406,7 +1405,7 @@ ixgbe_allocate_receive_buffers(struct rx_ring *rxr) goto fail; } - for (i = 0; i < rxr->num_desc; i++, rxbuf++) { + for (int i = 0; i < rxr->num_desc; i++, rxbuf++) { rxbuf = &rxr->rx_buffers[i]; error = bus_dmamap_create(rxr->ptag, 0, &rxbuf->pmap); if (error) { @@ -1428,9 +1427,8 @@ static void ixgbe_free_receive_ring(struct rx_ring *rxr) { struct ixgbe_rx_buf *rxbuf; - int i; - for (i = 0; i < rxr->num_desc; i++) { + for (int i = 0; i < rxr->num_desc; i++) { rxbuf = &rxr->rx_buffers[i]; if (rxbuf->buf != NULL) { bus_dmamap_sync(rxr->ptag, rxbuf->pmap, @@ -2140,6 +2138,9 @@ ixgbe_allocate_queues(struct adapter *adapter) struct rx_ring *rxr; int rsize, tsize, error = IXGBE_SUCCESS; int txconf = 0, rxconf = 0; +#ifdef PCI_IOV + enum ixgbe_iov_mode iov_mode; +#endif /* First allocate the top level queue structs */ if (!(adapter->queues = @@ -2172,6 +2173,12 @@ ixgbe_allocate_queues(struct adapter *adapter) tsize = roundup2(adapter->num_tx_desc * sizeof(union ixgbe_adv_tx_desc), DBA_ALIGN); +#ifdef PCI_IOV + iov_mode = ixgbe_get_iov_mode(adapter); + adapter->pool = ixgbe_max_vfs(iov_mode); +#else + adapter->pool = 0; +#endif /* * Now set up the TX queues, txconf is needed to handle the * possibility that things fail midcourse and we need to @@ -2181,7 +2188,11 @@ ixgbe_allocate_queues(struct adapter *adapter) /* Set up some basics */ txr = &adapter->tx_rings[i]; txr->adapter = adapter; +#ifdef PCI_IOV + txr->me = ixgbe_pf_que_index(iov_mode, i); +#else txr->me = i; +#endif txr->num_desc = adapter->num_tx_desc; /* Initialize the TX side lock */ @@ -2228,7 +2239,11 @@ ixgbe_allocate_queues(struct adapter *adapter) rxr = &adapter->rx_rings[i]; /* Set up some basics */ rxr->adapter = adapter; +#ifdef PCI_IOV + rxr->me = ixgbe_pf_que_index(iov_mode, i); +#else rxr->me = i; +#endif rxr->num_desc = adapter->num_rx_desc; /* Initialize the RX side lock */ diff --git a/sys/dev/ixgbe/ixgbe.h b/sys/dev/ixgbe/ixgbe.h index 44e7c3c26802..7f8aac59cc7e 100644 --- a/sys/dev/ixgbe/ixgbe.h +++ b/sys/dev/ixgbe/ixgbe.h @@ -92,11 +92,22 @@ #include <machine/smp.h> #include <sys/sbuf.h> +#ifdef PCI_IOV +#include <sys/nv.h> +#include <sys/iov_schema.h> +#include <dev/pci/pci_iov.h> +#endif + #include "ixgbe_api.h" #include "ixgbe_common.h" #include "ixgbe_phy.h" #include "ixgbe_vf.h" +#ifdef PCI_IOV +#include "ixgbe_common.h" +#include "ixgbe_mbx.h" +#endif + /* Tunables */ /* @@ -244,6 +255,29 @@ (_adapter->hw.mac.type == ixgbe_mac_X540_vf) || \ (_adapter->hw.mac.type == ixgbe_mac_82599_vf)) +#ifdef PCI_IOV +#define IXGBE_VF_INDEX(vmdq) ((vmdq) / 32) +#define IXGBE_VF_BIT(vmdq) (1 << ((vmdq) % 32)) + +#define IXGBE_VT_MSG_MASK 0xFFFF + +#define IXGBE_VT_MSGINFO(msg) \ + (((msg) & IXGBE_VT_MSGINFO_MASK) >> IXGBE_VT_MSGINFO_SHIFT) + +#define IXGBE_VF_GET_QUEUES_RESP_LEN 5 + +#define IXGBE_API_VER_1_0 0 +#define IXGBE_API_VER_2_0 1 /* Solaris API. Not supported. */ +#define IXGBE_API_VER_1_1 2 +#define IXGBE_API_VER_UNKNOWN UINT16_MAX + +enum ixgbe_iov_mode { + IXGBE_64_VM, + IXGBE_32_VM, + IXGBE_NO_VM +}; +#endif /* PCI_IOV */ + /* ***************************************************************************** @@ -262,6 +296,7 @@ typedef struct _ixgbe_vendor_info_t { unsigned int index; } ixgbe_vendor_info_t; + struct ixgbe_tx_buf { union ixgbe_adv_tx_desc *eop; struct mbuf *m_head; @@ -290,6 +325,11 @@ struct ixgbe_dma_alloc { int dma_nseg; }; +struct ixgbe_mc_addr { + u8 addr[IXGBE_ETH_LENGTH_OF_ADDRESS]; + u32 vmdq; +}; + /* ** Driver queue struct: this is the interrupt container ** for the associated tx and rx ring. @@ -387,6 +427,28 @@ struct rx_ring { #endif }; +#ifdef PCI_IOV +#define IXGBE_VF_CTS (1 << 0) /* VF is clear to send. */ +#define IXGBE_VF_CAP_MAC (1 << 1) /* VF is permitted to change MAC. */ +#define IXGBE_VF_CAP_VLAN (1 << 2) /* VF is permitted to join vlans. */ +#define IXGBE_VF_ACTIVE (1 << 3) /* VF is active. */ + +#define IXGBE_MAX_VF_MC 30 /* Max number of multicast entries */ + +struct ixgbe_vf { + u_int pool; + u_int rar_index; + u_int max_frame_size; + uint32_t flags; + uint8_t ether_addr[ETHER_ADDR_LEN]; + uint16_t mc_hash[IXGBE_MAX_VF_MC]; + uint16_t num_mc_hashes; + uint16_t default_vlan; + uint16_t vlan_tag; + uint16_t api_ver; +}; +#endif /* PCI_IOV */ + /* Our adapter structure */ struct adapter { struct ifnet *ifp; @@ -438,8 +500,8 @@ struct adapter { bool link_up; u32 vector; u16 dmac; - bool eee_support; bool eee_enabled; + u32 phy_layer; /* Power management-related */ bool wol_support; @@ -453,6 +515,9 @@ struct adapter { struct task link_task; /* Link tasklet */ struct task mod_task; /* SFP tasklet */ struct task msf_task; /* Multispeed Fiber */ +#ifdef PCI_IOV + struct task mbx_task; /* VF -> PF mailbox interrupt */ +#endif /* PCI_IOV */ #ifdef IXGBE_FDIR int fdir_reinit; struct task fdir_task; @@ -484,8 +549,12 @@ struct adapter { u32 num_rx_desc; /* Multicast array memory */ - u8 *mta; - + struct ixgbe_mc_addr *mta; + int num_vfs; + int pool; +#ifdef PCI_IOV + struct ixgbe_vf *vfs; +#endif /* Misc stats maintained by the driver */ unsigned long dropped_pkts; @@ -671,4 +740,150 @@ bool ixgbe_rxeof(struct ix_queue *); int ixgbe_dma_malloc(struct adapter *, bus_size_t, struct ixgbe_dma_alloc *, int); void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *); + +#ifdef PCI_IOV + +static inline boolean_t +ixgbe_vf_mac_changed(struct ixgbe_vf *vf, const uint8_t *mac) +{ + return (bcmp(mac, vf->ether_addr, ETHER_ADDR_LEN) != 0); +} + +static inline void +ixgbe_send_vf_msg(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg) +{ + + if (vf->flags & IXGBE_VF_CTS) + msg |= IXGBE_VT_MSGTYPE_CTS; + + ixgbe_write_mbx(&adapter->hw, &msg, 1, vf->pool); +} + +static inline void +ixgbe_send_vf_ack(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg) +{ + msg &= IXGBE_VT_MSG_MASK; + ixgbe_send_vf_msg(adapter, vf, msg | IXGBE_VT_MSGTYPE_ACK); +} + +static inline void +ixgbe_send_vf_nack(struct adapter *adapter, struct ixgbe_vf *vf, u32 msg) +{ + msg &= IXGBE_VT_MSG_MASK; + ixgbe_send_vf_msg(adapter, vf, msg | IXGBE_VT_MSGTYPE_NACK); +} + +static inline void +ixgbe_process_vf_ack(struct adapter *adapter, struct ixgbe_vf *vf) +{ + if (!(vf->flags & IXGBE_VF_CTS)) + ixgbe_send_vf_nack(adapter, vf, 0); +} + +static inline enum ixgbe_iov_mode +ixgbe_get_iov_mode(struct adapter *adapter) +{ + if (adapter->num_vfs == 0) + return (IXGBE_NO_VM); + if (adapter->num_queues <= 2) + return (IXGBE_64_VM); + else if (adapter->num_queues <= 4) + return (IXGBE_32_VM); + else + return (IXGBE_NO_VM); +} + +static inline u16 +ixgbe_max_vfs(enum ixgbe_iov_mode mode) +{ + /* + * We return odd numbers below because we + * reserve 1 VM's worth of queues for the PF. + */ + switch (mode) { + case IXGBE_64_VM: + return (63); + case IXGBE_32_VM: + return (31); + case IXGBE_NO_VM: + default: + return (0); + } +} + +static inline int +ixgbe_vf_queues(enum ixgbe_iov_mode mode) +{ + switch (mode) { + case IXGBE_64_VM: + return (2); + case IXGBE_32_VM: + return (4); + case IXGBE_NO_VM: + default: + return (0); + } +} + +static inline int +ixgbe_vf_que_index(enum ixgbe_iov_mode mode, u32 vfnum, int num) +{ + return ((vfnum * ixgbe_vf_queues(mode)) + num); +} + +static inline int +ixgbe_pf_que_index(enum ixgbe_iov_mode mode, int num) +{ + return (ixgbe_vf_que_index(mode, ixgbe_max_vfs(mode), num)); +} + +static inline void +ixgbe_update_max_frame(struct adapter * adapter, int max_frame) +{ + if (adapter->max_frame_size < max_frame) + adapter->max_frame_size = max_frame; +} + +static inline u32 +ixgbe_get_mrqc(enum ixgbe_iov_mode mode) +{ + u32 mrqc = 0; + switch (mode) { + case IXGBE_64_VM: + mrqc = IXGBE_MRQC_VMDQRSS64EN; + break; + case IXGBE_32_VM: + mrqc = IXGBE_MRQC_VMDQRSS32EN; + break; + case IXGBE_NO_VM: + mrqc = 0; + break; + default: + panic("Unexpected SR-IOV mode %d", mode); + } + return(mrqc); +} + + +static inline u32 +ixgbe_get_mtqc(enum ixgbe_iov_mode mode) +{ + uint32_t mtqc = 0; + switch (mode) { + case IXGBE_64_VM: + mtqc |= IXGBE_MTQC_64VF | IXGBE_MTQC_VT_ENA; + break; + case IXGBE_32_VM: + mtqc |= IXGBE_MTQC_32VF | IXGBE_MTQC_VT_ENA; + break; + case IXGBE_NO_VM: + mtqc = IXGBE_MTQC_64Q_1PB; + break; + default: + panic("Unexpected SR-IOV mode %d", mode); + } + return(mtqc); +} +#endif /* PCI_IOV */ + #endif /* _IXGBE_H_ */ diff --git a/sys/dev/ixgbe/ixgbe_mbx.h b/sys/dev/ixgbe/ixgbe_mbx.h index ea75cbeeb5a6..a4a78eb6ede2 100644 --- a/sys/dev/ixgbe/ixgbe_mbx.h +++ b/sys/dev/ixgbe/ixgbe_mbx.h @@ -80,6 +80,21 @@ /* bits 23:16 are used for extra info for certain messages */ #define IXGBE_VT_MSGINFO_MASK (0xFF << IXGBE_VT_MSGINFO_SHIFT) +/* definitions to support mailbox API version negotiation */ + +/* + * each element denotes a version of the API; existing numbers may not + * change; any additions must go at the end + */ +enum ixgbe_pfvf_api_rev { + ixgbe_mbox_api_10, /* API version 1.0, linux/freebsd VF driver */ + ixgbe_mbox_api_20, /* API version 2.0, solaris Phase1 VF driver */ + ixgbe_mbox_api_11, /* API version 1.1, linux/freebsd VF driver */ + /* This value should always be last */ + ixgbe_mbox_api_unknown, /* indicates that API version is not known */ +}; + +/* mailbox API, legacy requests */ #define IXGBE_VF_RESET 0x01 /* VF requests reset */ #define IXGBE_VF_SET_MAC_ADDR 0x02 /* VF requests PF to set MAC addr */ #define IXGBE_VF_SET_MULTICAST 0x03 /* VF requests PF to set MC addr */ @@ -106,6 +121,18 @@ #define IXGBE_PF_CONTROL_MSG 0x0100 /* PF control message */ +/* mailbox API, version 2.0 VF requests */ +#define IXGBE_VF_API_NEGOTIATE 0x08 /* negotiate API version */ +#define IXGBE_VF_GET_QUEUES 0x09 /* get queue configuration */ +#define IXGBE_VF_ENABLE_MACADDR 0x0A /* enable MAC address */ +#define IXGBE_VF_DISABLE_MACADDR 0x0B /* disable MAC address */ +#define IXGBE_VF_GET_MACADDRS 0x0C /* get all configured MAC addrs */ +#define IXGBE_VF_SET_MCAST_PROMISC 0x0D /* enable multicast promiscuous */ +#define IXGBE_VF_GET_MTU 0x0E /* get bounds on MTU */ +#define IXGBE_VF_SET_MTU 0x0F /* set a specific MTU */ + +/* mailbox API, version 2.0 PF requests */ +#define IXGBE_PF_TRANSPARENT_VLAN 0x0101 /* enable transparent vlan */ #define IXGBE_VF_MBX_INIT_TIMEOUT 2000 /* number of retries on mailbox */ #define IXGBE_VF_MBX_INIT_DELAY 500 /* microseconds between retries */ diff --git a/sys/dev/ixgbe/ixgbe_vf.c b/sys/dev/ixgbe/ixgbe_vf.c index c010cf4357dd..2ce4d32a303b 100644 --- a/sys/dev/ixgbe/ixgbe_vf.c +++ b/sys/dev/ixgbe/ixgbe_vf.c @@ -185,6 +185,8 @@ s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) /* Call adapter stop to disable tx/rx and clear interrupts */ hw->mac.ops.stop_adapter(hw); + /* reset the api version */ + hw->api_version = ixgbe_mbox_api_10; DEBUGOUT("Issuing a function level reset to MAC\n"); @@ -666,6 +668,57 @@ int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, unsigned int *default_tc) { - UNREFERENCED_3PARAMETER(hw, num_tcs, default_tc); - return IXGBE_SUCCESS; + int err; + u32 msg[5]; + + /* do nothing if API doesn't support ixgbevf_get_queues */ + switch (hw->api_version) { + case ixgbe_mbox_api_11: + break; + default: + return 0; + } + + /* Fetch queue configuration from the PF */ + msg[0] = IXGBE_VF_GET_QUEUES; + msg[1] = msg[2] = msg[3] = msg[4] = 0; + err = hw->mbx.ops.write_posted(hw, msg, 5, 0); + + if (!err) + err = hw->mbx.ops.read_posted(hw, msg, 5, 0); + + if (!err) { + msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; + + /* + * if we we didn't get an ACK there must have been + * some sort of mailbox error so we should treat it + * as such + */ + if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) + return IXGBE_ERR_MBX; + + /* record and validate values from message */ + hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; + if (hw->mac.max_tx_queues == 0 || + hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) + hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; + + hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; + if (hw->mac.max_rx_queues == 0 || + hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) + hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; + + *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; + /* in case of unknown state assume we cannot tag frames */ + if (*num_tcs > hw->mac.max_rx_queues) + *num_tcs = 1; + + *default_tc = msg[IXGBE_VF_DEF_QUEUE]; + /* default to queue 0 on out-of-bounds queue number */ + if (*default_tc >= hw->mac.max_tx_queues) + *default_tc = 0; + } + + return err; } diff --git a/sys/dev/ixl/i40e_adminq.c b/sys/dev/ixl/i40e_adminq.c index d769c45c0dbb..5eacdc4e31a5 100644 --- a/sys/dev/ixl/i40e_adminq.c +++ b/sys/dev/ixl/i40e_adminq.c @@ -315,8 +315,12 @@ static enum i40e_status_code i40e_config_asq_regs(struct i40e_hw *hw) wr32(hw, hw->aq.asq.tail, 0); /* set starting point */ - wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | - I40E_PF_ATQLEN_ATQENABLE_MASK)); + if (!i40e_is_vf(hw)) + wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | + I40E_PF_ATQLEN_ATQENABLE_MASK)); + if (i40e_is_vf(hw)) + wr32(hw, hw->aq.asq.len, (hw->aq.num_asq_entries | + I40E_VF_ATQLEN1_ATQENABLE_MASK)); wr32(hw, hw->aq.asq.bal, I40E_LO_DWORD(hw->aq.asq.desc_buf.pa)); wr32(hw, hw->aq.asq.bah, I40E_HI_DWORD(hw->aq.asq.desc_buf.pa)); @@ -344,8 +348,12 @@ static enum i40e_status_code i40e_config_arq_regs(struct i40e_hw *hw) wr32(hw, hw->aq.arq.tail, 0); /* set starting point */ - wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | - I40E_PF_ARQLEN_ARQENABLE_MASK)); + if (!i40e_is_vf(hw)) + wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | + I40E_PF_ARQLEN_ARQENABLE_MASK)); + if (i40e_is_vf(hw)) + wr32(hw, hw->aq.arq.len, (hw->aq.num_arq_entries | + I40E_VF_ARQLEN1_ARQENABLE_MASK)); wr32(hw, hw->aq.arq.bal, I40E_LO_DWORD(hw->aq.arq.desc_buf.pa)); wr32(hw, hw->aq.arq.bah, I40E_HI_DWORD(hw->aq.arq.desc_buf.pa)); @@ -559,6 +567,7 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) { enum i40e_status_code ret_code; u16 eetrack_lo, eetrack_hi; + u16 cfg_ptr, oem_hi, oem_lo; int retry = 0; /* verify input for valid configuration */ if ((hw->aq.num_arq_entries == 0) || @@ -619,6 +628,12 @@ enum i40e_status_code i40e_init_adminq(struct i40e_hw *hw) i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_LO, &eetrack_lo); i40e_read_nvm_word(hw, I40E_SR_NVM_EETRACK_HI, &eetrack_hi); hw->nvm.eetrack = (eetrack_hi << 16) | eetrack_lo; + i40e_read_nvm_word(hw, I40E_SR_BOOT_CONFIG_PTR, &cfg_ptr); + i40e_read_nvm_word(hw, (cfg_ptr + I40E_NVM_OEM_VER_OFF), + &oem_hi); + i40e_read_nvm_word(hw, (cfg_ptr + (I40E_NVM_OEM_VER_OFF + 1)), + &oem_lo); + hw->nvm.oem_ver = ((u32)oem_hi << 16) | oem_lo; if (hw->aq.api_maj_ver > I40E_FW_API_VERSION_MAJOR) { ret_code = I40E_ERR_FIRMWARE_API_VERSION; @@ -669,6 +684,9 @@ enum i40e_status_code i40e_shutdown_adminq(struct i40e_hw *hw) i40e_destroy_spinlock(&hw->aq.asq_spinlock); i40e_destroy_spinlock(&hw->aq.arq_spinlock); + if (hw->nvm_buff.va) + i40e_free_virt_mem(hw, &hw->nvm_buff); + return ret_code; } @@ -688,16 +706,16 @@ u16 i40e_clean_asq(struct i40e_hw *hw) desc = I40E_ADMINQ_DESC(*asq, ntc); details = I40E_ADMINQ_DETAILS(*asq, ntc); + while (rd32(hw, hw->aq.asq.head) != ntc) { i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, - "%s: ntc %d head %d.\n", __FUNCTION__, ntc, - rd32(hw, hw->aq.asq.head)); + "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); if (details->callback) { I40E_ADMINQ_CALLBACK cb_func = (I40E_ADMINQ_CALLBACK)details->callback; - i40e_memcpy(&desc_cb, desc, - sizeof(struct i40e_aq_desc), I40E_DMA_TO_DMA); + i40e_memcpy(&desc_cb, desc, sizeof(struct i40e_aq_desc), + I40E_DMA_TO_DMA); cb_func(hw, &desc_cb); } i40e_memset(desc, 0, sizeof(*desc), I40E_DMA_MEM); @@ -755,6 +773,8 @@ enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw, u16 retval = 0; u32 val = 0; + hw->aq.asq_last_status = I40E_AQ_RC_OK; + val = rd32(hw, hw->aq.asq.head); if (val >= hw->aq.num_asq_entries) { i40e_debug(hw, I40E_DEBUG_AQ_MESSAGE, @@ -912,6 +932,11 @@ enum i40e_status_code i40e_asq_send_command(struct i40e_hw *hw, "AQTX: desc and buffer writeback:\n"); i40e_debug_aq(hw, I40E_DEBUG_AQ_COMMAND, (void *)desc, buff, buff_size); + /* save writeback aq if requested */ + if (details->wb_desc) + i40e_memcpy(details->wb_desc, desc_on_ring, + sizeof(struct i40e_aq_desc), I40E_DMA_TO_NONDMA); + /* update the error if time out occurred */ if ((!cmd_completed) && (!details->async && !details->postpone)) { @@ -971,7 +996,10 @@ enum i40e_status_code i40e_clean_arq_element(struct i40e_hw *hw, i40e_acquire_spinlock(&hw->aq.arq_spinlock); /* set next_to_use to head */ - ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK); + if (!i40e_is_vf(hw)) + ntu = (rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK); + if (i40e_is_vf(hw)) + ntu = (rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK); if (ntu == ntc) { /* nothing to do - shouldn't need to update ring's values */ ret_code = I40E_ERR_ADMIN_QUEUE_NO_WORK; @@ -1040,6 +1068,19 @@ clean_arq_element_out: i40e_release_nvm(hw); hw->aq.nvm_release_on_done = FALSE; } + + switch (hw->nvmupd_state) { + case I40E_NVMUPD_STATE_INIT_WAIT: + hw->nvmupd_state = I40E_NVMUPD_STATE_INIT; + break; + + case I40E_NVMUPD_STATE_WRITE_WAIT: + hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING; + break; + + default: + break; + } } return ret_code; @@ -1051,9 +1092,6 @@ void i40e_resume_aq(struct i40e_hw *hw) hw->aq.asq.next_to_use = 0; hw->aq.asq.next_to_clean = 0; -#if (I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK) -#error I40E_VF_ATQLEN_ATQENABLE_MASK != I40E_PF_ATQLEN_ATQENABLE_MASK -#endif i40e_config_asq_regs(hw); hw->aq.arq.next_to_use = 0; diff --git a/sys/dev/ixl/i40e_adminq.h b/sys/dev/ixl/i40e_adminq.h index 9db4c9d21965..76dab8eb9978 100644 --- a/sys/dev/ixl/i40e_adminq.h +++ b/sys/dev/ixl/i40e_adminq.h @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -77,6 +77,7 @@ struct i40e_asq_cmd_details { u16 flags_dis; bool async; bool postpone; + struct i40e_aq_desc *wb_desc; }; #define I40E_ADMINQ_DETAILS(R, i) \ diff --git a/sys/dev/ixl/i40e_adminq_cmd.h b/sys/dev/ixl/i40e_adminq_cmd.h index 0d52883e70d7..f1f267e9f18b 100644 --- a/sys/dev/ixl/i40e_adminq_cmd.h +++ b/sys/dev/ixl/i40e_adminq_cmd.h @@ -42,7 +42,11 @@ */ #define I40E_FW_API_VERSION_MAJOR 0x0001 -#define I40E_FW_API_VERSION_MINOR 0x0002 +#ifdef X722_SUPPORT +#define I40E_FW_API_VERSION_MINOR 0x0003 +#else +#define I40E_FW_API_VERSION_MINOR 0x0004 +#endif struct i40e_aq_desc { __le16 flags; @@ -140,12 +144,7 @@ enum i40e_admin_queue_opc { i40e_aqc_opc_list_func_capabilities = 0x000A, i40e_aqc_opc_list_dev_capabilities = 0x000B, - i40e_aqc_opc_set_cppm_configuration = 0x0103, - i40e_aqc_opc_set_arp_proxy_entry = 0x0104, - i40e_aqc_opc_set_ns_proxy_entry = 0x0105, - /* LAA */ - i40e_aqc_opc_mng_laa = 0x0106, /* AQ obsolete */ i40e_aqc_opc_mac_address_read = 0x0107, i40e_aqc_opc_mac_address_write = 0x0108, @@ -240,6 +239,7 @@ enum i40e_admin_queue_opc { i40e_aqc_opc_nvm_update = 0x0703, i40e_aqc_opc_nvm_config_read = 0x0704, i40e_aqc_opc_nvm_config_write = 0x0705, + i40e_aqc_opc_oem_post_update = 0x0720, /* virtualization commands */ i40e_aqc_opc_send_msg_to_pf = 0x0801, @@ -270,7 +270,12 @@ enum i40e_admin_queue_opc { /* Tunnel commands */ i40e_aqc_opc_add_udp_tunnel = 0x0B00, i40e_aqc_opc_del_udp_tunnel = 0x0B01, - i40e_aqc_opc_tunnel_key_structure = 0x0B10, +#ifdef X722_SUPPORT + i40e_aqc_opc_set_rss_key = 0x0B02, + i40e_aqc_opc_set_rss_lut = 0x0B03, + i40e_aqc_opc_get_rss_key = 0x0B04, + i40e_aqc_opc_get_rss_lut = 0x0B05, +#endif /* Async Events */ i40e_aqc_opc_event_lan_overflow = 0x1001, @@ -282,8 +287,6 @@ enum i40e_admin_queue_opc { i40e_aqc_opc_oem_ocbb_initialize = 0xFE03, /* debug commands */ - i40e_aqc_opc_debug_get_deviceid = 0xFF00, - i40e_aqc_opc_debug_set_mode = 0xFF01, i40e_aqc_opc_debug_read_reg = 0xFF03, i40e_aqc_opc_debug_write_reg = 0xFF04, i40e_aqc_opc_debug_modify_reg = 0xFF07, @@ -517,7 +520,8 @@ struct i40e_aqc_mac_address_read { #define I40E_AQC_SAN_ADDR_VALID 0x20 #define I40E_AQC_PORT_ADDR_VALID 0x40 #define I40E_AQC_WOL_ADDR_VALID 0x80 -#define I40E_AQC_ADDR_VALID_MASK 0xf0 +#define I40E_AQC_MC_MAG_EN_VALID 0x100 +#define I40E_AQC_ADDR_VALID_MASK 0x1F0 u8 reserved[6]; __le32 addr_high; __le32 addr_low; @@ -540,7 +544,9 @@ struct i40e_aqc_mac_address_write { #define I40E_AQC_WRITE_TYPE_LAA_ONLY 0x0000 #define I40E_AQC_WRITE_TYPE_LAA_WOL 0x4000 #define I40E_AQC_WRITE_TYPE_PORT 0x8000 -#define I40E_AQC_WRITE_TYPE_MASK 0xc000 +#define I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG 0xC000 +#define I40E_AQC_WRITE_TYPE_MASK 0xC000 + __le16 mac_sah; __le32 mac_sal; u8 reserved[8]; @@ -834,8 +840,16 @@ struct i40e_aqc_vsi_properties_data { I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT) /* queueing option section */ u8 queueing_opt_flags; +#ifdef X722_SUPPORT +#define I40E_AQ_VSI_QUE_OPT_MULTICAST_UDP_ENA 0x04 +#define I40E_AQ_VSI_QUE_OPT_UNICAST_UDP_ENA 0x08 +#endif #define I40E_AQ_VSI_QUE_OPT_TCP_ENA 0x10 #define I40E_AQ_VSI_QUE_OPT_FCOE_ENA 0x20 +#ifdef X722_SUPPORT +#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_PF 0x00 +#define I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI 0x40 +#endif u8 queueing_opt_reserved[3]; /* scheduler section */ u8 up_enable_bits; @@ -1076,6 +1090,7 @@ struct i40e_aqc_set_vsi_promiscuous_modes { __le16 seid; #define I40E_AQC_VSI_PROM_CMD_SEID_MASK 0x3FF __le16 vlan_tag; +#define I40E_AQC_SET_VSI_VLAN_MASK 0x0FFF #define I40E_AQC_SET_VSI_VLAN_VALID 0x8000 u8 reserved[8]; }; @@ -1725,11 +1740,13 @@ struct i40e_aqc_get_link_status { u8 phy_type; /* i40e_aq_phy_type */ u8 link_speed; /* i40e_aq_link_speed */ u8 link_info; -#define I40E_AQ_LINK_UP 0x01 +#define I40E_AQ_LINK_UP 0x01 /* obsolete */ +#define I40E_AQ_LINK_UP_FUNCTION 0x01 #define I40E_AQ_LINK_FAULT 0x02 #define I40E_AQ_LINK_FAULT_TX 0x04 #define I40E_AQ_LINK_FAULT_RX 0x08 #define I40E_AQ_LINK_FAULT_REMOTE 0x10 +#define I40E_AQ_LINK_UP_PORT 0x20 #define I40E_AQ_MEDIA_AVAILABLE 0x40 #define I40E_AQ_SIGNAL_DETECT 0x80 u8 an_info; @@ -1891,6 +1908,26 @@ struct i40e_aqc_nvm_config_data_immediate_field { I40E_CHECK_STRUCT_LEN(0xc, i40e_aqc_nvm_config_data_immediate_field); +/* OEM Post Update (indirect 0x0720) + * no command data struct used + */ + struct i40e_aqc_nvm_oem_post_update { +#define I40E_AQ_NVM_OEM_POST_UPDATE_EXTERNAL_DATA 0x01 + u8 sel_data; + u8 reserved[7]; +}; + +I40E_CHECK_STRUCT_LEN(0x8, i40e_aqc_nvm_oem_post_update); + +struct i40e_aqc_nvm_oem_post_update_buffer { + u8 str_len; + u8 dev_addr; + __le16 eeprom_addr; + u8 data[36]; +}; + +I40E_CHECK_STRUCT_LEN(0x28, i40e_aqc_nvm_oem_post_update_buffer); + /* Send to PF command (indirect 0x0801) id is only used by PF * Send to VF command (indirect 0x0802) id is only used by PF * Send to Peer PF command (indirect 0x0803) @@ -2064,12 +2101,28 @@ I40E_CHECK_CMD_LENGTH(i40e_aqc_lldp_start); #define I40E_AQC_CEE_APP_ISCSI_MASK (0x7 << I40E_AQC_CEE_APP_ISCSI_SHIFT) #define I40E_AQC_CEE_APP_FIP_SHIFT 0x8 #define I40E_AQC_CEE_APP_FIP_MASK (0x7 << I40E_AQC_CEE_APP_FIP_SHIFT) + #define I40E_AQC_CEE_PG_STATUS_SHIFT 0x0 #define I40E_AQC_CEE_PG_STATUS_MASK (0x7 << I40E_AQC_CEE_PG_STATUS_SHIFT) #define I40E_AQC_CEE_PFC_STATUS_SHIFT 0x3 #define I40E_AQC_CEE_PFC_STATUS_MASK (0x7 << I40E_AQC_CEE_PFC_STATUS_SHIFT) #define I40E_AQC_CEE_APP_STATUS_SHIFT 0x8 #define I40E_AQC_CEE_APP_STATUS_MASK (0x7 << I40E_AQC_CEE_APP_STATUS_SHIFT) +#define I40E_AQC_CEE_FCOE_STATUS_SHIFT 0x8 +#define I40E_AQC_CEE_FCOE_STATUS_MASK (0x7 << I40E_AQC_CEE_FCOE_STATUS_SHIFT) +#define I40E_AQC_CEE_ISCSI_STATUS_SHIFT 0xB +#define I40E_AQC_CEE_ISCSI_STATUS_MASK (0x7 << I40E_AQC_CEE_ISCSI_STATUS_SHIFT) +#define I40E_AQC_CEE_FIP_STATUS_SHIFT 0x10 +#define I40E_AQC_CEE_FIP_STATUS_MASK (0x7 << I40E_AQC_CEE_FIP_STATUS_SHIFT) + +/* struct i40e_aqc_get_cee_dcb_cfg_v1_resp was originally defined with + * word boundary layout issues, which the Linux compilers silently deal + * with by adding padding, making the actual struct larger than designed. + * However, the FW compiler for the NIC is less lenient and complains + * about the struct. Hence, the struct defined here has an extra byte in + * fields reserved3 and reserved4 to directly acknowledge that padding, + * and the new length is used in the length check macro. + */ struct i40e_aqc_get_cee_dcb_cfg_v1_resp { u8 reserved1; u8 oper_num_tc; @@ -2077,9 +2130,9 @@ struct i40e_aqc_get_cee_dcb_cfg_v1_resp { u8 reserved2; u8 oper_tc_bw[8]; u8 oper_pfc_en; - u8 reserved3; + u8 reserved3[2]; __le16 oper_app_prio; - u8 reserved4; + u8 reserved4[2]; __le16 tlv_status; }; @@ -2168,6 +2221,48 @@ struct i40e_aqc_del_udp_tunnel_completion { }; I40E_CHECK_CMD_LENGTH(i40e_aqc_del_udp_tunnel_completion); +#ifdef X722_SUPPORT + +struct i40e_aqc_get_set_rss_key { +#define I40E_AQC_SET_RSS_KEY_VSI_VALID (0x1 << 15) +#define I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT 0 +#define I40E_AQC_SET_RSS_KEY_VSI_ID_MASK (0x3FF << \ + I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) + __le16 vsi_id; + u8 reserved[6]; + __le32 addr_high; + __le32 addr_low; +}; + +I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_key); + +struct i40e_aqc_get_set_rss_key_data { + u8 standard_rss_key[0x28]; + u8 extended_hash_key[0xc]; +}; + +I40E_CHECK_STRUCT_LEN(0x34, i40e_aqc_get_set_rss_key_data); + +struct i40e_aqc_get_set_rss_lut { +#define I40E_AQC_SET_RSS_LUT_VSI_VALID (0x1 << 15) +#define I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT 0 +#define I40E_AQC_SET_RSS_LUT_VSI_ID_MASK (0x3FF << \ + I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) + __le16 vsi_id; +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT 0 +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK (0x1 << \ + I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) + +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI 0 +#define I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF 1 + __le16 flags; + u8 reserved[4]; + __le32 addr_high; + __le32 addr_low; +}; + +I40E_CHECK_CMD_LENGTH(i40e_aqc_get_set_rss_lut); +#endif /* tunnel key structure 0x0B10 */ diff --git a/sys/dev/ixl/i40e_common.c b/sys/dev/ixl/i40e_common.c index 777ecef9343a..2a5f49902077 100644 --- a/sys/dev/ixl/i40e_common.c +++ b/sys/dev/ixl/i40e_common.c @@ -62,9 +62,24 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) case I40E_DEV_ID_QSFP_B: case I40E_DEV_ID_QSFP_C: case I40E_DEV_ID_10G_BASE_T: + case I40E_DEV_ID_10G_BASE_T4: case I40E_DEV_ID_20G_KR2: + case I40E_DEV_ID_20G_KR2_A: hw->mac.type = I40E_MAC_XL710; break; +#ifdef X722_SUPPORT + case I40E_DEV_ID_SFP_X722: + case I40E_DEV_ID_1G_BASE_T_X722: + case I40E_DEV_ID_10G_BASE_T_X722: + hw->mac.type = I40E_MAC_X722; + break; +#endif +#ifdef X722_SUPPORT + case I40E_DEV_ID_X722_VF: + case I40E_DEV_ID_X722_VF_HV: + hw->mac.type = I40E_MAC_X722_VF; + break; +#endif case I40E_DEV_ID_VF: case I40E_DEV_ID_VF_HV: hw->mac.type = I40E_MAC_VF; @@ -83,6 +98,212 @@ enum i40e_status_code i40e_set_mac_type(struct i40e_hw *hw) } /** + * i40e_aq_str - convert AQ err code to a string + * @hw: pointer to the HW structure + * @aq_err: the AQ error code to convert + **/ +char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err) +{ + switch (aq_err) { + case I40E_AQ_RC_OK: + return "OK"; + case I40E_AQ_RC_EPERM: + return "I40E_AQ_RC_EPERM"; + case I40E_AQ_RC_ENOENT: + return "I40E_AQ_RC_ENOENT"; + case I40E_AQ_RC_ESRCH: + return "I40E_AQ_RC_ESRCH"; + case I40E_AQ_RC_EINTR: + return "I40E_AQ_RC_EINTR"; + case I40E_AQ_RC_EIO: + return "I40E_AQ_RC_EIO"; + case I40E_AQ_RC_ENXIO: + return "I40E_AQ_RC_ENXIO"; + case I40E_AQ_RC_E2BIG: + return "I40E_AQ_RC_E2BIG"; + case I40E_AQ_RC_EAGAIN: + return "I40E_AQ_RC_EAGAIN"; + case I40E_AQ_RC_ENOMEM: + return "I40E_AQ_RC_ENOMEM"; + case I40E_AQ_RC_EACCES: + return "I40E_AQ_RC_EACCES"; + case I40E_AQ_RC_EFAULT: + return "I40E_AQ_RC_EFAULT"; + case I40E_AQ_RC_EBUSY: + return "I40E_AQ_RC_EBUSY"; + case I40E_AQ_RC_EEXIST: + return "I40E_AQ_RC_EEXIST"; + case I40E_AQ_RC_EINVAL: + return "I40E_AQ_RC_EINVAL"; + case I40E_AQ_RC_ENOTTY: + return "I40E_AQ_RC_ENOTTY"; + case I40E_AQ_RC_ENOSPC: + return "I40E_AQ_RC_ENOSPC"; + case I40E_AQ_RC_ENOSYS: + return "I40E_AQ_RC_ENOSYS"; + case I40E_AQ_RC_ERANGE: + return "I40E_AQ_RC_ERANGE"; + case I40E_AQ_RC_EFLUSHED: + return "I40E_AQ_RC_EFLUSHED"; + case I40E_AQ_RC_BAD_ADDR: + return "I40E_AQ_RC_BAD_ADDR"; + case I40E_AQ_RC_EMODE: + return "I40E_AQ_RC_EMODE"; + case I40E_AQ_RC_EFBIG: + return "I40E_AQ_RC_EFBIG"; + } + + snprintf(hw->err_str, sizeof(hw->err_str), "%d", aq_err); + return hw->err_str; +} + +/** + * i40e_stat_str - convert status err code to a string + * @hw: pointer to the HW structure + * @stat_err: the status error code to convert + **/ +char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err) +{ + switch (stat_err) { + case I40E_SUCCESS: + return "OK"; + case I40E_ERR_NVM: + return "I40E_ERR_NVM"; + case I40E_ERR_NVM_CHECKSUM: + return "I40E_ERR_NVM_CHECKSUM"; + case I40E_ERR_PHY: + return "I40E_ERR_PHY"; + case I40E_ERR_CONFIG: + return "I40E_ERR_CONFIG"; + case I40E_ERR_PARAM: + return "I40E_ERR_PARAM"; + case I40E_ERR_MAC_TYPE: + return "I40E_ERR_MAC_TYPE"; + case I40E_ERR_UNKNOWN_PHY: + return "I40E_ERR_UNKNOWN_PHY"; + case I40E_ERR_LINK_SETUP: + return "I40E_ERR_LINK_SETUP"; + case I40E_ERR_ADAPTER_STOPPED: + return "I40E_ERR_ADAPTER_STOPPED"; + case I40E_ERR_INVALID_MAC_ADDR: + return "I40E_ERR_INVALID_MAC_ADDR"; + case I40E_ERR_DEVICE_NOT_SUPPORTED: + return "I40E_ERR_DEVICE_NOT_SUPPORTED"; + case I40E_ERR_MASTER_REQUESTS_PENDING: + return "I40E_ERR_MASTER_REQUESTS_PENDING"; + case I40E_ERR_INVALID_LINK_SETTINGS: + return "I40E_ERR_INVALID_LINK_SETTINGS"; + case I40E_ERR_AUTONEG_NOT_COMPLETE: + return "I40E_ERR_AUTONEG_NOT_COMPLETE"; + case I40E_ERR_RESET_FAILED: + return "I40E_ERR_RESET_FAILED"; + case I40E_ERR_SWFW_SYNC: + return "I40E_ERR_SWFW_SYNC"; + case I40E_ERR_NO_AVAILABLE_VSI: + return "I40E_ERR_NO_AVAILABLE_VSI"; + case I40E_ERR_NO_MEMORY: + return "I40E_ERR_NO_MEMORY"; + case I40E_ERR_BAD_PTR: + return "I40E_ERR_BAD_PTR"; + case I40E_ERR_RING_FULL: + return "I40E_ERR_RING_FULL"; + case I40E_ERR_INVALID_PD_ID: + return "I40E_ERR_INVALID_PD_ID"; + case I40E_ERR_INVALID_QP_ID: + return "I40E_ERR_INVALID_QP_ID"; + case I40E_ERR_INVALID_CQ_ID: + return "I40E_ERR_INVALID_CQ_ID"; + case I40E_ERR_INVALID_CEQ_ID: + return "I40E_ERR_INVALID_CEQ_ID"; + case I40E_ERR_INVALID_AEQ_ID: + return "I40E_ERR_INVALID_AEQ_ID"; + case I40E_ERR_INVALID_SIZE: + return "I40E_ERR_INVALID_SIZE"; + case I40E_ERR_INVALID_ARP_INDEX: + return "I40E_ERR_INVALID_ARP_INDEX"; + case I40E_ERR_INVALID_FPM_FUNC_ID: + return "I40E_ERR_INVALID_FPM_FUNC_ID"; + case I40E_ERR_QP_INVALID_MSG_SIZE: + return "I40E_ERR_QP_INVALID_MSG_SIZE"; + case I40E_ERR_QP_TOOMANY_WRS_POSTED: + return "I40E_ERR_QP_TOOMANY_WRS_POSTED"; + case I40E_ERR_INVALID_FRAG_COUNT: + return "I40E_ERR_INVALID_FRAG_COUNT"; + case I40E_ERR_QUEUE_EMPTY: + return "I40E_ERR_QUEUE_EMPTY"; + case I40E_ERR_INVALID_ALIGNMENT: + return "I40E_ERR_INVALID_ALIGNMENT"; + case I40E_ERR_FLUSHED_QUEUE: + return "I40E_ERR_FLUSHED_QUEUE"; + case I40E_ERR_INVALID_PUSH_PAGE_INDEX: + return "I40E_ERR_INVALID_PUSH_PAGE_INDEX"; + case I40E_ERR_INVALID_IMM_DATA_SIZE: + return "I40E_ERR_INVALID_IMM_DATA_SIZE"; + case I40E_ERR_TIMEOUT: + return "I40E_ERR_TIMEOUT"; + case I40E_ERR_OPCODE_MISMATCH: + return "I40E_ERR_OPCODE_MISMATCH"; + case I40E_ERR_CQP_COMPL_ERROR: + return "I40E_ERR_CQP_COMPL_ERROR"; + case I40E_ERR_INVALID_VF_ID: + return "I40E_ERR_INVALID_VF_ID"; + case I40E_ERR_INVALID_HMCFN_ID: + return "I40E_ERR_INVALID_HMCFN_ID"; + case I40E_ERR_BACKING_PAGE_ERROR: + return "I40E_ERR_BACKING_PAGE_ERROR"; + case I40E_ERR_NO_PBLCHUNKS_AVAILABLE: + return "I40E_ERR_NO_PBLCHUNKS_AVAILABLE"; + case I40E_ERR_INVALID_PBLE_INDEX: + return "I40E_ERR_INVALID_PBLE_INDEX"; + case I40E_ERR_INVALID_SD_INDEX: + return "I40E_ERR_INVALID_SD_INDEX"; + case I40E_ERR_INVALID_PAGE_DESC_INDEX: + return "I40E_ERR_INVALID_PAGE_DESC_INDEX"; + case I40E_ERR_INVALID_SD_TYPE: + return "I40E_ERR_INVALID_SD_TYPE"; + case I40E_ERR_MEMCPY_FAILED: + return "I40E_ERR_MEMCPY_FAILED"; + case I40E_ERR_INVALID_HMC_OBJ_INDEX: + return "I40E_ERR_INVALID_HMC_OBJ_INDEX"; + case I40E_ERR_INVALID_HMC_OBJ_COUNT: + return "I40E_ERR_INVALID_HMC_OBJ_COUNT"; + case I40E_ERR_INVALID_SRQ_ARM_LIMIT: + return "I40E_ERR_INVALID_SRQ_ARM_LIMIT"; + case I40E_ERR_SRQ_ENABLED: + return "I40E_ERR_SRQ_ENABLED"; + case I40E_ERR_ADMIN_QUEUE_ERROR: + return "I40E_ERR_ADMIN_QUEUE_ERROR"; + case I40E_ERR_ADMIN_QUEUE_TIMEOUT: + return "I40E_ERR_ADMIN_QUEUE_TIMEOUT"; + case I40E_ERR_BUF_TOO_SHORT: + return "I40E_ERR_BUF_TOO_SHORT"; + case I40E_ERR_ADMIN_QUEUE_FULL: + return "I40E_ERR_ADMIN_QUEUE_FULL"; + case I40E_ERR_ADMIN_QUEUE_NO_WORK: + return "I40E_ERR_ADMIN_QUEUE_NO_WORK"; + case I40E_ERR_BAD_IWARP_CQE: + return "I40E_ERR_BAD_IWARP_CQE"; + case I40E_ERR_NVM_BLANK_MODE: + return "I40E_ERR_NVM_BLANK_MODE"; + case I40E_ERR_NOT_IMPLEMENTED: + return "I40E_ERR_NOT_IMPLEMENTED"; + case I40E_ERR_PE_DOORBELL_NOT_ENABLED: + return "I40E_ERR_PE_DOORBELL_NOT_ENABLED"; + case I40E_ERR_DIAG_TEST_FAILED: + return "I40E_ERR_DIAG_TEST_FAILED"; + case I40E_ERR_NOT_READY: + return "I40E_ERR_NOT_READY"; + case I40E_NOT_SUPPORTED: + return "I40E_NOT_SUPPORTED"; + case I40E_ERR_FIRMWARE_API_VERSION: + return "I40E_ERR_FIRMWARE_API_VERSION"; + } + + snprintf(hw->err_str, sizeof(hw->err_str), "%d", stat_err); + return hw->err_str; +} + +/** * i40e_debug_aq * @hw: debug mask related to admin queue * @mask: debug mask @@ -154,9 +375,13 @@ void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc, bool i40e_check_asq_alive(struct i40e_hw *hw) { if (hw->aq.asq.len) - return !!(rd32(hw, hw->aq.asq.len) & I40E_PF_ATQLEN_ATQENABLE_MASK); - else - return FALSE; + if (!i40e_is_vf(hw)) + return !!(rd32(hw, hw->aq.asq.len) & + I40E_PF_ATQLEN_ATQENABLE_MASK); + if (i40e_is_vf(hw)) + return !!(rd32(hw, hw->aq.asq.len) & + I40E_VF_ATQLEN1_ATQENABLE_MASK); + return FALSE; } /** @@ -184,6 +409,171 @@ enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw, return status; } +#ifdef X722_SUPPORT + +/** + * i40e_aq_get_set_rss_lut + * @hw: pointer to the hardware structure + * @vsi_id: vsi fw index + * @pf_lut: for PF table set TRUE, for VSI table set FALSE + * @lut: pointer to the lut buffer provided by the caller + * @lut_size: size of the lut buffer + * @set: set TRUE to set the table, FALSE to get the table + * + * Internal function to get or set RSS look up table + **/ +static enum i40e_status_code i40e_aq_get_set_rss_lut(struct i40e_hw *hw, + u16 vsi_id, bool pf_lut, + u8 *lut, u16 lut_size, + bool set) +{ + enum i40e_status_code status; + struct i40e_aq_desc desc; + struct i40e_aqc_get_set_rss_lut *cmd_resp = + (struct i40e_aqc_get_set_rss_lut *)&desc.params.raw; + + if (set) + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_set_rss_lut); + else + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_get_rss_lut); + + /* Indirect command */ + desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF); + desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD); + + cmd_resp->vsi_id = + CPU_TO_LE16((u16)((vsi_id << + I40E_AQC_SET_RSS_LUT_VSI_ID_SHIFT) & + I40E_AQC_SET_RSS_LUT_VSI_ID_MASK)); + cmd_resp->vsi_id |= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_LUT_VSI_VALID); + + if (pf_lut) + cmd_resp->flags |= CPU_TO_LE16((u16) + ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_PF << + I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) & + I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK)); + else + cmd_resp->flags |= CPU_TO_LE16((u16) + ((I40E_AQC_SET_RSS_LUT_TABLE_TYPE_VSI << + I40E_AQC_SET_RSS_LUT_TABLE_TYPE_SHIFT) & + I40E_AQC_SET_RSS_LUT_TABLE_TYPE_MASK)); + + cmd_resp->addr_high = CPU_TO_LE32(I40E_HI_WORD((u64)lut)); + cmd_resp->addr_low = CPU_TO_LE32(I40E_LO_DWORD((u64)lut)); + + status = i40e_asq_send_command(hw, &desc, lut, lut_size, NULL); + + return status; +} + +/** + * i40e_aq_get_rss_lut + * @hw: pointer to the hardware structure + * @vsi_id: vsi fw index + * @pf_lut: for PF table set TRUE, for VSI table set FALSE + * @lut: pointer to the lut buffer provided by the caller + * @lut_size: size of the lut buffer + * + * get the RSS lookup table, PF or VSI type + **/ +enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 vsi_id, + bool pf_lut, u8 *lut, u16 lut_size) +{ + return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, + FALSE); +} + +/** + * i40e_aq_set_rss_lut + * @hw: pointer to the hardware structure + * @vsi_id: vsi fw index + * @pf_lut: for PF table set TRUE, for VSI table set FALSE + * @lut: pointer to the lut buffer provided by the caller + * @lut_size: size of the lut buffer + * + * set the RSS lookup table, PF or VSI type + **/ +enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 vsi_id, + bool pf_lut, u8 *lut, u16 lut_size) +{ + return i40e_aq_get_set_rss_lut(hw, vsi_id, pf_lut, lut, lut_size, TRUE); +} + +/** + * i40e_aq_get_set_rss_key + * @hw: pointer to the hw struct + * @vsi_id: vsi fw index + * @key: pointer to key info struct + * @set: set TRUE to set the key, FALSE to get the key + * + * get the RSS key per VSI + **/ +static enum i40e_status_code i40e_aq_get_set_rss_key(struct i40e_hw *hw, + u16 vsi_id, + struct i40e_aqc_get_set_rss_key_data *key, + bool set) +{ + enum i40e_status_code status; + struct i40e_aq_desc desc; + struct i40e_aqc_get_set_rss_key *cmd_resp = + (struct i40e_aqc_get_set_rss_key *)&desc.params.raw; + u16 key_size = sizeof(struct i40e_aqc_get_set_rss_key_data); + + if (set) + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_set_rss_key); + else + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_get_rss_key); + + /* Indirect command */ + desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF); + desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_RD); + + cmd_resp->vsi_id = + CPU_TO_LE16((u16)((vsi_id << + I40E_AQC_SET_RSS_KEY_VSI_ID_SHIFT) & + I40E_AQC_SET_RSS_KEY_VSI_ID_MASK)); + cmd_resp->vsi_id |= CPU_TO_LE16((u16)I40E_AQC_SET_RSS_KEY_VSI_VALID); + cmd_resp->addr_high = CPU_TO_LE32(I40E_HI_WORD((u64)key)); + cmd_resp->addr_low = CPU_TO_LE32(I40E_LO_DWORD((u64)key)); + + status = i40e_asq_send_command(hw, &desc, key, key_size, NULL); + + return status; +} + +/** + * i40e_aq_get_rss_key + * @hw: pointer to the hw struct + * @vsi_id: vsi fw index + * @key: pointer to key info struct + * + **/ +enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw, + u16 vsi_id, + struct i40e_aqc_get_set_rss_key_data *key) +{ + return i40e_aq_get_set_rss_key(hw, vsi_id, key, FALSE); +} + +/** + * i40e_aq_set_rss_key + * @hw: pointer to the hw struct + * @vsi_id: vsi fw index + * @key: pointer to key info struct + * + * set the RSS key per VSI + **/ +enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw, + u16 vsi_id, + struct i40e_aqc_get_set_rss_key_data *key) +{ + return i40e_aq_get_set_rss_key(hw, vsi_id, key, TRUE); +} +#endif /* X722_SUPPORT */ /* The i40e_ptype_lookup table is used to convert from the 8-bit ptype in the * hardware to a bit-field that can be used by SW to more easily determine the @@ -598,6 +988,9 @@ enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw) switch (hw->mac.type) { case I40E_MAC_XL710: +#ifdef X722_SUPPORT + case I40E_MAC_X722: +#endif break; default: return I40E_ERR_DEVICE_NOT_SUPPORTED; @@ -888,7 +1281,7 @@ enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw) grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT; - for (cnt = 0; cnt < grst_del + 2; cnt++) { + for (cnt = 0; cnt < grst_del + 10; cnt++) { reg = rd32(hw, I40E_GLGEN_RSTAT); if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK)) break; @@ -1108,9 +1501,11 @@ u32 i40e_led_get(struct i40e_hw *hw) if (!gpio_val) continue; - /* ignore gpio LED src mode entries related to the activity LEDs */ - current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >> - I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT); + /* ignore gpio LED src mode entries related to the activity + * LEDs + */ + current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) + >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT); switch (current_mode) { case I40E_COMBINED_ACTIVITY: case I40E_FILTER_ACTIVITY: @@ -1154,9 +1549,11 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink) if (!gpio_val) continue; - /* ignore gpio LED src mode entries related to the activity LEDs */ - current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) >> - I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT); + /* ignore gpio LED src mode entries related to the activity + * LEDs + */ + current_mode = ((gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK) + >> I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT); switch (current_mode) { case I40E_COMBINED_ACTIVITY: case I40E_FILTER_ACTIVITY: @@ -1175,9 +1572,9 @@ void i40e_led_set(struct i40e_hw *hw, u32 mode, bool blink) blink = FALSE; if (blink) - gpio_val |= (1 << I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT); + gpio_val |= BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT); else - gpio_val &= ~(1 << I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT); + gpio_val &= ~BIT(I40E_GLGEN_GPIO_CTL_LED_BLINK_SHIFT); wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val); break; @@ -1329,14 +1726,14 @@ enum i40e_status_code i40e_set_fc(struct i40e_hw *hw, u8 *aq_failures, *aq_failures |= I40E_SET_FC_AQ_FAIL_SET; } /* Update the link info */ - status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL); + status = i40e_update_link_info(hw); if (status) { /* Wait a little bit (on 40G cards it sometimes takes a really * long time for link to come back from the atomic reset) * and try once more */ i40e_msec_delay(1000); - status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL); + status = i40e_update_link_info(hw); } if (status) *aq_failures |= I40E_SET_FC_AQ_FAIL_UPDATE; @@ -1525,7 +1922,6 @@ aq_get_link_info_exit: return status; } - /** * i40e_aq_set_phy_int_mask * @hw: pointer to the hw struct @@ -1837,6 +2233,74 @@ enum i40e_status_code i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw, } /** + * i40e_aq_set_vsi_mc_promisc_on_vlan + * @hw: pointer to the hw struct + * @seid: vsi number + * @enable: set MAC L2 layer unicast promiscuous enable/disable for a given VLAN + * @vid: The VLAN tag filter - capture any multicast packet with this VLAN tag + * @cmd_details: pointer to command details structure or NULL + **/ +enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw, + u16 seid, bool enable, u16 vid, + struct i40e_asq_cmd_details *cmd_details) +{ + struct i40e_aq_desc desc; + struct i40e_aqc_set_vsi_promiscuous_modes *cmd = + (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw; + enum i40e_status_code status; + u16 flags = 0; + + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_set_vsi_promiscuous_modes); + + if (enable) + flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST; + + cmd->promiscuous_flags = CPU_TO_LE16(flags); + cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_MULTICAST); + cmd->seid = CPU_TO_LE16(seid); + cmd->vlan_tag = CPU_TO_LE16(vid | I40E_AQC_SET_VSI_VLAN_VALID); + + status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); + + return status; +} + +/** + * i40e_aq_set_vsi_uc_promisc_on_vlan + * @hw: pointer to the hw struct + * @seid: vsi number + * @enable: set MAC L2 layer unicast promiscuous enable/disable for a given VLAN + * @vid: The VLAN tag filter - capture any unicast packet with this VLAN tag + * @cmd_details: pointer to command details structure or NULL + **/ +enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw, + u16 seid, bool enable, u16 vid, + struct i40e_asq_cmd_details *cmd_details) +{ + struct i40e_aq_desc desc; + struct i40e_aqc_set_vsi_promiscuous_modes *cmd = + (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw; + enum i40e_status_code status; + u16 flags = 0; + + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_set_vsi_promiscuous_modes); + + if (enable) + flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST; + + cmd->promiscuous_flags = CPU_TO_LE16(flags); + cmd->valid_flags = CPU_TO_LE16(I40E_AQC_SET_VSI_PROMISC_UNICAST); + cmd->seid = CPU_TO_LE16(seid); + cmd->vlan_tag = CPU_TO_LE16(vid | I40E_AQC_SET_VSI_VLAN_VALID); + + status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); + + return status; +} + +/** * i40e_aq_set_vsi_broadcast * @hw: pointer to the hw struct * @seid: vsi number @@ -2067,30 +2531,56 @@ enum i40e_status_code i40e_aq_send_driver_version(struct i40e_hw *hw, /** * i40e_get_link_status - get status of the HW network link * @hw: pointer to the hw struct + * @link_up: pointer to bool (TRUE/FALSE = linkup/linkdown) * - * Returns TRUE if link is up, FALSE if link is down. + * Variable link_up TRUE if link is up, FALSE if link is down. + * The variable link_up is invalid if returned value of status != I40E_SUCCESS * * Side effect: LinkStatusEvent reporting becomes enabled **/ -bool i40e_get_link_status(struct i40e_hw *hw) +enum i40e_status_code i40e_get_link_status(struct i40e_hw *hw, bool *link_up) { enum i40e_status_code status = I40E_SUCCESS; - bool link_status = FALSE; if (hw->phy.get_link_info) { - status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL); + status = i40e_update_link_info(hw); if (status != I40E_SUCCESS) - goto i40e_get_link_status_exit; + i40e_debug(hw, I40E_DEBUG_LINK, "get link failed: status %d\n", + status); } - link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; + *link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; -i40e_get_link_status_exit: - return link_status; + return status; } /** + * i40e_updatelink_status - update status of the HW network link + * @hw: pointer to the hw struct + **/ +enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw) +{ + struct i40e_aq_get_phy_abilities_resp abilities; + enum i40e_status_code status = I40E_SUCCESS; + + status = i40e_aq_get_link_info(hw, TRUE, NULL, NULL); + if (status) + return status; + + status = i40e_aq_get_phy_capabilities(hw, FALSE, false, &abilities, + NULL); + if (status) + return status; + + memcpy(hw->phy.link_info.module_type, &abilities.module_type, + sizeof(hw->phy.link_info.module_type)); + + return status; +} + + +/** * i40e_get_link_speed * @hw: pointer to the hw struct * @@ -2218,6 +2708,7 @@ enum i40e_status_code i40e_aq_get_veb_parameters(struct i40e_hw *hw, *vebs_free = LE16_TO_CPU(cmd_resp->vebs_free); if (floating) { u16 flags = LE16_TO_CPU(cmd_resp->veb_flags); + if (flags & I40E_AQC_ADD_VEB_FLOATING) *floating = TRUE; else @@ -2750,6 +3241,27 @@ enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw, } /** + * i40e_aq_oem_post_update - triggers an OEM specific flow after update + * @hw: pointer to the hw struct + * @cmd_details: pointer to command details structure or NULL + **/ +enum i40e_status_code i40e_aq_oem_post_update(struct i40e_hw *hw, + void *buff, u16 buff_size, + struct i40e_asq_cmd_details *cmd_details) +{ + struct i40e_aq_desc desc; + enum i40e_status_code status; + + + i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_oem_post_update); + status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); + if (status && LE16_TO_CPU(desc.retval) == I40E_AQ_RC_ESRCH) + status = I40E_ERR_NOT_IMPLEMENTED; + + return status; +} + +/** * i40e_aq_erase_nvm * @hw: pointer to the hw struct * @module_pointer: module pointer location in words from the NVM beginning @@ -2813,12 +3325,13 @@ i40e_aq_erase_nvm_exit: #define I40E_DEV_FUNC_CAP_MSIX_VF 0x44 #define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45 #define I40E_DEV_FUNC_CAP_IEEE_1588 0x46 -#define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1 +#define I40E_DEV_FUNC_CAP_FLEX10 0xF1 #define I40E_DEV_FUNC_CAP_CEM 0xF2 #define I40E_DEV_FUNC_CAP_IWARP 0x51 #define I40E_DEV_FUNC_CAP_LED 0x61 #define I40E_DEV_FUNC_CAP_SDP 0x62 #define I40E_DEV_FUNC_CAP_MDIO 0x63 +#define I40E_DEV_FUNC_CAP_WR_CSR_PROT 0x64 /** * i40e_parse_discover_capabilities @@ -2837,6 +3350,7 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, u32 valid_functions, num_functions; u32 number, logical_id, phys_id; struct i40e_hw_capabilities *p; + u8 major_rev; u32 i = 0; u16 id; @@ -2854,6 +3368,7 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, number = LE32_TO_CPU(cap->number); logical_id = LE32_TO_CPU(cap->logical_id); phys_id = LE32_TO_CPU(cap->phys_id); + major_rev = cap->major_rev; switch (id) { case I40E_DEV_FUNC_CAP_SWITCH_MODE: @@ -2928,9 +3443,21 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, case I40E_DEV_FUNC_CAP_MSIX_VF: p->num_msix_vectors_vf = number; break; - case I40E_DEV_FUNC_CAP_MFP_MODE_1: - if (number == 1) - p->mfp_mode_1 = TRUE; + case I40E_DEV_FUNC_CAP_FLEX10: + if (major_rev == 1) { + if (number == 1) { + p->flex10_enable = TRUE; + p->flex10_capable = TRUE; + } + } else { + /* Capability revision >= 2 */ + if (number & 1) + p->flex10_enable = TRUE; + if (number & 2) + p->flex10_capable = TRUE; + } + p->flex10_mode = logical_id; + p->flex10_status = phys_id; break; case I40E_DEV_FUNC_CAP_CEM: if (number == 1) @@ -2963,11 +3490,18 @@ static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff, p->fd_filters_guaranteed = number; p->fd_filters_best_effort = logical_id; break; + case I40E_DEV_FUNC_CAP_WR_CSR_PROT: + p->wr_csr_prot = (u64)number; + p->wr_csr_prot |= (u64)logical_id << 32; + break; default: break; } } + if (p->fcoe) + i40e_debug(hw, I40E_DEBUG_ALL, "device is FCoE capable\n"); + /* Always disable FCoE if compiled without the I40E_FCOE_ENA flag */ p->fcoe = FALSE; @@ -4923,6 +5457,63 @@ void i40e_set_pci_config_data(struct i40e_hw *hw, u16 link_status) } /** + * i40e_aq_debug_dump + * @hw: pointer to the hardware structure + * @cluster_id: specific cluster to dump + * @table_id: table id within cluster + * @start_index: index of line in the block to read + * @buff_size: dump buffer size + * @buff: dump buffer + * @ret_buff_size: actual buffer size returned + * @ret_next_table: next block to read + * @ret_next_index: next index to read + * + * Dump internal FW/HW data for debug purposes. + * + **/ +enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id, + u8 table_id, u32 start_index, u16 buff_size, + void *buff, u16 *ret_buff_size, + u8 *ret_next_table, u32 *ret_next_index, + struct i40e_asq_cmd_details *cmd_details) +{ + struct i40e_aq_desc desc; + struct i40e_aqc_debug_dump_internals *cmd = + (struct i40e_aqc_debug_dump_internals *)&desc.params.raw; + struct i40e_aqc_debug_dump_internals *resp = + (struct i40e_aqc_debug_dump_internals *)&desc.params.raw; + enum i40e_status_code status; + + if (buff_size == 0 || !buff) + return I40E_ERR_PARAM; + + i40e_fill_default_direct_cmd_desc(&desc, + i40e_aqc_opc_debug_dump_internals); + /* Indirect Command */ + desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_BUF); + if (buff_size > I40E_AQ_LARGE_BUF) + desc.flags |= CPU_TO_LE16((u16)I40E_AQ_FLAG_LB); + + cmd->cluster_id = cluster_id; + cmd->table_id = table_id; + cmd->idx = CPU_TO_LE32(start_index); + + desc.datalen = CPU_TO_LE16(buff_size); + + status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details); + if (!status) { + if (ret_buff_size != NULL) + *ret_buff_size = LE16_TO_CPU(desc.datalen); + if (ret_next_table != NULL) + *ret_next_table = resp->table_id; + if (ret_next_index != NULL) + *ret_next_index = LE32_TO_CPU(resp->idx); + } + + return status; +} + +/** * i40e_read_bw_from_alt_ram * @hw: pointer to the hardware structure * @max_bw: pointer for max_bw read @@ -4941,11 +5532,11 @@ enum i40e_status_code i40e_read_bw_from_alt_ram(struct i40e_hw *hw, /* Calculate the address of the min/max bw registers */ max_bw_addr = I40E_ALT_STRUCT_FIRST_PF_OFFSET + - I40E_ALT_STRUCT_MAX_BW_OFFSET + - (I40E_ALT_STRUCT_DWORDS_PER_PF*hw->pf_id); + I40E_ALT_STRUCT_MAX_BW_OFFSET + + (I40E_ALT_STRUCT_DWORDS_PER_PF * hw->pf_id); min_bw_addr = I40E_ALT_STRUCT_FIRST_PF_OFFSET + - I40E_ALT_STRUCT_MIN_BW_OFFSET + - (I40E_ALT_STRUCT_DWORDS_PER_PF*hw->pf_id); + I40E_ALT_STRUCT_MIN_BW_OFFSET + + (I40E_ALT_STRUCT_DWORDS_PER_PF * hw->pf_id); /* Read the bandwidths from alt ram */ status = i40e_aq_alternate_read(hw, max_bw_addr, max_bw, diff --git a/sys/dev/ixl/i40e_devids.h b/sys/dev/ixl/i40e_devids.h new file mode 100644 index 000000000000..abd597a9ead2 --- /dev/null +++ b/sys/dev/ixl/i40e_devids.h @@ -0,0 +1,68 @@ +/****************************************************************************** + + Copyright (c) 2013-2015, Intel Corporation + All rights reserved. + + Redistribution and use in source and binary forms, with or without + modification, are permitted provided that the following conditions are met: + + 1. Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + + 2. Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in the + documentation and/or other materials provided with the distribution. + + 3. Neither the name of the Intel Corporation nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + POSSIBILITY OF SUCH DAMAGE. + +******************************************************************************/ +/*$FreeBSD$*/ + +#ifndef _I40E_DEVIDS_H_ +#define _I40E_DEVIDS_H_ + +/* Vendor ID */ +#define I40E_INTEL_VENDOR_ID 0x8086 + +/* Device IDs */ +#define I40E_DEV_ID_SFP_XL710 0x1572 +#define I40E_DEV_ID_QEMU 0x1574 +#define I40E_DEV_ID_KX_A 0x157F +#define I40E_DEV_ID_KX_B 0x1580 +#define I40E_DEV_ID_KX_C 0x1581 +#define I40E_DEV_ID_QSFP_A 0x1583 +#define I40E_DEV_ID_QSFP_B 0x1584 +#define I40E_DEV_ID_QSFP_C 0x1585 +#define I40E_DEV_ID_10G_BASE_T 0x1586 +#define I40E_DEV_ID_20G_KR2 0x1587 +#define I40E_DEV_ID_20G_KR2_A 0x1588 +#define I40E_DEV_ID_10G_BASE_T4 0x1589 +#define I40E_DEV_ID_VF 0x154C +#define I40E_DEV_ID_VF_HV 0x1571 +#ifdef X722_SUPPORT +#define I40E_DEV_ID_SFP_X722 0x37D0 +#define I40E_DEV_ID_1G_BASE_T_X722 0x37D1 +#define I40E_DEV_ID_10G_BASE_T_X722 0x37D2 +#define I40E_DEV_ID_X722_VF 0x37CD +#define I40E_DEV_ID_X722_VF_HV 0x37D9 +#endif /* X722_SUPPORT */ + +#define i40e_is_40G_device(d) ((d) == I40E_DEV_ID_QSFP_A || \ + (d) == I40E_DEV_ID_QSFP_B || \ + (d) == I40E_DEV_ID_QSFP_C) + +#endif /* _I40E_DEVIDS_H_ */ diff --git a/sys/dev/ixl/i40e_hmc.c b/sys/dev/ixl/i40e_hmc.c index 81cb2ae99606..513f1d572f7c 100644 --- a/sys/dev/ixl/i40e_hmc.c +++ b/sys/dev/ixl/i40e_hmc.c @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -130,6 +130,7 @@ exit: * @hw: pointer to our HW structure * @hmc_info: pointer to the HMC configuration information structure * @pd_index: which page descriptor index to manipulate + * @rsrc_pg: if not NULL, use preallocated page instead of allocating new one. * * This function: * 1. Initializes the pd entry @@ -143,12 +144,14 @@ exit: **/ enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw, struct i40e_hmc_info *hmc_info, - u32 pd_index) + u32 pd_index, + struct i40e_dma_mem *rsrc_pg) { enum i40e_status_code ret_code = I40E_SUCCESS; struct i40e_hmc_pd_table *pd_table; struct i40e_hmc_pd_entry *pd_entry; struct i40e_dma_mem mem; + struct i40e_dma_mem *page = &mem; u32 sd_idx, rel_pd_idx; u64 *pd_addr; u64 page_desc; @@ -169,19 +172,25 @@ enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw, pd_table = &hmc_info->sd_table.sd_entry[sd_idx].u.pd_table; pd_entry = &pd_table->pd_entry[rel_pd_idx]; if (!pd_entry->valid) { - /* allocate a 4K backing page */ - ret_code = i40e_allocate_dma_mem(hw, &mem, i40e_mem_bp, - I40E_HMC_PAGED_BP_SIZE, - I40E_HMC_PD_BP_BUF_ALIGNMENT); - if (ret_code) - goto exit; + if (rsrc_pg) { + pd_entry->rsrc_pg = TRUE; + page = rsrc_pg; + } else { + /* allocate a 4K backing page */ + ret_code = i40e_allocate_dma_mem(hw, page, i40e_mem_bp, + I40E_HMC_PAGED_BP_SIZE, + I40E_HMC_PD_BP_BUF_ALIGNMENT); + if (ret_code) + goto exit; + pd_entry->rsrc_pg = FALSE; + } - i40e_memcpy(&pd_entry->bp.addr, &mem, + i40e_memcpy(&pd_entry->bp.addr, page, sizeof(struct i40e_dma_mem), I40E_NONDMA_TO_NONDMA); pd_entry->bp.sd_pd_index = pd_index; pd_entry->bp.entry_type = I40E_SD_TYPE_PAGED; /* Set page address and valid bit */ - page_desc = mem.pa | 0x1; + page_desc = page->pa | 0x1; pd_addr = (u64 *)pd_table->pd_page_addr.va; pd_addr += rel_pd_idx; @@ -256,7 +265,8 @@ enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw, I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, idx); /* free memory here */ - ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr)); + if (!pd_entry->rsrc_pg) + ret_code = i40e_free_dma_mem(hw, &(pd_entry->bp.addr)); if (I40E_SUCCESS != ret_code) goto exit; if (!pd_table->ref_cnt) @@ -303,21 +313,15 @@ enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw, u32 idx, bool is_pf) { struct i40e_hmc_sd_entry *sd_entry; - enum i40e_status_code ret_code = I40E_SUCCESS; + + if (!is_pf) + return I40E_NOT_SUPPORTED; /* get the entry and decrease its ref counter */ sd_entry = &hmc_info->sd_table.sd_entry[idx]; - if (is_pf) { - I40E_CLEAR_PF_SD_ENTRY(hw, idx, I40E_SD_TYPE_DIRECT); - } else { - ret_code = I40E_NOT_SUPPORTED; - goto exit; - } - ret_code = i40e_free_dma_mem(hw, &(sd_entry->u.bp.addr)); - if (I40E_SUCCESS != ret_code) - goto exit; -exit: - return ret_code; + I40E_CLEAR_PF_SD_ENTRY(hw, idx, I40E_SD_TYPE_DIRECT); + + return i40e_free_dma_mem(hw, &(sd_entry->u.bp.addr)); } /** @@ -357,20 +361,13 @@ enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw, struct i40e_hmc_info *hmc_info, u32 idx, bool is_pf) { - enum i40e_status_code ret_code = I40E_SUCCESS; struct i40e_hmc_sd_entry *sd_entry; + if (!is_pf) + return I40E_NOT_SUPPORTED; + sd_entry = &hmc_info->sd_table.sd_entry[idx]; - if (is_pf) { - I40E_CLEAR_PF_SD_ENTRY(hw, idx, I40E_SD_TYPE_PAGED); - } else { - ret_code = I40E_NOT_SUPPORTED; - goto exit; - } - /* free memory here */ - ret_code = i40e_free_dma_mem(hw, &(sd_entry->u.pd_table.pd_page_addr)); - if (I40E_SUCCESS != ret_code) - goto exit; -exit: - return ret_code; + I40E_CLEAR_PF_SD_ENTRY(hw, idx, I40E_SD_TYPE_PAGED); + + return i40e_free_dma_mem(hw, &(sd_entry->u.pd_table.pd_page_addr)); } diff --git a/sys/dev/ixl/i40e_hmc.h b/sys/dev/ixl/i40e_hmc.h index cba325f5a8b9..1a9995ab6afc 100644 --- a/sys/dev/ixl/i40e_hmc.h +++ b/sys/dev/ixl/i40e_hmc.h @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -70,6 +70,7 @@ struct i40e_hmc_bp { struct i40e_hmc_pd_entry { struct i40e_hmc_bp bp; u32 sd_index; + bool rsrc_pg; bool valid; }; @@ -134,8 +135,8 @@ struct i40e_hmc_info { I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \ ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \ I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) | \ - (1 << I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \ - val3 = (sd_index) | (1u << I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ + BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \ + val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \ wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ wr32((hw), I40E_PFHMC_SDCMD, val3); \ @@ -154,7 +155,7 @@ struct i40e_hmc_info { I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) | \ ((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \ I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \ - val3 = (sd_index) | (1u << I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ + val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \ wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \ wr32((hw), I40E_PFHMC_SDDATALOW, val2); \ wr32((hw), I40E_PFHMC_SDCMD, val3); \ @@ -226,7 +227,8 @@ enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw, enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw, struct i40e_hmc_info *hmc_info, - u32 pd_index); + u32 pd_index, + struct i40e_dma_mem *rsrc_pg); enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw, struct i40e_hmc_info *hmc_info, u32 idx); diff --git a/sys/dev/ixl/i40e_lan_hmc.c b/sys/dev/ixl/i40e_lan_hmc.c index 0866ad14851c..f6c951468c4b 100644 --- a/sys/dev/ixl/i40e_lan_hmc.c +++ b/sys/dev/ixl/i40e_lan_hmc.c @@ -137,7 +137,7 @@ enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, obj->cnt = txq_num; obj->base = 0; size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (txq_num > obj->max_cnt) { @@ -160,7 +160,7 @@ enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, hw->hmc.hmc_obj[I40E_HMC_LAN_TX].size); obj->base = i40e_align_l2obj_base(obj->base); size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (rxq_num > obj->max_cnt) { @@ -183,7 +183,7 @@ enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, hw->hmc.hmc_obj[I40E_HMC_LAN_RX].size); obj->base = i40e_align_l2obj_base(obj->base); size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (fcoe_cntx_num > obj->max_cnt) { @@ -206,7 +206,7 @@ enum i40e_status_code i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num, hw->hmc.hmc_obj[I40E_HMC_FCOE_CTX].size); obj->base = i40e_align_l2obj_base(obj->base); size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ); - obj->size = (u64)1 << size_exp; + obj->size = BIT_ULL(size_exp); /* validate values requested by driver don't exceed HMC capacity */ if (fcoe_filt_num > obj->max_cnt) { @@ -395,7 +395,7 @@ enum i40e_status_code i40e_create_lan_hmc_object(struct i40e_hw *hw, /* update the pd table entry */ ret_code = i40e_add_pd_table_entry(hw, info->hmc_info, - i); + i, NULL); if (I40E_SUCCESS != ret_code) { pd_error = TRUE; break; @@ -439,9 +439,8 @@ exit_sd_error: pd_idx1 = max(pd_idx, ((j - 1) * I40E_HMC_MAX_BP_COUNT)); pd_lmt1 = min(pd_lmt, (j * I40E_HMC_MAX_BP_COUNT)); - for (i = pd_idx1; i < pd_lmt1; i++) { + for (i = pd_idx1; i < pd_lmt1; i++) i40e_remove_pd_bp(hw, info->hmc_info, i); - } i40e_remove_pd_page(hw, info->hmc_info, (j - 1)); break; case I40E_SD_TYPE_DIRECT: @@ -771,7 +770,7 @@ static void i40e_write_byte(u8 *hmc_bits, /* prepare the bits and mask */ shift_width = ce_info->lsb % 8; - mask = ((u8)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; src_byte = *from; src_byte &= mask; @@ -812,7 +811,7 @@ static void i40e_write_word(u8 *hmc_bits, /* prepare the bits and mask */ shift_width = ce_info->lsb % 8; - mask = ((u16)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; /* don't swizzle the bits until after the mask because the mask bits * will be in a different bit position on big endian machines @@ -862,7 +861,7 @@ static void i40e_write_dword(u8 *hmc_bits, * to 5 bits so the shift will do nothing */ if (ce_info->width < 32) - mask = ((u32)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; else mask = ~(u32)0; @@ -914,7 +913,7 @@ static void i40e_write_qword(u8 *hmc_bits, * to 6 bits so the shift will do nothing */ if (ce_info->width < 64) - mask = ((u64)1 << ce_info->width) - 1; + mask = BIT_ULL(ce_info->width) - 1; else mask = ~(u64)0; @@ -956,7 +955,7 @@ static void i40e_read_byte(u8 *hmc_bits, /* prepare the bits and mask */ shift_width = ce_info->lsb % 8; - mask = ((u8)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; /* shift to correct alignment */ mask <<= shift_width; @@ -994,7 +993,7 @@ static void i40e_read_word(u8 *hmc_bits, /* prepare the bits and mask */ shift_width = ce_info->lsb % 8; - mask = ((u16)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; /* shift to correct alignment */ mask <<= shift_width; @@ -1044,7 +1043,7 @@ static void i40e_read_dword(u8 *hmc_bits, * to 5 bits so the shift will do nothing */ if (ce_info->width < 32) - mask = ((u32)1 << ce_info->width) - 1; + mask = BIT(ce_info->width) - 1; else mask = ~(u32)0; @@ -1097,7 +1096,7 @@ static void i40e_read_qword(u8 *hmc_bits, * to 6 bits so the shift will do nothing */ if (ce_info->width < 64) - mask = ((u64)1 << ce_info->width) - 1; + mask = BIT_ULL(ce_info->width) - 1; else mask = ~(u64)0; diff --git a/sys/dev/ixl/i40e_nvm.c b/sys/dev/ixl/i40e_nvm.c index 35001a58e4e4..5ae7515e4236 100644 --- a/sys/dev/ixl/i40e_nvm.c +++ b/sys/dev/ixl/i40e_nvm.c @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -72,7 +72,7 @@ enum i40e_status_code i40e_init_nvm(struct i40e_hw *hw) sr_size = ((gens & I40E_GLNVM_GENS_SR_SIZE_MASK) >> I40E_GLNVM_GENS_SR_SIZE_SHIFT); /* Switching to words (sr_size contains power of 2KB) */ - nvm->sr_size = (1 << sr_size) * I40E_SR_WORDS_IN_1KB; + nvm->sr_size = BIT(sr_size) * I40E_SR_WORDS_IN_1KB; /* Check if we are in the normal or blank NVM programming mode */ fla = rd32(hw, I40E_GLNVM_FLA); @@ -158,10 +158,26 @@ i40e_i40e_acquire_nvm_exit: **/ void i40e_release_nvm(struct i40e_hw *hw) { + enum i40e_status_code ret_code = I40E_SUCCESS; + u32 total_delay = 0; + DEBUGFUNC("i40e_release_nvm"); - if (!hw->nvm.blank_nvm_mode) - i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); + if (hw->nvm.blank_nvm_mode) + return; + + ret_code = i40e_aq_release_resource(hw, I40E_NVM_RESOURCE_ID, 0, NULL); + + /* there are some rare cases when trying to release the resource + * results in an admin Q timeout, so handle them correctly + */ + while ((ret_code == I40E_ERR_ADMIN_QUEUE_TIMEOUT) && + (total_delay < hw->aq.asq_cmd_timeout)) { + i40e_msec_delay(1); + ret_code = i40e_aq_release_resource(hw, + I40E_NVM_RESOURCE_ID, 0, NULL); + total_delay++; + } } /** @@ -202,6 +218,10 @@ static enum i40e_status_code i40e_poll_sr_srctl_done_bit(struct i40e_hw *hw) enum i40e_status_code i40e_read_nvm_word(struct i40e_hw *hw, u16 offset, u16 *data) { +#ifdef X722_SUPPORT + if (hw->mac.type == I40E_MAC_X722) + return i40e_read_nvm_word_aq(hw, offset, data); +#endif return i40e_read_nvm_word_srctl(hw, offset, data); } @@ -233,8 +253,8 @@ enum i40e_status_code i40e_read_nvm_word_srctl(struct i40e_hw *hw, u16 offset, ret_code = i40e_poll_sr_srctl_done_bit(hw); if (ret_code == I40E_SUCCESS) { /* Write the address and start reading */ - sr_reg = (u32)(offset << I40E_GLNVM_SRCTL_ADDR_SHIFT) | - (1 << I40E_GLNVM_SRCTL_START_SHIFT); + sr_reg = ((u32)offset << I40E_GLNVM_SRCTL_ADDR_SHIFT) | + BIT(I40E_GLNVM_SRCTL_START_SHIFT); wr32(hw, I40E_GLNVM_SRCTL, sr_reg); /* Poll I40E_GLNVM_SRCTL until the done bit is set */ @@ -290,6 +310,10 @@ enum i40e_status_code i40e_read_nvm_word_aq(struct i40e_hw *hw, u16 offset, enum i40e_status_code i40e_read_nvm_buffer(struct i40e_hw *hw, u16 offset, u16 *words, u16 *data) { +#ifdef X722_SUPPORT + if (hw->mac.type == I40E_MAC_X722) + return i40e_read_nvm_buffer_aq(hw, offset, words, data); +#endif return i40e_read_nvm_buffer_srctl(hw, offset, words, data); } @@ -401,9 +425,13 @@ enum i40e_status_code i40e_read_nvm_aq(struct i40e_hw *hw, u8 module_pointer, bool last_command) { enum i40e_status_code ret_code = I40E_ERR_NVM; + struct i40e_asq_cmd_details cmd_details; DEBUGFUNC("i40e_read_nvm_aq"); + memset(&cmd_details, 0, sizeof(cmd_details)); + cmd_details.wb_desc = &hw->nvm_wb_desc; + /* Here we are checking the SR limit only for the flat memory model. * We cannot do it for the module-based model, as we did not acquire * the NVM resource yet (we cannot get the module pointer value). @@ -428,7 +456,7 @@ enum i40e_status_code i40e_read_nvm_aq(struct i40e_hw *hw, u8 module_pointer, ret_code = i40e_aq_read_nvm(hw, module_pointer, 2 * offset, /*bytes*/ 2 * words, /*bytes*/ - data, last_command, NULL); + data, last_command, &cmd_details); return ret_code; } @@ -449,9 +477,13 @@ enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer, bool last_command) { enum i40e_status_code ret_code = I40E_ERR_NVM; + struct i40e_asq_cmd_details cmd_details; DEBUGFUNC("i40e_write_nvm_aq"); + memset(&cmd_details, 0, sizeof(cmd_details)); + cmd_details.wb_desc = &hw->nvm_wb_desc; + /* Here we are checking the SR limit only for the flat memory model. * We cannot do it for the module-based model, as we did not acquire * the NVM resource yet (we cannot get the module pointer value). @@ -470,7 +502,7 @@ enum i40e_status_code i40e_write_nvm_aq(struct i40e_hw *hw, u8 module_pointer, ret_code = i40e_aq_update_nvm(hw, module_pointer, 2 * offset, /*bytes*/ 2 * words, /*bytes*/ - data, last_command, NULL); + data, last_command, &cmd_details); return ret_code; } @@ -580,6 +612,7 @@ enum i40e_status_code i40e_calc_nvm_checksum(struct i40e_hw *hw, u16 *checksum) /* Read SR page */ if ((i % I40E_SR_SECTOR_SIZE_IN_WORDS) == 0) { u16 words = I40E_SR_SECTOR_SIZE_IN_WORDS; + ret_code = i40e_read_nvm_buffer(hw, i, &words, data); if (ret_code != I40E_SUCCESS) { ret_code = I40E_ERR_NVM_CHECKSUM; @@ -625,13 +658,15 @@ enum i40e_status_code i40e_update_nvm_checksum(struct i40e_hw *hw) { enum i40e_status_code ret_code = I40E_SUCCESS; u16 checksum; + __le16 le_sum; DEBUGFUNC("i40e_update_nvm_checksum"); ret_code = i40e_calc_nvm_checksum(hw, &checksum); + le_sum = CPU_TO_LE16(checksum); if (ret_code == I40E_SUCCESS) ret_code = i40e_write_nvm_aq(hw, 0x00, I40E_SR_SW_CHECKSUM_WORD, - 1, &checksum, TRUE); + 1, &le_sum, TRUE); return ret_code; } diff --git a/sys/dev/ixl/i40e_osdep.h b/sys/dev/ixl/i40e_osdep.h index 83e89229c400..67a4b1868a09 100644 --- a/sys/dev/ixl/i40e_osdep.h +++ b/sys/dev/ixl/i40e_osdep.h @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -112,6 +112,9 @@ #define FIELD_SIZEOF(x, y) (sizeof(((x*)0)->y)) +#define BIT(a) (1UL << (a)) +#define BIT_ULL(a) (1ULL << (a)) + typedef uint8_t u8; typedef int8_t s8; typedef uint16_t u16; @@ -189,7 +192,7 @@ rd32_osdep(struct i40e_osdep *osdep, uint32_t reg) { KASSERT(reg < osdep->mem_bus_space_size, - ("ixl: register offset %#jx too large (max is %#jx", + ("ixl: register offset %#jx too large (max is %#jx)", (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size)); return (bus_space_read_4(osdep->mem_bus_space_tag, @@ -201,7 +204,7 @@ wr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value) { KASSERT(reg < osdep->mem_bus_space_size, - ("ixl: register offset %#jx too large (max is %#jx", + ("ixl: register offset %#jx too large (max is %#jx)", (uintmax_t)reg, (uintmax_t)osdep->mem_bus_space_size)); bus_space_write_4(osdep->mem_bus_space_tag, @@ -211,7 +214,6 @@ wr32_osdep(struct i40e_osdep *osdep, uint32_t reg, uint32_t value) static __inline void ixl_flush_osdep(struct i40e_osdep *osdep) { - rd32_osdep(osdep, osdep->flush_reg); } diff --git a/sys/dev/ixl/i40e_prototype.h b/sys/dev/ixl/i40e_prototype.h index d49b52da66fb..c2395d232ccd 100644 --- a/sys/dev/ixl/i40e_prototype.h +++ b/sys/dev/ixl/i40e_prototype.h @@ -78,6 +78,21 @@ void i40e_idle_aq(struct i40e_hw *hw); void i40e_resume_aq(struct i40e_hw *hw); bool i40e_check_asq_alive(struct i40e_hw *hw); enum i40e_status_code i40e_aq_queue_shutdown(struct i40e_hw *hw, bool unloading); +#ifdef X722_SUPPORT + +enum i40e_status_code i40e_aq_get_rss_lut(struct i40e_hw *hw, u16 seid, + bool pf_lut, u8 *lut, u16 lut_size); +enum i40e_status_code i40e_aq_set_rss_lut(struct i40e_hw *hw, u16 seid, + bool pf_lut, u8 *lut, u16 lut_size); +enum i40e_status_code i40e_aq_get_rss_key(struct i40e_hw *hw, + u16 seid, + struct i40e_aqc_get_set_rss_key_data *key); +enum i40e_status_code i40e_aq_set_rss_key(struct i40e_hw *hw, + u16 seid, + struct i40e_aqc_get_set_rss_key_data *key); +#endif +char *i40e_aq_str(struct i40e_hw *hw, enum i40e_admin_queue_err aq_err); +char *i40e_stat_str(struct i40e_hw *hw, enum i40e_status_code stat_err); u32 i40e_led_get(struct i40e_hw *hw); @@ -145,6 +160,12 @@ enum i40e_status_code i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw, u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); enum i40e_status_code i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw, u16 vsi_id, bool set, struct i40e_asq_cmd_details *cmd_details); +enum i40e_status_code i40e_aq_set_vsi_mc_promisc_on_vlan(struct i40e_hw *hw, + u16 seid, bool enable, u16 vid, + struct i40e_asq_cmd_details *cmd_details); +enum i40e_status_code i40e_aq_set_vsi_uc_promisc_on_vlan(struct i40e_hw *hw, + u16 seid, bool enable, u16 vid, + struct i40e_asq_cmd_details *cmd_details); enum i40e_status_code i40e_aq_get_vsi_params(struct i40e_hw *hw, struct i40e_vsi_context *vsi_ctx, struct i40e_asq_cmd_details *cmd_details); @@ -204,6 +225,9 @@ enum i40e_status_code i40e_aq_write_nvm_config(struct i40e_hw *hw, u8 cmd_flags, void *data, u16 buf_size, u16 element_count, struct i40e_asq_cmd_details *cmd_details); +enum i40e_status_code i40e_aq_oem_post_update(struct i40e_hw *hw, + void *buff, u16 buff_size, + struct i40e_asq_cmd_details *cmd_details); enum i40e_status_code i40e_aq_discover_capabilities(struct i40e_hw *hw, void *buff, u16 buff_size, u16 *data_size, enum i40e_admin_queue_opc list_type_opc, @@ -377,7 +401,8 @@ enum i40e_status_code i40e_init_shared_code(struct i40e_hw *hw); enum i40e_status_code i40e_pf_reset(struct i40e_hw *hw); void i40e_clear_hw(struct i40e_hw *hw); void i40e_clear_pxe_mode(struct i40e_hw *hw); -bool i40e_get_link_status(struct i40e_hw *hw); +enum i40e_status_code i40e_get_link_status(struct i40e_hw *hw, bool *link_up); +enum i40e_status_code i40e_update_link_info(struct i40e_hw *hw); enum i40e_status_code i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr); enum i40e_status_code i40e_read_bw_from_alt_ram(struct i40e_hw *hw, u32 *max_bw, u32 *min_bw, bool *min_valid, bool *max_valid); @@ -445,4 +470,9 @@ enum i40e_status_code i40e_aq_add_rem_control_packet_filter(struct i40e_hw *hw, u16 vsi_seid, u16 queue, bool is_add, struct i40e_control_filter_stats *stats, struct i40e_asq_cmd_details *cmd_details); +enum i40e_status_code i40e_aq_debug_dump(struct i40e_hw *hw, u8 cluster_id, + u8 table_id, u32 start_index, u16 buff_size, + void *buff, u16 *ret_buff_size, + u8 *ret_next_table, u32 *ret_next_index, + struct i40e_asq_cmd_details *cmd_details); #endif /* _I40E_PROTOTYPE_H_ */ diff --git a/sys/dev/ixl/i40e_register.h b/sys/dev/ixl/i40e_register.h index a8e47b3c94ad..adfc744c879e 100644 --- a/sys/dev/ixl/i40e_register.h +++ b/sys/dev/ixl/i40e_register.h @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -882,6 +882,13 @@ #define I40E_PFINT_CEQCTL_CAUSE_ENA_MASK I40E_MASK(0x1, I40E_PFINT_CEQCTL_CAUSE_ENA_SHIFT) #define I40E_PFINT_CEQCTL_INTEVENT_SHIFT 31 #define I40E_PFINT_CEQCTL_INTEVENT_MASK I40E_MASK(0x1, I40E_PFINT_CEQCTL_INTEVENT_SHIFT) +#define I40E_GLINT_CTL 0x0003F800 /* Reset: CORER */ +#define I40E_GLINT_CTL_DIS_AUTOMASK_PF0_SHIFT 0 +#define I40E_GLINT_CTL_DIS_AUTOMASK_PF0_MASK I40E_MASK(0x1, I40E_GLINT_CTL_DIS_AUTOMASK_PF0_SHIFT) +#define I40E_GLINT_CTL_DIS_AUTOMASK_VF0_SHIFT 1 +#define I40E_GLINT_CTL_DIS_AUTOMASK_VF0_MASK I40E_MASK(0x1, I40E_GLINT_CTL_DIS_AUTOMASK_VF0_SHIFT) +#define I40E_GLINT_CTL_DIS_AUTOMASK_N_SHIFT 2 +#define I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK I40E_MASK(0x1, I40E_GLINT_CTL_DIS_AUTOMASK_N_SHIFT) #define I40E_PFINT_DYN_CTL0 0x00038480 /* Reset: PFR */ #define I40E_PFINT_DYN_CTL0_INTENA_SHIFT 0 #define I40E_PFINT_DYN_CTL0_INTENA_MASK I40E_MASK(0x1, I40E_PFINT_DYN_CTL0_INTENA_SHIFT) @@ -3375,4 +3382,1936 @@ #define I40E_VFQF_HREGION_OVERRIDE_ENA_7_MASK I40E_MASK(0x1, I40E_VFQF_HREGION_OVERRIDE_ENA_7_SHIFT) #define I40E_VFQF_HREGION_REGION_7_SHIFT 29 #define I40E_VFQF_HREGION_REGION_7_MASK I40E_MASK(0x7, I40E_VFQF_HREGION_REGION_7_SHIFT) +#ifdef X722_SUPPORT + +#define I40E_MNGSB_FDCRC 0x000B7050 /* Reset: POR */ +#define I40E_MNGSB_FDCRC_CRC_RES_SHIFT 0 +#define I40E_MNGSB_FDCRC_CRC_RES_MASK I40E_MASK(0xFF, I40E_MNGSB_FDCRC_CRC_RES_SHIFT) +#define I40E_MNGSB_FDCS 0x000B7040 /* Reset: POR */ +#define I40E_MNGSB_FDCS_CRC_CONT_SHIFT 2 +#define I40E_MNGSB_FDCS_CRC_CONT_MASK I40E_MASK(0x1, I40E_MNGSB_FDCS_CRC_CONT_SHIFT) +#define I40E_MNGSB_FDCS_CRC_SEED_EN_SHIFT 3 +#define I40E_MNGSB_FDCS_CRC_SEED_EN_MASK I40E_MASK(0x1, I40E_MNGSB_FDCS_CRC_SEED_EN_SHIFT) +#define I40E_MNGSB_FDCS_CRC_WR_INH_SHIFT 4 +#define I40E_MNGSB_FDCS_CRC_WR_INH_MASK I40E_MASK(0x1, I40E_MNGSB_FDCS_CRC_WR_INH_SHIFT) +#define I40E_MNGSB_FDCS_CRC_SEED_SHIFT 8 +#define I40E_MNGSB_FDCS_CRC_SEED_MASK I40E_MASK(0xFF, I40E_MNGSB_FDCS_CRC_SEED_SHIFT) +#define I40E_MNGSB_FDS 0x000B7048 /* Reset: POR */ +#define I40E_MNGSB_FDS_START_BC_SHIFT 0 +#define I40E_MNGSB_FDS_START_BC_MASK I40E_MASK(0xFFF, I40E_MNGSB_FDS_START_BC_SHIFT) +#define I40E_MNGSB_FDS_LAST_BC_SHIFT 16 +#define I40E_MNGSB_FDS_LAST_BC_MASK I40E_MASK(0xFFF, I40E_MNGSB_FDS_LAST_BC_SHIFT) + +#define I40E_GL_VF_CTRL_RX(_VF) (0x00083600 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: EMPR */ +#define I40E_GL_VF_CTRL_RX_MAX_INDEX 127 +#define I40E_GL_VF_CTRL_RX_AQ_RX_EN_SHIFT 0 +#define I40E_GL_VF_CTRL_RX_AQ_RX_EN_MASK I40E_MASK(0x1, I40E_GL_VF_CTRL_RX_AQ_RX_EN_SHIFT) +#define I40E_GL_VF_CTRL_TX(_VF) (0x00083400 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: EMPR */ +#define I40E_GL_VF_CTRL_TX_MAX_INDEX 127 +#define I40E_GL_VF_CTRL_TX_AQ_TX_EN_SHIFT 0 +#define I40E_GL_VF_CTRL_TX_AQ_TX_EN_MASK I40E_MASK(0x1, I40E_GL_VF_CTRL_TX_AQ_TX_EN_SHIFT) + +#define I40E_GLCM_LAN_CACHESIZE 0x0010C4D8 /* Reset: CORER */ +#define I40E_GLCM_LAN_CACHESIZE_WORD_SIZE_SHIFT 0 +#define I40E_GLCM_LAN_CACHESIZE_WORD_SIZE_MASK I40E_MASK(0xFFF, I40E_GLCM_LAN_CACHESIZE_WORD_SIZE_SHIFT) +#define I40E_GLCM_LAN_CACHESIZE_SETS_SHIFT 12 +#define I40E_GLCM_LAN_CACHESIZE_SETS_MASK I40E_MASK(0xF, I40E_GLCM_LAN_CACHESIZE_SETS_SHIFT) +#define I40E_GLCM_LAN_CACHESIZE_WAYS_SHIFT 16 +#define I40E_GLCM_LAN_CACHESIZE_WAYS_MASK I40E_MASK(0x3FF, I40E_GLCM_LAN_CACHESIZE_WAYS_SHIFT) +#define I40E_GLCM_PE_CACHESIZE 0x00138FE4 /* Reset: CORER */ +#define I40E_GLCM_PE_CACHESIZE_WORD_SIZE_SHIFT 0 +#define I40E_GLCM_PE_CACHESIZE_WORD_SIZE_MASK I40E_MASK(0xFFF, I40E_GLCM_PE_CACHESIZE_WORD_SIZE_SHIFT) +#define I40E_GLCM_PE_CACHESIZE_SETS_SHIFT 12 +#define I40E_GLCM_PE_CACHESIZE_SETS_MASK I40E_MASK(0xF, I40E_GLCM_PE_CACHESIZE_SETS_SHIFT) +#define I40E_GLCM_PE_CACHESIZE_WAYS_SHIFT 16 +#define I40E_GLCM_PE_CACHESIZE_WAYS_MASK I40E_MASK(0x1FF, I40E_GLCM_PE_CACHESIZE_WAYS_SHIFT) +#define I40E_PFCM_PE_ERRDATA 0x00138D00 /* Reset: PFR */ +#define I40E_PFCM_PE_ERRDATA_ERROR_CODE_SHIFT 0 +#define I40E_PFCM_PE_ERRDATA_ERROR_CODE_MASK I40E_MASK(0xF, I40E_PFCM_PE_ERRDATA_ERROR_CODE_SHIFT) +#define I40E_PFCM_PE_ERRDATA_Q_TYPE_SHIFT 4 +#define I40E_PFCM_PE_ERRDATA_Q_TYPE_MASK I40E_MASK(0x7, I40E_PFCM_PE_ERRDATA_Q_TYPE_SHIFT) +#define I40E_PFCM_PE_ERRDATA_Q_NUM_SHIFT 8 +#define I40E_PFCM_PE_ERRDATA_Q_NUM_MASK I40E_MASK(0x3FFFF, I40E_PFCM_PE_ERRDATA_Q_NUM_SHIFT) +#define I40E_PFCM_PE_ERRINFO 0x00138C80 /* Reset: PFR */ +#define I40E_PFCM_PE_ERRINFO_ERROR_VALID_SHIFT 0 +#define I40E_PFCM_PE_ERRINFO_ERROR_VALID_MASK I40E_MASK(0x1, I40E_PFCM_PE_ERRINFO_ERROR_VALID_SHIFT) +#define I40E_PFCM_PE_ERRINFO_ERROR_INST_SHIFT 4 +#define I40E_PFCM_PE_ERRINFO_ERROR_INST_MASK I40E_MASK(0x7, I40E_PFCM_PE_ERRINFO_ERROR_INST_SHIFT) +#define I40E_PFCM_PE_ERRINFO_DBL_ERROR_CNT_SHIFT 8 +#define I40E_PFCM_PE_ERRINFO_DBL_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_PFCM_PE_ERRINFO_DBL_ERROR_CNT_SHIFT) +#define I40E_PFCM_PE_ERRINFO_RLU_ERROR_CNT_SHIFT 16 +#define I40E_PFCM_PE_ERRINFO_RLU_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_PFCM_PE_ERRINFO_RLU_ERROR_CNT_SHIFT) +#define I40E_PFCM_PE_ERRINFO_RLS_ERROR_CNT_SHIFT 24 +#define I40E_PFCM_PE_ERRINFO_RLS_ERROR_CNT_MASK I40E_MASK(0xFF, I40E_PFCM_PE_ERRINFO_RLS_ERROR_CNT_SHIFT) + +#define I40E_PRTDCB_TFMSTC(_i) (0x000A0040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: CORER */ +#define I40E_PRTDCB_TFMSTC_MAX_INDEX 7 +#define I40E_PRTDCB_TFMSTC_MSTC_SHIFT 0 +#define I40E_PRTDCB_TFMSTC_MSTC_MASK I40E_MASK(0xFFFFF, I40E_PRTDCB_TFMSTC_MSTC_SHIFT) +#define I40E_GL_FWSTS_FWROWD_SHIFT 8 +#define I40E_GL_FWSTS_FWROWD_MASK I40E_MASK(0x1, I40E_GL_FWSTS_FWROWD_SHIFT) +#define I40E_GLFOC_CACHESIZE 0x000AA0DC /* Reset: CORER */ +#define I40E_GLFOC_CACHESIZE_WORD_SIZE_SHIFT 0 +#define I40E_GLFOC_CACHESIZE_WORD_SIZE_MASK I40E_MASK(0xFF, I40E_GLFOC_CACHESIZE_WORD_SIZE_SHIFT) +#define I40E_GLFOC_CACHESIZE_SETS_SHIFT 8 +#define I40E_GLFOC_CACHESIZE_SETS_MASK I40E_MASK(0xFFF, I40E_GLFOC_CACHESIZE_SETS_SHIFT) +#define I40E_GLFOC_CACHESIZE_WAYS_SHIFT 20 +#define I40E_GLFOC_CACHESIZE_WAYS_MASK I40E_MASK(0xF, I40E_GLFOC_CACHESIZE_WAYS_SHIFT) +#define I40E_GLHMC_APBVTINUSEBASE(_i) (0x000C4a00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_APBVTINUSEBASE_MAX_INDEX 15 +#define I40E_GLHMC_APBVTINUSEBASE_FPMAPBINUSEBASE_SHIFT 0 +#define I40E_GLHMC_APBVTINUSEBASE_FPMAPBINUSEBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_APBVTINUSEBASE_FPMAPBINUSEBASE_SHIFT) +#define I40E_GLHMC_CEQPART(_i) (0x001312C0 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_CEQPART_MAX_INDEX 15 +#define I40E_GLHMC_CEQPART_PMCEQBASE_SHIFT 0 +#define I40E_GLHMC_CEQPART_PMCEQBASE_MASK I40E_MASK(0xFF, I40E_GLHMC_CEQPART_PMCEQBASE_SHIFT) +#define I40E_GLHMC_CEQPART_PMCEQSIZE_SHIFT 16 +#define I40E_GLHMC_CEQPART_PMCEQSIZE_MASK I40E_MASK(0x1FF, I40E_GLHMC_CEQPART_PMCEQSIZE_SHIFT) +#define I40E_GLHMC_DBCQMAX 0x000C20F0 /* Reset: CORER */ +#define I40E_GLHMC_DBCQMAX_GLHMC_DBCQMAX_SHIFT 0 +#define I40E_GLHMC_DBCQMAX_GLHMC_DBCQMAX_MASK I40E_MASK(0x3FFFF, I40E_GLHMC_DBCQMAX_GLHMC_DBCQMAX_SHIFT) +#define I40E_GLHMC_DBCQPART(_i) (0x00131240 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_DBCQPART_MAX_INDEX 15 +#define I40E_GLHMC_DBCQPART_PMDBCQBASE_SHIFT 0 +#define I40E_GLHMC_DBCQPART_PMDBCQBASE_MASK I40E_MASK(0x3FFF, I40E_GLHMC_DBCQPART_PMDBCQBASE_SHIFT) +#define I40E_GLHMC_DBCQPART_PMDBCQSIZE_SHIFT 16 +#define I40E_GLHMC_DBCQPART_PMDBCQSIZE_MASK I40E_MASK(0x7FFF, I40E_GLHMC_DBCQPART_PMDBCQSIZE_SHIFT) +#define I40E_GLHMC_DBQPMAX 0x000C20EC /* Reset: CORER */ +#define I40E_GLHMC_DBQPMAX_GLHMC_DBQPMAX_SHIFT 0 +#define I40E_GLHMC_DBQPMAX_GLHMC_DBQPMAX_MASK I40E_MASK(0x7FFFF, I40E_GLHMC_DBQPMAX_GLHMC_DBQPMAX_SHIFT) +#define I40E_GLHMC_DBQPPART(_i) (0x00138D80 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_DBQPPART_MAX_INDEX 15 +#define I40E_GLHMC_DBQPPART_PMDBQPBASE_SHIFT 0 +#define I40E_GLHMC_DBQPPART_PMDBQPBASE_MASK I40E_MASK(0x3FFF, I40E_GLHMC_DBQPPART_PMDBQPBASE_SHIFT) +#define I40E_GLHMC_DBQPPART_PMDBQPSIZE_SHIFT 16 +#define I40E_GLHMC_DBQPPART_PMDBQPSIZE_MASK I40E_MASK(0x7FFF, I40E_GLHMC_DBQPPART_PMDBQPSIZE_SHIFT) +#define I40E_GLHMC_PEARPBASE(_i) (0x000C4800 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEARPBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEARPBASE_FPMPEARPBASE_SHIFT 0 +#define I40E_GLHMC_PEARPBASE_FPMPEARPBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEARPBASE_FPMPEARPBASE_SHIFT) +#define I40E_GLHMC_PEARPCNT(_i) (0x000C4900 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEARPCNT_MAX_INDEX 15 +#define I40E_GLHMC_PEARPCNT_FPMPEARPCNT_SHIFT 0 +#define I40E_GLHMC_PEARPCNT_FPMPEARPCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEARPCNT_FPMPEARPCNT_SHIFT) +#define I40E_GLHMC_PEARPMAX 0x000C2038 /* Reset: CORER */ +#define I40E_GLHMC_PEARPMAX_PMPEARPMAX_SHIFT 0 +#define I40E_GLHMC_PEARPMAX_PMPEARPMAX_MASK I40E_MASK(0x1FFFF, I40E_GLHMC_PEARPMAX_PMPEARPMAX_SHIFT) +#define I40E_GLHMC_PEARPOBJSZ 0x000C2034 /* Reset: CORER */ +#define I40E_GLHMC_PEARPOBJSZ_PMPEARPOBJSZ_SHIFT 0 +#define I40E_GLHMC_PEARPOBJSZ_PMPEARPOBJSZ_MASK I40E_MASK(0x7, I40E_GLHMC_PEARPOBJSZ_PMPEARPOBJSZ_SHIFT) +#define I40E_GLHMC_PECQBASE(_i) (0x000C4200 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PECQBASE_MAX_INDEX 15 +#define I40E_GLHMC_PECQBASE_FPMPECQBASE_SHIFT 0 +#define I40E_GLHMC_PECQBASE_FPMPECQBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PECQBASE_FPMPECQBASE_SHIFT) +#define I40E_GLHMC_PECQCNT(_i) (0x000C4300 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PECQCNT_MAX_INDEX 15 +#define I40E_GLHMC_PECQCNT_FPMPECQCNT_SHIFT 0 +#define I40E_GLHMC_PECQCNT_FPMPECQCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PECQCNT_FPMPECQCNT_SHIFT) +#define I40E_GLHMC_PECQOBJSZ 0x000C2020 /* Reset: CORER */ +#define I40E_GLHMC_PECQOBJSZ_PMPECQOBJSZ_SHIFT 0 +#define I40E_GLHMC_PECQOBJSZ_PMPECQOBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PECQOBJSZ_PMPECQOBJSZ_SHIFT) +#define I40E_GLHMC_PEHTCNT(_i) (0x000C4700 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEHTCNT_MAX_INDEX 15 +#define I40E_GLHMC_PEHTCNT_FPMPEHTCNT_SHIFT 0 +#define I40E_GLHMC_PEHTCNT_FPMPEHTCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEHTCNT_FPMPEHTCNT_SHIFT) +#define I40E_GLHMC_PEHTEBASE(_i) (0x000C4600 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEHTEBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEHTEBASE_FPMPEHTEBASE_SHIFT 0 +#define I40E_GLHMC_PEHTEBASE_FPMPEHTEBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEHTEBASE_FPMPEHTEBASE_SHIFT) +#define I40E_GLHMC_PEHTEOBJSZ 0x000C202c /* Reset: CORER */ +#define I40E_GLHMC_PEHTEOBJSZ_PMPEHTEOBJSZ_SHIFT 0 +#define I40E_GLHMC_PEHTEOBJSZ_PMPEHTEOBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PEHTEOBJSZ_PMPEHTEOBJSZ_SHIFT) +#define I40E_GLHMC_PEHTMAX 0x000C2030 /* Reset: CORER */ +#define I40E_GLHMC_PEHTMAX_PMPEHTMAX_SHIFT 0 +#define I40E_GLHMC_PEHTMAX_PMPEHTMAX_MASK I40E_MASK(0x1FFFFF, I40E_GLHMC_PEHTMAX_PMPEHTMAX_SHIFT) +#define I40E_GLHMC_PEMRBASE(_i) (0x000C4c00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEMRBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEMRBASE_FPMPEMRBASE_SHIFT 0 +#define I40E_GLHMC_PEMRBASE_FPMPEMRBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEMRBASE_FPMPEMRBASE_SHIFT) +#define I40E_GLHMC_PEMRCNT(_i) (0x000C4d00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEMRCNT_MAX_INDEX 15 +#define I40E_GLHMC_PEMRCNT_FPMPEMRSZ_SHIFT 0 +#define I40E_GLHMC_PEMRCNT_FPMPEMRSZ_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEMRCNT_FPMPEMRSZ_SHIFT) +#define I40E_GLHMC_PEMRMAX 0x000C2040 /* Reset: CORER */ +#define I40E_GLHMC_PEMRMAX_PMPEMRMAX_SHIFT 0 +#define I40E_GLHMC_PEMRMAX_PMPEMRMAX_MASK I40E_MASK(0x7FFFFF, I40E_GLHMC_PEMRMAX_PMPEMRMAX_SHIFT) +#define I40E_GLHMC_PEMROBJSZ 0x000C203c /* Reset: CORER */ +#define I40E_GLHMC_PEMROBJSZ_PMPEMROBJSZ_SHIFT 0 +#define I40E_GLHMC_PEMROBJSZ_PMPEMROBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PEMROBJSZ_PMPEMROBJSZ_SHIFT) +#define I40E_GLHMC_PEPBLBASE(_i) (0x000C5800 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEPBLBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEPBLBASE_FPMPEPBLBASE_SHIFT 0 +#define I40E_GLHMC_PEPBLBASE_FPMPEPBLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEPBLBASE_FPMPEPBLBASE_SHIFT) +#define I40E_GLHMC_PEPBLCNT(_i) (0x000C5900 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEPBLCNT_MAX_INDEX 15 +#define I40E_GLHMC_PEPBLCNT_FPMPEPBLCNT_SHIFT 0 +#define I40E_GLHMC_PEPBLCNT_FPMPEPBLCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEPBLCNT_FPMPEPBLCNT_SHIFT) +#define I40E_GLHMC_PEPBLMAX 0x000C206c /* Reset: CORER */ +#define I40E_GLHMC_PEPBLMAX_PMPEPBLMAX_SHIFT 0 +#define I40E_GLHMC_PEPBLMAX_PMPEPBLMAX_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEPBLMAX_PMPEPBLMAX_SHIFT) +#define I40E_GLHMC_PEPFFIRSTSD 0x000C20E4 /* Reset: CORER */ +#define I40E_GLHMC_PEPFFIRSTSD_GLHMC_PEPFFIRSTSD_SHIFT 0 +#define I40E_GLHMC_PEPFFIRSTSD_GLHMC_PEPFFIRSTSD_MASK I40E_MASK(0xFFF, I40E_GLHMC_PEPFFIRSTSD_GLHMC_PEPFFIRSTSD_SHIFT) +#define I40E_GLHMC_PEQ1BASE(_i) (0x000C5200 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEQ1BASE_MAX_INDEX 15 +#define I40E_GLHMC_PEQ1BASE_FPMPEQ1BASE_SHIFT 0 +#define I40E_GLHMC_PEQ1BASE_FPMPEQ1BASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEQ1BASE_FPMPEQ1BASE_SHIFT) +#define I40E_GLHMC_PEQ1CNT(_i) (0x000C5300 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEQ1CNT_MAX_INDEX 15 +#define I40E_GLHMC_PEQ1CNT_FPMPEQ1CNT_SHIFT 0 +#define I40E_GLHMC_PEQ1CNT_FPMPEQ1CNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEQ1CNT_FPMPEQ1CNT_SHIFT) +#define I40E_GLHMC_PEQ1FLBASE(_i) (0x000C5400 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEQ1FLBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEQ1FLBASE_FPMPEQ1FLBASE_SHIFT 0 +#define I40E_GLHMC_PEQ1FLBASE_FPMPEQ1FLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEQ1FLBASE_FPMPEQ1FLBASE_SHIFT) +#define I40E_GLHMC_PEQ1FLMAX 0x000C2058 /* Reset: CORER */ +#define I40E_GLHMC_PEQ1FLMAX_PMPEQ1FLMAX_SHIFT 0 +#define I40E_GLHMC_PEQ1FLMAX_PMPEQ1FLMAX_MASK I40E_MASK(0x3FFFFFF, I40E_GLHMC_PEQ1FLMAX_PMPEQ1FLMAX_SHIFT) +#define I40E_GLHMC_PEQ1MAX 0x000C2054 /* Reset: CORER */ +#define I40E_GLHMC_PEQ1MAX_PMPEQ1MAX_SHIFT 0 +#define I40E_GLHMC_PEQ1MAX_PMPEQ1MAX_MASK I40E_MASK(0x3FFFFFF, I40E_GLHMC_PEQ1MAX_PMPEQ1MAX_SHIFT) +#define I40E_GLHMC_PEQ1OBJSZ 0x000C2050 /* Reset: CORER */ +#define I40E_GLHMC_PEQ1OBJSZ_PMPEQ1OBJSZ_SHIFT 0 +#define I40E_GLHMC_PEQ1OBJSZ_PMPEQ1OBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PEQ1OBJSZ_PMPEQ1OBJSZ_SHIFT) +#define I40E_GLHMC_PEQPBASE(_i) (0x000C4000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEQPBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEQPBASE_FPMPEQPBASE_SHIFT 0 +#define I40E_GLHMC_PEQPBASE_FPMPEQPBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEQPBASE_FPMPEQPBASE_SHIFT) +#define I40E_GLHMC_PEQPCNT(_i) (0x000C4100 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEQPCNT_MAX_INDEX 15 +#define I40E_GLHMC_PEQPCNT_FPMPEQPCNT_SHIFT 0 +#define I40E_GLHMC_PEQPCNT_FPMPEQPCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEQPCNT_FPMPEQPCNT_SHIFT) +#define I40E_GLHMC_PEQPOBJSZ 0x000C201c /* Reset: CORER */ +#define I40E_GLHMC_PEQPOBJSZ_PMPEQPOBJSZ_SHIFT 0 +#define I40E_GLHMC_PEQPOBJSZ_PMPEQPOBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PEQPOBJSZ_PMPEQPOBJSZ_SHIFT) +#define I40E_GLHMC_PESRQBASE(_i) (0x000C4400 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PESRQBASE_MAX_INDEX 15 +#define I40E_GLHMC_PESRQBASE_FPMPESRQBASE_SHIFT 0 +#define I40E_GLHMC_PESRQBASE_FPMPESRQBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PESRQBASE_FPMPESRQBASE_SHIFT) +#define I40E_GLHMC_PESRQCNT(_i) (0x000C4500 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PESRQCNT_MAX_INDEX 15 +#define I40E_GLHMC_PESRQCNT_FPMPESRQCNT_SHIFT 0 +#define I40E_GLHMC_PESRQCNT_FPMPESRQCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PESRQCNT_FPMPESRQCNT_SHIFT) +#define I40E_GLHMC_PESRQMAX 0x000C2028 /* Reset: CORER */ +#define I40E_GLHMC_PESRQMAX_PMPESRQMAX_SHIFT 0 +#define I40E_GLHMC_PESRQMAX_PMPESRQMAX_MASK I40E_MASK(0xFFFF, I40E_GLHMC_PESRQMAX_PMPESRQMAX_SHIFT) +#define I40E_GLHMC_PESRQOBJSZ 0x000C2024 /* Reset: CORER */ +#define I40E_GLHMC_PESRQOBJSZ_PMPESRQOBJSZ_SHIFT 0 +#define I40E_GLHMC_PESRQOBJSZ_PMPESRQOBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PESRQOBJSZ_PMPESRQOBJSZ_SHIFT) +#define I40E_GLHMC_PETIMERBASE(_i) (0x000C5A00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PETIMERBASE_MAX_INDEX 15 +#define I40E_GLHMC_PETIMERBASE_FPMPETIMERBASE_SHIFT 0 +#define I40E_GLHMC_PETIMERBASE_FPMPETIMERBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PETIMERBASE_FPMPETIMERBASE_SHIFT) +#define I40E_GLHMC_PETIMERCNT(_i) (0x000C5B00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PETIMERCNT_MAX_INDEX 15 +#define I40E_GLHMC_PETIMERCNT_FPMPETIMERCNT_SHIFT 0 +#define I40E_GLHMC_PETIMERCNT_FPMPETIMERCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PETIMERCNT_FPMPETIMERCNT_SHIFT) +#define I40E_GLHMC_PETIMERMAX 0x000C2084 /* Reset: CORER */ +#define I40E_GLHMC_PETIMERMAX_PMPETIMERMAX_SHIFT 0 +#define I40E_GLHMC_PETIMERMAX_PMPETIMERMAX_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PETIMERMAX_PMPETIMERMAX_SHIFT) +#define I40E_GLHMC_PETIMEROBJSZ 0x000C2080 /* Reset: CORER */ +#define I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_SHIFT 0 +#define I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PETIMEROBJSZ_PMPETIMEROBJSZ_SHIFT) +#define I40E_GLHMC_PEXFBASE(_i) (0x000C4e00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEXFBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEXFBASE_FPMPEXFBASE_SHIFT 0 +#define I40E_GLHMC_PEXFBASE_FPMPEXFBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEXFBASE_FPMPEXFBASE_SHIFT) +#define I40E_GLHMC_PEXFCNT(_i) (0x000C4f00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEXFCNT_MAX_INDEX 15 +#define I40E_GLHMC_PEXFCNT_FPMPEXFCNT_SHIFT 0 +#define I40E_GLHMC_PEXFCNT_FPMPEXFCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_PEXFCNT_FPMPEXFCNT_SHIFT) +#define I40E_GLHMC_PEXFFLBASE(_i) (0x000C5000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PEXFFLBASE_MAX_INDEX 15 +#define I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_SHIFT 0 +#define I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_PEXFFLBASE_FPMPEXFFLBASE_SHIFT) +#define I40E_GLHMC_PEXFFLMAX 0x000C204c /* Reset: CORER */ +#define I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_SHIFT 0 +#define I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_MASK I40E_MASK(0x1FFFFFF, I40E_GLHMC_PEXFFLMAX_PMPEXFFLMAX_SHIFT) +#define I40E_GLHMC_PEXFMAX 0x000C2048 /* Reset: CORER */ +#define I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT 0 +#define I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK I40E_MASK(0x3FFFFFF, I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT) +#define I40E_GLHMC_PEXFOBJSZ 0x000C2044 /* Reset: CORER */ +#define I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_SHIFT 0 +#define I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_MASK I40E_MASK(0xF, I40E_GLHMC_PEXFOBJSZ_PMPEXFOBJSZ_SHIFT) +#define I40E_GLHMC_PFPESDPART(_i) (0x000C0880 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLHMC_PFPESDPART_MAX_INDEX 15 +#define I40E_GLHMC_PFPESDPART_PMSDBASE_SHIFT 0 +#define I40E_GLHMC_PFPESDPART_PMSDBASE_MASK I40E_MASK(0xFFF, I40E_GLHMC_PFPESDPART_PMSDBASE_SHIFT) +#define I40E_GLHMC_PFPESDPART_PMSDSIZE_SHIFT 16 +#define I40E_GLHMC_PFPESDPART_PMSDSIZE_MASK I40E_MASK(0x1FFF, I40E_GLHMC_PFPESDPART_PMSDSIZE_SHIFT) +#define I40E_GLHMC_VFAPBVTINUSEBASE(_i) (0x000Cca00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFAPBVTINUSEBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFAPBVTINUSEBASE_FPMAPBINUSEBASE_SHIFT 0 +#define I40E_GLHMC_VFAPBVTINUSEBASE_FPMAPBINUSEBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFAPBVTINUSEBASE_FPMAPBINUSEBASE_SHIFT) +#define I40E_GLHMC_VFCEQPART(_i) (0x00132240 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFCEQPART_MAX_INDEX 31 +#define I40E_GLHMC_VFCEQPART_PMCEQBASE_SHIFT 0 +#define I40E_GLHMC_VFCEQPART_PMCEQBASE_MASK I40E_MASK(0xFF, I40E_GLHMC_VFCEQPART_PMCEQBASE_SHIFT) +#define I40E_GLHMC_VFCEQPART_PMCEQSIZE_SHIFT 16 +#define I40E_GLHMC_VFCEQPART_PMCEQSIZE_MASK I40E_MASK(0x1FF, I40E_GLHMC_VFCEQPART_PMCEQSIZE_SHIFT) +#define I40E_GLHMC_VFDBCQPART(_i) (0x00132140 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFDBCQPART_MAX_INDEX 31 +#define I40E_GLHMC_VFDBCQPART_PMDBCQBASE_SHIFT 0 +#define I40E_GLHMC_VFDBCQPART_PMDBCQBASE_MASK I40E_MASK(0x3FFF, I40E_GLHMC_VFDBCQPART_PMDBCQBASE_SHIFT) +#define I40E_GLHMC_VFDBCQPART_PMDBCQSIZE_SHIFT 16 +#define I40E_GLHMC_VFDBCQPART_PMDBCQSIZE_MASK I40E_MASK(0x7FFF, I40E_GLHMC_VFDBCQPART_PMDBCQSIZE_SHIFT) +#define I40E_GLHMC_VFDBQPPART(_i) (0x00138E00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFDBQPPART_MAX_INDEX 31 +#define I40E_GLHMC_VFDBQPPART_PMDBQPBASE_SHIFT 0 +#define I40E_GLHMC_VFDBQPPART_PMDBQPBASE_MASK I40E_MASK(0x3FFF, I40E_GLHMC_VFDBQPPART_PMDBQPBASE_SHIFT) +#define I40E_GLHMC_VFDBQPPART_PMDBQPSIZE_SHIFT 16 +#define I40E_GLHMC_VFDBQPPART_PMDBQPSIZE_MASK I40E_MASK(0x7FFF, I40E_GLHMC_VFDBQPPART_PMDBQPSIZE_SHIFT) +#define I40E_GLHMC_VFFSIAVBASE(_i) (0x000Cd600 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFFSIAVBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFFSIAVBASE_FPMFSIAVBASE_SHIFT 0 +#define I40E_GLHMC_VFFSIAVBASE_FPMFSIAVBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFFSIAVBASE_FPMFSIAVBASE_SHIFT) +#define I40E_GLHMC_VFFSIAVCNT(_i) (0x000Cd700 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFFSIAVCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFFSIAVCNT_FPMFSIAVCNT_SHIFT 0 +#define I40E_GLHMC_VFFSIAVCNT_FPMFSIAVCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFFSIAVCNT_FPMFSIAVCNT_SHIFT) +#define I40E_GLHMC_VFPDINV(_i) (0x000C8300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPDINV_MAX_INDEX 31 +#define I40E_GLHMC_VFPDINV_PMSDIDX_SHIFT 0 +#define I40E_GLHMC_VFPDINV_PMSDIDX_MASK I40E_MASK(0xFFF, I40E_GLHMC_VFPDINV_PMSDIDX_SHIFT) +#define I40E_GLHMC_VFPDINV_PMSDPARTSEL_SHIFT 15 +#define I40E_GLHMC_VFPDINV_PMSDPARTSEL_MASK I40E_MASK(0x1, I40E_GLHMC_VFPDINV_PMSDPARTSEL_SHIFT) +#define I40E_GLHMC_VFPDINV_PMPDIDX_SHIFT 16 +#define I40E_GLHMC_VFPDINV_PMPDIDX_MASK I40E_MASK(0x1FF, I40E_GLHMC_VFPDINV_PMPDIDX_SHIFT) +#define I40E_GLHMC_VFPEARPBASE(_i) (0x000Cc800 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEARPBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEARPBASE_FPMPEARPBASE_SHIFT 0 +#define I40E_GLHMC_VFPEARPBASE_FPMPEARPBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEARPBASE_FPMPEARPBASE_SHIFT) +#define I40E_GLHMC_VFPEARPCNT(_i) (0x000Cc900 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEARPCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEARPCNT_FPMPEARPCNT_SHIFT 0 +#define I40E_GLHMC_VFPEARPCNT_FPMPEARPCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEARPCNT_FPMPEARPCNT_SHIFT) +#define I40E_GLHMC_VFPECQBASE(_i) (0x000Cc200 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPECQBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPECQBASE_FPMPECQBASE_SHIFT 0 +#define I40E_GLHMC_VFPECQBASE_FPMPECQBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPECQBASE_FPMPECQBASE_SHIFT) +#define I40E_GLHMC_VFPECQCNT(_i) (0x000Cc300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPECQCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPECQCNT_FPMPECQCNT_SHIFT 0 +#define I40E_GLHMC_VFPECQCNT_FPMPECQCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPECQCNT_FPMPECQCNT_SHIFT) +#define I40E_GLHMC_VFPEHTCNT(_i) (0x000Cc700 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEHTCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEHTCNT_FPMPEHTCNT_SHIFT 0 +#define I40E_GLHMC_VFPEHTCNT_FPMPEHTCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEHTCNT_FPMPEHTCNT_SHIFT) +#define I40E_GLHMC_VFPEHTEBASE(_i) (0x000Cc600 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEHTEBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEHTEBASE_FPMPEHTEBASE_SHIFT 0 +#define I40E_GLHMC_VFPEHTEBASE_FPMPEHTEBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEHTEBASE_FPMPEHTEBASE_SHIFT) +#define I40E_GLHMC_VFPEMRBASE(_i) (0x000Ccc00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEMRBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEMRBASE_FPMPEMRBASE_SHIFT 0 +#define I40E_GLHMC_VFPEMRBASE_FPMPEMRBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEMRBASE_FPMPEMRBASE_SHIFT) +#define I40E_GLHMC_VFPEMRCNT(_i) (0x000Ccd00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEMRCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEMRCNT_FPMPEMRSZ_SHIFT 0 +#define I40E_GLHMC_VFPEMRCNT_FPMPEMRSZ_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEMRCNT_FPMPEMRSZ_SHIFT) +#define I40E_GLHMC_VFPEPBLBASE(_i) (0x000Cd800 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEPBLBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEPBLBASE_FPMPEPBLBASE_SHIFT 0 +#define I40E_GLHMC_VFPEPBLBASE_FPMPEPBLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEPBLBASE_FPMPEPBLBASE_SHIFT) +#define I40E_GLHMC_VFPEPBLCNT(_i) (0x000Cd900 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEPBLCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEPBLCNT_FPMPEPBLCNT_SHIFT 0 +#define I40E_GLHMC_VFPEPBLCNT_FPMPEPBLCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEPBLCNT_FPMPEPBLCNT_SHIFT) +#define I40E_GLHMC_VFPEQ1BASE(_i) (0x000Cd200 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEQ1BASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEQ1BASE_FPMPEQ1BASE_SHIFT 0 +#define I40E_GLHMC_VFPEQ1BASE_FPMPEQ1BASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEQ1BASE_FPMPEQ1BASE_SHIFT) +#define I40E_GLHMC_VFPEQ1CNT(_i) (0x000Cd300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEQ1CNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEQ1CNT_FPMPEQ1CNT_SHIFT 0 +#define I40E_GLHMC_VFPEQ1CNT_FPMPEQ1CNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEQ1CNT_FPMPEQ1CNT_SHIFT) +#define I40E_GLHMC_VFPEQ1FLBASE(_i) (0x000Cd400 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEQ1FLBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEQ1FLBASE_FPMPEQ1FLBASE_SHIFT 0 +#define I40E_GLHMC_VFPEQ1FLBASE_FPMPEQ1FLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEQ1FLBASE_FPMPEQ1FLBASE_SHIFT) +#define I40E_GLHMC_VFPEQPBASE(_i) (0x000Cc000 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEQPBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEQPBASE_FPMPEQPBASE_SHIFT 0 +#define I40E_GLHMC_VFPEQPBASE_FPMPEQPBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEQPBASE_FPMPEQPBASE_SHIFT) +#define I40E_GLHMC_VFPEQPCNT(_i) (0x000Cc100 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEQPCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEQPCNT_FPMPEQPCNT_SHIFT 0 +#define I40E_GLHMC_VFPEQPCNT_FPMPEQPCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEQPCNT_FPMPEQPCNT_SHIFT) +#define I40E_GLHMC_VFPESRQBASE(_i) (0x000Cc400 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPESRQBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPESRQBASE_FPMPESRQBASE_SHIFT 0 +#define I40E_GLHMC_VFPESRQBASE_FPMPESRQBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPESRQBASE_FPMPESRQBASE_SHIFT) +#define I40E_GLHMC_VFPESRQCNT(_i) (0x000Cc500 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPESRQCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPESRQCNT_FPMPESRQCNT_SHIFT 0 +#define I40E_GLHMC_VFPESRQCNT_FPMPESRQCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPESRQCNT_FPMPESRQCNT_SHIFT) +#define I40E_GLHMC_VFPETIMERBASE(_i) (0x000CDA00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPETIMERBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPETIMERBASE_FPMPETIMERBASE_SHIFT 0 +#define I40E_GLHMC_VFPETIMERBASE_FPMPETIMERBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPETIMERBASE_FPMPETIMERBASE_SHIFT) +#define I40E_GLHMC_VFPETIMERCNT(_i) (0x000CDB00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPETIMERCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_SHIFT 0 +#define I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPETIMERCNT_FPMPETIMERCNT_SHIFT) +#define I40E_GLHMC_VFPEXFBASE(_i) (0x000Cce00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEXFBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_SHIFT 0 +#define I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEXFBASE_FPMPEXFBASE_SHIFT) +#define I40E_GLHMC_VFPEXFCNT(_i) (0x000Ccf00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEXFCNT_MAX_INDEX 31 +#define I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_SHIFT 0 +#define I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_MASK I40E_MASK(0x1FFFFFFF, I40E_GLHMC_VFPEXFCNT_FPMPEXFCNT_SHIFT) +#define I40E_GLHMC_VFPEXFFLBASE(_i) (0x000Cd000 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFPEXFFLBASE_MAX_INDEX 31 +#define I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_SHIFT 0 +#define I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_MASK I40E_MASK(0xFFFFFF, I40E_GLHMC_VFPEXFFLBASE_FPMPEXFFLBASE_SHIFT) +#define I40E_GLHMC_VFSDPART(_i) (0x000C8800 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLHMC_VFSDPART_MAX_INDEX 31 +#define I40E_GLHMC_VFSDPART_PMSDBASE_SHIFT 0 +#define I40E_GLHMC_VFSDPART_PMSDBASE_MASK I40E_MASK(0xFFF, I40E_GLHMC_VFSDPART_PMSDBASE_SHIFT) +#define I40E_GLHMC_VFSDPART_PMSDSIZE_SHIFT 16 +#define I40E_GLHMC_VFSDPART_PMSDSIZE_MASK I40E_MASK(0x1FFF, I40E_GLHMC_VFSDPART_PMSDSIZE_SHIFT) +#define I40E_GLPBLOC_CACHESIZE 0x000A80BC /* Reset: CORER */ +#define I40E_GLPBLOC_CACHESIZE_WORD_SIZE_SHIFT 0 +#define I40E_GLPBLOC_CACHESIZE_WORD_SIZE_MASK I40E_MASK(0xFF, I40E_GLPBLOC_CACHESIZE_WORD_SIZE_SHIFT) +#define I40E_GLPBLOC_CACHESIZE_SETS_SHIFT 8 +#define I40E_GLPBLOC_CACHESIZE_SETS_MASK I40E_MASK(0xFFF, I40E_GLPBLOC_CACHESIZE_SETS_SHIFT) +#define I40E_GLPBLOC_CACHESIZE_WAYS_SHIFT 20 +#define I40E_GLPBLOC_CACHESIZE_WAYS_MASK I40E_MASK(0xF, I40E_GLPBLOC_CACHESIZE_WAYS_SHIFT) +#define I40E_GLPDOC_CACHESIZE 0x000D0088 /* Reset: CORER */ +#define I40E_GLPDOC_CACHESIZE_WORD_SIZE_SHIFT 0 +#define I40E_GLPDOC_CACHESIZE_WORD_SIZE_MASK I40E_MASK(0xFF, I40E_GLPDOC_CACHESIZE_WORD_SIZE_SHIFT) +#define I40E_GLPDOC_CACHESIZE_SETS_SHIFT 8 +#define I40E_GLPDOC_CACHESIZE_SETS_MASK I40E_MASK(0xFFF, I40E_GLPDOC_CACHESIZE_SETS_SHIFT) +#define I40E_GLPDOC_CACHESIZE_WAYS_SHIFT 20 +#define I40E_GLPDOC_CACHESIZE_WAYS_MASK I40E_MASK(0xF, I40E_GLPDOC_CACHESIZE_WAYS_SHIFT) +#define I40E_GLPEOC_CACHESIZE 0x000A60E8 /* Reset: CORER */ +#define I40E_GLPEOC_CACHESIZE_WORD_SIZE_SHIFT 0 +#define I40E_GLPEOC_CACHESIZE_WORD_SIZE_MASK I40E_MASK(0xFF, I40E_GLPEOC_CACHESIZE_WORD_SIZE_SHIFT) +#define I40E_GLPEOC_CACHESIZE_SETS_SHIFT 8 +#define I40E_GLPEOC_CACHESIZE_SETS_MASK I40E_MASK(0xFFF, I40E_GLPEOC_CACHESIZE_SETS_SHIFT) +#define I40E_GLPEOC_CACHESIZE_WAYS_SHIFT 20 +#define I40E_GLPEOC_CACHESIZE_WAYS_MASK I40E_MASK(0xF, I40E_GLPEOC_CACHESIZE_WAYS_SHIFT) +#define I40E_PFHMC_PDINV_PMSDPARTSEL_SHIFT 15 +#define I40E_PFHMC_PDINV_PMSDPARTSEL_MASK I40E_MASK(0x1, I40E_PFHMC_PDINV_PMSDPARTSEL_SHIFT) +#define I40E_PFHMC_SDCMD_PMSDPARTSEL_SHIFT 15 +#define I40E_PFHMC_SDCMD_PMSDPARTSEL_MASK I40E_MASK(0x1, I40E_PFHMC_SDCMD_PMSDPARTSEL_SHIFT) +#define I40E_GL_PPRS_SPARE 0x000856E0 /* Reset: CORER */ +#define I40E_GL_PPRS_SPARE_GL_PPRS_SPARE_SHIFT 0 +#define I40E_GL_PPRS_SPARE_GL_PPRS_SPARE_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_PPRS_SPARE_GL_PPRS_SPARE_SHIFT) +#define I40E_GL_TLAN_SPARE 0x000E64E0 /* Reset: CORER */ +#define I40E_GL_TLAN_SPARE_GL_TLAN_SPARE_SHIFT 0 +#define I40E_GL_TLAN_SPARE_GL_TLAN_SPARE_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_TLAN_SPARE_GL_TLAN_SPARE_SHIFT) +#define I40E_GL_TUPM_SPARE 0x000a2230 /* Reset: CORER */ +#define I40E_GL_TUPM_SPARE_GL_TUPM_SPARE_SHIFT 0 +#define I40E_GL_TUPM_SPARE_GL_TUPM_SPARE_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_TUPM_SPARE_GL_TUPM_SPARE_SHIFT) +#define I40E_GLGEN_CAR_DEBUG 0x000B81C0 /* Reset: POR */ +#define I40E_GLGEN_CAR_DEBUG_CAR_UPPER_CORE_CLK_EN_SHIFT 0 +#define I40E_GLGEN_CAR_DEBUG_CAR_UPPER_CORE_CLK_EN_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_UPPER_CORE_CLK_EN_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_HIU_CLK_EN_SHIFT 1 +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_HIU_CLK_EN_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PCIE_HIU_CLK_EN_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PE_CLK_EN_SHIFT 2 +#define I40E_GLGEN_CAR_DEBUG_CAR_PE_CLK_EN_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PE_CLK_EN_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_PRIM_CLK_ACTIVE_SHIFT 3 +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_PRIM_CLK_ACTIVE_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PCIE_PRIM_CLK_ACTIVE_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CDC_PE_ACTIVE_SHIFT 4 +#define I40E_GLGEN_CAR_DEBUG_CDC_PE_ACTIVE_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CDC_PE_ACTIVE_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_PRST_RESET_N_SHIFT 5 +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_PRST_RESET_N_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_PRST_RESET_N_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_SCLR_RESET_N_SHIFT 6 +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_SCLR_RESET_N_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_SCLR_RESET_N_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_IB_RESET_N_SHIFT 7 +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_IB_RESET_N_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_IB_RESET_N_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_IMIB_RESET_N_SHIFT 8 +#define I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_IMIB_RESET_N_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_PCIE_RAW_IMIB_RESET_N_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_RAW_EMP_RESET_N_SHIFT 9 +#define I40E_GLGEN_CAR_DEBUG_CAR_RAW_EMP_RESET_N_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_RAW_EMP_RESET_N_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_RAW_GLOBAL_RESET_N_SHIFT 10 +#define I40E_GLGEN_CAR_DEBUG_CAR_RAW_GLOBAL_RESET_N_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_RAW_GLOBAL_RESET_N_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CAR_RAW_LAN_POWER_GOOD_SHIFT 11 +#define I40E_GLGEN_CAR_DEBUG_CAR_RAW_LAN_POWER_GOOD_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CAR_RAW_LAN_POWER_GOOD_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_CDC_IOSF_PRIMERY_RST_B_SHIFT 12 +#define I40E_GLGEN_CAR_DEBUG_CDC_IOSF_PRIMERY_RST_B_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_CDC_IOSF_PRIMERY_RST_B_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_GBE_GLOBALRST_B_SHIFT 13 +#define I40E_GLGEN_CAR_DEBUG_GBE_GLOBALRST_B_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_GBE_GLOBALRST_B_SHIFT) +#define I40E_GLGEN_CAR_DEBUG_FLEEP_AL_GLOBR_DONE_SHIFT 14 +#define I40E_GLGEN_CAR_DEBUG_FLEEP_AL_GLOBR_DONE_MASK I40E_MASK(0x1, I40E_GLGEN_CAR_DEBUG_FLEEP_AL_GLOBR_DONE_SHIFT) +#define I40E_GLGEN_MISC_SPARE 0x000880E0 /* Reset: POR */ +#define I40E_GLGEN_MISC_SPARE_GLGEN_MISC_SPARE_SHIFT 0 +#define I40E_GLGEN_MISC_SPARE_GLGEN_MISC_SPARE_MASK I40E_MASK(0xFFFFFFFF, I40E_GLGEN_MISC_SPARE_GLGEN_MISC_SPARE_SHIFT) +#define I40E_GL_UFUSE_SOC 0x000BE550 /* Reset: POR */ +#define I40E_GL_UFUSE_SOC_PORT_MODE_SHIFT 0 +#define I40E_GL_UFUSE_SOC_PORT_MODE_MASK I40E_MASK(0x3, I40E_GL_UFUSE_SOC_PORT_MODE_SHIFT) +#define I40E_GL_UFUSE_SOC_NIC_ID_SHIFT 2 +#define I40E_GL_UFUSE_SOC_NIC_ID_MASK I40E_MASK(0x1, I40E_GL_UFUSE_SOC_NIC_ID_SHIFT) +#define I40E_GL_UFUSE_SOC_SPARE_FUSES_SHIFT 3 +#define I40E_GL_UFUSE_SOC_SPARE_FUSES_MASK I40E_MASK(0x1FFF, I40E_GL_UFUSE_SOC_SPARE_FUSES_SHIFT) +#define I40E_PFINT_DYN_CTL0_WB_ON_ITR_SHIFT 30 +#define I40E_PFINT_DYN_CTL0_WB_ON_ITR_MASK I40E_MASK(0x1, I40E_PFINT_DYN_CTL0_WB_ON_ITR_SHIFT) +#define I40E_PFINT_DYN_CTLN_WB_ON_ITR_SHIFT 30 +#define I40E_PFINT_DYN_CTLN_WB_ON_ITR_MASK I40E_MASK(0x1, I40E_PFINT_DYN_CTLN_WB_ON_ITR_SHIFT) +#define I40E_VFINT_DYN_CTL0_WB_ON_ITR_SHIFT 30 +#define I40E_VFINT_DYN_CTL0_WB_ON_ITR_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTL0_WB_ON_ITR_SHIFT) +#define I40E_VFINT_DYN_CTLN_WB_ON_ITR_SHIFT 30 +#define I40E_VFINT_DYN_CTLN_WB_ON_ITR_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTLN_WB_ON_ITR_SHIFT) +#define I40E_VPLAN_QBASE(_VF) (0x00074800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VPLAN_QBASE_MAX_INDEX 127 +#define I40E_VPLAN_QBASE_VFFIRSTQ_SHIFT 0 +#define I40E_VPLAN_QBASE_VFFIRSTQ_MASK I40E_MASK(0x7FF, I40E_VPLAN_QBASE_VFFIRSTQ_SHIFT) +#define I40E_VPLAN_QBASE_VFNUMQ_SHIFT 11 +#define I40E_VPLAN_QBASE_VFNUMQ_MASK I40E_MASK(0xFF, I40E_VPLAN_QBASE_VFNUMQ_SHIFT) +#define I40E_VPLAN_QBASE_VFQTABLE_ENA_SHIFT 31 +#define I40E_VPLAN_QBASE_VFQTABLE_ENA_MASK I40E_MASK(0x1, I40E_VPLAN_QBASE_VFQTABLE_ENA_SHIFT) +#define I40E_PRTMAC_LINK_DOWN_COUNTER 0x001E2440 /* Reset: GLOBR */ +#define I40E_PRTMAC_LINK_DOWN_COUNTER_LINK_DOWN_COUNTER_SHIFT 0 +#define I40E_PRTMAC_LINK_DOWN_COUNTER_LINK_DOWN_COUNTER_MASK I40E_MASK(0xFFFF, I40E_PRTMAC_LINK_DOWN_COUNTER_LINK_DOWN_COUNTER_SHIFT) +#define I40E_GLNVM_AL_REQ 0x000B6164 /* Reset: POR */ +#define I40E_GLNVM_AL_REQ_POR_SHIFT 0 +#define I40E_GLNVM_AL_REQ_POR_MASK I40E_MASK(0x1, I40E_GLNVM_AL_REQ_POR_SHIFT) +#define I40E_GLNVM_AL_REQ_PCIE_IMIB_SHIFT 1 +#define I40E_GLNVM_AL_REQ_PCIE_IMIB_MASK I40E_MASK(0x1, I40E_GLNVM_AL_REQ_PCIE_IMIB_SHIFT) +#define I40E_GLNVM_AL_REQ_GLOBR_SHIFT 2 +#define I40E_GLNVM_AL_REQ_GLOBR_MASK I40E_MASK(0x1, I40E_GLNVM_AL_REQ_GLOBR_SHIFT) +#define I40E_GLNVM_AL_REQ_CORER_SHIFT 3 +#define I40E_GLNVM_AL_REQ_CORER_MASK I40E_MASK(0x1, I40E_GLNVM_AL_REQ_CORER_SHIFT) +#define I40E_GLNVM_AL_REQ_PE_SHIFT 4 +#define I40E_GLNVM_AL_REQ_PE_MASK I40E_MASK(0x1, I40E_GLNVM_AL_REQ_PE_SHIFT) +#define I40E_GLNVM_AL_REQ_PCIE_IMIB_ASSERT_SHIFT 5 +#define I40E_GLNVM_AL_REQ_PCIE_IMIB_ASSERT_MASK I40E_MASK(0x1, I40E_GLNVM_AL_REQ_PCIE_IMIB_ASSERT_SHIFT) +#define I40E_GLNVM_ALTIMERS 0x000B6140 /* Reset: POR */ +#define I40E_GLNVM_ALTIMERS_PCI_ALTIMER_SHIFT 0 +#define I40E_GLNVM_ALTIMERS_PCI_ALTIMER_MASK I40E_MASK(0xFFF, I40E_GLNVM_ALTIMERS_PCI_ALTIMER_SHIFT) +#define I40E_GLNVM_ALTIMERS_GEN_ALTIMER_SHIFT 12 +#define I40E_GLNVM_ALTIMERS_GEN_ALTIMER_MASK I40E_MASK(0xFFFFF, I40E_GLNVM_ALTIMERS_GEN_ALTIMER_SHIFT) +#define I40E_GLNVM_FLA 0x000B6108 /* Reset: POR */ +#define I40E_GLNVM_FLA_LOCKED_SHIFT 6 +#define I40E_GLNVM_FLA_LOCKED_MASK I40E_MASK(0x1, I40E_GLNVM_FLA_LOCKED_SHIFT) + +#define I40E_GLNVM_ULD 0x000B6008 /* Reset: POR */ +#define I40E_GLNVM_ULD_PCIER_DONE_SHIFT 0 +#define I40E_GLNVM_ULD_PCIER_DONE_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_PCIER_DONE_SHIFT) +#define I40E_GLNVM_ULD_PCIER_DONE_1_SHIFT 1 +#define I40E_GLNVM_ULD_PCIER_DONE_1_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_PCIER_DONE_1_SHIFT) +#define I40E_GLNVM_ULD_CORER_DONE_SHIFT 3 +#define I40E_GLNVM_ULD_CORER_DONE_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_CORER_DONE_SHIFT) +#define I40E_GLNVM_ULD_GLOBR_DONE_SHIFT 4 +#define I40E_GLNVM_ULD_GLOBR_DONE_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_GLOBR_DONE_SHIFT) +#define I40E_GLNVM_ULD_POR_DONE_SHIFT 5 +#define I40E_GLNVM_ULD_POR_DONE_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_POR_DONE_SHIFT) +#define I40E_GLNVM_ULD_POR_DONE_1_SHIFT 8 +#define I40E_GLNVM_ULD_POR_DONE_1_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_POR_DONE_1_SHIFT) +#define I40E_GLNVM_ULD_PCIER_DONE_2_SHIFT 9 +#define I40E_GLNVM_ULD_PCIER_DONE_2_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_PCIER_DONE_2_SHIFT) +#define I40E_GLNVM_ULD_PE_DONE_SHIFT 10 +#define I40E_GLNVM_ULD_PE_DONE_MASK I40E_MASK(0x1, I40E_GLNVM_ULD_PE_DONE_SHIFT) +#define I40E_GLNVM_ULT 0x000B6154 /* Reset: POR */ +#define I40E_GLNVM_ULT_CONF_PCIR_AE_SHIFT 0 +#define I40E_GLNVM_ULT_CONF_PCIR_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_PCIR_AE_SHIFT) +#define I40E_GLNVM_ULT_CONF_PCIRTL_AE_SHIFT 1 +#define I40E_GLNVM_ULT_CONF_PCIRTL_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_PCIRTL_AE_SHIFT) +#define I40E_GLNVM_ULT_RESERVED_1_SHIFT 2 +#define I40E_GLNVM_ULT_RESERVED_1_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_RESERVED_1_SHIFT) +#define I40E_GLNVM_ULT_CONF_CORE_AE_SHIFT 3 +#define I40E_GLNVM_ULT_CONF_CORE_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_CORE_AE_SHIFT) +#define I40E_GLNVM_ULT_CONF_GLOBAL_AE_SHIFT 4 +#define I40E_GLNVM_ULT_CONF_GLOBAL_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_GLOBAL_AE_SHIFT) +#define I40E_GLNVM_ULT_CONF_POR_AE_SHIFT 5 +#define I40E_GLNVM_ULT_CONF_POR_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_POR_AE_SHIFT) +#define I40E_GLNVM_ULT_RESERVED_2_SHIFT 6 +#define I40E_GLNVM_ULT_RESERVED_2_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_RESERVED_2_SHIFT) +#define I40E_GLNVM_ULT_RESERVED_3_SHIFT 7 +#define I40E_GLNVM_ULT_RESERVED_3_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_RESERVED_3_SHIFT) +#define I40E_GLNVM_ULT_CONF_EMP_AE_SHIFT 8 +#define I40E_GLNVM_ULT_CONF_EMP_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_EMP_AE_SHIFT) +#define I40E_GLNVM_ULT_CONF_PCIALT_AE_SHIFT 9 +#define I40E_GLNVM_ULT_CONF_PCIALT_AE_MASK I40E_MASK(0x1, I40E_GLNVM_ULT_CONF_PCIALT_AE_SHIFT) +#define I40E_GLNVM_ULT_RESERVED_4_SHIFT 10 +#define I40E_GLNVM_ULT_RESERVED_4_MASK I40E_MASK(0x3FFFFF, I40E_GLNVM_ULT_RESERVED_4_SHIFT) +#define I40E_MEM_INIT_DONE_STAT 0x000B615C /* Reset: POR */ +#define I40E_MEM_INIT_DONE_STAT_CMLAN_MEM_INIT_DONE_SHIFT 0 +#define I40E_MEM_INIT_DONE_STAT_CMLAN_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_CMLAN_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_PMAT_MEM_INIT_DONE_SHIFT 1 +#define I40E_MEM_INIT_DONE_STAT_PMAT_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_PMAT_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_RCU_MEM_INIT_DONE_SHIFT 2 +#define I40E_MEM_INIT_DONE_STAT_RCU_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_RCU_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_TDPU_MEM_INIT_DONE_SHIFT 3 +#define I40E_MEM_INIT_DONE_STAT_TDPU_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_TDPU_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_TLAN_MEM_INIT_DONE_SHIFT 4 +#define I40E_MEM_INIT_DONE_STAT_TLAN_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_TLAN_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_RLAN_MEM_INIT_DONE_SHIFT 5 +#define I40E_MEM_INIT_DONE_STAT_RLAN_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_RLAN_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_RDPU_MEM_INIT_DONE_SHIFT 6 +#define I40E_MEM_INIT_DONE_STAT_RDPU_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_RDPU_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_PPRS_MEM_INIT_DONE_SHIFT 7 +#define I40E_MEM_INIT_DONE_STAT_PPRS_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_PPRS_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_RPB_MEM_INIT_DONE_SHIFT 8 +#define I40E_MEM_INIT_DONE_STAT_RPB_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_RPB_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_TPB_MEM_INIT_DONE_SHIFT 9 +#define I40E_MEM_INIT_DONE_STAT_TPB_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_TPB_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_FOC_MEM_INIT_DONE_SHIFT 10 +#define I40E_MEM_INIT_DONE_STAT_FOC_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_FOC_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_TSCD_MEM_INIT_DONE_SHIFT 11 +#define I40E_MEM_INIT_DONE_STAT_TSCD_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_TSCD_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_TCB_MEM_INIT_DONE_SHIFT 12 +#define I40E_MEM_INIT_DONE_STAT_TCB_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_TCB_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_RCB_MEM_INIT_DONE_SHIFT 13 +#define I40E_MEM_INIT_DONE_STAT_RCB_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_RCB_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_WUC_MEM_INIT_DONE_SHIFT 14 +#define I40E_MEM_INIT_DONE_STAT_WUC_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_WUC_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_STAT_MEM_INIT_DONE_SHIFT 15 +#define I40E_MEM_INIT_DONE_STAT_STAT_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_STAT_MEM_INIT_DONE_SHIFT) +#define I40E_MEM_INIT_DONE_STAT_ITR_MEM_INIT_DONE_SHIFT 16 +#define I40E_MEM_INIT_DONE_STAT_ITR_MEM_INIT_DONE_MASK I40E_MASK(0x1, I40E_MEM_INIT_DONE_STAT_ITR_MEM_INIT_DONE_SHIFT) +#define I40E_MNGSB_DADD 0x000B7030 /* Reset: POR */ +#define I40E_MNGSB_DADD_ADDR_SHIFT 0 +#define I40E_MNGSB_DADD_ADDR_MASK I40E_MASK(0xFFFFFFFF, I40E_MNGSB_DADD_ADDR_SHIFT) +#define I40E_MNGSB_DCNT 0x000B7034 /* Reset: POR */ +#define I40E_MNGSB_DCNT_BYTE_CNT_SHIFT 0 +#define I40E_MNGSB_DCNT_BYTE_CNT_MASK I40E_MASK(0xFFFFFFFF, I40E_MNGSB_DCNT_BYTE_CNT_SHIFT) +#define I40E_MNGSB_MSGCTL 0x000B7020 /* Reset: POR */ +#define I40E_MNGSB_MSGCTL_HDR_DWS_SHIFT 0 +#define I40E_MNGSB_MSGCTL_HDR_DWS_MASK I40E_MASK(0x3, I40E_MNGSB_MSGCTL_HDR_DWS_SHIFT) +#define I40E_MNGSB_MSGCTL_EXP_RDW_SHIFT 8 +#define I40E_MNGSB_MSGCTL_EXP_RDW_MASK I40E_MASK(0x1FF, I40E_MNGSB_MSGCTL_EXP_RDW_SHIFT) +#define I40E_MNGSB_MSGCTL_MSG_MODE_SHIFT 26 +#define I40E_MNGSB_MSGCTL_MSG_MODE_MASK I40E_MASK(0x3, I40E_MNGSB_MSGCTL_MSG_MODE_SHIFT) +#define I40E_MNGSB_MSGCTL_TOKEN_MODE_SHIFT 28 +#define I40E_MNGSB_MSGCTL_TOKEN_MODE_MASK I40E_MASK(0x3, I40E_MNGSB_MSGCTL_TOKEN_MODE_SHIFT) +#define I40E_MNGSB_MSGCTL_BARCLR_SHIFT 30 +#define I40E_MNGSB_MSGCTL_BARCLR_MASK I40E_MASK(0x1, I40E_MNGSB_MSGCTL_BARCLR_SHIFT) +#define I40E_MNGSB_MSGCTL_CMDV_SHIFT 31 +#define I40E_MNGSB_MSGCTL_CMDV_MASK I40E_MASK(0x1, I40E_MNGSB_MSGCTL_CMDV_SHIFT) +#define I40E_MNGSB_RDATA 0x000B7300 /* Reset: POR */ +#define I40E_MNGSB_RDATA_DATA_SHIFT 0 +#define I40E_MNGSB_RDATA_DATA_MASK I40E_MASK(0xFFFFFFFF, I40E_MNGSB_RDATA_DATA_SHIFT) +#define I40E_MNGSB_RHDR0 0x000B72FC /* Reset: POR */ +#define I40E_MNGSB_RHDR0_DESTINATION_SHIFT 0 +#define I40E_MNGSB_RHDR0_DESTINATION_MASK I40E_MASK(0xFF, I40E_MNGSB_RHDR0_DESTINATION_SHIFT) +#define I40E_MNGSB_RHDR0_SOURCE_SHIFT 8 +#define I40E_MNGSB_RHDR0_SOURCE_MASK I40E_MASK(0xFF, I40E_MNGSB_RHDR0_SOURCE_SHIFT) +#define I40E_MNGSB_RHDR0_OPCODE_SHIFT 16 +#define I40E_MNGSB_RHDR0_OPCODE_MASK I40E_MASK(0xFF, I40E_MNGSB_RHDR0_OPCODE_SHIFT) +#define I40E_MNGSB_RHDR0_TAG_SHIFT 24 +#define I40E_MNGSB_RHDR0_TAG_MASK I40E_MASK(0x7, I40E_MNGSB_RHDR0_TAG_SHIFT) +#define I40E_MNGSB_RHDR0_RESPONSE_SHIFT 27 +#define I40E_MNGSB_RHDR0_RESPONSE_MASK I40E_MASK(0x7, I40E_MNGSB_RHDR0_RESPONSE_SHIFT) +#define I40E_MNGSB_RHDR0_EH_SHIFT 31 +#define I40E_MNGSB_RHDR0_EH_MASK I40E_MASK(0x1, I40E_MNGSB_RHDR0_EH_SHIFT) +#define I40E_MNGSB_RSPCTL 0x000B7024 /* Reset: POR */ +#define I40E_MNGSB_RSPCTL_DMA_MSG_DWORDS_SHIFT 0 +#define I40E_MNGSB_RSPCTL_DMA_MSG_DWORDS_MASK I40E_MASK(0x1FF, I40E_MNGSB_RSPCTL_DMA_MSG_DWORDS_SHIFT) +#define I40E_MNGSB_RSPCTL_RSP_MODE_SHIFT 26 +#define I40E_MNGSB_RSPCTL_RSP_MODE_MASK I40E_MASK(0x3, I40E_MNGSB_RSPCTL_RSP_MODE_SHIFT) +#define I40E_MNGSB_RSPCTL_RSP_BAD_LEN_SHIFT 30 +#define I40E_MNGSB_RSPCTL_RSP_BAD_LEN_MASK I40E_MASK(0x1, I40E_MNGSB_RSPCTL_RSP_BAD_LEN_SHIFT) +#define I40E_MNGSB_RSPCTL_RSP_ERR_SHIFT 31 +#define I40E_MNGSB_RSPCTL_RSP_ERR_MASK I40E_MASK(0x1, I40E_MNGSB_RSPCTL_RSP_ERR_SHIFT) +#define I40E_MNGSB_WDATA 0x000B7100 /* Reset: POR */ +#define I40E_MNGSB_WDATA_DATA_SHIFT 0 +#define I40E_MNGSB_WDATA_DATA_MASK I40E_MASK(0xFFFFFFFF, I40E_MNGSB_WDATA_DATA_SHIFT) +#define I40E_MNGSB_WHDR0 0x000B70F4 /* Reset: POR */ +#define I40E_MNGSB_WHDR0_RAW_DEST_SHIFT 0 +#define I40E_MNGSB_WHDR0_RAW_DEST_MASK I40E_MASK(0xFF, I40E_MNGSB_WHDR0_RAW_DEST_SHIFT) +#define I40E_MNGSB_WHDR0_DEST_SEL_SHIFT 12 +#define I40E_MNGSB_WHDR0_DEST_SEL_MASK I40E_MASK(0xF, I40E_MNGSB_WHDR0_DEST_SEL_SHIFT) +#define I40E_MNGSB_WHDR0_OPCODE_SEL_SHIFT 16 +#define I40E_MNGSB_WHDR0_OPCODE_SEL_MASK I40E_MASK(0xFF, I40E_MNGSB_WHDR0_OPCODE_SEL_SHIFT) +#define I40E_MNGSB_WHDR0_TAG_SHIFT 24 +#define I40E_MNGSB_WHDR0_TAG_MASK I40E_MASK(0x7F, I40E_MNGSB_WHDR0_TAG_SHIFT) +#define I40E_MNGSB_WHDR1 0x000B70F8 /* Reset: POR */ +#define I40E_MNGSB_WHDR1_ADDR_SHIFT 0 +#define I40E_MNGSB_WHDR1_ADDR_MASK I40E_MASK(0xFFFFFFFF, I40E_MNGSB_WHDR1_ADDR_SHIFT) +#define I40E_MNGSB_WHDR2 0x000B70FC /* Reset: POR */ +#define I40E_MNGSB_WHDR2_LENGTH_SHIFT 0 +#define I40E_MNGSB_WHDR2_LENGTH_MASK I40E_MASK(0xFFFFFFFF, I40E_MNGSB_WHDR2_LENGTH_SHIFT) + +#define I40E_GLPCI_CAPSUP_WAKUP_EN_SHIFT 21 +#define I40E_GLPCI_CAPSUP_WAKUP_EN_MASK I40E_MASK(0x1, I40E_GLPCI_CAPSUP_WAKUP_EN_SHIFT) + +#define I40E_GLPCI_CUR_CLNT_COMMON 0x0009CA18 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_CLNT_COMMON_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_CLNT_COMMON_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_CLNT_COMMON_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_CLNT_COMMON_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_CLNT_COMMON_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_CLNT_COMMON_OSR_SHIFT) +#define I40E_GLPCI_CUR_CLNT_PIPEMON 0x0009CA20 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_CLNT_PIPEMON_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_CLNT_PIPEMON_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_CLNT_PIPEMON_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_MNG_ALWD 0x0009c514 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_MNG_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_MNG_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_MNG_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_MNG_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_MNG_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_MNG_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_MNG_RSVD 0x0009c594 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_MNG_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_MNG_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_MNG_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_MNG_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_MNG_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_MNG_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_PMAT_ALWD 0x0009c510 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_PMAT_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_PMAT_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_PMAT_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_PMAT_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_PMAT_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_PMAT_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_PMAT_RSVD 0x0009c590 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_PMAT_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_PMAT_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_PMAT_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_PMAT_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_PMAT_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_PMAT_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_RLAN_ALWD 0x0009c500 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_RLAN_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_RLAN_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RLAN_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_RLAN_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_RLAN_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RLAN_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_RLAN_RSVD 0x0009c580 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_RLAN_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_RLAN_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RLAN_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_RLAN_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_RLAN_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RLAN_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_RXPE_ALWD 0x0009c508 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_RXPE_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_RXPE_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RXPE_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_RXPE_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_RXPE_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RXPE_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_RXPE_RSVD 0x0009c588 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_RXPE_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_RXPE_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RXPE_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_RXPE_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_RXPE_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_RXPE_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_TDPU_ALWD 0x0009c518 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_TDPU_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_TDPU_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TDPU_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_TDPU_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_TDPU_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TDPU_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_TDPU_RSVD 0x0009c598 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_TDPU_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_TDPU_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TDPU_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_TDPU_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_TDPU_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TDPU_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_TLAN_ALWD 0x0009c504 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_TLAN_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_TLAN_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TLAN_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_TLAN_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_TLAN_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TLAN_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_TLAN_RSVD 0x0009c584 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_TLAN_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_TLAN_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TLAN_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_TLAN_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_TLAN_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TLAN_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_TXPE_ALWD 0x0009c50C /* Reset: PCIR */ +#define I40E_GLPCI_CUR_TXPE_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_TXPE_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TXPE_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_TXPE_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_TXPE_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TXPE_ALWD_OSR_SHIFT) +#define I40E_GLPCI_CUR_TXPE_RSVD 0x0009c58c /* Reset: PCIR */ +#define I40E_GLPCI_CUR_TXPE_RSVD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_TXPE_RSVD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TXPE_RSVD_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_TXPE_RSVD_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_TXPE_RSVD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_TXPE_RSVD_OSR_SHIFT) +#define I40E_GLPCI_CUR_WATMK_CLNT_COMMON 0x0009CA28 /* Reset: PCIR */ +#define I40E_GLPCI_CUR_WATMK_CLNT_COMMON_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_CUR_WATMK_CLNT_COMMON_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_WATMK_CLNT_COMMON_DATA_LINES_SHIFT) +#define I40E_GLPCI_CUR_WATMK_CLNT_COMMON_OSR_SHIFT 16 +#define I40E_GLPCI_CUR_WATMK_CLNT_COMMON_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_CUR_WATMK_CLNT_COMMON_OSR_SHIFT) + +#define I40E_GLPCI_LBARCTRL_PE_DB_SIZE_SHIFT 4 +#define I40E_GLPCI_LBARCTRL_PE_DB_SIZE_MASK I40E_MASK(0x3, I40E_GLPCI_LBARCTRL_PE_DB_SIZE_SHIFT) +#define I40E_GLPCI_LBARCTRL_VF_PE_DB_SIZE_SHIFT 10 +#define I40E_GLPCI_LBARCTRL_VF_PE_DB_SIZE_MASK I40E_MASK(0x1, I40E_GLPCI_LBARCTRL_VF_PE_DB_SIZE_SHIFT) +#define I40E_GLPCI_NPQ_CFG 0x0009CA00 /* Reset: PCIR */ +#define I40E_GLPCI_NPQ_CFG_EXTEND_TO_SHIFT 0 +#define I40E_GLPCI_NPQ_CFG_EXTEND_TO_MASK I40E_MASK(0x1, I40E_GLPCI_NPQ_CFG_EXTEND_TO_SHIFT) +#define I40E_GLPCI_NPQ_CFG_SMALL_TO_SHIFT 1 +#define I40E_GLPCI_NPQ_CFG_SMALL_TO_MASK I40E_MASK(0x1, I40E_GLPCI_NPQ_CFG_SMALL_TO_SHIFT) +#define I40E_GLPCI_NPQ_CFG_WEIGHT_AVG_SHIFT 2 +#define I40E_GLPCI_NPQ_CFG_WEIGHT_AVG_MASK I40E_MASK(0xF, I40E_GLPCI_NPQ_CFG_WEIGHT_AVG_SHIFT) +#define I40E_GLPCI_NPQ_CFG_NPQ_SPARE_SHIFT 6 +#define I40E_GLPCI_NPQ_CFG_NPQ_SPARE_MASK I40E_MASK(0x3FF, I40E_GLPCI_NPQ_CFG_NPQ_SPARE_SHIFT) +#define I40E_GLPCI_NPQ_CFG_NPQ_ERR_STAT_SHIFT 16 +#define I40E_GLPCI_NPQ_CFG_NPQ_ERR_STAT_MASK I40E_MASK(0xF, I40E_GLPCI_NPQ_CFG_NPQ_ERR_STAT_SHIFT) +#define I40E_GLPCI_WATMK_CLNT_PIPEMON 0x0009CA30 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_CLNT_PIPEMON_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_CLNT_PIPEMON_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_CLNT_PIPEMON_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_MNG_ALWD 0x0009CB14 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_MNG_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_MNG_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_MNG_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_MNG_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_MNG_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_MNG_ALWD_OSR_SHIFT) +#define I40E_GLPCI_WATMK_PMAT_ALWD 0x0009CB10 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_PMAT_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_PMAT_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_PMAT_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_PMAT_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_PMAT_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_PMAT_ALWD_OSR_SHIFT) +#define I40E_GLPCI_WATMK_RLAN_ALWD 0x0009CB00 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_RLAN_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_RLAN_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_RLAN_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_RLAN_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_RLAN_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_RLAN_ALWD_OSR_SHIFT) +#define I40E_GLPCI_WATMK_RXPE_ALWD 0x0009CB08 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_RXPE_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_RXPE_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_RXPE_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_RXPE_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_RXPE_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_RXPE_ALWD_OSR_SHIFT) +#define I40E_GLPCI_WATMK_TLAN_ALWD 0x0009CB04 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_TLAN_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_TLAN_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_TLAN_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_TLAN_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_TLAN_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_TLAN_ALWD_OSR_SHIFT) +#define I40E_GLPCI_WATMK_TPDU_ALWD 0x0009CB18 /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_TPDU_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_TPDU_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_TPDU_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_TPDU_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_TPDU_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_TPDU_ALWD_OSR_SHIFT) +#define I40E_GLPCI_WATMK_TXPE_ALWD 0x0009CB0c /* Reset: PCIR */ +#define I40E_GLPCI_WATMK_TXPE_ALWD_DATA_LINES_SHIFT 0 +#define I40E_GLPCI_WATMK_TXPE_ALWD_DATA_LINES_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_TXPE_ALWD_DATA_LINES_SHIFT) +#define I40E_GLPCI_WATMK_TXPE_ALWD_OSR_SHIFT 16 +#define I40E_GLPCI_WATMK_TXPE_ALWD_OSR_MASK I40E_MASK(0xFFFF, I40E_GLPCI_WATMK_TXPE_ALWD_OSR_SHIFT) +#define I40E_GLPE_CPUSTATUS0 0x0000D040 /* Reset: PE_CORER */ +#define I40E_GLPE_CPUSTATUS0_PECPUSTATUS0_SHIFT 0 +#define I40E_GLPE_CPUSTATUS0_PECPUSTATUS0_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPE_CPUSTATUS0_PECPUSTATUS0_SHIFT) +#define I40E_GLPE_CPUSTATUS1 0x0000D044 /* Reset: PE_CORER */ +#define I40E_GLPE_CPUSTATUS1_PECPUSTATUS1_SHIFT 0 +#define I40E_GLPE_CPUSTATUS1_PECPUSTATUS1_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPE_CPUSTATUS1_PECPUSTATUS1_SHIFT) +#define I40E_GLPE_CPUSTATUS2 0x0000D048 /* Reset: PE_CORER */ +#define I40E_GLPE_CPUSTATUS2_PECPUSTATUS2_SHIFT 0 +#define I40E_GLPE_CPUSTATUS2_PECPUSTATUS2_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPE_CPUSTATUS2_PECPUSTATUS2_SHIFT) +#define I40E_GLPE_CPUTRIG0 0x0000D060 /* Reset: PE_CORER */ +#define I40E_GLPE_CPUTRIG0_PECPUTRIG0_SHIFT 0 +#define I40E_GLPE_CPUTRIG0_PECPUTRIG0_MASK I40E_MASK(0xFFFF, I40E_GLPE_CPUTRIG0_PECPUTRIG0_SHIFT) +#define I40E_GLPE_CPUTRIG0_TEPREQUEST0_SHIFT 17 +#define I40E_GLPE_CPUTRIG0_TEPREQUEST0_MASK I40E_MASK(0x1, I40E_GLPE_CPUTRIG0_TEPREQUEST0_SHIFT) +#define I40E_GLPE_CPUTRIG0_OOPREQUEST0_SHIFT 18 +#define I40E_GLPE_CPUTRIG0_OOPREQUEST0_MASK I40E_MASK(0x1, I40E_GLPE_CPUTRIG0_OOPREQUEST0_SHIFT) +#define I40E_GLPE_DUAL40_RUPM 0x0000DA04 /* Reset: PE_CORER */ +#define I40E_GLPE_DUAL40_RUPM_DUAL_40G_MODE_SHIFT 0 +#define I40E_GLPE_DUAL40_RUPM_DUAL_40G_MODE_MASK I40E_MASK(0x1, I40E_GLPE_DUAL40_RUPM_DUAL_40G_MODE_SHIFT) +#define I40E_GLPE_PFAEQEDROPCNT(_i) (0x00131440 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLPE_PFAEQEDROPCNT_MAX_INDEX 15 +#define I40E_GLPE_PFAEQEDROPCNT_AEQEDROPCNT_SHIFT 0 +#define I40E_GLPE_PFAEQEDROPCNT_AEQEDROPCNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_PFAEQEDROPCNT_AEQEDROPCNT_SHIFT) +#define I40E_GLPE_PFCEQEDROPCNT(_i) (0x001313C0 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLPE_PFCEQEDROPCNT_MAX_INDEX 15 +#define I40E_GLPE_PFCEQEDROPCNT_CEQEDROPCNT_SHIFT 0 +#define I40E_GLPE_PFCEQEDROPCNT_CEQEDROPCNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_PFCEQEDROPCNT_CEQEDROPCNT_SHIFT) +#define I40E_GLPE_PFCQEDROPCNT(_i) (0x00131340 + ((_i) * 4)) /* _i=0...15 */ /* Reset: CORER */ +#define I40E_GLPE_PFCQEDROPCNT_MAX_INDEX 15 +#define I40E_GLPE_PFCQEDROPCNT_CQEDROPCNT_SHIFT 0 +#define I40E_GLPE_PFCQEDROPCNT_CQEDROPCNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_PFCQEDROPCNT_CQEDROPCNT_SHIFT) +#define I40E_GLPE_RUPM_CQPPOOL 0x0000DACC /* Reset: PE_CORER */ +#define I40E_GLPE_RUPM_CQPPOOL_CQPSPADS_SHIFT 0 +#define I40E_GLPE_RUPM_CQPPOOL_CQPSPADS_MASK I40E_MASK(0xFF, I40E_GLPE_RUPM_CQPPOOL_CQPSPADS_SHIFT) +#define I40E_GLPE_RUPM_FLRPOOL 0x0000DAC4 /* Reset: PE_CORER */ +#define I40E_GLPE_RUPM_FLRPOOL_FLRSPADS_SHIFT 0 +#define I40E_GLPE_RUPM_FLRPOOL_FLRSPADS_MASK I40E_MASK(0xFF, I40E_GLPE_RUPM_FLRPOOL_FLRSPADS_SHIFT) +#define I40E_GLPE_RUPM_GCTL 0x0000DA00 /* Reset: PE_CORER */ +#define I40E_GLPE_RUPM_GCTL_ALLOFFTH_SHIFT 0 +#define I40E_GLPE_RUPM_GCTL_ALLOFFTH_MASK I40E_MASK(0xFF, I40E_GLPE_RUPM_GCTL_ALLOFFTH_SHIFT) +#define I40E_GLPE_RUPM_GCTL_RUPM_P0_DIS_SHIFT 26 +#define I40E_GLPE_RUPM_GCTL_RUPM_P0_DIS_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_GCTL_RUPM_P0_DIS_SHIFT) +#define I40E_GLPE_RUPM_GCTL_RUPM_P1_DIS_SHIFT 27 +#define I40E_GLPE_RUPM_GCTL_RUPM_P1_DIS_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_GCTL_RUPM_P1_DIS_SHIFT) +#define I40E_GLPE_RUPM_GCTL_RUPM_P2_DIS_SHIFT 28 +#define I40E_GLPE_RUPM_GCTL_RUPM_P2_DIS_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_GCTL_RUPM_P2_DIS_SHIFT) +#define I40E_GLPE_RUPM_GCTL_RUPM_P3_DIS_SHIFT 29 +#define I40E_GLPE_RUPM_GCTL_RUPM_P3_DIS_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_GCTL_RUPM_P3_DIS_SHIFT) +#define I40E_GLPE_RUPM_GCTL_RUPM_DIS_SHIFT 30 +#define I40E_GLPE_RUPM_GCTL_RUPM_DIS_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_GCTL_RUPM_DIS_SHIFT) +#define I40E_GLPE_RUPM_GCTL_SWLB_MODE_SHIFT 31 +#define I40E_GLPE_RUPM_GCTL_SWLB_MODE_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_GCTL_SWLB_MODE_SHIFT) +#define I40E_GLPE_RUPM_PTXPOOL 0x0000DAC8 /* Reset: PE_CORER */ +#define I40E_GLPE_RUPM_PTXPOOL_PTXSPADS_SHIFT 0 +#define I40E_GLPE_RUPM_PTXPOOL_PTXSPADS_MASK I40E_MASK(0xFF, I40E_GLPE_RUPM_PTXPOOL_PTXSPADS_SHIFT) +#define I40E_GLPE_RUPM_PUSHPOOL 0x0000DAC0 /* Reset: PE_CORER */ +#define I40E_GLPE_RUPM_PUSHPOOL_PUSHSPADS_SHIFT 0 +#define I40E_GLPE_RUPM_PUSHPOOL_PUSHSPADS_MASK I40E_MASK(0xFF, I40E_GLPE_RUPM_PUSHPOOL_PUSHSPADS_SHIFT) +#define I40E_GLPE_RUPM_TXHOST_EN 0x0000DA08 /* Reset: PE_CORER */ +#define I40E_GLPE_RUPM_TXHOST_EN_TXHOST_EN_SHIFT 0 +#define I40E_GLPE_RUPM_TXHOST_EN_TXHOST_EN_MASK I40E_MASK(0x1, I40E_GLPE_RUPM_TXHOST_EN_TXHOST_EN_SHIFT) +#define I40E_GLPE_VFAEQEDROPCNT(_i) (0x00132540 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLPE_VFAEQEDROPCNT_MAX_INDEX 31 +#define I40E_GLPE_VFAEQEDROPCNT_AEQEDROPCNT_SHIFT 0 +#define I40E_GLPE_VFAEQEDROPCNT_AEQEDROPCNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_VFAEQEDROPCNT_AEQEDROPCNT_SHIFT) +#define I40E_GLPE_VFCEQEDROPCNT(_i) (0x00132440 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLPE_VFCEQEDROPCNT_MAX_INDEX 31 +#define I40E_GLPE_VFCEQEDROPCNT_CEQEDROPCNT_SHIFT 0 +#define I40E_GLPE_VFCEQEDROPCNT_CEQEDROPCNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_VFCEQEDROPCNT_CEQEDROPCNT_SHIFT) +#define I40E_GLPE_VFCQEDROPCNT(_i) (0x00132340 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CORER */ +#define I40E_GLPE_VFCQEDROPCNT_MAX_INDEX 31 +#define I40E_GLPE_VFCQEDROPCNT_CQEDROPCNT_SHIFT 0 +#define I40E_GLPE_VFCQEDROPCNT_CQEDROPCNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_VFCQEDROPCNT_CQEDROPCNT_SHIFT) +#define I40E_GLPE_VFFLMOBJCTRL(_i) (0x0000D400 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPE_VFFLMOBJCTRL_MAX_INDEX 31 +#define I40E_GLPE_VFFLMOBJCTRL_XMIT_BLOCKSIZE_SHIFT 0 +#define I40E_GLPE_VFFLMOBJCTRL_XMIT_BLOCKSIZE_MASK I40E_MASK(0x7, I40E_GLPE_VFFLMOBJCTRL_XMIT_BLOCKSIZE_SHIFT) +#define I40E_GLPE_VFFLMOBJCTRL_Q1_BLOCKSIZE_SHIFT 8 +#define I40E_GLPE_VFFLMOBJCTRL_Q1_BLOCKSIZE_MASK I40E_MASK(0x7, I40E_GLPE_VFFLMOBJCTRL_Q1_BLOCKSIZE_SHIFT) +#define I40E_GLPE_VFFLMQ1ALLOCERR(_i) (0x0000C700 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPE_VFFLMQ1ALLOCERR_MAX_INDEX 31 +#define I40E_GLPE_VFFLMQ1ALLOCERR_ERROR_COUNT_SHIFT 0 +#define I40E_GLPE_VFFLMQ1ALLOCERR_ERROR_COUNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_VFFLMQ1ALLOCERR_ERROR_COUNT_SHIFT) +#define I40E_GLPE_VFFLMXMITALLOCERR(_i) (0x0000C600 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPE_VFFLMXMITALLOCERR_MAX_INDEX 31 +#define I40E_GLPE_VFFLMXMITALLOCERR_ERROR_COUNT_SHIFT 0 +#define I40E_GLPE_VFFLMXMITALLOCERR_ERROR_COUNT_MASK I40E_MASK(0xFFFF, I40E_GLPE_VFFLMXMITALLOCERR_ERROR_COUNT_SHIFT) +#define I40E_GLPE_VFUDACTRL(_i) (0x0000C000 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPE_VFUDACTRL_MAX_INDEX 31 +#define I40E_GLPE_VFUDACTRL_IPV4MCFRAGRESBP_SHIFT 0 +#define I40E_GLPE_VFUDACTRL_IPV4MCFRAGRESBP_MASK I40E_MASK(0x1, I40E_GLPE_VFUDACTRL_IPV4MCFRAGRESBP_SHIFT) +#define I40E_GLPE_VFUDACTRL_IPV4UCFRAGRESBP_SHIFT 1 +#define I40E_GLPE_VFUDACTRL_IPV4UCFRAGRESBP_MASK I40E_MASK(0x1, I40E_GLPE_VFUDACTRL_IPV4UCFRAGRESBP_SHIFT) +#define I40E_GLPE_VFUDACTRL_IPV6MCFRAGRESBP_SHIFT 2 +#define I40E_GLPE_VFUDACTRL_IPV6MCFRAGRESBP_MASK I40E_MASK(0x1, I40E_GLPE_VFUDACTRL_IPV6MCFRAGRESBP_SHIFT) +#define I40E_GLPE_VFUDACTRL_IPV6UCFRAGRESBP_SHIFT 3 +#define I40E_GLPE_VFUDACTRL_IPV6UCFRAGRESBP_MASK I40E_MASK(0x1, I40E_GLPE_VFUDACTRL_IPV6UCFRAGRESBP_SHIFT) +#define I40E_GLPE_VFUDACTRL_UDPMCFRAGRESFAIL_SHIFT 4 +#define I40E_GLPE_VFUDACTRL_UDPMCFRAGRESFAIL_MASK I40E_MASK(0x1, I40E_GLPE_VFUDACTRL_UDPMCFRAGRESFAIL_SHIFT) +#define I40E_GLPE_VFUDAUCFBQPN(_i) (0x0000C100 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPE_VFUDAUCFBQPN_MAX_INDEX 31 +#define I40E_GLPE_VFUDAUCFBQPN_QPN_SHIFT 0 +#define I40E_GLPE_VFUDAUCFBQPN_QPN_MASK I40E_MASK(0x3FFFF, I40E_GLPE_VFUDAUCFBQPN_QPN_SHIFT) +#define I40E_GLPE_VFUDAUCFBQPN_VALID_SHIFT 31 +#define I40E_GLPE_VFUDAUCFBQPN_VALID_MASK I40E_MASK(0x1, I40E_GLPE_VFUDAUCFBQPN_VALID_SHIFT) +#define I40E_PFPE_AEQALLOC 0x00131180 /* Reset: PFR */ +#define I40E_PFPE_AEQALLOC_AECOUNT_SHIFT 0 +#define I40E_PFPE_AEQALLOC_AECOUNT_MASK I40E_MASK(0xFFFFFFFF, I40E_PFPE_AEQALLOC_AECOUNT_SHIFT) +#define I40E_PFPE_CCQPHIGH 0x00008200 /* Reset: PFR */ +#define I40E_PFPE_CCQPHIGH_PECCQPHIGH_SHIFT 0 +#define I40E_PFPE_CCQPHIGH_PECCQPHIGH_MASK I40E_MASK(0xFFFFFFFF, I40E_PFPE_CCQPHIGH_PECCQPHIGH_SHIFT) +#define I40E_PFPE_CCQPLOW 0x00008180 /* Reset: PFR */ +#define I40E_PFPE_CCQPLOW_PECCQPLOW_SHIFT 0 +#define I40E_PFPE_CCQPLOW_PECCQPLOW_MASK I40E_MASK(0xFFFFFFFF, I40E_PFPE_CCQPLOW_PECCQPLOW_SHIFT) +#define I40E_PFPE_CCQPSTATUS 0x00008100 /* Reset: PFR */ +#define I40E_PFPE_CCQPSTATUS_CCQP_DONE_SHIFT 0 +#define I40E_PFPE_CCQPSTATUS_CCQP_DONE_MASK I40E_MASK(0x1, I40E_PFPE_CCQPSTATUS_CCQP_DONE_SHIFT) +#define I40E_PFPE_CCQPSTATUS_HMC_PROFILE_SHIFT 4 +#define I40E_PFPE_CCQPSTATUS_HMC_PROFILE_MASK I40E_MASK(0x7, I40E_PFPE_CCQPSTATUS_HMC_PROFILE_SHIFT) +#define I40E_PFPE_CCQPSTATUS_RDMA_EN_VFS_SHIFT 16 +#define I40E_PFPE_CCQPSTATUS_RDMA_EN_VFS_MASK I40E_MASK(0x3F, I40E_PFPE_CCQPSTATUS_RDMA_EN_VFS_SHIFT) +#define I40E_PFPE_CCQPSTATUS_CCQP_ERR_SHIFT 31 +#define I40E_PFPE_CCQPSTATUS_CCQP_ERR_MASK I40E_MASK(0x1, I40E_PFPE_CCQPSTATUS_CCQP_ERR_SHIFT) +#define I40E_PFPE_CQACK 0x00131100 /* Reset: PFR */ +#define I40E_PFPE_CQACK_PECQID_SHIFT 0 +#define I40E_PFPE_CQACK_PECQID_MASK I40E_MASK(0x1FFFF, I40E_PFPE_CQACK_PECQID_SHIFT) +#define I40E_PFPE_CQARM 0x00131080 /* Reset: PFR */ +#define I40E_PFPE_CQARM_PECQID_SHIFT 0 +#define I40E_PFPE_CQARM_PECQID_MASK I40E_MASK(0x1FFFF, I40E_PFPE_CQARM_PECQID_SHIFT) +#define I40E_PFPE_CQPDB 0x00008000 /* Reset: PFR */ +#define I40E_PFPE_CQPDB_WQHEAD_SHIFT 0 +#define I40E_PFPE_CQPDB_WQHEAD_MASK I40E_MASK(0x7FF, I40E_PFPE_CQPDB_WQHEAD_SHIFT) +#define I40E_PFPE_CQPERRCODES 0x00008880 /* Reset: PFR */ +#define I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE_SHIFT 0 +#define I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE_MASK I40E_MASK(0xFFFF, I40E_PFPE_CQPERRCODES_CQP_MINOR_CODE_SHIFT) +#define I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE_SHIFT 16 +#define I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE_MASK I40E_MASK(0xFFFF, I40E_PFPE_CQPERRCODES_CQP_MAJOR_CODE_SHIFT) +#define I40E_PFPE_CQPTAIL 0x00008080 /* Reset: PFR */ +#define I40E_PFPE_CQPTAIL_WQTAIL_SHIFT 0 +#define I40E_PFPE_CQPTAIL_WQTAIL_MASK I40E_MASK(0x7FF, I40E_PFPE_CQPTAIL_WQTAIL_SHIFT) +#define I40E_PFPE_CQPTAIL_CQP_OP_ERR_SHIFT 31 +#define I40E_PFPE_CQPTAIL_CQP_OP_ERR_MASK I40E_MASK(0x1, I40E_PFPE_CQPTAIL_CQP_OP_ERR_SHIFT) +#define I40E_PFPE_FLMQ1ALLOCERR 0x00008980 /* Reset: PFR */ +#define I40E_PFPE_FLMQ1ALLOCERR_ERROR_COUNT_SHIFT 0 +#define I40E_PFPE_FLMQ1ALLOCERR_ERROR_COUNT_MASK I40E_MASK(0xFFFF, I40E_PFPE_FLMQ1ALLOCERR_ERROR_COUNT_SHIFT) +#define I40E_PFPE_FLMXMITALLOCERR 0x00008900 /* Reset: PFR */ +#define I40E_PFPE_FLMXMITALLOCERR_ERROR_COUNT_SHIFT 0 +#define I40E_PFPE_FLMXMITALLOCERR_ERROR_COUNT_MASK I40E_MASK(0xFFFF, I40E_PFPE_FLMXMITALLOCERR_ERROR_COUNT_SHIFT) +#define I40E_PFPE_IPCONFIG0 0x00008280 /* Reset: PFR */ +#define I40E_PFPE_IPCONFIG0_PEIPID_SHIFT 0 +#define I40E_PFPE_IPCONFIG0_PEIPID_MASK I40E_MASK(0xFFFF, I40E_PFPE_IPCONFIG0_PEIPID_SHIFT) +#define I40E_PFPE_IPCONFIG0_USEENTIREIDRANGE_SHIFT 16 +#define I40E_PFPE_IPCONFIG0_USEENTIREIDRANGE_MASK I40E_MASK(0x1, I40E_PFPE_IPCONFIG0_USEENTIREIDRANGE_SHIFT) +#define I40E_PFPE_MRTEIDXMASK 0x00008600 /* Reset: PFR */ +#define I40E_PFPE_MRTEIDXMASK_MRTEIDXMASKBITS_SHIFT 0 +#define I40E_PFPE_MRTEIDXMASK_MRTEIDXMASKBITS_MASK I40E_MASK(0x1F, I40E_PFPE_MRTEIDXMASK_MRTEIDXMASKBITS_SHIFT) +#define I40E_PFPE_RCVUNEXPECTEDERROR 0x00008680 /* Reset: PFR */ +#define I40E_PFPE_RCVUNEXPECTEDERROR_TCP_RX_UNEXP_ERR_SHIFT 0 +#define I40E_PFPE_RCVUNEXPECTEDERROR_TCP_RX_UNEXP_ERR_MASK I40E_MASK(0xFFFFFF, I40E_PFPE_RCVUNEXPECTEDERROR_TCP_RX_UNEXP_ERR_SHIFT) +#define I40E_PFPE_TCPNOWTIMER 0x00008580 /* Reset: PFR */ +#define I40E_PFPE_TCPNOWTIMER_TCP_NOW_SHIFT 0 +#define I40E_PFPE_TCPNOWTIMER_TCP_NOW_MASK I40E_MASK(0xFFFFFFFF, I40E_PFPE_TCPNOWTIMER_TCP_NOW_SHIFT) +#define I40E_PFPE_UDACTRL 0x00008700 /* Reset: PFR */ +#define I40E_PFPE_UDACTRL_IPV4MCFRAGRESBP_SHIFT 0 +#define I40E_PFPE_UDACTRL_IPV4MCFRAGRESBP_MASK I40E_MASK(0x1, I40E_PFPE_UDACTRL_IPV4MCFRAGRESBP_SHIFT) +#define I40E_PFPE_UDACTRL_IPV4UCFRAGRESBP_SHIFT 1 +#define I40E_PFPE_UDACTRL_IPV4UCFRAGRESBP_MASK I40E_MASK(0x1, I40E_PFPE_UDACTRL_IPV4UCFRAGRESBP_SHIFT) +#define I40E_PFPE_UDACTRL_IPV6MCFRAGRESBP_SHIFT 2 +#define I40E_PFPE_UDACTRL_IPV6MCFRAGRESBP_MASK I40E_MASK(0x1, I40E_PFPE_UDACTRL_IPV6MCFRAGRESBP_SHIFT) +#define I40E_PFPE_UDACTRL_IPV6UCFRAGRESBP_SHIFT 3 +#define I40E_PFPE_UDACTRL_IPV6UCFRAGRESBP_MASK I40E_MASK(0x1, I40E_PFPE_UDACTRL_IPV6UCFRAGRESBP_SHIFT) +#define I40E_PFPE_UDACTRL_UDPMCFRAGRESFAIL_SHIFT 4 +#define I40E_PFPE_UDACTRL_UDPMCFRAGRESFAIL_MASK I40E_MASK(0x1, I40E_PFPE_UDACTRL_UDPMCFRAGRESFAIL_SHIFT) +#define I40E_PFPE_UDAUCFBQPN 0x00008780 /* Reset: PFR */ +#define I40E_PFPE_UDAUCFBQPN_QPN_SHIFT 0 +#define I40E_PFPE_UDAUCFBQPN_QPN_MASK I40E_MASK(0x3FFFF, I40E_PFPE_UDAUCFBQPN_QPN_SHIFT) +#define I40E_PFPE_UDAUCFBQPN_VALID_SHIFT 31 +#define I40E_PFPE_UDAUCFBQPN_VALID_MASK I40E_MASK(0x1, I40E_PFPE_UDAUCFBQPN_VALID_SHIFT) +#define I40E_PFPE_WQEALLOC 0x00138C00 /* Reset: PFR */ +#define I40E_PFPE_WQEALLOC_PEQPID_SHIFT 0 +#define I40E_PFPE_WQEALLOC_PEQPID_MASK I40E_MASK(0x3FFFF, I40E_PFPE_WQEALLOC_PEQPID_SHIFT) +#define I40E_PFPE_WQEALLOC_WQE_DESC_INDEX_SHIFT 20 +#define I40E_PFPE_WQEALLOC_WQE_DESC_INDEX_MASK I40E_MASK(0xFFF, I40E_PFPE_WQEALLOC_WQE_DESC_INDEX_SHIFT) +#define I40E_PRTDCB_RLPMC 0x0001F140 /* Reset: PE_CORER */ +#define I40E_PRTDCB_RLPMC_TC2PFC_SHIFT 0 +#define I40E_PRTDCB_RLPMC_TC2PFC_MASK I40E_MASK(0xFF, I40E_PRTDCB_RLPMC_TC2PFC_SHIFT) +#define I40E_PRTDCB_TCMSTC_RLPM(_i) (0x0001F040 + ((_i) * 32)) /* _i=0...7 */ /* Reset: PE_CORER */ +#define I40E_PRTDCB_TCMSTC_RLPM_MAX_INDEX 7 +#define I40E_PRTDCB_TCMSTC_RLPM_MSTC_SHIFT 0 +#define I40E_PRTDCB_TCMSTC_RLPM_MSTC_MASK I40E_MASK(0xFFFFF, I40E_PRTDCB_TCMSTC_RLPM_MSTC_SHIFT) +#define I40E_PRTDCB_TCPMC_RLPM 0x0001F1A0 /* Reset: PE_CORER */ +#define I40E_PRTDCB_TCPMC_RLPM_CPM_SHIFT 0 +#define I40E_PRTDCB_TCPMC_RLPM_CPM_MASK I40E_MASK(0x1FFF, I40E_PRTDCB_TCPMC_RLPM_CPM_SHIFT) +#define I40E_PRTDCB_TCPMC_RLPM_LLTC_SHIFT 13 +#define I40E_PRTDCB_TCPMC_RLPM_LLTC_MASK I40E_MASK(0xFF, I40E_PRTDCB_TCPMC_RLPM_LLTC_SHIFT) +#define I40E_PRTDCB_TCPMC_RLPM_TCPM_MODE_SHIFT 30 +#define I40E_PRTDCB_TCPMC_RLPM_TCPM_MODE_MASK I40E_MASK(0x1, I40E_PRTDCB_TCPMC_RLPM_TCPM_MODE_SHIFT) +#define I40E_PRTE_RUPM_TCCNTR03 0x0000DAE0 /* Reset: PE_CORER */ +#define I40E_PRTE_RUPM_TCCNTR03_TC0COUNT_SHIFT 0 +#define I40E_PRTE_RUPM_TCCNTR03_TC0COUNT_MASK I40E_MASK(0xFF, I40E_PRTE_RUPM_TCCNTR03_TC0COUNT_SHIFT) +#define I40E_PRTE_RUPM_TCCNTR03_TC1COUNT_SHIFT 8 +#define I40E_PRTE_RUPM_TCCNTR03_TC1COUNT_MASK I40E_MASK(0xFF, I40E_PRTE_RUPM_TCCNTR03_TC1COUNT_SHIFT) +#define I40E_PRTE_RUPM_TCCNTR03_TC2COUNT_SHIFT 16 +#define I40E_PRTE_RUPM_TCCNTR03_TC2COUNT_MASK I40E_MASK(0xFF, I40E_PRTE_RUPM_TCCNTR03_TC2COUNT_SHIFT) +#define I40E_PRTE_RUPM_TCCNTR03_TC3COUNT_SHIFT 24 +#define I40E_PRTE_RUPM_TCCNTR03_TC3COUNT_MASK I40E_MASK(0xFF, I40E_PRTE_RUPM_TCCNTR03_TC3COUNT_SHIFT) +#define I40E_PRTPE_RUPM_CNTR 0x0000DB20 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_CNTR_COUNT_SHIFT 0 +#define I40E_PRTPE_RUPM_CNTR_COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_CNTR_COUNT_SHIFT) +#define I40E_PRTPE_RUPM_CTL 0x0000DA40 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_CTL_LLTC_SHIFT 13 +#define I40E_PRTPE_RUPM_CTL_LLTC_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_CTL_LLTC_SHIFT) +#define I40E_PRTPE_RUPM_CTL_RUPM_MODE_SHIFT 30 +#define I40E_PRTPE_RUPM_CTL_RUPM_MODE_MASK I40E_MASK(0x1, I40E_PRTPE_RUPM_CTL_RUPM_MODE_SHIFT) +#define I40E_PRTPE_RUPM_PFCCTL 0x0000DA60 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_PFCCTL_TC2PFC_SHIFT 0 +#define I40E_PRTPE_RUPM_PFCCTL_TC2PFC_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PFCCTL_TC2PFC_SHIFT) +#define I40E_PRTPE_RUPM_PFCPC 0x0000DA80 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_PFCPC_PORTOFFTH_SHIFT 0 +#define I40E_PRTPE_RUPM_PFCPC_PORTOFFTH_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PFCPC_PORTOFFTH_SHIFT) +#define I40E_PRTPE_RUPM_PFCTCC 0x0000DAA0 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_PFCTCC_TCOFFTH_SHIFT 0 +#define I40E_PRTPE_RUPM_PFCTCC_TCOFFTH_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PFCTCC_TCOFFTH_SHIFT) +#define I40E_PRTPE_RUPM_PFCTCC_LL_PRI_TH_SHIFT 16 +#define I40E_PRTPE_RUPM_PFCTCC_LL_PRI_TH_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PFCTCC_LL_PRI_TH_SHIFT) +#define I40E_PRTPE_RUPM_PFCTCC_LL_PRI_EN_SHIFT 31 +#define I40E_PRTPE_RUPM_PFCTCC_LL_PRI_EN_MASK I40E_MASK(0x1, I40E_PRTPE_RUPM_PFCTCC_LL_PRI_EN_SHIFT) +#define I40E_PRTPE_RUPM_PTCTCCNTR47 0x0000DB60 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC4COUNT_SHIFT 0 +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC4COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTCTCCNTR47_TC4COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC5COUNT_SHIFT 8 +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC5COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTCTCCNTR47_TC5COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC6COUNT_SHIFT 16 +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC6COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTCTCCNTR47_TC6COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC7COUNT_SHIFT 24 +#define I40E_PRTPE_RUPM_PTCTCCNTR47_TC7COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTCTCCNTR47_TC7COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTXTCCNTR03 0x0000DB40 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC0COUNT_SHIFT 0 +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC0COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTXTCCNTR03_TC0COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC1COUNT_SHIFT 8 +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC1COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTXTCCNTR03_TC1COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC2COUNT_SHIFT 16 +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC2COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTXTCCNTR03_TC2COUNT_SHIFT) +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC3COUNT_SHIFT 24 +#define I40E_PRTPE_RUPM_PTXTCCNTR03_TC3COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_PTXTCCNTR03_TC3COUNT_SHIFT) +#define I40E_PRTPE_RUPM_TCCNTR47 0x0000DB00 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_TCCNTR47_TC4COUNT_SHIFT 0 +#define I40E_PRTPE_RUPM_TCCNTR47_TC4COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_TCCNTR47_TC4COUNT_SHIFT) +#define I40E_PRTPE_RUPM_TCCNTR47_TC5COUNT_SHIFT 8 +#define I40E_PRTPE_RUPM_TCCNTR47_TC5COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_TCCNTR47_TC5COUNT_SHIFT) +#define I40E_PRTPE_RUPM_TCCNTR47_TC6COUNT_SHIFT 16 +#define I40E_PRTPE_RUPM_TCCNTR47_TC6COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_TCCNTR47_TC6COUNT_SHIFT) +#define I40E_PRTPE_RUPM_TCCNTR47_TC7COUNT_SHIFT 24 +#define I40E_PRTPE_RUPM_TCCNTR47_TC7COUNT_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_TCCNTR47_TC7COUNT_SHIFT) +#define I40E_PRTPE_RUPM_THRES 0x0000DA20 /* Reset: PE_CORER */ +#define I40E_PRTPE_RUPM_THRES_MINSPADSPERTC_SHIFT 0 +#define I40E_PRTPE_RUPM_THRES_MINSPADSPERTC_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_THRES_MINSPADSPERTC_SHIFT) +#define I40E_PRTPE_RUPM_THRES_MAXSPADS_SHIFT 8 +#define I40E_PRTPE_RUPM_THRES_MAXSPADS_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_THRES_MAXSPADS_SHIFT) +#define I40E_PRTPE_RUPM_THRES_MAXSPADSPERTC_SHIFT 16 +#define I40E_PRTPE_RUPM_THRES_MAXSPADSPERTC_MASK I40E_MASK(0xFF, I40E_PRTPE_RUPM_THRES_MAXSPADSPERTC_SHIFT) +#define I40E_VFPE_AEQALLOC(_VF) (0x00130C00 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_AEQALLOC_MAX_INDEX 127 +#define I40E_VFPE_AEQALLOC_AECOUNT_SHIFT 0 +#define I40E_VFPE_AEQALLOC_AECOUNT_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_AEQALLOC_AECOUNT_SHIFT) +#define I40E_VFPE_CCQPHIGH(_VF) (0x00001000 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CCQPHIGH_MAX_INDEX 127 +#define I40E_VFPE_CCQPHIGH_PECCQPHIGH_SHIFT 0 +#define I40E_VFPE_CCQPHIGH_PECCQPHIGH_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_CCQPHIGH_PECCQPHIGH_SHIFT) +#define I40E_VFPE_CCQPLOW(_VF) (0x00000C00 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CCQPLOW_MAX_INDEX 127 +#define I40E_VFPE_CCQPLOW_PECCQPLOW_SHIFT 0 +#define I40E_VFPE_CCQPLOW_PECCQPLOW_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_CCQPLOW_PECCQPLOW_SHIFT) +#define I40E_VFPE_CCQPSTATUS(_VF) (0x00000800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CCQPSTATUS_MAX_INDEX 127 +#define I40E_VFPE_CCQPSTATUS_CCQP_DONE_SHIFT 0 +#define I40E_VFPE_CCQPSTATUS_CCQP_DONE_MASK I40E_MASK(0x1, I40E_VFPE_CCQPSTATUS_CCQP_DONE_SHIFT) +#define I40E_VFPE_CCQPSTATUS_HMC_PROFILE_SHIFT 4 +#define I40E_VFPE_CCQPSTATUS_HMC_PROFILE_MASK I40E_MASK(0x7, I40E_VFPE_CCQPSTATUS_HMC_PROFILE_SHIFT) +#define I40E_VFPE_CCQPSTATUS_RDMA_EN_VFS_SHIFT 16 +#define I40E_VFPE_CCQPSTATUS_RDMA_EN_VFS_MASK I40E_MASK(0x3F, I40E_VFPE_CCQPSTATUS_RDMA_EN_VFS_SHIFT) +#define I40E_VFPE_CCQPSTATUS_CCQP_ERR_SHIFT 31 +#define I40E_VFPE_CCQPSTATUS_CCQP_ERR_MASK I40E_MASK(0x1, I40E_VFPE_CCQPSTATUS_CCQP_ERR_SHIFT) +#define I40E_VFPE_CQACK(_VF) (0x00130800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CQACK_MAX_INDEX 127 +#define I40E_VFPE_CQACK_PECQID_SHIFT 0 +#define I40E_VFPE_CQACK_PECQID_MASK I40E_MASK(0x1FFFF, I40E_VFPE_CQACK_PECQID_SHIFT) +#define I40E_VFPE_CQARM(_VF) (0x00130400 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CQARM_MAX_INDEX 127 +#define I40E_VFPE_CQARM_PECQID_SHIFT 0 +#define I40E_VFPE_CQARM_PECQID_MASK I40E_MASK(0x1FFFF, I40E_VFPE_CQARM_PECQID_SHIFT) +#define I40E_VFPE_CQPDB(_VF) (0x00000000 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CQPDB_MAX_INDEX 127 +#define I40E_VFPE_CQPDB_WQHEAD_SHIFT 0 +#define I40E_VFPE_CQPDB_WQHEAD_MASK I40E_MASK(0x7FF, I40E_VFPE_CQPDB_WQHEAD_SHIFT) +#define I40E_VFPE_CQPERRCODES(_VF) (0x00001800 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CQPERRCODES_MAX_INDEX 127 +#define I40E_VFPE_CQPERRCODES_CQP_MINOR_CODE_SHIFT 0 +#define I40E_VFPE_CQPERRCODES_CQP_MINOR_CODE_MASK I40E_MASK(0xFFFF, I40E_VFPE_CQPERRCODES_CQP_MINOR_CODE_SHIFT) +#define I40E_VFPE_CQPERRCODES_CQP_MAJOR_CODE_SHIFT 16 +#define I40E_VFPE_CQPERRCODES_CQP_MAJOR_CODE_MASK I40E_MASK(0xFFFF, I40E_VFPE_CQPERRCODES_CQP_MAJOR_CODE_SHIFT) +#define I40E_VFPE_CQPTAIL(_VF) (0x00000400 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_CQPTAIL_MAX_INDEX 127 +#define I40E_VFPE_CQPTAIL_WQTAIL_SHIFT 0 +#define I40E_VFPE_CQPTAIL_WQTAIL_MASK I40E_MASK(0x7FF, I40E_VFPE_CQPTAIL_WQTAIL_SHIFT) +#define I40E_VFPE_CQPTAIL_CQP_OP_ERR_SHIFT 31 +#define I40E_VFPE_CQPTAIL_CQP_OP_ERR_MASK I40E_MASK(0x1, I40E_VFPE_CQPTAIL_CQP_OP_ERR_SHIFT) +#define I40E_VFPE_IPCONFIG0(_VF) (0x00001400 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_IPCONFIG0_MAX_INDEX 127 +#define I40E_VFPE_IPCONFIG0_PEIPID_SHIFT 0 +#define I40E_VFPE_IPCONFIG0_PEIPID_MASK I40E_MASK(0xFFFF, I40E_VFPE_IPCONFIG0_PEIPID_SHIFT) +#define I40E_VFPE_IPCONFIG0_USEENTIREIDRANGE_SHIFT 16 +#define I40E_VFPE_IPCONFIG0_USEENTIREIDRANGE_MASK I40E_MASK(0x1, I40E_VFPE_IPCONFIG0_USEENTIREIDRANGE_SHIFT) +#define I40E_VFPE_MRTEIDXMASK(_VF) (0x00003000 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_MRTEIDXMASK_MAX_INDEX 127 +#define I40E_VFPE_MRTEIDXMASK_MRTEIDXMASKBITS_SHIFT 0 +#define I40E_VFPE_MRTEIDXMASK_MRTEIDXMASKBITS_MASK I40E_MASK(0x1F, I40E_VFPE_MRTEIDXMASK_MRTEIDXMASKBITS_SHIFT) +#define I40E_VFPE_RCVUNEXPECTEDERROR(_VF) (0x00003400 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_RCVUNEXPECTEDERROR_MAX_INDEX 127 +#define I40E_VFPE_RCVUNEXPECTEDERROR_TCP_RX_UNEXP_ERR_SHIFT 0 +#define I40E_VFPE_RCVUNEXPECTEDERROR_TCP_RX_UNEXP_ERR_MASK I40E_MASK(0xFFFFFF, I40E_VFPE_RCVUNEXPECTEDERROR_TCP_RX_UNEXP_ERR_SHIFT) +#define I40E_VFPE_TCPNOWTIMER(_VF) (0x00002C00 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_TCPNOWTIMER_MAX_INDEX 127 +#define I40E_VFPE_TCPNOWTIMER_TCP_NOW_SHIFT 0 +#define I40E_VFPE_TCPNOWTIMER_TCP_NOW_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_TCPNOWTIMER_TCP_NOW_SHIFT) +#define I40E_VFPE_WQEALLOC(_VF) (0x00138000 + ((_VF) * 4)) /* _i=0...127 */ /* Reset: VFR */ +#define I40E_VFPE_WQEALLOC_MAX_INDEX 127 +#define I40E_VFPE_WQEALLOC_PEQPID_SHIFT 0 +#define I40E_VFPE_WQEALLOC_PEQPID_MASK I40E_MASK(0x3FFFF, I40E_VFPE_WQEALLOC_PEQPID_SHIFT) +#define I40E_VFPE_WQEALLOC_WQE_DESC_INDEX_SHIFT 20 +#define I40E_VFPE_WQEALLOC_WQE_DESC_INDEX_MASK I40E_MASK(0xFFF, I40E_VFPE_WQEALLOC_WQE_DESC_INDEX_SHIFT) +#define I40E_GLPES_PFIP4RXDISCARD(_i) (0x00010600 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXDISCARD_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXDISCARD_IP4RXDISCARD_SHIFT 0 +#define I40E_GLPES_PFIP4RXDISCARD_IP4RXDISCARD_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXDISCARD_IP4RXDISCARD_SHIFT) +#define I40E_GLPES_PFIP4RXFRAGSHI(_i) (0x00010804 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXFRAGSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXFRAGSHI_IP4RXFRAGSHI_SHIFT 0 +#define I40E_GLPES_PFIP4RXFRAGSHI_IP4RXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4RXFRAGSHI_IP4RXFRAGSHI_SHIFT) +#define I40E_GLPES_PFIP4RXFRAGSLO(_i) (0x00010800 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXFRAGSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXFRAGSLO_IP4RXFRAGSLO_SHIFT 0 +#define I40E_GLPES_PFIP4RXFRAGSLO_IP4RXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXFRAGSLO_IP4RXFRAGSLO_SHIFT) +#define I40E_GLPES_PFIP4RXMCOCTSHI(_i) (0x00010A04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXMCOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXMCOCTSHI_IP4RXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4RXMCOCTSHI_IP4RXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4RXMCOCTSHI_IP4RXMCOCTSHI_SHIFT) +#define I40E_GLPES_PFIP4RXMCOCTSLO(_i) (0x00010A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXMCOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXMCOCTSLO_IP4RXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4RXMCOCTSLO_IP4RXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXMCOCTSLO_IP4RXMCOCTSLO_SHIFT) +#define I40E_GLPES_PFIP4RXMCPKTSHI(_i) (0x00010C04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXMCPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXMCPKTSHI_IP4RXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4RXMCPKTSHI_IP4RXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4RXMCPKTSHI_IP4RXMCPKTSHI_SHIFT) +#define I40E_GLPES_PFIP4RXMCPKTSLO(_i) (0x00010C00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXMCPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXMCPKTSLO_IP4RXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4RXMCPKTSLO_IP4RXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXMCPKTSLO_IP4RXMCPKTSLO_SHIFT) +#define I40E_GLPES_PFIP4RXOCTSHI(_i) (0x00010204 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXOCTSHI_IP4RXOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4RXOCTSHI_IP4RXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4RXOCTSHI_IP4RXOCTSHI_SHIFT) +#define I40E_GLPES_PFIP4RXOCTSLO(_i) (0x00010200 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXOCTSLO_IP4RXOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4RXOCTSLO_IP4RXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXOCTSLO_IP4RXOCTSLO_SHIFT) +#define I40E_GLPES_PFIP4RXPKTSHI(_i) (0x00010404 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXPKTSHI_IP4RXPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4RXPKTSHI_IP4RXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4RXPKTSHI_IP4RXPKTSHI_SHIFT) +#define I40E_GLPES_PFIP4RXPKTSLO(_i) (0x00010400 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXPKTSLO_IP4RXPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4RXPKTSLO_IP4RXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXPKTSLO_IP4RXPKTSLO_SHIFT) +#define I40E_GLPES_PFIP4RXTRUNC(_i) (0x00010700 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4RXTRUNC_MAX_INDEX 15 +#define I40E_GLPES_PFIP4RXTRUNC_IP4RXTRUNC_SHIFT 0 +#define I40E_GLPES_PFIP4RXTRUNC_IP4RXTRUNC_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4RXTRUNC_IP4RXTRUNC_SHIFT) +#define I40E_GLPES_PFIP4TXFRAGSHI(_i) (0x00011E04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXFRAGSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXFRAGSHI_IP4TXFRAGSHI_SHIFT 0 +#define I40E_GLPES_PFIP4TXFRAGSHI_IP4TXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4TXFRAGSHI_IP4TXFRAGSHI_SHIFT) +#define I40E_GLPES_PFIP4TXFRAGSLO(_i) (0x00011E00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXFRAGSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXFRAGSLO_IP4TXFRAGSLO_SHIFT 0 +#define I40E_GLPES_PFIP4TXFRAGSLO_IP4TXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4TXFRAGSLO_IP4TXFRAGSLO_SHIFT) +#define I40E_GLPES_PFIP4TXMCOCTSHI(_i) (0x00012004 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXMCOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXMCOCTSHI_IP4TXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4TXMCOCTSHI_IP4TXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4TXMCOCTSHI_IP4TXMCOCTSHI_SHIFT) +#define I40E_GLPES_PFIP4TXMCOCTSLO(_i) (0x00012000 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXMCOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXMCOCTSLO_IP4TXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4TXMCOCTSLO_IP4TXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4TXMCOCTSLO_IP4TXMCOCTSLO_SHIFT) +#define I40E_GLPES_PFIP4TXMCPKTSHI(_i) (0x00012204 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXMCPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXMCPKTSHI_IP4TXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4TXMCPKTSHI_IP4TXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4TXMCPKTSHI_IP4TXMCPKTSHI_SHIFT) +#define I40E_GLPES_PFIP4TXMCPKTSLO(_i) (0x00012200 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXMCPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXMCPKTSLO_IP4TXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4TXMCPKTSLO_IP4TXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4TXMCPKTSLO_IP4TXMCPKTSLO_SHIFT) +#define I40E_GLPES_PFIP4TXNOROUTE(_i) (0x00012E00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXNOROUTE_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXNOROUTE_IP4TXNOROUTE_SHIFT 0 +#define I40E_GLPES_PFIP4TXNOROUTE_IP4TXNOROUTE_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_PFIP4TXNOROUTE_IP4TXNOROUTE_SHIFT) +#define I40E_GLPES_PFIP4TXOCTSHI(_i) (0x00011A04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXOCTSHI_IP4TXOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4TXOCTSHI_IP4TXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4TXOCTSHI_IP4TXOCTSHI_SHIFT) +#define I40E_GLPES_PFIP4TXOCTSLO(_i) (0x00011A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXOCTSLO_IP4TXOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4TXOCTSLO_IP4TXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4TXOCTSLO_IP4TXOCTSLO_SHIFT) +#define I40E_GLPES_PFIP4TXPKTSHI(_i) (0x00011C04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXPKTSHI_IP4TXPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP4TXPKTSHI_IP4TXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP4TXPKTSHI_IP4TXPKTSHI_SHIFT) +#define I40E_GLPES_PFIP4TXPKTSLO(_i) (0x00011C00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP4TXPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP4TXPKTSLO_IP4TXPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP4TXPKTSLO_IP4TXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP4TXPKTSLO_IP4TXPKTSLO_SHIFT) +#define I40E_GLPES_PFIP6RXDISCARD(_i) (0x00011200 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXDISCARD_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXDISCARD_IP6RXDISCARD_SHIFT 0 +#define I40E_GLPES_PFIP6RXDISCARD_IP6RXDISCARD_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXDISCARD_IP6RXDISCARD_SHIFT) +#define I40E_GLPES_PFIP6RXFRAGSHI(_i) (0x00011404 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXFRAGSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXFRAGSHI_IP6RXFRAGSHI_SHIFT 0 +#define I40E_GLPES_PFIP6RXFRAGSHI_IP6RXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6RXFRAGSHI_IP6RXFRAGSHI_SHIFT) +#define I40E_GLPES_PFIP6RXFRAGSLO(_i) (0x00011400 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXFRAGSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXFRAGSLO_IP6RXFRAGSLO_SHIFT 0 +#define I40E_GLPES_PFIP6RXFRAGSLO_IP6RXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXFRAGSLO_IP6RXFRAGSLO_SHIFT) +#define I40E_GLPES_PFIP6RXMCOCTSHI(_i) (0x00011604 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXMCOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXMCOCTSHI_IP6RXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6RXMCOCTSHI_IP6RXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6RXMCOCTSHI_IP6RXMCOCTSHI_SHIFT) +#define I40E_GLPES_PFIP6RXMCOCTSLO(_i) (0x00011600 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXMCOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXMCOCTSLO_IP6RXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6RXMCOCTSLO_IP6RXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXMCOCTSLO_IP6RXMCOCTSLO_SHIFT) +#define I40E_GLPES_PFIP6RXMCPKTSHI(_i) (0x00011804 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXMCPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXMCPKTSHI_IP6RXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6RXMCPKTSHI_IP6RXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6RXMCPKTSHI_IP6RXMCPKTSHI_SHIFT) +#define I40E_GLPES_PFIP6RXMCPKTSLO(_i) (0x00011800 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXMCPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXMCPKTSLO_IP6RXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6RXMCPKTSLO_IP6RXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXMCPKTSLO_IP6RXMCPKTSLO_SHIFT) +#define I40E_GLPES_PFIP6RXOCTSHI(_i) (0x00010E04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXOCTSHI_IP6RXOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6RXOCTSHI_IP6RXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6RXOCTSHI_IP6RXOCTSHI_SHIFT) +#define I40E_GLPES_PFIP6RXOCTSLO(_i) (0x00010E00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXOCTSLO_IP6RXOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6RXOCTSLO_IP6RXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXOCTSLO_IP6RXOCTSLO_SHIFT) +#define I40E_GLPES_PFIP6RXPKTSHI(_i) (0x00011004 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXPKTSHI_IP6RXPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6RXPKTSHI_IP6RXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6RXPKTSHI_IP6RXPKTSHI_SHIFT) +#define I40E_GLPES_PFIP6RXPKTSLO(_i) (0x00011000 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXPKTSLO_IP6RXPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6RXPKTSLO_IP6RXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXPKTSLO_IP6RXPKTSLO_SHIFT) +#define I40E_GLPES_PFIP6RXTRUNC(_i) (0x00011300 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6RXTRUNC_MAX_INDEX 15 +#define I40E_GLPES_PFIP6RXTRUNC_IP6RXTRUNC_SHIFT 0 +#define I40E_GLPES_PFIP6RXTRUNC_IP6RXTRUNC_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6RXTRUNC_IP6RXTRUNC_SHIFT) +#define I40E_GLPES_PFIP6TXFRAGSHI(_i) (0x00012804 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXFRAGSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXFRAGSHI_IP6TXFRAGSHI_SHIFT 0 +#define I40E_GLPES_PFIP6TXFRAGSHI_IP6TXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6TXFRAGSHI_IP6TXFRAGSHI_SHIFT) +#define I40E_GLPES_PFIP6TXFRAGSLO(_i) (0x00012800 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXFRAGSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXFRAGSLO_IP6TXFRAGSLO_SHIFT 0 +#define I40E_GLPES_PFIP6TXFRAGSLO_IP6TXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6TXFRAGSLO_IP6TXFRAGSLO_SHIFT) +#define I40E_GLPES_PFIP6TXMCOCTSHI(_i) (0x00012A04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXMCOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXMCOCTSHI_IP6TXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6TXMCOCTSHI_IP6TXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6TXMCOCTSHI_IP6TXMCOCTSHI_SHIFT) +#define I40E_GLPES_PFIP6TXMCOCTSLO(_i) (0x00012A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXMCOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXMCOCTSLO_IP6TXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6TXMCOCTSLO_IP6TXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6TXMCOCTSLO_IP6TXMCOCTSLO_SHIFT) +#define I40E_GLPES_PFIP6TXMCPKTSHI(_i) (0x00012C04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXMCPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXMCPKTSHI_IP6TXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6TXMCPKTSHI_IP6TXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6TXMCPKTSHI_IP6TXMCPKTSHI_SHIFT) +#define I40E_GLPES_PFIP6TXMCPKTSLO(_i) (0x00012C00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXMCPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXMCPKTSLO_IP6TXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6TXMCPKTSLO_IP6TXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6TXMCPKTSLO_IP6TXMCPKTSLO_SHIFT) +#define I40E_GLPES_PFIP6TXNOROUTE(_i) (0x00012F00 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXNOROUTE_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXNOROUTE_IP6TXNOROUTE_SHIFT 0 +#define I40E_GLPES_PFIP6TXNOROUTE_IP6TXNOROUTE_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_PFIP6TXNOROUTE_IP6TXNOROUTE_SHIFT) +#define I40E_GLPES_PFIP6TXOCTSHI(_i) (0x00012404 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXOCTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXOCTSHI_IP6TXOCTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6TXOCTSHI_IP6TXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6TXOCTSHI_IP6TXOCTSHI_SHIFT) +#define I40E_GLPES_PFIP6TXOCTSLO(_i) (0x00012400 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXOCTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXOCTSLO_IP6TXOCTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6TXOCTSLO_IP6TXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6TXOCTSLO_IP6TXOCTSLO_SHIFT) +#define I40E_GLPES_PFIP6TXPKTSHI(_i) (0x00012604 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXPKTSHI_IP6TXPKTSHI_SHIFT 0 +#define I40E_GLPES_PFIP6TXPKTSHI_IP6TXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFIP6TXPKTSHI_IP6TXPKTSHI_SHIFT) +#define I40E_GLPES_PFIP6TXPKTSLO(_i) (0x00012600 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFIP6TXPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFIP6TXPKTSLO_IP6TXPKTSLO_SHIFT 0 +#define I40E_GLPES_PFIP6TXPKTSLO_IP6TXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFIP6TXPKTSLO_IP6TXPKTSLO_SHIFT) +#define I40E_GLPES_PFRDMARXRDSHI(_i) (0x00013E04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMARXRDSHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMARXRDSHI_RDMARXRDSHI_SHIFT 0 +#define I40E_GLPES_PFRDMARXRDSHI_RDMARXRDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFRDMARXRDSHI_RDMARXRDSHI_SHIFT) +#define I40E_GLPES_PFRDMARXRDSLO(_i) (0x00013E00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMARXRDSLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMARXRDSLO_RDMARXRDSLO_SHIFT 0 +#define I40E_GLPES_PFRDMARXRDSLO_RDMARXRDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMARXRDSLO_RDMARXRDSLO_SHIFT) +#define I40E_GLPES_PFRDMARXSNDSHI(_i) (0x00014004 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMARXSNDSHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMARXSNDSHI_RDMARXSNDSHI_SHIFT 0 +#define I40E_GLPES_PFRDMARXSNDSHI_RDMARXSNDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFRDMARXSNDSHI_RDMARXSNDSHI_SHIFT) +#define I40E_GLPES_PFRDMARXSNDSLO(_i) (0x00014000 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMARXSNDSLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMARXSNDSLO_RDMARXSNDSLO_SHIFT 0 +#define I40E_GLPES_PFRDMARXSNDSLO_RDMARXSNDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMARXSNDSLO_RDMARXSNDSLO_SHIFT) +#define I40E_GLPES_PFRDMARXWRSHI(_i) (0x00013C04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMARXWRSHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMARXWRSHI_RDMARXWRSHI_SHIFT 0 +#define I40E_GLPES_PFRDMARXWRSHI_RDMARXWRSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFRDMARXWRSHI_RDMARXWRSHI_SHIFT) +#define I40E_GLPES_PFRDMARXWRSLO(_i) (0x00013C00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMARXWRSLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMARXWRSLO_RDMARXWRSLO_SHIFT 0 +#define I40E_GLPES_PFRDMARXWRSLO_RDMARXWRSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMARXWRSLO_RDMARXWRSLO_SHIFT) +#define I40E_GLPES_PFRDMATXRDSHI(_i) (0x00014404 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMATXRDSHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMATXRDSHI_RDMARXRDSHI_SHIFT 0 +#define I40E_GLPES_PFRDMATXRDSHI_RDMARXRDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFRDMATXRDSHI_RDMARXRDSHI_SHIFT) +#define I40E_GLPES_PFRDMATXRDSLO(_i) (0x00014400 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMATXRDSLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMATXRDSLO_RDMARXRDSLO_SHIFT 0 +#define I40E_GLPES_PFRDMATXRDSLO_RDMARXRDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMATXRDSLO_RDMARXRDSLO_SHIFT) +#define I40E_GLPES_PFRDMATXSNDSHI(_i) (0x00014604 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMATXSNDSHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMATXSNDSHI_RDMARXSNDSHI_SHIFT 0 +#define I40E_GLPES_PFRDMATXSNDSHI_RDMARXSNDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFRDMATXSNDSHI_RDMARXSNDSHI_SHIFT) +#define I40E_GLPES_PFRDMATXSNDSLO(_i) (0x00014600 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMATXSNDSLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMATXSNDSLO_RDMARXSNDSLO_SHIFT 0 +#define I40E_GLPES_PFRDMATXSNDSLO_RDMARXSNDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMATXSNDSLO_RDMARXSNDSLO_SHIFT) +#define I40E_GLPES_PFRDMATXWRSHI(_i) (0x00014204 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMATXWRSHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMATXWRSHI_RDMARXWRSHI_SHIFT 0 +#define I40E_GLPES_PFRDMATXWRSHI_RDMARXWRSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFRDMATXWRSHI_RDMARXWRSHI_SHIFT) +#define I40E_GLPES_PFRDMATXWRSLO(_i) (0x00014200 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMATXWRSLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMATXWRSLO_RDMARXWRSLO_SHIFT 0 +#define I40E_GLPES_PFRDMATXWRSLO_RDMARXWRSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMATXWRSLO_RDMARXWRSLO_SHIFT) +#define I40E_GLPES_PFRDMAVBNDHI(_i) (0x00014804 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMAVBNDHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMAVBNDHI_RDMAVBNDHI_SHIFT 0 +#define I40E_GLPES_PFRDMAVBNDHI_RDMAVBNDHI_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMAVBNDHI_RDMAVBNDHI_SHIFT) +#define I40E_GLPES_PFRDMAVBNDLO(_i) (0x00014800 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMAVBNDLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMAVBNDLO_RDMAVBNDLO_SHIFT 0 +#define I40E_GLPES_PFRDMAVBNDLO_RDMAVBNDLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMAVBNDLO_RDMAVBNDLO_SHIFT) +#define I40E_GLPES_PFRDMAVINVHI(_i) (0x00014A04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMAVINVHI_MAX_INDEX 15 +#define I40E_GLPES_PFRDMAVINVHI_RDMAVINVHI_SHIFT 0 +#define I40E_GLPES_PFRDMAVINVHI_RDMAVINVHI_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMAVINVHI_RDMAVINVHI_SHIFT) +#define I40E_GLPES_PFRDMAVINVLO(_i) (0x00014A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRDMAVINVLO_MAX_INDEX 15 +#define I40E_GLPES_PFRDMAVINVLO_RDMAVINVLO_SHIFT 0 +#define I40E_GLPES_PFRDMAVINVLO_RDMAVINVLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFRDMAVINVLO_RDMAVINVLO_SHIFT) +#define I40E_GLPES_PFRXVLANERR(_i) (0x00010000 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFRXVLANERR_MAX_INDEX 15 +#define I40E_GLPES_PFRXVLANERR_RXVLANERR_SHIFT 0 +#define I40E_GLPES_PFRXVLANERR_RXVLANERR_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_PFRXVLANERR_RXVLANERR_SHIFT) +#define I40E_GLPES_PFTCPRTXSEG(_i) (0x00013600 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPRTXSEG_MAX_INDEX 15 +#define I40E_GLPES_PFTCPRTXSEG_TCPRTXSEG_SHIFT 0 +#define I40E_GLPES_PFTCPRTXSEG_TCPRTXSEG_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFTCPRTXSEG_TCPRTXSEG_SHIFT) +#define I40E_GLPES_PFTCPRXOPTERR(_i) (0x00013200 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPRXOPTERR_MAX_INDEX 15 +#define I40E_GLPES_PFTCPRXOPTERR_TCPRXOPTERR_SHIFT 0 +#define I40E_GLPES_PFTCPRXOPTERR_TCPRXOPTERR_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_PFTCPRXOPTERR_TCPRXOPTERR_SHIFT) +#define I40E_GLPES_PFTCPRXPROTOERR(_i) (0x00013300 + ((_i) * 4)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPRXPROTOERR_MAX_INDEX 15 +#define I40E_GLPES_PFTCPRXPROTOERR_TCPRXPROTOERR_SHIFT 0 +#define I40E_GLPES_PFTCPRXPROTOERR_TCPRXPROTOERR_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_PFTCPRXPROTOERR_TCPRXPROTOERR_SHIFT) +#define I40E_GLPES_PFTCPRXSEGSHI(_i) (0x00013004 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPRXSEGSHI_MAX_INDEX 15 +#define I40E_GLPES_PFTCPRXSEGSHI_TCPRXSEGSHI_SHIFT 0 +#define I40E_GLPES_PFTCPRXSEGSHI_TCPRXSEGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFTCPRXSEGSHI_TCPRXSEGSHI_SHIFT) +#define I40E_GLPES_PFTCPRXSEGSLO(_i) (0x00013000 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPRXSEGSLO_MAX_INDEX 15 +#define I40E_GLPES_PFTCPRXSEGSLO_TCPRXSEGSLO_SHIFT 0 +#define I40E_GLPES_PFTCPRXSEGSLO_TCPRXSEGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFTCPRXSEGSLO_TCPRXSEGSLO_SHIFT) +#define I40E_GLPES_PFTCPTXSEGHI(_i) (0x00013404 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPTXSEGHI_MAX_INDEX 15 +#define I40E_GLPES_PFTCPTXSEGHI_TCPTXSEGHI_SHIFT 0 +#define I40E_GLPES_PFTCPTXSEGHI_TCPTXSEGHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFTCPTXSEGHI_TCPTXSEGHI_SHIFT) +#define I40E_GLPES_PFTCPTXSEGLO(_i) (0x00013400 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFTCPTXSEGLO_MAX_INDEX 15 +#define I40E_GLPES_PFTCPTXSEGLO_TCPTXSEGLO_SHIFT 0 +#define I40E_GLPES_PFTCPTXSEGLO_TCPTXSEGLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFTCPTXSEGLO_TCPTXSEGLO_SHIFT) +#define I40E_GLPES_PFUDPRXPKTSHI(_i) (0x00013804 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFUDPRXPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFUDPRXPKTSHI_UDPRXPKTSHI_SHIFT 0 +#define I40E_GLPES_PFUDPRXPKTSHI_UDPRXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFUDPRXPKTSHI_UDPRXPKTSHI_SHIFT) +#define I40E_GLPES_PFUDPRXPKTSLO(_i) (0x00013800 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFUDPRXPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFUDPRXPKTSLO_UDPRXPKTSLO_SHIFT 0 +#define I40E_GLPES_PFUDPRXPKTSLO_UDPRXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFUDPRXPKTSLO_UDPRXPKTSLO_SHIFT) +#define I40E_GLPES_PFUDPTXPKTSHI(_i) (0x00013A04 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFUDPTXPKTSHI_MAX_INDEX 15 +#define I40E_GLPES_PFUDPTXPKTSHI_UDPTXPKTSHI_SHIFT 0 +#define I40E_GLPES_PFUDPTXPKTSHI_UDPTXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_PFUDPTXPKTSHI_UDPTXPKTSHI_SHIFT) +#define I40E_GLPES_PFUDPTXPKTSLO(_i) (0x00013A00 + ((_i) * 8)) /* _i=0...15 */ /* Reset: PE_CORER */ +#define I40E_GLPES_PFUDPTXPKTSLO_MAX_INDEX 15 +#define I40E_GLPES_PFUDPTXPKTSLO_UDPTXPKTSLO_SHIFT 0 +#define I40E_GLPES_PFUDPTXPKTSLO_UDPTXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_PFUDPTXPKTSLO_UDPTXPKTSLO_SHIFT) +#define I40E_GLPES_RDMARXMULTFPDUSHI 0x0001E014 /* Reset: PE_CORER */ +#define I40E_GLPES_RDMARXMULTFPDUSHI_RDMARXMULTFPDUSHI_SHIFT 0 +#define I40E_GLPES_RDMARXMULTFPDUSHI_RDMARXMULTFPDUSHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_RDMARXMULTFPDUSHI_RDMARXMULTFPDUSHI_SHIFT) +#define I40E_GLPES_RDMARXMULTFPDUSLO 0x0001E010 /* Reset: PE_CORER */ +#define I40E_GLPES_RDMARXMULTFPDUSLO_RDMARXMULTFPDUSLO_SHIFT 0 +#define I40E_GLPES_RDMARXMULTFPDUSLO_RDMARXMULTFPDUSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_RDMARXMULTFPDUSLO_RDMARXMULTFPDUSLO_SHIFT) +#define I40E_GLPES_RDMARXOOODDPHI 0x0001E01C /* Reset: PE_CORER */ +#define I40E_GLPES_RDMARXOOODDPHI_RDMARXOOODDPHI_SHIFT 0 +#define I40E_GLPES_RDMARXOOODDPHI_RDMARXOOODDPHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_RDMARXOOODDPHI_RDMARXOOODDPHI_SHIFT) +#define I40E_GLPES_RDMARXOOODDPLO 0x0001E018 /* Reset: PE_CORER */ +#define I40E_GLPES_RDMARXOOODDPLO_RDMARXOOODDPLO_SHIFT 0 +#define I40E_GLPES_RDMARXOOODDPLO_RDMARXOOODDPLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_RDMARXOOODDPLO_RDMARXOOODDPLO_SHIFT) +#define I40E_GLPES_RDMARXOOONOMARK 0x0001E004 /* Reset: PE_CORER */ +#define I40E_GLPES_RDMARXOOONOMARK_RDMAOOONOMARK_SHIFT 0 +#define I40E_GLPES_RDMARXOOONOMARK_RDMAOOONOMARK_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_RDMARXOOONOMARK_RDMAOOONOMARK_SHIFT) +#define I40E_GLPES_RDMARXUNALIGN 0x0001E000 /* Reset: PE_CORER */ +#define I40E_GLPES_RDMARXUNALIGN_RDMRXAUNALIGN_SHIFT 0 +#define I40E_GLPES_RDMARXUNALIGN_RDMRXAUNALIGN_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_RDMARXUNALIGN_RDMRXAUNALIGN_SHIFT) +#define I40E_GLPES_TCPRXFOURHOLEHI 0x0001E044 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXFOURHOLEHI_TCPRXFOURHOLEHI_SHIFT 0 +#define I40E_GLPES_TCPRXFOURHOLEHI_TCPRXFOURHOLEHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPRXFOURHOLEHI_TCPRXFOURHOLEHI_SHIFT) +#define I40E_GLPES_TCPRXFOURHOLELO 0x0001E040 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXFOURHOLELO_TCPRXFOURHOLELO_SHIFT 0 +#define I40E_GLPES_TCPRXFOURHOLELO_TCPRXFOURHOLELO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPRXFOURHOLELO_TCPRXFOURHOLELO_SHIFT) +#define I40E_GLPES_TCPRXONEHOLEHI 0x0001E02C /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXONEHOLEHI_TCPRXONEHOLEHI_SHIFT 0 +#define I40E_GLPES_TCPRXONEHOLEHI_TCPRXONEHOLEHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPRXONEHOLEHI_TCPRXONEHOLEHI_SHIFT) +#define I40E_GLPES_TCPRXONEHOLELO 0x0001E028 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXONEHOLELO_TCPRXONEHOLELO_SHIFT 0 +#define I40E_GLPES_TCPRXONEHOLELO_TCPRXONEHOLELO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPRXONEHOLELO_TCPRXONEHOLELO_SHIFT) +#define I40E_GLPES_TCPRXPUREACKHI 0x0001E024 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXPUREACKHI_TCPRXPUREACKSHI_SHIFT 0 +#define I40E_GLPES_TCPRXPUREACKHI_TCPRXPUREACKSHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPRXPUREACKHI_TCPRXPUREACKSHI_SHIFT) +#define I40E_GLPES_TCPRXPUREACKSLO 0x0001E020 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXPUREACKSLO_TCPRXPUREACKLO_SHIFT 0 +#define I40E_GLPES_TCPRXPUREACKSLO_TCPRXPUREACKLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPRXPUREACKSLO_TCPRXPUREACKLO_SHIFT) +#define I40E_GLPES_TCPRXTHREEHOLEHI 0x0001E03C /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXTHREEHOLEHI_TCPRXTHREEHOLEHI_SHIFT 0 +#define I40E_GLPES_TCPRXTHREEHOLEHI_TCPRXTHREEHOLEHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPRXTHREEHOLEHI_TCPRXTHREEHOLEHI_SHIFT) +#define I40E_GLPES_TCPRXTHREEHOLELO 0x0001E038 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXTHREEHOLELO_TCPRXTHREEHOLELO_SHIFT 0 +#define I40E_GLPES_TCPRXTHREEHOLELO_TCPRXTHREEHOLELO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPRXTHREEHOLELO_TCPRXTHREEHOLELO_SHIFT) +#define I40E_GLPES_TCPRXTWOHOLEHI 0x0001E034 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXTWOHOLEHI_TCPRXTWOHOLEHI_SHIFT 0 +#define I40E_GLPES_TCPRXTWOHOLEHI_TCPRXTWOHOLEHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPRXTWOHOLEHI_TCPRXTWOHOLEHI_SHIFT) +#define I40E_GLPES_TCPRXTWOHOLELO 0x0001E030 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPRXTWOHOLELO_TCPRXTWOHOLELO_SHIFT 0 +#define I40E_GLPES_TCPRXTWOHOLELO_TCPRXTWOHOLELO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPRXTWOHOLELO_TCPRXTWOHOLELO_SHIFT) +#define I40E_GLPES_TCPTXRETRANSFASTHI 0x0001E04C /* Reset: PE_CORER */ +#define I40E_GLPES_TCPTXRETRANSFASTHI_TCPTXRETRANSFASTHI_SHIFT 0 +#define I40E_GLPES_TCPTXRETRANSFASTHI_TCPTXRETRANSFASTHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPTXRETRANSFASTHI_TCPTXRETRANSFASTHI_SHIFT) +#define I40E_GLPES_TCPTXRETRANSFASTLO 0x0001E048 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPTXRETRANSFASTLO_TCPTXRETRANSFASTLO_SHIFT 0 +#define I40E_GLPES_TCPTXRETRANSFASTLO_TCPTXRETRANSFASTLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPTXRETRANSFASTLO_TCPTXRETRANSFASTLO_SHIFT) +#define I40E_GLPES_TCPTXTOUTSFASTHI 0x0001E054 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPTXTOUTSFASTHI_TCPTXTOUTSFASTHI_SHIFT 0 +#define I40E_GLPES_TCPTXTOUTSFASTHI_TCPTXTOUTSFASTHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPTXTOUTSFASTHI_TCPTXTOUTSFASTHI_SHIFT) +#define I40E_GLPES_TCPTXTOUTSFASTLO 0x0001E050 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPTXTOUTSFASTLO_TCPTXTOUTSFASTLO_SHIFT 0 +#define I40E_GLPES_TCPTXTOUTSFASTLO_TCPTXTOUTSFASTLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPTXTOUTSFASTLO_TCPTXTOUTSFASTLO_SHIFT) +#define I40E_GLPES_TCPTXTOUTSHI 0x0001E05C /* Reset: PE_CORER */ +#define I40E_GLPES_TCPTXTOUTSHI_TCPTXTOUTSHI_SHIFT 0 +#define I40E_GLPES_TCPTXTOUTSHI_TCPTXTOUTSHI_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_TCPTXTOUTSHI_TCPTXTOUTSHI_SHIFT) +#define I40E_GLPES_TCPTXTOUTSLO 0x0001E058 /* Reset: PE_CORER */ +#define I40E_GLPES_TCPTXTOUTSLO_TCPTXTOUTSLO_SHIFT 0 +#define I40E_GLPES_TCPTXTOUTSLO_TCPTXTOUTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_TCPTXTOUTSLO_TCPTXTOUTSLO_SHIFT) +#define I40E_GLPES_VFIP4RXDISCARD(_i) (0x00018600 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXDISCARD_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXDISCARD_IP4RXDISCARD_SHIFT 0 +#define I40E_GLPES_VFIP4RXDISCARD_IP4RXDISCARD_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXDISCARD_IP4RXDISCARD_SHIFT) +#define I40E_GLPES_VFIP4RXFRAGSHI(_i) (0x00018804 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXFRAGSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXFRAGSHI_IP4RXFRAGSHI_SHIFT 0 +#define I40E_GLPES_VFIP4RXFRAGSHI_IP4RXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4RXFRAGSHI_IP4RXFRAGSHI_SHIFT) +#define I40E_GLPES_VFIP4RXFRAGSLO(_i) (0x00018800 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXFRAGSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXFRAGSLO_IP4RXFRAGSLO_SHIFT 0 +#define I40E_GLPES_VFIP4RXFRAGSLO_IP4RXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXFRAGSLO_IP4RXFRAGSLO_SHIFT) +#define I40E_GLPES_VFIP4RXMCOCTSHI(_i) (0x00018A04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXMCOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXMCOCTSHI_IP4RXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4RXMCOCTSHI_IP4RXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4RXMCOCTSHI_IP4RXMCOCTSHI_SHIFT) +#define I40E_GLPES_VFIP4RXMCOCTSLO(_i) (0x00018A00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXMCOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXMCOCTSLO_IP4RXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4RXMCOCTSLO_IP4RXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXMCOCTSLO_IP4RXMCOCTSLO_SHIFT) +#define I40E_GLPES_VFIP4RXMCPKTSHI(_i) (0x00018C04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXMCPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXMCPKTSHI_IP4RXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4RXMCPKTSHI_IP4RXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4RXMCPKTSHI_IP4RXMCPKTSHI_SHIFT) +#define I40E_GLPES_VFIP4RXMCPKTSLO(_i) (0x00018C00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXMCPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXMCPKTSLO_IP4RXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4RXMCPKTSLO_IP4RXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXMCPKTSLO_IP4RXMCPKTSLO_SHIFT) +#define I40E_GLPES_VFIP4RXOCTSHI(_i) (0x00018204 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXOCTSHI_IP4RXOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4RXOCTSHI_IP4RXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4RXOCTSHI_IP4RXOCTSHI_SHIFT) +#define I40E_GLPES_VFIP4RXOCTSLO(_i) (0x00018200 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXOCTSLO_IP4RXOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4RXOCTSLO_IP4RXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXOCTSLO_IP4RXOCTSLO_SHIFT) +#define I40E_GLPES_VFIP4RXPKTSHI(_i) (0x00018404 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXPKTSHI_IP4RXPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4RXPKTSHI_IP4RXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4RXPKTSHI_IP4RXPKTSHI_SHIFT) +#define I40E_GLPES_VFIP4RXPKTSLO(_i) (0x00018400 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXPKTSLO_IP4RXPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4RXPKTSLO_IP4RXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXPKTSLO_IP4RXPKTSLO_SHIFT) +#define I40E_GLPES_VFIP4RXTRUNC(_i) (0x00018700 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4RXTRUNC_MAX_INDEX 31 +#define I40E_GLPES_VFIP4RXTRUNC_IP4RXTRUNC_SHIFT 0 +#define I40E_GLPES_VFIP4RXTRUNC_IP4RXTRUNC_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4RXTRUNC_IP4RXTRUNC_SHIFT) +#define I40E_GLPES_VFIP4TXFRAGSHI(_i) (0x00019E04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXFRAGSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXFRAGSHI_IP4TXFRAGSHI_SHIFT 0 +#define I40E_GLPES_VFIP4TXFRAGSHI_IP4TXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4TXFRAGSHI_IP4TXFRAGSHI_SHIFT) +#define I40E_GLPES_VFIP4TXFRAGSLO(_i) (0x00019E00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXFRAGSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXFRAGSLO_IP4TXFRAGSLO_SHIFT 0 +#define I40E_GLPES_VFIP4TXFRAGSLO_IP4TXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4TXFRAGSLO_IP4TXFRAGSLO_SHIFT) +#define I40E_GLPES_VFIP4TXMCOCTSHI(_i) (0x0001A004 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXMCOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXMCOCTSHI_IP4TXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4TXMCOCTSHI_IP4TXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4TXMCOCTSHI_IP4TXMCOCTSHI_SHIFT) +#define I40E_GLPES_VFIP4TXMCOCTSLO(_i) (0x0001A000 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXMCOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXMCOCTSLO_IP4TXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4TXMCOCTSLO_IP4TXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4TXMCOCTSLO_IP4TXMCOCTSLO_SHIFT) +#define I40E_GLPES_VFIP4TXMCPKTSHI(_i) (0x0001A204 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXMCPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXMCPKTSHI_IP4TXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4TXMCPKTSHI_IP4TXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4TXMCPKTSHI_IP4TXMCPKTSHI_SHIFT) +#define I40E_GLPES_VFIP4TXMCPKTSLO(_i) (0x0001A200 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXMCPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXMCPKTSLO_IP4TXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4TXMCPKTSLO_IP4TXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4TXMCPKTSLO_IP4TXMCPKTSLO_SHIFT) +#define I40E_GLPES_VFIP4TXNOROUTE(_i) (0x0001AE00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXNOROUTE_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXNOROUTE_IP4TXNOROUTE_SHIFT 0 +#define I40E_GLPES_VFIP4TXNOROUTE_IP4TXNOROUTE_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_VFIP4TXNOROUTE_IP4TXNOROUTE_SHIFT) +#define I40E_GLPES_VFIP4TXOCTSHI(_i) (0x00019A04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXOCTSHI_IP4TXOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4TXOCTSHI_IP4TXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4TXOCTSHI_IP4TXOCTSHI_SHIFT) +#define I40E_GLPES_VFIP4TXOCTSLO(_i) (0x00019A00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXOCTSLO_IP4TXOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4TXOCTSLO_IP4TXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4TXOCTSLO_IP4TXOCTSLO_SHIFT) +#define I40E_GLPES_VFIP4TXPKTSHI(_i) (0x00019C04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXPKTSHI_IP4TXPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP4TXPKTSHI_IP4TXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP4TXPKTSHI_IP4TXPKTSHI_SHIFT) +#define I40E_GLPES_VFIP4TXPKTSLO(_i) (0x00019C00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP4TXPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP4TXPKTSLO_IP4TXPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP4TXPKTSLO_IP4TXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP4TXPKTSLO_IP4TXPKTSLO_SHIFT) +#define I40E_GLPES_VFIP6RXDISCARD(_i) (0x00019200 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXDISCARD_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXDISCARD_IP6RXDISCARD_SHIFT 0 +#define I40E_GLPES_VFIP6RXDISCARD_IP6RXDISCARD_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXDISCARD_IP6RXDISCARD_SHIFT) +#define I40E_GLPES_VFIP6RXFRAGSHI(_i) (0x00019404 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXFRAGSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXFRAGSHI_IP6RXFRAGSHI_SHIFT 0 +#define I40E_GLPES_VFIP6RXFRAGSHI_IP6RXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6RXFRAGSHI_IP6RXFRAGSHI_SHIFT) +#define I40E_GLPES_VFIP6RXFRAGSLO(_i) (0x00019400 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXFRAGSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXFRAGSLO_IP6RXFRAGSLO_SHIFT 0 +#define I40E_GLPES_VFIP6RXFRAGSLO_IP6RXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXFRAGSLO_IP6RXFRAGSLO_SHIFT) +#define I40E_GLPES_VFIP6RXMCOCTSHI(_i) (0x00019604 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXMCOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXMCOCTSHI_IP6RXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6RXMCOCTSHI_IP6RXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6RXMCOCTSHI_IP6RXMCOCTSHI_SHIFT) +#define I40E_GLPES_VFIP6RXMCOCTSLO(_i) (0x00019600 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXMCOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXMCOCTSLO_IP6RXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6RXMCOCTSLO_IP6RXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXMCOCTSLO_IP6RXMCOCTSLO_SHIFT) +#define I40E_GLPES_VFIP6RXMCPKTSHI(_i) (0x00019804 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXMCPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXMCPKTSHI_IP6RXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6RXMCPKTSHI_IP6RXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6RXMCPKTSHI_IP6RXMCPKTSHI_SHIFT) +#define I40E_GLPES_VFIP6RXMCPKTSLO(_i) (0x00019800 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXMCPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXMCPKTSLO_IP6RXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6RXMCPKTSLO_IP6RXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXMCPKTSLO_IP6RXMCPKTSLO_SHIFT) +#define I40E_GLPES_VFIP6RXOCTSHI(_i) (0x00018E04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXOCTSHI_IP6RXOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6RXOCTSHI_IP6RXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6RXOCTSHI_IP6RXOCTSHI_SHIFT) +#define I40E_GLPES_VFIP6RXOCTSLO(_i) (0x00018E00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXOCTSLO_IP6RXOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6RXOCTSLO_IP6RXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXOCTSLO_IP6RXOCTSLO_SHIFT) +#define I40E_GLPES_VFIP6RXPKTSHI(_i) (0x00019004 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXPKTSHI_IP6RXPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6RXPKTSHI_IP6RXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6RXPKTSHI_IP6RXPKTSHI_SHIFT) +#define I40E_GLPES_VFIP6RXPKTSLO(_i) (0x00019000 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXPKTSLO_IP6RXPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6RXPKTSLO_IP6RXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXPKTSLO_IP6RXPKTSLO_SHIFT) +#define I40E_GLPES_VFIP6RXTRUNC(_i) (0x00019300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6RXTRUNC_MAX_INDEX 31 +#define I40E_GLPES_VFIP6RXTRUNC_IP6RXTRUNC_SHIFT 0 +#define I40E_GLPES_VFIP6RXTRUNC_IP6RXTRUNC_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6RXTRUNC_IP6RXTRUNC_SHIFT) +#define I40E_GLPES_VFIP6TXFRAGSHI(_i) (0x0001A804 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXFRAGSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXFRAGSHI_IP6TXFRAGSHI_SHIFT 0 +#define I40E_GLPES_VFIP6TXFRAGSHI_IP6TXFRAGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6TXFRAGSHI_IP6TXFRAGSHI_SHIFT) +#define I40E_GLPES_VFIP6TXFRAGSLO(_i) (0x0001A800 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXFRAGSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXFRAGSLO_IP6TXFRAGSLO_SHIFT 0 +#define I40E_GLPES_VFIP6TXFRAGSLO_IP6TXFRAGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6TXFRAGSLO_IP6TXFRAGSLO_SHIFT) +#define I40E_GLPES_VFIP6TXMCOCTSHI(_i) (0x0001AA04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXMCOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXMCOCTSHI_IP6TXMCOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6TXMCOCTSHI_IP6TXMCOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6TXMCOCTSHI_IP6TXMCOCTSHI_SHIFT) +#define I40E_GLPES_VFIP6TXMCOCTSLO(_i) (0x0001AA00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXMCOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXMCOCTSLO_IP6TXMCOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6TXMCOCTSLO_IP6TXMCOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6TXMCOCTSLO_IP6TXMCOCTSLO_SHIFT) +#define I40E_GLPES_VFIP6TXMCPKTSHI(_i) (0x0001AC04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXMCPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXMCPKTSHI_IP6TXMCPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6TXMCPKTSHI_IP6TXMCPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6TXMCPKTSHI_IP6TXMCPKTSHI_SHIFT) +#define I40E_GLPES_VFIP6TXMCPKTSLO(_i) (0x0001AC00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXMCPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXMCPKTSLO_IP6TXMCPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6TXMCPKTSLO_IP6TXMCPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6TXMCPKTSLO_IP6TXMCPKTSLO_SHIFT) +#define I40E_GLPES_VFIP6TXNOROUTE(_i) (0x0001AF00 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXNOROUTE_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXNOROUTE_IP6TXNOROUTE_SHIFT 0 +#define I40E_GLPES_VFIP6TXNOROUTE_IP6TXNOROUTE_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_VFIP6TXNOROUTE_IP6TXNOROUTE_SHIFT) +#define I40E_GLPES_VFIP6TXOCTSHI(_i) (0x0001A404 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXOCTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXOCTSHI_IP6TXOCTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6TXOCTSHI_IP6TXOCTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6TXOCTSHI_IP6TXOCTSHI_SHIFT) +#define I40E_GLPES_VFIP6TXOCTSLO(_i) (0x0001A400 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXOCTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXOCTSLO_IP6TXOCTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6TXOCTSLO_IP6TXOCTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6TXOCTSLO_IP6TXOCTSLO_SHIFT) +#define I40E_GLPES_VFIP6TXPKTSHI(_i) (0x0001A604 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXPKTSHI_IP6TXPKTSHI_SHIFT 0 +#define I40E_GLPES_VFIP6TXPKTSHI_IP6TXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFIP6TXPKTSHI_IP6TXPKTSHI_SHIFT) +#define I40E_GLPES_VFIP6TXPKTSLO(_i) (0x0001A600 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFIP6TXPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFIP6TXPKTSLO_IP6TXPKTSLO_SHIFT 0 +#define I40E_GLPES_VFIP6TXPKTSLO_IP6TXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFIP6TXPKTSLO_IP6TXPKTSLO_SHIFT) +#define I40E_GLPES_VFRDMARXRDSHI(_i) (0x0001BE04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMARXRDSHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMARXRDSHI_RDMARXRDSHI_SHIFT 0 +#define I40E_GLPES_VFRDMARXRDSHI_RDMARXRDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFRDMARXRDSHI_RDMARXRDSHI_SHIFT) +#define I40E_GLPES_VFRDMARXRDSLO(_i) (0x0001BE00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMARXRDSLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMARXRDSLO_RDMARXRDSLO_SHIFT 0 +#define I40E_GLPES_VFRDMARXRDSLO_RDMARXRDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMARXRDSLO_RDMARXRDSLO_SHIFT) +#define I40E_GLPES_VFRDMARXSNDSHI(_i) (0x0001C004 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMARXSNDSHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMARXSNDSHI_RDMARXSNDSHI_SHIFT 0 +#define I40E_GLPES_VFRDMARXSNDSHI_RDMARXSNDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFRDMARXSNDSHI_RDMARXSNDSHI_SHIFT) +#define I40E_GLPES_VFRDMARXSNDSLO(_i) (0x0001C000 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMARXSNDSLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMARXSNDSLO_RDMARXSNDSLO_SHIFT 0 +#define I40E_GLPES_VFRDMARXSNDSLO_RDMARXSNDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMARXSNDSLO_RDMARXSNDSLO_SHIFT) +#define I40E_GLPES_VFRDMARXWRSHI(_i) (0x0001BC04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMARXWRSHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMARXWRSHI_RDMARXWRSHI_SHIFT 0 +#define I40E_GLPES_VFRDMARXWRSHI_RDMARXWRSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFRDMARXWRSHI_RDMARXWRSHI_SHIFT) +#define I40E_GLPES_VFRDMARXWRSLO(_i) (0x0001BC00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMARXWRSLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMARXWRSLO_RDMARXWRSLO_SHIFT 0 +#define I40E_GLPES_VFRDMARXWRSLO_RDMARXWRSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMARXWRSLO_RDMARXWRSLO_SHIFT) +#define I40E_GLPES_VFRDMATXRDSHI(_i) (0x0001C404 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMATXRDSHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMATXRDSHI_RDMARXRDSHI_SHIFT 0 +#define I40E_GLPES_VFRDMATXRDSHI_RDMARXRDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFRDMATXRDSHI_RDMARXRDSHI_SHIFT) +#define I40E_GLPES_VFRDMATXRDSLO(_i) (0x0001C400 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMATXRDSLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMATXRDSLO_RDMARXRDSLO_SHIFT 0 +#define I40E_GLPES_VFRDMATXRDSLO_RDMARXRDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMATXRDSLO_RDMARXRDSLO_SHIFT) +#define I40E_GLPES_VFRDMATXSNDSHI(_i) (0x0001C604 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMATXSNDSHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMATXSNDSHI_RDMARXSNDSHI_SHIFT 0 +#define I40E_GLPES_VFRDMATXSNDSHI_RDMARXSNDSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFRDMATXSNDSHI_RDMARXSNDSHI_SHIFT) +#define I40E_GLPES_VFRDMATXSNDSLO(_i) (0x0001C600 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMATXSNDSLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMATXSNDSLO_RDMARXSNDSLO_SHIFT 0 +#define I40E_GLPES_VFRDMATXSNDSLO_RDMARXSNDSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMATXSNDSLO_RDMARXSNDSLO_SHIFT) +#define I40E_GLPES_VFRDMATXWRSHI(_i) (0x0001C204 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMATXWRSHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMATXWRSHI_RDMARXWRSHI_SHIFT 0 +#define I40E_GLPES_VFRDMATXWRSHI_RDMARXWRSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFRDMATXWRSHI_RDMARXWRSHI_SHIFT) +#define I40E_GLPES_VFRDMATXWRSLO(_i) (0x0001C200 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMATXWRSLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMATXWRSLO_RDMARXWRSLO_SHIFT 0 +#define I40E_GLPES_VFRDMATXWRSLO_RDMARXWRSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMATXWRSLO_RDMARXWRSLO_SHIFT) +#define I40E_GLPES_VFRDMAVBNDHI(_i) (0x0001C804 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMAVBNDHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMAVBNDHI_RDMAVBNDHI_SHIFT 0 +#define I40E_GLPES_VFRDMAVBNDHI_RDMAVBNDHI_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMAVBNDHI_RDMAVBNDHI_SHIFT) +#define I40E_GLPES_VFRDMAVBNDLO(_i) (0x0001C800 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMAVBNDLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMAVBNDLO_RDMAVBNDLO_SHIFT 0 +#define I40E_GLPES_VFRDMAVBNDLO_RDMAVBNDLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMAVBNDLO_RDMAVBNDLO_SHIFT) +#define I40E_GLPES_VFRDMAVINVHI(_i) (0x0001CA04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMAVINVHI_MAX_INDEX 31 +#define I40E_GLPES_VFRDMAVINVHI_RDMAVINVHI_SHIFT 0 +#define I40E_GLPES_VFRDMAVINVHI_RDMAVINVHI_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMAVINVHI_RDMAVINVHI_SHIFT) +#define I40E_GLPES_VFRDMAVINVLO(_i) (0x0001CA00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRDMAVINVLO_MAX_INDEX 31 +#define I40E_GLPES_VFRDMAVINVLO_RDMAVINVLO_SHIFT 0 +#define I40E_GLPES_VFRDMAVINVLO_RDMAVINVLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFRDMAVINVLO_RDMAVINVLO_SHIFT) +#define I40E_GLPES_VFRXVLANERR(_i) (0x00018000 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFRXVLANERR_MAX_INDEX 31 +#define I40E_GLPES_VFRXVLANERR_RXVLANERR_SHIFT 0 +#define I40E_GLPES_VFRXVLANERR_RXVLANERR_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_VFRXVLANERR_RXVLANERR_SHIFT) +#define I40E_GLPES_VFTCPRTXSEG(_i) (0x0001B600 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPRTXSEG_MAX_INDEX 31 +#define I40E_GLPES_VFTCPRTXSEG_TCPRTXSEG_SHIFT 0 +#define I40E_GLPES_VFTCPRTXSEG_TCPRTXSEG_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFTCPRTXSEG_TCPRTXSEG_SHIFT) +#define I40E_GLPES_VFTCPRXOPTERR(_i) (0x0001B200 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPRXOPTERR_MAX_INDEX 31 +#define I40E_GLPES_VFTCPRXOPTERR_TCPRXOPTERR_SHIFT 0 +#define I40E_GLPES_VFTCPRXOPTERR_TCPRXOPTERR_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_VFTCPRXOPTERR_TCPRXOPTERR_SHIFT) +#define I40E_GLPES_VFTCPRXPROTOERR(_i) (0x0001B300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPRXPROTOERR_MAX_INDEX 31 +#define I40E_GLPES_VFTCPRXPROTOERR_TCPRXPROTOERR_SHIFT 0 +#define I40E_GLPES_VFTCPRXPROTOERR_TCPRXPROTOERR_MASK I40E_MASK(0xFFFFFF, I40E_GLPES_VFTCPRXPROTOERR_TCPRXPROTOERR_SHIFT) +#define I40E_GLPES_VFTCPRXSEGSHI(_i) (0x0001B004 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPRXSEGSHI_MAX_INDEX 31 +#define I40E_GLPES_VFTCPRXSEGSHI_TCPRXSEGSHI_SHIFT 0 +#define I40E_GLPES_VFTCPRXSEGSHI_TCPRXSEGSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFTCPRXSEGSHI_TCPRXSEGSHI_SHIFT) +#define I40E_GLPES_VFTCPRXSEGSLO(_i) (0x0001B000 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPRXSEGSLO_MAX_INDEX 31 +#define I40E_GLPES_VFTCPRXSEGSLO_TCPRXSEGSLO_SHIFT 0 +#define I40E_GLPES_VFTCPRXSEGSLO_TCPRXSEGSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFTCPRXSEGSLO_TCPRXSEGSLO_SHIFT) +#define I40E_GLPES_VFTCPTXSEGHI(_i) (0x0001B404 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPTXSEGHI_MAX_INDEX 31 +#define I40E_GLPES_VFTCPTXSEGHI_TCPTXSEGHI_SHIFT 0 +#define I40E_GLPES_VFTCPTXSEGHI_TCPTXSEGHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFTCPTXSEGHI_TCPTXSEGHI_SHIFT) +#define I40E_GLPES_VFTCPTXSEGLO(_i) (0x0001B400 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFTCPTXSEGLO_MAX_INDEX 31 +#define I40E_GLPES_VFTCPTXSEGLO_TCPTXSEGLO_SHIFT 0 +#define I40E_GLPES_VFTCPTXSEGLO_TCPTXSEGLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFTCPTXSEGLO_TCPTXSEGLO_SHIFT) +#define I40E_GLPES_VFUDPRXPKTSHI(_i) (0x0001B804 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFUDPRXPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFUDPRXPKTSHI_UDPRXPKTSHI_SHIFT 0 +#define I40E_GLPES_VFUDPRXPKTSHI_UDPRXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFUDPRXPKTSHI_UDPRXPKTSHI_SHIFT) +#define I40E_GLPES_VFUDPRXPKTSLO(_i) (0x0001B800 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFUDPRXPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFUDPRXPKTSLO_UDPRXPKTSLO_SHIFT 0 +#define I40E_GLPES_VFUDPRXPKTSLO_UDPRXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFUDPRXPKTSLO_UDPRXPKTSLO_SHIFT) +#define I40E_GLPES_VFUDPTXPKTSHI(_i) (0x0001BA04 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFUDPTXPKTSHI_MAX_INDEX 31 +#define I40E_GLPES_VFUDPTXPKTSHI_UDPTXPKTSHI_SHIFT 0 +#define I40E_GLPES_VFUDPTXPKTSHI_UDPTXPKTSHI_MASK I40E_MASK(0xFFFF, I40E_GLPES_VFUDPTXPKTSHI_UDPTXPKTSHI_SHIFT) +#define I40E_GLPES_VFUDPTXPKTSLO(_i) (0x0001BA00 + ((_i) * 8)) /* _i=0...31 */ /* Reset: PE_CORER */ +#define I40E_GLPES_VFUDPTXPKTSLO_MAX_INDEX 31 +#define I40E_GLPES_VFUDPTXPKTSLO_UDPTXPKTSLO_SHIFT 0 +#define I40E_GLPES_VFUDPTXPKTSLO_UDPTXPKTSLO_MASK I40E_MASK(0xFFFFFFFF, I40E_GLPES_VFUDPTXPKTSLO_UDPTXPKTSLO_SHIFT) +#define I40E_GLGEN_PME_TO 0x000B81BC /* Reset: POR */ +#define I40E_GLGEN_PME_TO_PME_TO_FOR_PE_SHIFT 0 +#define I40E_GLGEN_PME_TO_PME_TO_FOR_PE_MASK I40E_MASK(0x1, I40E_GLGEN_PME_TO_PME_TO_FOR_PE_SHIFT) +#define I40E_GLQF_APBVT(_i) (0x00260000 + ((_i) * 4)) /* _i=0...2047 */ /* Reset: CORER */ +#define I40E_GLQF_APBVT_MAX_INDEX 2047 +#define I40E_GLQF_APBVT_APBVT_SHIFT 0 +#define I40E_GLQF_APBVT_APBVT_MASK I40E_MASK(0xFFFFFFFF, I40E_GLQF_APBVT_APBVT_SHIFT) +#define I40E_GLQF_FD_PCTYPES(_i) (0x00268000 + ((_i) * 4)) /* _i=0...63 */ /* Reset: POR */ +#define I40E_GLQF_FD_PCTYPES_MAX_INDEX 63 +#define I40E_GLQF_FD_PCTYPES_FD_PCTYPE_SHIFT 0 +#define I40E_GLQF_FD_PCTYPES_FD_PCTYPE_MASK I40E_MASK(0x3F, I40E_GLQF_FD_PCTYPES_FD_PCTYPE_SHIFT) +#define I40E_GLQF_FDEVICTENA(_i) (0x00270384 + ((_i) * 4)) /* _i=0...1 */ /* Reset: CORER */ +#define I40E_GLQF_FDEVICTENA_MAX_INDEX 1 +#define I40E_GLQF_FDEVICTENA_GLQF_FDEVICTENA_SHIFT 0 +#define I40E_GLQF_FDEVICTENA_GLQF_FDEVICTENA_MASK I40E_MASK(0xFFFFFFFF, I40E_GLQF_FDEVICTENA_GLQF_FDEVICTENA_SHIFT) +#define I40E_GLQF_FDEVICTFLAG 0x00270280 /* Reset: CORER */ +#define I40E_GLQF_FDEVICTFLAG_TX_FLAGS_SHIFT 0 +#define I40E_GLQF_FDEVICTFLAG_TX_FLAGS_MASK I40E_MASK(0xFF, I40E_GLQF_FDEVICTFLAG_TX_FLAGS_SHIFT) +#define I40E_GLQF_FDEVICTFLAG_RX_FLAGS_SHIFT 8 +#define I40E_GLQF_FDEVICTFLAG_RX_FLAGS_MASK I40E_MASK(0xFF, I40E_GLQF_FDEVICTFLAG_RX_FLAGS_SHIFT) +#define I40E_PFQF_CTL_2 0x00270300 /* Reset: CORER */ +#define I40E_PFQF_CTL_2_PEHSIZE_SHIFT 0 +#define I40E_PFQF_CTL_2_PEHSIZE_MASK I40E_MASK(0x1F, I40E_PFQF_CTL_2_PEHSIZE_SHIFT) +#define I40E_PFQF_CTL_2_PEDSIZE_SHIFT 5 +#define I40E_PFQF_CTL_2_PEDSIZE_MASK I40E_MASK(0x1F, I40E_PFQF_CTL_2_PEDSIZE_SHIFT) +/* Redefined for X722 family */ +#define I40E_X722_PFQF_HLUT(_i) (0x00240000 + ((_i) * 128)) /* _i=0...127 */ /* Reset: CORER */ +#define I40E_X722_PFQF_HLUT_MAX_INDEX 127 +#define I40E_X722_PFQF_HLUT_LUT0_SHIFT 0 +#define I40E_X722_PFQF_HLUT_LUT0_MASK I40E_MASK(0x7F, I40E_X722_PFQF_HLUT_LUT0_SHIFT) +#define I40E_X722_PFQF_HLUT_LUT1_SHIFT 8 +#define I40E_X722_PFQF_HLUT_LUT1_MASK I40E_MASK(0x7F, I40E_X722_PFQF_HLUT_LUT1_SHIFT) +#define I40E_X722_PFQF_HLUT_LUT2_SHIFT 16 +#define I40E_X722_PFQF_HLUT_LUT2_MASK I40E_MASK(0x7F, I40E_X722_PFQF_HLUT_LUT2_SHIFT) +#define I40E_X722_PFQF_HLUT_LUT3_SHIFT 24 +#define I40E_X722_PFQF_HLUT_LUT3_MASK I40E_MASK(0x7F, I40E_X722_PFQF_HLUT_LUT3_SHIFT) +#define I40E_PFQF_HREGION(_i) (0x00245400 + ((_i) * 128)) /* _i=0...7 */ /* Reset: CORER */ +#define I40E_PFQF_HREGION_MAX_INDEX 7 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_0_SHIFT 0 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_0_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_0_SHIFT) +#define I40E_PFQF_HREGION_REGION_0_SHIFT 1 +#define I40E_PFQF_HREGION_REGION_0_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_0_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_1_SHIFT 4 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_1_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_1_SHIFT) +#define I40E_PFQF_HREGION_REGION_1_SHIFT 5 +#define I40E_PFQF_HREGION_REGION_1_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_1_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_2_SHIFT 8 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_2_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_2_SHIFT) +#define I40E_PFQF_HREGION_REGION_2_SHIFT 9 +#define I40E_PFQF_HREGION_REGION_2_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_2_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_3_SHIFT 12 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_3_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_3_SHIFT) +#define I40E_PFQF_HREGION_REGION_3_SHIFT 13 +#define I40E_PFQF_HREGION_REGION_3_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_3_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_4_SHIFT 16 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_4_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_4_SHIFT) +#define I40E_PFQF_HREGION_REGION_4_SHIFT 17 +#define I40E_PFQF_HREGION_REGION_4_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_4_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_5_SHIFT 20 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_5_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_5_SHIFT) +#define I40E_PFQF_HREGION_REGION_5_SHIFT 21 +#define I40E_PFQF_HREGION_REGION_5_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_5_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_6_SHIFT 24 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_6_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_6_SHIFT) +#define I40E_PFQF_HREGION_REGION_6_SHIFT 25 +#define I40E_PFQF_HREGION_REGION_6_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_6_SHIFT) +#define I40E_PFQF_HREGION_OVERRIDE_ENA_7_SHIFT 28 +#define I40E_PFQF_HREGION_OVERRIDE_ENA_7_MASK I40E_MASK(0x1, I40E_PFQF_HREGION_OVERRIDE_ENA_7_SHIFT) +#define I40E_PFQF_HREGION_REGION_7_SHIFT 29 +#define I40E_PFQF_HREGION_REGION_7_MASK I40E_MASK(0x7, I40E_PFQF_HREGION_REGION_7_SHIFT) +#define I40E_VSIQF_CTL_RSS_LUT_TYPE_SHIFT 8 +#define I40E_VSIQF_CTL_RSS_LUT_TYPE_MASK I40E_MASK(0x1, I40E_VSIQF_CTL_RSS_LUT_TYPE_SHIFT) +#define I40E_VSIQF_HKEY(_i, _VSI) (0x002A0000 + ((_i) * 2048 + (_VSI) * 4)) /* _i=0...12, _VSI=0...383 */ /* Reset: CORER */ +#define I40E_VSIQF_HKEY_MAX_INDEX 12 +#define I40E_VSIQF_HKEY_KEY_0_SHIFT 0 +#define I40E_VSIQF_HKEY_KEY_0_MASK I40E_MASK(0xFF, I40E_VSIQF_HKEY_KEY_0_SHIFT) +#define I40E_VSIQF_HKEY_KEY_1_SHIFT 8 +#define I40E_VSIQF_HKEY_KEY_1_MASK I40E_MASK(0xFF, I40E_VSIQF_HKEY_KEY_1_SHIFT) +#define I40E_VSIQF_HKEY_KEY_2_SHIFT 16 +#define I40E_VSIQF_HKEY_KEY_2_MASK I40E_MASK(0xFF, I40E_VSIQF_HKEY_KEY_2_SHIFT) +#define I40E_VSIQF_HKEY_KEY_3_SHIFT 24 +#define I40E_VSIQF_HKEY_KEY_3_MASK I40E_MASK(0xFF, I40E_VSIQF_HKEY_KEY_3_SHIFT) +#define I40E_VSIQF_HLUT(_i, _VSI) (0x00220000 + ((_i) * 2048 + (_VSI) * 4)) /* _i=0...15, _VSI=0...383 */ /* Reset: CORER */ +#define I40E_VSIQF_HLUT_MAX_INDEX 15 +#define I40E_VSIQF_HLUT_LUT0_SHIFT 0 +#define I40E_VSIQF_HLUT_LUT0_MASK I40E_MASK(0xF, I40E_VSIQF_HLUT_LUT0_SHIFT) +#define I40E_VSIQF_HLUT_LUT1_SHIFT 8 +#define I40E_VSIQF_HLUT_LUT1_MASK I40E_MASK(0xF, I40E_VSIQF_HLUT_LUT1_SHIFT) +#define I40E_VSIQF_HLUT_LUT2_SHIFT 16 +#define I40E_VSIQF_HLUT_LUT2_MASK I40E_MASK(0xF, I40E_VSIQF_HLUT_LUT2_SHIFT) +#define I40E_VSIQF_HLUT_LUT3_SHIFT 24 +#define I40E_VSIQF_HLUT_LUT3_MASK I40E_MASK(0xF, I40E_VSIQF_HLUT_LUT3_SHIFT) +#define I40E_GLGEN_STAT_CLEAR 0x00390004 /* Reset: CORER */ +#define I40E_GLGEN_STAT_CLEAR_GLGEN_STAT_CLEAR_SHIFT 0 +#define I40E_GLGEN_STAT_CLEAR_GLGEN_STAT_CLEAR_MASK I40E_MASK(0x1, I40E_GLGEN_STAT_CLEAR_GLGEN_STAT_CLEAR_SHIFT) +#define I40E_GLGEN_STAT_HALT 0x00390000 /* Reset: CORER */ +#define I40E_GLGEN_STAT_HALT_HALT_CELLS_SHIFT 0 +#define I40E_GLGEN_STAT_HALT_HALT_CELLS_MASK I40E_MASK(0x3FFFFFFF, I40E_GLGEN_STAT_HALT_HALT_CELLS_SHIFT) +#define I40E_VFINT_DYN_CTL01_WB_ON_ITR_SHIFT 30 +#define I40E_VFINT_DYN_CTL01_WB_ON_ITR_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTL01_WB_ON_ITR_SHIFT) +#define I40E_VFINT_DYN_CTLN1_WB_ON_ITR_SHIFT 30 +#define I40E_VFINT_DYN_CTLN1_WB_ON_ITR_MASK I40E_MASK(0x1, I40E_VFINT_DYN_CTLN1_WB_ON_ITR_SHIFT) +#define I40E_VFPE_AEQALLOC1 0x0000A400 /* Reset: VFR */ +#define I40E_VFPE_AEQALLOC1_AECOUNT_SHIFT 0 +#define I40E_VFPE_AEQALLOC1_AECOUNT_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_AEQALLOC1_AECOUNT_SHIFT) +#define I40E_VFPE_CCQPHIGH1 0x00009800 /* Reset: VFR */ +#define I40E_VFPE_CCQPHIGH1_PECCQPHIGH_SHIFT 0 +#define I40E_VFPE_CCQPHIGH1_PECCQPHIGH_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_CCQPHIGH1_PECCQPHIGH_SHIFT) +#define I40E_VFPE_CCQPLOW1 0x0000AC00 /* Reset: VFR */ +#define I40E_VFPE_CCQPLOW1_PECCQPLOW_SHIFT 0 +#define I40E_VFPE_CCQPLOW1_PECCQPLOW_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_CCQPLOW1_PECCQPLOW_SHIFT) +#define I40E_VFPE_CCQPSTATUS1 0x0000B800 /* Reset: VFR */ +#define I40E_VFPE_CCQPSTATUS1_CCQP_DONE_SHIFT 0 +#define I40E_VFPE_CCQPSTATUS1_CCQP_DONE_MASK I40E_MASK(0x1, I40E_VFPE_CCQPSTATUS1_CCQP_DONE_SHIFT) +#define I40E_VFPE_CCQPSTATUS1_HMC_PROFILE_SHIFT 4 +#define I40E_VFPE_CCQPSTATUS1_HMC_PROFILE_MASK I40E_MASK(0x7, I40E_VFPE_CCQPSTATUS1_HMC_PROFILE_SHIFT) +#define I40E_VFPE_CCQPSTATUS1_RDMA_EN_VFS_SHIFT 16 +#define I40E_VFPE_CCQPSTATUS1_RDMA_EN_VFS_MASK I40E_MASK(0x3F, I40E_VFPE_CCQPSTATUS1_RDMA_EN_VFS_SHIFT) +#define I40E_VFPE_CCQPSTATUS1_CCQP_ERR_SHIFT 31 +#define I40E_VFPE_CCQPSTATUS1_CCQP_ERR_MASK I40E_MASK(0x1, I40E_VFPE_CCQPSTATUS1_CCQP_ERR_SHIFT) +#define I40E_VFPE_CQACK1 0x0000B000 /* Reset: VFR */ +#define I40E_VFPE_CQACK1_PECQID_SHIFT 0 +#define I40E_VFPE_CQACK1_PECQID_MASK I40E_MASK(0x1FFFF, I40E_VFPE_CQACK1_PECQID_SHIFT) +#define I40E_VFPE_CQARM1 0x0000B400 /* Reset: VFR */ +#define I40E_VFPE_CQARM1_PECQID_SHIFT 0 +#define I40E_VFPE_CQARM1_PECQID_MASK I40E_MASK(0x1FFFF, I40E_VFPE_CQARM1_PECQID_SHIFT) +#define I40E_VFPE_CQPDB1 0x0000BC00 /* Reset: VFR */ +#define I40E_VFPE_CQPDB1_WQHEAD_SHIFT 0 +#define I40E_VFPE_CQPDB1_WQHEAD_MASK I40E_MASK(0x7FF, I40E_VFPE_CQPDB1_WQHEAD_SHIFT) +#define I40E_VFPE_CQPERRCODES1 0x00009C00 /* Reset: VFR */ +#define I40E_VFPE_CQPERRCODES1_CQP_MINOR_CODE_SHIFT 0 +#define I40E_VFPE_CQPERRCODES1_CQP_MINOR_CODE_MASK I40E_MASK(0xFFFF, I40E_VFPE_CQPERRCODES1_CQP_MINOR_CODE_SHIFT) +#define I40E_VFPE_CQPERRCODES1_CQP_MAJOR_CODE_SHIFT 16 +#define I40E_VFPE_CQPERRCODES1_CQP_MAJOR_CODE_MASK I40E_MASK(0xFFFF, I40E_VFPE_CQPERRCODES1_CQP_MAJOR_CODE_SHIFT) +#define I40E_VFPE_CQPTAIL1 0x0000A000 /* Reset: VFR */ +#define I40E_VFPE_CQPTAIL1_WQTAIL_SHIFT 0 +#define I40E_VFPE_CQPTAIL1_WQTAIL_MASK I40E_MASK(0x7FF, I40E_VFPE_CQPTAIL1_WQTAIL_SHIFT) +#define I40E_VFPE_CQPTAIL1_CQP_OP_ERR_SHIFT 31 +#define I40E_VFPE_CQPTAIL1_CQP_OP_ERR_MASK I40E_MASK(0x1, I40E_VFPE_CQPTAIL1_CQP_OP_ERR_SHIFT) +#define I40E_VFPE_IPCONFIG01 0x00008C00 /* Reset: VFR */ +#define I40E_VFPE_IPCONFIG01_PEIPID_SHIFT 0 +#define I40E_VFPE_IPCONFIG01_PEIPID_MASK I40E_MASK(0xFFFF, I40E_VFPE_IPCONFIG01_PEIPID_SHIFT) +#define I40E_VFPE_IPCONFIG01_USEENTIREIDRANGE_SHIFT 16 +#define I40E_VFPE_IPCONFIG01_USEENTIREIDRANGE_MASK I40E_MASK(0x1, I40E_VFPE_IPCONFIG01_USEENTIREIDRANGE_SHIFT) +#define I40E_VFPE_MRTEIDXMASK1 0x00009000 /* Reset: VFR */ +#define I40E_VFPE_MRTEIDXMASK1_MRTEIDXMASKBITS_SHIFT 0 +#define I40E_VFPE_MRTEIDXMASK1_MRTEIDXMASKBITS_MASK I40E_MASK(0x1F, I40E_VFPE_MRTEIDXMASK1_MRTEIDXMASKBITS_SHIFT) +#define I40E_VFPE_RCVUNEXPECTEDERROR1 0x00009400 /* Reset: VFR */ +#define I40E_VFPE_RCVUNEXPECTEDERROR1_TCP_RX_UNEXP_ERR_SHIFT 0 +#define I40E_VFPE_RCVUNEXPECTEDERROR1_TCP_RX_UNEXP_ERR_MASK I40E_MASK(0xFFFFFF, I40E_VFPE_RCVUNEXPECTEDERROR1_TCP_RX_UNEXP_ERR_SHIFT) +#define I40E_VFPE_TCPNOWTIMER1 0x0000A800 /* Reset: VFR */ +#define I40E_VFPE_TCPNOWTIMER1_TCP_NOW_SHIFT 0 +#define I40E_VFPE_TCPNOWTIMER1_TCP_NOW_MASK I40E_MASK(0xFFFFFFFF, I40E_VFPE_TCPNOWTIMER1_TCP_NOW_SHIFT) +#define I40E_VFPE_WQEALLOC1 0x0000C000 /* Reset: VFR */ +#define I40E_VFPE_WQEALLOC1_PEQPID_SHIFT 0 +#define I40E_VFPE_WQEALLOC1_PEQPID_MASK I40E_MASK(0x3FFFF, I40E_VFPE_WQEALLOC1_PEQPID_SHIFT) +#define I40E_VFPE_WQEALLOC1_WQE_DESC_INDEX_SHIFT 20 +#define I40E_VFPE_WQEALLOC1_WQE_DESC_INDEX_MASK I40E_MASK(0xFFF, I40E_VFPE_WQEALLOC1_WQE_DESC_INDEX_SHIFT) + +#endif /* X722_SUPPORT */ #endif /* _I40E_REGISTER_H_ */ diff --git a/sys/dev/ixl/i40e_type.h b/sys/dev/ixl/i40e_type.h index 1de747dfc9a4..01762e7075c1 100644 --- a/sys/dev/ixl/i40e_type.h +++ b/sys/dev/ixl/i40e_type.h @@ -41,29 +41,12 @@ #include "i40e_adminq.h" #include "i40e_hmc.h" #include "i40e_lan_hmc.h" +#include "i40e_devids.h" #define UNREFERENCED_XPARAMETER -/* Vendor ID */ -#define I40E_INTEL_VENDOR_ID 0x8086 - -/* Device IDs */ -#define I40E_DEV_ID_SFP_XL710 0x1572 -#define I40E_DEV_ID_QEMU 0x1574 -#define I40E_DEV_ID_KX_A 0x157F -#define I40E_DEV_ID_KX_B 0x1580 -#define I40E_DEV_ID_KX_C 0x1581 -#define I40E_DEV_ID_QSFP_A 0x1583 -#define I40E_DEV_ID_QSFP_B 0x1584 -#define I40E_DEV_ID_QSFP_C 0x1585 -#define I40E_DEV_ID_10G_BASE_T 0x1586 -#define I40E_DEV_ID_20G_KR2 0x1587 -#define I40E_DEV_ID_VF 0x154C -#define I40E_DEV_ID_VF_HV 0x1571 - -#define i40e_is_40G_device(d) ((d) == I40E_DEV_ID_QSFP_A || \ - (d) == I40E_DEV_ID_QSFP_B || \ - (d) == I40E_DEV_ID_QSFP_C) +#define BIT(a) (1UL << (a)) +#define BIT_ULL(a) (1ULL << (a)) #ifndef I40E_MASK /* I40E_MASK is a macro used on 32 bit registers */ @@ -191,6 +174,10 @@ enum i40e_mac_type { I40E_MAC_X710, I40E_MAC_XL710, I40E_MAC_VF, +#ifdef X722_SUPPORT + I40E_MAC_X722, + I40E_MAC_X722_VF, +#endif I40E_MAC_GENERIC, }; @@ -222,14 +209,14 @@ enum i40e_set_fc_aq_failures { }; enum i40e_vsi_type { - I40E_VSI_MAIN = 0, - I40E_VSI_VMDQ1, - I40E_VSI_VMDQ2, - I40E_VSI_CTRL, - I40E_VSI_FCOE, - I40E_VSI_MIRROR, - I40E_VSI_SRIOV, - I40E_VSI_FDIR, + I40E_VSI_MAIN = 0, + I40E_VSI_VMDQ1 = 1, + I40E_VSI_VMDQ2 = 2, + I40E_VSI_CTRL = 3, + I40E_VSI_FCOE = 4, + I40E_VSI_MIRROR = 5, + I40E_VSI_SRIOV = 6, + I40E_VSI_FDIR = 7, I40E_VSI_TYPE_UNKNOWN }; @@ -253,16 +240,64 @@ struct i40e_link_status { bool crc_enable; u8 pacing; u8 requested_speeds; + u8 module_type[3]; + /* 1st byte: module identifier */ +#define I40E_MODULE_TYPE_SFP 0x03 +#define I40E_MODULE_TYPE_QSFP 0x0D + /* 2nd byte: ethernet compliance codes for 10/40G */ +#define I40E_MODULE_TYPE_40G_ACTIVE 0x01 +#define I40E_MODULE_TYPE_40G_LR4 0x02 +#define I40E_MODULE_TYPE_40G_SR4 0x04 +#define I40E_MODULE_TYPE_40G_CR4 0x08 +#define I40E_MODULE_TYPE_10G_BASE_SR 0x10 +#define I40E_MODULE_TYPE_10G_BASE_LR 0x20 +#define I40E_MODULE_TYPE_10G_BASE_LRM 0x40 +#define I40E_MODULE_TYPE_10G_BASE_ER 0x80 + /* 3rd byte: ethernet compliance codes for 1G */ +#define I40E_MODULE_TYPE_1000BASE_SX 0x01 +#define I40E_MODULE_TYPE_1000BASE_LX 0x02 +#define I40E_MODULE_TYPE_1000BASE_CX 0x04 +#define I40E_MODULE_TYPE_1000BASE_T 0x08 +}; + +enum i40e_aq_capabilities_phy_type { + I40E_CAP_PHY_TYPE_SGMII = BIT(I40E_PHY_TYPE_SGMII), + I40E_CAP_PHY_TYPE_1000BASE_KX = BIT(I40E_PHY_TYPE_1000BASE_KX), + I40E_CAP_PHY_TYPE_10GBASE_KX4 = BIT(I40E_PHY_TYPE_10GBASE_KX4), + I40E_CAP_PHY_TYPE_10GBASE_KR = BIT(I40E_PHY_TYPE_10GBASE_KR), + I40E_CAP_PHY_TYPE_40GBASE_KR4 = BIT(I40E_PHY_TYPE_40GBASE_KR4), + I40E_CAP_PHY_TYPE_XAUI = BIT(I40E_PHY_TYPE_XAUI), + I40E_CAP_PHY_TYPE_XFI = BIT(I40E_PHY_TYPE_XFI), + I40E_CAP_PHY_TYPE_SFI = BIT(I40E_PHY_TYPE_SFI), + I40E_CAP_PHY_TYPE_XLAUI = BIT(I40E_PHY_TYPE_XLAUI), + I40E_CAP_PHY_TYPE_XLPPI = BIT(I40E_PHY_TYPE_XLPPI), + I40E_CAP_PHY_TYPE_40GBASE_CR4_CU = BIT(I40E_PHY_TYPE_40GBASE_CR4_CU), + I40E_CAP_PHY_TYPE_10GBASE_CR1_CU = BIT(I40E_PHY_TYPE_10GBASE_CR1_CU), + I40E_CAP_PHY_TYPE_10GBASE_AOC = BIT(I40E_PHY_TYPE_10GBASE_AOC), + I40E_CAP_PHY_TYPE_40GBASE_AOC = BIT(I40E_PHY_TYPE_40GBASE_AOC), + I40E_CAP_PHY_TYPE_100BASE_TX = BIT(I40E_PHY_TYPE_100BASE_TX), + I40E_CAP_PHY_TYPE_1000BASE_T = BIT(I40E_PHY_TYPE_1000BASE_T), + I40E_CAP_PHY_TYPE_10GBASE_T = BIT(I40E_PHY_TYPE_10GBASE_T), + I40E_CAP_PHY_TYPE_10GBASE_SR = BIT(I40E_PHY_TYPE_10GBASE_SR), + I40E_CAP_PHY_TYPE_10GBASE_LR = BIT(I40E_PHY_TYPE_10GBASE_LR), + I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU = BIT(I40E_PHY_TYPE_10GBASE_SFPP_CU), + I40E_CAP_PHY_TYPE_10GBASE_CR1 = BIT(I40E_PHY_TYPE_10GBASE_CR1), + I40E_CAP_PHY_TYPE_40GBASE_CR4 = BIT(I40E_PHY_TYPE_40GBASE_CR4), + I40E_CAP_PHY_TYPE_40GBASE_SR4 = BIT(I40E_PHY_TYPE_40GBASE_SR4), + I40E_CAP_PHY_TYPE_40GBASE_LR4 = BIT(I40E_PHY_TYPE_40GBASE_LR4), + I40E_CAP_PHY_TYPE_1000BASE_SX = BIT(I40E_PHY_TYPE_1000BASE_SX), + I40E_CAP_PHY_TYPE_1000BASE_LX = BIT(I40E_PHY_TYPE_1000BASE_LX), + I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL = BIT(I40E_PHY_TYPE_1000BASE_T_OPTICAL), + I40E_CAP_PHY_TYPE_20GBASE_KR2 = BIT(I40E_PHY_TYPE_20GBASE_KR2) }; struct i40e_phy_info { struct i40e_link_status link_info; struct i40e_link_status link_info_old; - u32 autoneg_advertised; - u32 phy_id; - u32 module_type; bool get_link_info; enum i40e_media_type media_type; + /* all the phy types the NVM is capable of */ + enum i40e_aq_capabilities_phy_type phy_types; }; #define I40E_HW_CAP_MAX_GPIO 30 @@ -287,7 +322,17 @@ struct i40e_hw_capabilities { bool dcb; bool fcoe; bool iscsi; /* Indicates iSCSI enabled */ - bool mfp_mode_1; + bool flex10_enable; + bool flex10_capable; + u32 flex10_mode; +#define I40E_FLEX10_MODE_UNKNOWN 0x0 +#define I40E_FLEX10_MODE_DCC 0x1 +#define I40E_FLEX10_MODE_DCI 0x2 + + u32 flex10_status; +#define I40E_FLEX10_STATUS_DCC_ERROR 0x1 +#define I40E_FLEX10_STATUS_VC_MODE 0x2 + bool mgmt_cem; bool ieee_1588; bool iwarp; @@ -316,6 +361,7 @@ struct i40e_hw_capabilities { u8 rx_buf_chain_len; u32 enabled_tcmap; u32 maxtc; + u64 wr_csr_prot; }; struct i40e_mac_info { @@ -343,6 +389,7 @@ struct i40e_nvm_info { bool blank_nvm_mode; /* is NVM empty (no FW present)*/ u16 version; /* NVM package version */ u32 eetrack; /* NVM data version */ + u32 oem_ver; /* OEM version info */ }; /* definitions used in NVM update support */ @@ -361,12 +408,17 @@ enum i40e_nvmupd_cmd { I40E_NVMUPD_CSUM_CON, I40E_NVMUPD_CSUM_SA, I40E_NVMUPD_CSUM_LCB, + I40E_NVMUPD_STATUS, + I40E_NVMUPD_EXEC_AQ, + I40E_NVMUPD_GET_AQ_RESULT, }; enum i40e_nvmupd_state { I40E_NVMUPD_STATE_INIT, I40E_NVMUPD_STATE_READING, - I40E_NVMUPD_STATE_WRITING + I40E_NVMUPD_STATE_WRITING, + I40E_NVMUPD_STATE_INIT_WAIT, + I40E_NVMUPD_STATE_WRITE_WAIT, }; /* nvm_access definition and its masks/shifts need to be accessible to @@ -385,6 +437,7 @@ enum i40e_nvmupd_state { #define I40E_NVM_SA (I40E_NVM_SNT | I40E_NVM_LCB) #define I40E_NVM_ERA 0x4 #define I40E_NVM_CSUM 0x8 +#define I40E_NVM_EXEC 0xf #define I40E_NVM_ADAPT_SHIFT 16 #define I40E_NVM_ADAPT_MASK (0xffffULL << I40E_NVM_ADAPT_SHIFT) @@ -465,6 +518,8 @@ struct i40e_fc_info { #define I40E_APP_PROTOID_FIP 0x8914 #define I40E_APP_SEL_ETHTYPE 0x1 #define I40E_APP_SEL_TCPIP 0x2 +#define I40E_CEE_APP_SEL_ETHTYPE 0x0 +#define I40E_CEE_APP_SEL_TCPIP 0x1 /* CEE or IEEE 802.1Qaz ETS Configuration data */ struct i40e_dcb_ets_config { @@ -496,6 +551,7 @@ struct i40e_dcbx_config { #define I40E_DCBX_MODE_CEE 0x1 #define I40E_DCBX_MODE_IEEE 0x2 u32 numapps; + u32 tlv_status; /* CEE mode TLV status */ struct i40e_dcb_ets_config etscfg; struct i40e_dcb_ets_config etsrec; struct i40e_dcb_pfc_config pfc; @@ -547,6 +603,8 @@ struct i40e_hw { /* state of nvm update process */ enum i40e_nvmupd_state nvmupd_state; + struct i40e_aq_desc nvm_wb_desc; + struct i40e_virt_mem nvm_buff; /* HMC info */ struct i40e_hmc_info hmc; /* HMC info struct */ @@ -555,16 +613,23 @@ struct i40e_hw { u16 dcbx_status; /* DCBX info */ - struct i40e_dcbx_config local_dcbx_config; - struct i40e_dcbx_config remote_dcbx_config; + struct i40e_dcbx_config local_dcbx_config; /* Oper/Local Cfg */ + struct i40e_dcbx_config remote_dcbx_config; /* Peer Cfg */ + struct i40e_dcbx_config desired_dcbx_config; /* CEE Desired Cfg */ /* debug mask */ u32 debug_mask; + char err_str[16]; }; -static inline bool i40e_is_vf(struct i40e_hw *hw) +static INLINE bool i40e_is_vf(struct i40e_hw *hw) { +#ifdef X722_SUPPORT + return (hw->mac.type == I40E_MAC_VF || + hw->mac.type == I40E_MAC_X722_VF); +#else return hw->mac.type == I40E_MAC_VF; +#endif } struct i40e_driver_version { @@ -668,7 +733,11 @@ enum i40e_rx_desc_status_bits { I40E_RX_DESC_STATUS_CRCP_SHIFT = 4, I40E_RX_DESC_STATUS_TSYNINDX_SHIFT = 5, /* 2 BITS */ I40E_RX_DESC_STATUS_TSYNVALID_SHIFT = 7, +#ifdef X722_SUPPORT + I40E_RX_DESC_STATUS_EXT_UDP_0_SHIFT = 8, +#else I40E_RX_DESC_STATUS_RESERVED1_SHIFT = 8, +#endif I40E_RX_DESC_STATUS_UMBCAST_SHIFT = 9, /* 2 BITS */ I40E_RX_DESC_STATUS_FLM_SHIFT = 11, @@ -676,12 +745,16 @@ enum i40e_rx_desc_status_bits { I40E_RX_DESC_STATUS_LPBK_SHIFT = 14, I40E_RX_DESC_STATUS_IPV6EXADD_SHIFT = 15, I40E_RX_DESC_STATUS_RESERVED2_SHIFT = 16, /* 2 BITS */ +#ifdef X722_SUPPORT + I40E_RX_DESC_STATUS_INT_UDP_0_SHIFT = 18, +#else I40E_RX_DESC_STATUS_UDP_0_SHIFT = 18, +#endif I40E_RX_DESC_STATUS_LAST /* this entry must be last!!! */ }; #define I40E_RXD_QW1_STATUS_SHIFT 0 -#define I40E_RXD_QW1_STATUS_MASK (((1 << I40E_RX_DESC_STATUS_LAST) - 1) << \ +#define I40E_RXD_QW1_STATUS_MASK ((BIT(I40E_RX_DESC_STATUS_LAST) - 1) << \ I40E_RXD_QW1_STATUS_SHIFT) #define I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT I40E_RX_DESC_STATUS_TSYNINDX_SHIFT @@ -689,8 +762,7 @@ enum i40e_rx_desc_status_bits { I40E_RXD_QW1_STATUS_TSYNINDX_SHIFT) #define I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT I40E_RX_DESC_STATUS_TSYNVALID_SHIFT -#define I40E_RXD_QW1_STATUS_TSYNVALID_MASK (0x1UL << \ - I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT) +#define I40E_RXD_QW1_STATUS_TSYNVALID_MASK BIT_ULL(I40E_RXD_QW1_STATUS_TSYNVALID_SHIFT) #define I40E_RXD_QW1_STATUS_UMBCAST_SHIFT I40E_RX_DESC_STATUS_UMBCAST #define I40E_RXD_QW1_STATUS_UMBCAST_MASK (0x3UL << \ @@ -836,8 +908,7 @@ enum i40e_rx_ptype_payload_layer { I40E_RXD_QW1_LENGTH_HBUF_SHIFT) #define I40E_RXD_QW1_LENGTH_SPH_SHIFT 63 -#define I40E_RXD_QW1_LENGTH_SPH_MASK (0x1ULL << \ - I40E_RXD_QW1_LENGTH_SPH_SHIFT) +#define I40E_RXD_QW1_LENGTH_SPH_MASK BIT_ULL(I40E_RXD_QW1_LENGTH_SPH_SHIFT) #define I40E_RXD_QW1_NEXTP_SHIFT 38 #define I40E_RXD_QW1_NEXTP_MASK (0x1FFFULL << I40E_RXD_QW1_NEXTP_SHIFT) @@ -1040,12 +1111,11 @@ enum i40e_tx_ctx_desc_eipt_offload { #define I40E_TXD_CTX_QW0_NATT_SHIFT 9 #define I40E_TXD_CTX_QW0_NATT_MASK (0x3ULL << I40E_TXD_CTX_QW0_NATT_SHIFT) -#define I40E_TXD_CTX_UDP_TUNNELING (0x1ULL << I40E_TXD_CTX_QW0_NATT_SHIFT) +#define I40E_TXD_CTX_UDP_TUNNELING BIT_ULL(I40E_TXD_CTX_QW0_NATT_SHIFT) #define I40E_TXD_CTX_GRE_TUNNELING (0x2ULL << I40E_TXD_CTX_QW0_NATT_SHIFT) #define I40E_TXD_CTX_QW0_EIP_NOINC_SHIFT 11 -#define I40E_TXD_CTX_QW0_EIP_NOINC_MASK (0x1ULL << \ - I40E_TXD_CTX_QW0_EIP_NOINC_SHIFT) +#define I40E_TXD_CTX_QW0_EIP_NOINC_MASK BIT_ULL(I40E_TXD_CTX_QW0_EIP_NOINC_SHIFT) #define I40E_TXD_CTX_EIP_NOINC_IPID_CONST I40E_TXD_CTX_QW0_EIP_NOINC_MASK @@ -1057,6 +1127,10 @@ enum i40e_tx_ctx_desc_eipt_offload { #define I40E_TXD_CTX_QW0_DECTTL_MASK (0xFULL << \ I40E_TXD_CTX_QW0_DECTTL_SHIFT) +#ifdef X722_SUPPORT +#define I40E_TXD_CTX_QW0_L4T_CS_SHIFT 23 +#define I40E_TXD_CTX_QW0_L4T_CS_MASK BIT_ULL(I40E_TXD_CTX_QW0_L4T_CS_SHIFT) +#endif struct i40e_nop_desc { __le64 rsvd; __le64 dtype_cmd; @@ -1093,15 +1167,38 @@ struct i40e_filter_program_desc { /* Packet Classifier Types for filters */ enum i40e_filter_pctype { +#ifdef X722_SUPPORT + /* Note: Values 0-28 are reserved for future use. + * Value 29, 30, 32 are not supported on XL710 and X710. + */ + I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP = 29, + I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP = 30, +#else /* Note: Values 0-30 are reserved for future use */ +#endif I40E_FILTER_PCTYPE_NONF_IPV4_UDP = 31, +#ifdef X722_SUPPORT + I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK = 32, +#else /* Note: Value 32 is reserved for future use */ +#endif I40E_FILTER_PCTYPE_NONF_IPV4_TCP = 33, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP = 34, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER = 35, I40E_FILTER_PCTYPE_FRAG_IPV4 = 36, +#ifdef X722_SUPPORT + /* Note: Values 37-38 are reserved for future use. + * Value 39, 40, 42 are not supported on XL710 and X710. + */ + I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP = 39, + I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP = 40, +#else /* Note: Values 37-40 are reserved for future use */ +#endif I40E_FILTER_PCTYPE_NONF_IPV6_UDP = 41, +#ifdef X722_SUPPORT + I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK = 42, +#endif I40E_FILTER_PCTYPE_NONF_IPV6_TCP = 43, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP = 44, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER = 45, @@ -1128,8 +1225,7 @@ enum i40e_filter_program_desc_fd_status { }; #define I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT 23 -#define I40E_TXD_FLTR_QW0_DEST_VSI_MASK (0x1FFUL << \ - I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) +#define I40E_TXD_FLTR_QW0_DEST_VSI_MASK BIT_ULL(I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) #define I40E_TXD_FLTR_QW1_DTYPE_SHIFT 0 #define I40E_TXD_FLTR_QW1_DTYPE_MASK (0xFUL << I40E_TXD_FLTR_QW1_DTYPE_SHIFT) @@ -1150,13 +1246,18 @@ enum i40e_filter_program_desc_pcmd { #define I40E_TXD_FLTR_QW1_DEST_MASK (0x3ULL << I40E_TXD_FLTR_QW1_DEST_SHIFT) #define I40E_TXD_FLTR_QW1_CNT_ENA_SHIFT (0x7ULL + I40E_TXD_FLTR_QW1_CMD_SHIFT) -#define I40E_TXD_FLTR_QW1_CNT_ENA_MASK (0x1ULL << \ - I40E_TXD_FLTR_QW1_CNT_ENA_SHIFT) +#define I40E_TXD_FLTR_QW1_CNT_ENA_MASK BIT_ULL(I40E_TXD_FLTR_QW1_CNT_ENA_SHIFT) #define I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT (0x9ULL + \ I40E_TXD_FLTR_QW1_CMD_SHIFT) #define I40E_TXD_FLTR_QW1_FD_STATUS_MASK (0x3ULL << \ I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT) +#ifdef X722_SUPPORT + +#define I40E_TXD_FLTR_QW1_ATR_SHIFT (0xEULL + \ + I40E_TXD_FLTR_QW1_CMD_SHIFT) +#define I40E_TXD_FLTR_QW1_ATR_MASK BIT_ULL(I40E_TXD_FLTR_QW1_ATR_SHIFT) +#endif #define I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT 20 #define I40E_TXD_FLTR_QW1_CNTINDEX_MASK (0x1FFUL << \ @@ -1263,6 +1364,9 @@ struct i40e_hw_port_stats { /* flow director stats */ u64 fd_atr_match; u64 fd_sb_match; + u64 fd_atr_tunnel_match; + u32 fd_atr_status; + u32 fd_sb_status; /* EEE LPI */ u32 tx_lpi_status; u32 rx_lpi_status; @@ -1288,6 +1392,7 @@ struct i40e_hw_port_stats { #define I40E_SR_PBA_FLAGS 0x15 #define I40E_SR_PBA_BLOCK_PTR 0x16 #define I40E_SR_BOOT_CONFIG_PTR 0x17 +#define I40E_NVM_OEM_VER_OFF 0x83 #define I40E_SR_NVM_DEV_STARTER_VERSION 0x18 #define I40E_SR_NVM_WAKE_ON_LAN 0x19 #define I40E_SR_ALTERNATE_SAN_MAC_ADDRESS_PTR 0x27 diff --git a/sys/dev/ixl/i40e_virtchnl.h b/sys/dev/ixl/i40e_virtchnl.h index 5a5e8f355cf9..9da33a0b425d 100644 --- a/sys/dev/ixl/i40e_virtchnl.h +++ b/sys/dev/ixl/i40e_virtchnl.h @@ -1,6 +1,6 @@ /****************************************************************************** - Copyright (c) 2013-2014, Intel Corporation + Copyright (c) 2013-2015, Intel Corporation All rights reserved. Redistribution and use in source and binary forms, with or without @@ -89,7 +89,6 @@ enum i40e_virtchnl_ops { I40E_VIRTCHNL_OP_GET_STATS = 15, I40E_VIRTCHNL_OP_FCOE = 16, I40E_VIRTCHNL_OP_EVENT = 17, - I40E_VIRTCHNL_OP_CONFIG_RSS = 18, }; /* Virtual channel message descriptor. This overlays the admin queue @@ -118,7 +117,9 @@ struct i40e_virtchnl_msg { * error regardless of version mismatch. */ #define I40E_VIRTCHNL_VERSION_MAJOR 1 -#define I40E_VIRTCHNL_VERSION_MINOR 0 +#define I40E_VIRTCHNL_VERSION_MINOR 1 +#define I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS 0 + struct i40e_virtchnl_version_info { u32 major; u32 minor; @@ -137,7 +138,8 @@ struct i40e_virtchnl_version_info { */ /* I40E_VIRTCHNL_OP_GET_VF_RESOURCES - * VF sends this request to PF with no parameters + * Version 1.0 VF sends this request to PF with no parameters + * Version 1.1 VF sends this request to PF with u32 bitmap of its capabilities * PF responds with an indirect message containing * i40e_virtchnl_vf_resource and one or more * i40e_virtchnl_vsi_resource structures. @@ -151,10 +153,13 @@ struct i40e_virtchnl_vsi_resource { u8 default_mac_addr[I40E_ETH_LENGTH_OF_ADDRESS]; }; /* VF offload flags */ -#define I40E_VIRTCHNL_VF_OFFLOAD_L2 0x00000001 -#define I40E_VIRTCHNL_VF_OFFLOAD_IWARP 0x00000002 -#define I40E_VIRTCHNL_VF_OFFLOAD_FCOE 0x00000004 -#define I40E_VIRTCHNL_VF_OFFLOAD_VLAN 0x00010000 +#define I40E_VIRTCHNL_VF_OFFLOAD_L2 0x00000001 +#define I40E_VIRTCHNL_VF_OFFLOAD_IWARP 0x00000002 +#define I40E_VIRTCHNL_VF_OFFLOAD_FCOE 0x00000004 +#define I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ 0x00000008 +#define I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG 0x00000010 +#define I40E_VIRTCHNL_VF_OFFLOAD_VLAN 0x00010000 +#define I40E_VIRTCHNL_VF_OFFLOAD_RX_POLLING 0x00020000 struct i40e_virtchnl_vf_resource { u16 num_vsis; diff --git a/sys/dev/ixl/if_ixl.c b/sys/dev/ixl/if_ixl.c index 026bc9ed9f68..13a678cda7bc 100644 --- a/sys/dev/ixl/if_ixl.c +++ b/sys/dev/ixl/if_ixl.c @@ -48,7 +48,7 @@ /********************************************************************* * Driver version *********************************************************************/ -char ixl_driver_version[] = "1.4.1"; +char ixl_driver_version[] = "1.4.3"; /********************************************************************* * PCI Device ID Table @@ -70,7 +70,14 @@ static ixl_vendor_info_t ixl_vendor_info_array[] = {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_B, 0, 0, 0}, {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_QSFP_C, 0, 0, 0}, {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T, 0, 0, 0}, + {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T4, 0, 0, 0}, {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2, 0, 0, 0}, + {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_20G_KR2_A, 0, 0, 0}, +#ifdef X722_SUPPORT + {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_SFP_X722, 0, 0, 0}, + {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_1G_BASE_T_X722, 0, 0, 0}, + {I40E_INTEL_VENDOR_ID, I40E_DEV_ID_10G_BASE_T_X722, 0, 0, 0}, +#endif /* required last entry */ {0, 0, 0, 0, 0} }; @@ -238,12 +245,10 @@ DRIVER_MODULE(ixl, pci, ixl_driver, ixl_devclass, 0, 0); MODULE_DEPEND(ixl, pci, 1, 1, 1); MODULE_DEPEND(ixl, ether, 1, 1, 1); - #ifdef DEV_NETMAP MODULE_DEPEND(ixl, netmap, 1, 1, 1); #endif /* DEV_NETMAP */ - /* ** Global reset mutex */ @@ -480,6 +485,22 @@ ixl_attach(device_t dev) #ifdef IXL_DEBUG_SYSCTL SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), + OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, pf, 0, + ixl_debug_info, "I", "Debug Information"); + + /* Debug shared-code message level */ + SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), + OID_AUTO, "debug_mask", CTLFLAG_RW, + &pf->hw.debug_mask, 0, "Debug Message Level"); + + SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), + OID_AUTO, "vc_debug_level", CTLFLAG_RW, &pf->vc_debug_lvl, + 0, "PF/VF Virtual Channel debug level"); + + SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), + SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "link_status", CTLTYPE_STRING | CTLFLAG_RD, pf, 0, ixl_sysctl_link_status, "A", "Current Link Status"); @@ -525,13 +546,6 @@ ixl_attach(device_t dev) goto err_out; } - /* Create for initial debugging use */ - SYSCTL_ADD_PROC(device_get_sysctl_ctx(dev), - SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), - OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, pf, 0, - ixl_debug_info, "I", "Debug Information"); - - /* Establish a clean starting point */ i40e_clear_hw(hw); error = i40e_pf_reset(hw); @@ -642,7 +656,7 @@ ixl_attach(device_t dev) /* Determine link state */ i40e_aq_get_link_info(hw, TRUE, NULL, NULL); - pf->link_up = i40e_get_link_status(hw); + i40e_get_link_status(hw, &pf->link_up); /* Setup OS specific network interface */ if (ixl_setup_interface(dev, vsi) != 0) { @@ -702,7 +716,6 @@ ixl_attach(device_t dev) #ifdef DEV_NETMAP ixl_netmap_attach(vsi); #endif /* DEV_NETMAP */ - INIT_DEBUGOUT("ixl_attach: end"); return (0); @@ -1053,6 +1066,9 @@ ixl_ioctl(struct ifnet * ifp, u_long command, caddr_t data) break; case SIOCSIFMEDIA: case SIOCGIFMEDIA: +#ifdef IFM_ETH_XTYPE + case SIOCGIFXMEDIA: +#endif IOCTL_DEBUGOUT("ioctl: SIOCxIFMEDIA (Get/Set Interface Media)"); error = ifmedia_ioctl(ifp, ifr, &vsi->media, command); break; @@ -1426,7 +1442,7 @@ ixl_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) IXL_PF_LOCK(pf); hw->phy.get_link_info = TRUE; - pf->link_up = i40e_get_link_status(hw); + i40e_get_link_status(hw, &pf->link_up); ixl_update_link_status(pf); ifmr->ifm_status = IFM_AVALID; @@ -1457,12 +1473,7 @@ ixl_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) ifmr->ifm_active |= IFM_1000_LX; break; /* 10 G */ - case I40E_PHY_TYPE_10GBASE_CR1: - case I40E_PHY_TYPE_10GBASE_CR1_CU: case I40E_PHY_TYPE_10GBASE_SFPP_CU: - /* Using this until a real KR media type */ - case I40E_PHY_TYPE_10GBASE_KR: - case I40E_PHY_TYPE_10GBASE_KX4: ifmr->ifm_active |= IFM_10G_TWINAX; break; case I40E_PHY_TYPE_10GBASE_SR: @@ -1485,16 +1496,49 @@ ixl_media_status(struct ifnet * ifp, struct ifmediareq * ifmr) case I40E_PHY_TYPE_40GBASE_LR4: ifmr->ifm_active |= IFM_40G_LR4; break; - /* - ** Set these to CR4 because OS does not - ** have types available yet. - */ +#ifndef IFM_ETH_XTYPE + case I40E_PHY_TYPE_1000BASE_KX: + ifmr->ifm_active |= IFM_1000_CX; + break; + case I40E_PHY_TYPE_10GBASE_CR1_CU: + case I40E_PHY_TYPE_10GBASE_CR1: + ifmr->ifm_active |= IFM_10G_TWINAX; + break; + case I40E_PHY_TYPE_10GBASE_KX4: + ifmr->ifm_active |= IFM_10G_CX4; + break; + case I40E_PHY_TYPE_10GBASE_KR: + ifmr->ifm_active |= IFM_10G_SR; + break; case I40E_PHY_TYPE_40GBASE_KR4: - case I40E_PHY_TYPE_XLAUI: case I40E_PHY_TYPE_XLPPI: - case I40E_PHY_TYPE_40GBASE_AOC: - ifmr->ifm_active |= IFM_40G_CR4; + ifmr->ifm_active |= IFM_40G_SR4; + break; +#else + case I40E_PHY_TYPE_1000BASE_KX: + ifmr->ifm_active |= IFM_1000_KX; + break; + /* ERJ: What's the difference between these? */ + case I40E_PHY_TYPE_10GBASE_CR1_CU: + case I40E_PHY_TYPE_10GBASE_CR1: + ifmr->ifm_active |= IFM_10G_CR1; + break; + case I40E_PHY_TYPE_10GBASE_KX4: + ifmr->ifm_active |= IFM_10G_KX4; + break; + case I40E_PHY_TYPE_10GBASE_KR: + ifmr->ifm_active |= IFM_10G_KR; + break; + case I40E_PHY_TYPE_20GBASE_KR2: + ifmr->ifm_active |= IFM_20G_KR2; + break; + case I40E_PHY_TYPE_40GBASE_KR4: + ifmr->ifm_active |= IFM_40G_KR4; + break; + case I40E_PHY_TYPE_XLPPI: + ifmr->ifm_active |= IFM_40G_XLPPI; break; +#endif default: ifmr->ifm_active |= IFM_UNKNOWN; break; @@ -2417,13 +2461,8 @@ ixl_add_ifmedia(struct ixl_vsi *vsi, u32 phy_type) if (phy_type & (1 << I40E_PHY_TYPE_1000BASE_LX)) ifmedia_add(&vsi->media, IFM_ETHER | IFM_1000_LX, 0, NULL); - if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_CR1_CU) || - phy_type & (1 << I40E_PHY_TYPE_10GBASE_KX4) || - phy_type & (1 << I40E_PHY_TYPE_10GBASE_KR) || - phy_type & (1 << I40E_PHY_TYPE_10GBASE_AOC) || - phy_type & (1 << I40E_PHY_TYPE_XAUI) || + if (phy_type & (1 << I40E_PHY_TYPE_XAUI) || phy_type & (1 << I40E_PHY_TYPE_XFI) || - phy_type & (1 << I40E_PHY_TYPE_SFI) || phy_type & (1 << I40E_PHY_TYPE_10GBASE_SFPP_CU)) ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_TWINAX, 0, NULL); @@ -2438,15 +2477,55 @@ ixl_add_ifmedia(struct ixl_vsi *vsi, u32 phy_type) phy_type & (1 << I40E_PHY_TYPE_40GBASE_CR4_CU) || phy_type & (1 << I40E_PHY_TYPE_40GBASE_AOC) || phy_type & (1 << I40E_PHY_TYPE_XLAUI) || - phy_type & (1 << I40E_PHY_TYPE_XLPPI) || - /* KR4 uses CR4 until the OS has the real media type */ phy_type & (1 << I40E_PHY_TYPE_40GBASE_KR4)) ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_CR4, 0, NULL); - if (phy_type & (1 << I40E_PHY_TYPE_40GBASE_SR4)) ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_SR4, 0, NULL); if (phy_type & (1 << I40E_PHY_TYPE_40GBASE_LR4)) ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_LR4, 0, NULL); + +#ifndef IFM_ETH_XTYPE + if (phy_type & (1 << I40E_PHY_TYPE_1000BASE_KX)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_1000_CX, 0, NULL); + + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_CR1_CU) || + phy_type & (1 << I40E_PHY_TYPE_10GBASE_CR1) || + phy_type & (1 << I40E_PHY_TYPE_10GBASE_AOC) || + phy_type & (1 << I40E_PHY_TYPE_SFI)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_TWINAX, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_KX4)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_CX4, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_KR)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_SR, 0, NULL); + + if (phy_type & (1 << I40E_PHY_TYPE_40GBASE_KR4)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_SR4, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_XLPPI)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_CR4, 0, NULL); +#else + if (phy_type & (1 << I40E_PHY_TYPE_1000BASE_KX)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_1000_KX, 0, NULL); + + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_CR1_CU) + || phy_type & (1 << I40E_PHY_TYPE_10GBASE_CR1)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_CR1, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_AOC)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_TWINAX_LONG, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_SFI)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_SFI, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_KX4)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_KX4, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_10GBASE_KR)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_10G_KR, 0, NULL); + + if (phy_type & (1 << I40E_PHY_TYPE_20GBASE_KR2)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_20G_KR2, 0, NULL); + + if (phy_type & (1 << I40E_PHY_TYPE_40GBASE_KR4)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_KR4, 0, NULL); + if (phy_type & (1 << I40E_PHY_TYPE_XLPPI)) + ifmedia_add(&vsi->media, IFM_ETHER | IFM_40G_XLPPI, 0, NULL); +#endif } /********************************************************************* @@ -2569,7 +2648,7 @@ ixl_link_event(struct ixl_pf *pf, struct i40e_arq_event_info *e) bool check; hw->phy.get_link_info = TRUE; - check = i40e_get_link_status(hw); + i40e_get_link_status(hw, &check); pf->link_up = check; #ifdef IXL_DEBUG printf("Link is %s\n", check ? "up":"down"); @@ -3184,10 +3263,6 @@ ixl_add_hw_stats(struct ixl_pf *pf) CTLFLAG_RD, &pf->admin_irq, "Admin Queue IRQ Handled"); - SYSCTL_ADD_INT(ctx, child, OID_AUTO, "vc_debug_level", - CTLFLAG_RW, &pf->vc_debug_lvl, 0, - "PF/VF Virtual Channel debug logging level"); - ixl_add_vsi_sysctls(pf, &pf->vsi, ctx, "pf"); vsi_list = SYSCTL_CHILDREN(pf->vsi.vsi_node); @@ -3331,6 +3406,7 @@ ixl_add_sysctls_mac_stats(struct sysctl_ctx_list *ctx, } } + /* ** ixl_config_rss - setup RSS ** - note this is done for the single vsi @@ -4976,8 +5052,8 @@ static int ixl_res_alloc_cmp(const void *a, const void *b) { const struct i40e_aqc_switch_resource_alloc_element_resp *one, *two; - one = (struct i40e_aqc_switch_resource_alloc_element_resp *)a; - two = (struct i40e_aqc_switch_resource_alloc_element_resp *)b; + one = (const struct i40e_aqc_switch_resource_alloc_element_resp *)a; + two = (const struct i40e_aqc_switch_resource_alloc_element_resp *)b; return ((int)one->resource_type - (int)two->resource_type); } @@ -4994,7 +5070,7 @@ ixl_sysctl_hw_res_alloc(SYSCTL_HANDLER_ARGS) u8 num_entries; struct i40e_aqc_switch_resource_alloc_element_resp resp[IXL_SW_RES_SIZE]; - buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); + buf = sbuf_new_for_sysctl(NULL, NULL, 0, req); if (!buf) { device_printf(dev, "Could not allocate sbuf for output.\n"); return (ENOMEM); @@ -5038,7 +5114,13 @@ ixl_sysctl_hw_res_alloc(SYSCTL_HANDLER_ARGS) error = sbuf_finish(buf); if (error) { device_printf(dev, "Error finishing sbuf: %d\n", error); + sbuf_delete(buf); + return error; } + + error = sysctl_handle_string(oidp, sbuf_data(buf), sbuf_len(buf), req); + if (error) + device_printf(dev, "sysctl error: %d\n", error); sbuf_delete(buf); return error; } @@ -5096,7 +5178,7 @@ ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS) struct i40e_aqc_get_switch_config_resp *sw_config; sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf; - buf = sbuf_new_for_sysctl(NULL, NULL, 128, req); + buf = sbuf_new_for_sysctl(NULL, NULL, 0, req); if (!buf) { device_printf(dev, "Could not allocate sbuf for sysctl output.\n"); return (ENOMEM); @@ -5115,7 +5197,6 @@ ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS) nmbuf = sbuf_new_auto(); if (!nmbuf) { device_printf(dev, "Could not allocate sbuf for name output.\n"); - sbuf_delete(buf); return (ENOMEM); } @@ -5150,7 +5231,13 @@ ixl_sysctl_switch_config(SYSCTL_HANDLER_ARGS) error = sbuf_finish(buf); if (error) { device_printf(dev, "Error finishing sbuf: %d\n", error); + sbuf_delete(buf); + return error; } + + error = sysctl_handle_string(oidp, sbuf_data(buf), sbuf_len(buf), req); + if (error) + device_printf(dev, "sysctl error: %d\n", error); sbuf_delete(buf); return (error); diff --git a/sys/dev/ixl/if_ixlv.c b/sys/dev/ixl/if_ixlv.c index fe4c63f85bfe..51d4e9529654 100644 --- a/sys/dev/ixl/if_ixlv.c +++ b/sys/dev/ixl/if_ixlv.c @@ -48,7 +48,7 @@ /********************************************************************* * Driver version *********************************************************************/ -char ixlv_driver_version[] = "1.2.4"; +char ixlv_driver_version[] = "1.2.6"; /********************************************************************* * PCI Device ID Table @@ -1832,7 +1832,7 @@ ixlv_msix_adminq(void *arg) mask = rd32(hw, I40E_VFINT_ICR0_ENA1); reg = rd32(hw, I40E_VFINT_DYN_CTL01); - reg |= I40E_PFINT_DYN_CTL0_CLEARPBA_MASK; + reg |= I40E_VFINT_DYN_CTL01_CLEARPBA_MASK; wr32(hw, I40E_VFINT_DYN_CTL01, reg); /* schedule task */ @@ -1879,7 +1879,7 @@ ixlv_enable_adminq_irq(struct i40e_hw *hw) wr32(hw, I40E_VFINT_DYN_CTL01, I40E_VFINT_DYN_CTL01_INTENA_MASK | I40E_VFINT_DYN_CTL01_ITR_INDX_MASK); - wr32(hw, I40E_VFINT_ICR0_ENA1, I40E_VFINT_ICR0_ENA_ADMINQ_MASK); + wr32(hw, I40E_VFINT_ICR0_ENA1, I40E_VFINT_ICR0_ENA1_ADMINQ_MASK); /* flush */ rd32(hw, I40E_VFGEN_RSTAT); return; @@ -1891,7 +1891,7 @@ ixlv_enable_queue_irq(struct i40e_hw *hw, int id) u32 reg; reg = I40E_VFINT_DYN_CTLN1_INTENA_MASK | - I40E_VFINT_DYN_CTLN_CLEARPBA_MASK; + I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK; wr32(hw, I40E_VFINT_DYN_CTLN1(id), reg); } @@ -2375,8 +2375,8 @@ ixlv_local_timer(void *arg) /* ** Check status on the queues for a hang */ - mask = (I40E_VFINT_DYN_CTLN_INTENA_MASK | - I40E_VFINT_DYN_CTLN_SWINT_TRIG_MASK); + mask = (I40E_VFINT_DYN_CTLN1_INTENA_MASK | + I40E_VFINT_DYN_CTLN1_SWINT_TRIG_MASK); for (int i = 0; i < vsi->num_queues; i++,que++) { /* Any queues with outstanding work get a sw irq */ @@ -2742,33 +2742,33 @@ ixlv_do_adminq_locked(struct ixlv_sc *sc) /* check for Admin queue errors */ oldreg = reg = rd32(hw, hw->aq.arq.len); - if (reg & I40E_VF_ARQLEN_ARQVFE_MASK) { + if (reg & I40E_VF_ARQLEN1_ARQVFE_MASK) { device_printf(dev, "ARQ VF Error detected\n"); - reg &= ~I40E_VF_ARQLEN_ARQVFE_MASK; + reg &= ~I40E_VF_ARQLEN1_ARQVFE_MASK; } - if (reg & I40E_VF_ARQLEN_ARQOVFL_MASK) { + if (reg & I40E_VF_ARQLEN1_ARQOVFL_MASK) { device_printf(dev, "ARQ Overflow Error detected\n"); - reg &= ~I40E_VF_ARQLEN_ARQOVFL_MASK; + reg &= ~I40E_VF_ARQLEN1_ARQOVFL_MASK; } - if (reg & I40E_VF_ARQLEN_ARQCRIT_MASK) { + if (reg & I40E_VF_ARQLEN1_ARQCRIT_MASK) { device_printf(dev, "ARQ Critical Error detected\n"); - reg &= ~I40E_VF_ARQLEN_ARQCRIT_MASK; + reg &= ~I40E_VF_ARQLEN1_ARQCRIT_MASK; } if (oldreg != reg) wr32(hw, hw->aq.arq.len, reg); oldreg = reg = rd32(hw, hw->aq.asq.len); - if (reg & I40E_VF_ATQLEN_ATQVFE_MASK) { + if (reg & I40E_VF_ATQLEN1_ATQVFE_MASK) { device_printf(dev, "ASQ VF Error detected\n"); - reg &= ~I40E_VF_ATQLEN_ATQVFE_MASK; + reg &= ~I40E_VF_ATQLEN1_ATQVFE_MASK; } - if (reg & I40E_VF_ATQLEN_ATQOVFL_MASK) { + if (reg & I40E_VF_ATQLEN1_ATQOVFL_MASK) { device_printf(dev, "ASQ Overflow Error detected\n"); - reg &= ~I40E_VF_ATQLEN_ATQOVFL_MASK; + reg &= ~I40E_VF_ATQLEN1_ATQOVFL_MASK; } - if (reg & I40E_VF_ATQLEN_ATQCRIT_MASK) { + if (reg & I40E_VF_ATQLEN1_ATQCRIT_MASK) { device_printf(dev, "ASQ Critical Error detected\n"); - reg &= ~I40E_VF_ATQLEN_ATQCRIT_MASK; + reg &= ~I40E_VF_ATQLEN1_ATQCRIT_MASK; } if (oldreg != reg) wr32(hw, hw->aq.asq.len, reg); diff --git a/sys/dev/ixl/ixlv.h b/sys/dev/ixl/ixlv.h index 840e17af71da..695b1efb15da 100644 --- a/sys/dev/ixl/ixlv.h +++ b/sys/dev/ixl/ixlv.h @@ -117,6 +117,7 @@ struct ixlv_sc { struct ifmedia media; struct callout timer; int msix; + int pf_version; int if_flags; bool link_up; diff --git a/sys/dev/ixl/ixlvc.c b/sys/dev/ixl/ixlvc.c index 02192f3f00c7..9333b6050d79 100644 --- a/sys/dev/ixl/ixlvc.c +++ b/sys/dev/ixl/ixlvc.c @@ -249,9 +249,12 @@ ixlv_verify_api_ver(struct ixlv_sc *sc) } pf_vvi = (struct i40e_virtchnl_version_info *)event.msg_buf; - if ((pf_vvi->major != I40E_VIRTCHNL_VERSION_MAJOR) || - (pf_vvi->minor != I40E_VIRTCHNL_VERSION_MINOR)) + if ((pf_vvi->major > I40E_VIRTCHNL_VERSION_MAJOR) || + ((pf_vvi->major == I40E_VIRTCHNL_VERSION_MAJOR) && + (pf_vvi->minor > I40E_VIRTCHNL_VERSION_MINOR))) err = EIO; + else + sc->pf_version = pf_vvi->minor; out_alloc: free(event.msg_buf, M_DEVBUF); @@ -269,7 +272,18 @@ out: int ixlv_send_vf_config_msg(struct ixlv_sc *sc) { - return ixlv_send_pf_msg(sc, I40E_VIRTCHNL_OP_GET_VF_RESOURCES, + u32 caps; + + caps = I40E_VIRTCHNL_VF_OFFLOAD_L2 | + I40E_VIRTCHNL_VF_OFFLOAD_RSS_AQ | + I40E_VIRTCHNL_VF_OFFLOAD_RSS_REG | + I40E_VIRTCHNL_VF_OFFLOAD_VLAN; + + if (sc->pf_version) + return ixlv_send_pf_msg(sc, I40E_VIRTCHNL_OP_GET_VF_RESOURCES, + (u8 *)&caps, sizeof(caps)); + else + return ixlv_send_pf_msg(sc, I40E_VIRTCHNL_OP_GET_VF_RESOURCES, NULL, 0); } diff --git a/sys/dev/mfi/mfi.c b/sys/dev/mfi/mfi.c index a2d604cf3f5d..ddcc853e9ad3 100644 --- a/sys/dev/mfi/mfi.c +++ b/sys/dev/mfi/mfi.c @@ -369,6 +369,7 @@ mfi_attach(struct mfi_softc *sc) int error, commsz, framessz, sensesz; int frames, unit, max_fw_sge, max_fw_cmds; uint32_t tb_mem_size = 0; + struct cdev *dev_t; if (sc == NULL) return EINVAL; @@ -763,7 +764,8 @@ mfi_attach(struct mfi_softc *sc) sc->mfi_cdev = make_dev(&mfi_cdevsw, unit, UID_ROOT, GID_OPERATOR, 0640, "mfi%d", unit); if (unit == 0) - make_dev_alias(sc->mfi_cdev, "megaraid_sas_ioctl_node"); + make_dev_alias_p(MAKEDEV_CHECKNAME | MAKEDEV_WAITOK, &dev_t, + sc->mfi_cdev, "%s", "megaraid_sas_ioctl_node"); if (sc->mfi_cdev != NULL) sc->mfi_cdev->si_drv1 = sc; SYSCTL_ADD_INT(device_get_sysctl_ctx(sc->mfi_dev), diff --git a/sys/dev/nand/nfc_rb.c b/sys/dev/nand/nfc_rb.c index 64f888a2a157..20a4026304e8 100644 --- a/sys/dev/nand/nfc_rb.c +++ b/sys/dev/nand/nfc_rb.c @@ -49,6 +49,9 @@ __FBSDID("$FreeBSD$"); #include <dev/nand/nand.h> #include <dev/nand/nandbus.h> + +#include <powerpc/mpc85xx/mpc85xx.h> + #include "nfc_if.h" #include "gpio_if.h" @@ -128,6 +131,7 @@ rb_nand_attach(device_t dev) struct rb_nand_softc *sc; phandle_t node; uint32_t ale[2],cle[2],nce[2],rdy[2]; + u_long size,start; int err; sc = device_get_softc(dev); @@ -168,6 +172,14 @@ rb_nand_attach(device_t dev) return (ENXIO); } + start = rman_get_start(sc->sc_mem); + size = rman_get_size(sc->sc_mem); + if (law_enable(OCP85XX_TGTIF_LBC, start, size) != 0) { + bus_release_resource(dev, SYS_RES_MEMORY, sc->rid, sc->sc_mem); + device_printf(dev, "could not allocate local address window.\n"); + return (ENXIO); + } + nand_init(&sc->nand_dev, dev, NAND_ECC_SOFT, 0, 0, NULL, NULL); err = nandbus_create(dev); diff --git a/sys/dev/netmap/if_em_netmap.h b/sys/dev/netmap/if_em_netmap.h index 15e9be54315d..99eaa6f01319 100644 --- a/sys/dev/netmap/if_em_netmap.h +++ b/sys/dev/netmap/if_em_netmap.h @@ -70,7 +70,7 @@ em_netmap_unblock_tasks(struct adapter *adapter) struct rx_ring *rxr = adapter->rx_rings; int i; - for (i = 0; i < adapter->num_queues; i++) { + for (i = 0; i < adapter->num_queues; i++, txr++, rxr++) { taskqueue_unblock(txr->tq); taskqueue_unblock(rxr->tq); } diff --git a/sys/dev/pci/vga_pci.c b/sys/dev/pci/vga_pci.c index 65332c36bda7..0c49ca09c324 100644 --- a/sys/dev/pci/vga_pci.c +++ b/sys/dev/pci/vga_pci.c @@ -126,6 +126,13 @@ vga_pci_is_boot_display(device_t dev) if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0) return (0); + /* + * Disable interrupts until a chipset driver is loaded for + * this PCI device. Else unhandled display adapter interrupts + * might freeze the CPU. + */ + pci_write_config(dev, PCIR_COMMAND, config | PCIM_CMD_INTxDIS, 2); + /* This video card is the boot display: record its unit number. */ vga_pci_default_unit = unit; device_set_flags(dev, 1); diff --git a/sys/dev/proto/proto.h b/sys/dev/proto/proto.h index db61da548654..690d71fff85a 100644 --- a/sys/dev/proto/proto.h +++ b/sys/dev/proto/proto.h @@ -33,11 +33,15 @@ #define PROTO_RES_UNUSED 0 #define PROTO_RES_PCICFG 10 +#define PROTO_RES_BUSDMA 11 struct proto_res { int r_type; int r_rid; - struct resource *r_res; + union { + struct resource *res; + void *busdma; + } r_d; u_long r_size; union { void *cookie; diff --git a/sys/dev/proto/proto_bus_pci.c b/sys/dev/proto/proto_bus_pci.c index 012469a2d712..46ec41ea4c16 100644 --- a/sys/dev/proto/proto_bus_pci.c +++ b/sys/dev/proto/proto_bus_pci.c @@ -87,6 +87,7 @@ proto_pci_attach(device_t dev) sc = device_get_softc(dev); proto_add_resource(sc, PROTO_RES_PCICFG, 0, NULL); + proto_add_resource(sc, PROTO_RES_BUSDMA, 0, NULL); for (bar = 0; bar < PCIR_MAX_BAR_0; bar++) { rid = PCIR_BAR(bar); diff --git a/sys/dev/proto/proto_busdma.c b/sys/dev/proto/proto_busdma.c new file mode 100644 index 000000000000..ced4eedc015d --- /dev/null +++ b/sys/dev/proto/proto_busdma.c @@ -0,0 +1,283 @@ +/*- + * Copyright (c) 2015 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <machine/bus.h> +#include <machine/bus_dma.h> +#include <machine/resource.h> +#include <sys/bus.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/malloc.h> +#include <sys/module.h> +#include <sys/queue.h> +#include <sys/rman.h> +#include <sys/sbuf.h> +#include <vm/vm.h> +#include <vm/pmap.h> + +#include <dev/proto/proto.h> +#include <dev/proto/proto_dev.h> +#include <dev/proto/proto_busdma.h> + +MALLOC_DEFINE(M_PROTO_BUSDMA, "proto_busdma", "DMA management data"); + +static int +proto_busdma_tag_create(struct proto_busdma *busdma, struct proto_tag *parent, + struct proto_ioc_busdma *ioc) +{ + struct proto_tag *tag; + + /* + * If nsegs is 1, ignore maxsegsz. What this means is that if we have + * just 1 segment, then maxsz should be equal to maxsegsz. To keep it + * simple for us, limit maxsegsz to maxsz in any case. + */ + if (ioc->u.tag.maxsegsz > ioc->u.tag.maxsz || ioc->u.tag.nsegs == 1) + ioc->u.tag.maxsegsz = ioc->u.tag.maxsz; + + /* A bndry of 0 really means ~0, or no boundary. */ + if (ioc->u.tag.bndry == 0) + ioc->u.tag.bndry = ~0U; + + tag = malloc(sizeof(*tag), M_PROTO_BUSDMA, M_WAITOK | M_ZERO); + if (parent != NULL) { + tag->parent = parent; + LIST_INSERT_HEAD(&parent->children, tag, peers); + tag->align = MAX(ioc->u.tag.align, parent->align); + tag->bndry = MIN(ioc->u.tag.bndry, parent->bndry); + tag->maxaddr = MIN(ioc->u.tag.maxaddr, parent->maxaddr); + tag->maxsz = MIN(ioc->u.tag.maxsz, parent->maxsz); + tag->maxsegsz = MIN(ioc->u.tag.maxsegsz, parent->maxsegsz); + tag->nsegs = MIN(ioc->u.tag.nsegs, parent->nsegs); + tag->datarate = MIN(ioc->u.tag.datarate, parent->datarate); + /* Write constraints back */ + ioc->u.tag.align = tag->align; + ioc->u.tag.bndry = tag->bndry; + ioc->u.tag.maxaddr = tag->maxaddr; + ioc->u.tag.maxsz = tag->maxsz; + ioc->u.tag.maxsegsz = tag->maxsegsz; + ioc->u.tag.nsegs = tag->nsegs; + ioc->u.tag.datarate = tag->datarate; + } else { + tag->align = ioc->u.tag.align; + tag->bndry = ioc->u.tag.bndry; + tag->maxaddr = ioc->u.tag.maxaddr; + tag->maxsz = ioc->u.tag.maxsz; + tag->maxsegsz = ioc->u.tag.maxsegsz; + tag->nsegs = ioc->u.tag.nsegs; + tag->datarate = ioc->u.tag.datarate; + } + LIST_INSERT_HEAD(&busdma->tags, tag, tags); + ioc->result = (uintptr_t)(void *)tag; + return (0); +} + +static int +proto_busdma_tag_destroy(struct proto_busdma *busdma, struct proto_tag *tag) +{ + + if (!LIST_EMPTY(&tag->mds)) + return (EBUSY); + if (!LIST_EMPTY(&tag->children)) + return (EBUSY); + + if (tag->parent != NULL) { + LIST_REMOVE(tag, peers); + tag->parent = NULL; + } + LIST_REMOVE(tag, tags); + free(tag, M_PROTO_BUSDMA); + return (0); +} + +static struct proto_tag * +proto_busdma_tag_lookup(struct proto_busdma *busdma, u_long key) +{ + struct proto_tag *tag; + + LIST_FOREACH(tag, &busdma->tags, tags) { + if ((void *)tag == (void *)key) + return (tag); + } + return (NULL); +} + +static int +proto_busdma_mem_alloc(struct proto_busdma *busdma, struct proto_tag *tag, + struct proto_ioc_busdma *ioc) +{ + struct proto_md *md; + int error; + + md = malloc(sizeof(*md), M_PROTO_BUSDMA, M_WAITOK | M_ZERO); + md->tag = tag; + + error = bus_dma_tag_create(busdma->bd_roottag, tag->align, tag->bndry, + tag->maxaddr, BUS_SPACE_MAXADDR, NULL, NULL, tag->maxsz, + tag->nsegs, tag->maxsegsz, 0, NULL, NULL, &md->bd_tag); + if (error) { + free(md, M_PROTO_BUSDMA); + return (error); + } + error = bus_dmamem_alloc(md->bd_tag, &md->virtaddr, 0, &md->bd_map); + if (error) { + bus_dma_tag_destroy(md->bd_tag); + free(md, M_PROTO_BUSDMA); + return (error); + } + md->physaddr = pmap_kextract((uintptr_t)(md->virtaddr)); + LIST_INSERT_HEAD(&tag->mds, md, peers); + LIST_INSERT_HEAD(&busdma->mds, md, mds); + ioc->u.mem.nsegs = 1; + ioc->u.mem.physaddr = md->physaddr; + ioc->result = (uintptr_t)(void *)md; + return (0); +} + +static int +proto_busdma_mem_free(struct proto_busdma *busdma, struct proto_md *md) +{ + + LIST_REMOVE(md, mds); + LIST_REMOVE(md, peers); + bus_dmamem_free(md->bd_tag, md->virtaddr, md->bd_map); + bus_dma_tag_destroy(md->bd_tag); + free(md, M_PROTO_BUSDMA); + return (0); +} + +static struct proto_md * +proto_busdma_md_lookup(struct proto_busdma *busdma, u_long key) +{ + struct proto_md *md; + + LIST_FOREACH(md, &busdma->mds, mds) { + if ((void *)md == (void *)key) + return (md); + } + return (NULL); +} + +struct proto_busdma * +proto_busdma_attach(struct proto_softc *sc) +{ + struct proto_busdma *busdma; + + busdma = malloc(sizeof(*busdma), M_PROTO_BUSDMA, M_WAITOK | M_ZERO); + return (busdma); +} + +int +proto_busdma_detach(struct proto_softc *sc, struct proto_busdma *busdma) +{ + + proto_busdma_cleanup(sc, busdma); + free(busdma, M_PROTO_BUSDMA); + return (0); +} + +int +proto_busdma_cleanup(struct proto_softc *sc, struct proto_busdma *busdma) +{ + struct proto_md *md, *md1; + struct proto_tag *tag, *tag1; + + LIST_FOREACH_SAFE(md, &busdma->mds, mds, md1) + proto_busdma_mem_free(busdma, md); + LIST_FOREACH_SAFE(tag, &busdma->tags, tags, tag1) + proto_busdma_tag_destroy(busdma, tag); + return (0); +} + +int +proto_busdma_ioctl(struct proto_softc *sc, struct proto_busdma *busdma, + struct proto_ioc_busdma *ioc) +{ + struct proto_tag *tag; + struct proto_md *md; + int error; + + error = 0; + switch (ioc->request) { + case PROTO_IOC_BUSDMA_TAG_CREATE: + busdma->bd_roottag = bus_get_dma_tag(sc->sc_dev); + error = proto_busdma_tag_create(busdma, NULL, ioc); + break; + case PROTO_IOC_BUSDMA_TAG_DERIVE: + tag = proto_busdma_tag_lookup(busdma, ioc->key); + if (tag == NULL) { + error = EINVAL; + break; + } + error = proto_busdma_tag_create(busdma, tag, ioc); + break; + case PROTO_IOC_BUSDMA_TAG_DESTROY: + tag = proto_busdma_tag_lookup(busdma, ioc->key); + if (tag == NULL) { + error = EINVAL; + break; + } + error = proto_busdma_tag_destroy(busdma, tag); + break; + case PROTO_IOC_BUSDMA_MEM_ALLOC: + tag = proto_busdma_tag_lookup(busdma, ioc->u.mem.tag); + if (tag == NULL) { + error = EINVAL; + break; + } + error = proto_busdma_mem_alloc(busdma, tag, ioc); + break; + case PROTO_IOC_BUSDMA_MEM_FREE: + md = proto_busdma_md_lookup(busdma, ioc->key); + if (md == NULL) { + error = EINVAL; + break; + } + error = proto_busdma_mem_free(busdma, md); + break; + default: + error = EINVAL; + break; + } + return (error); +} + +int +proto_busdma_mmap_allowed(struct proto_busdma *busdma, vm_paddr_t physaddr) +{ + struct proto_md *md; + + LIST_FOREACH(md, &busdma->mds, mds) { + if (physaddr >= trunc_page(md->physaddr) && + physaddr <= trunc_page(md->physaddr + md->tag->maxsz)) + return (1); + } + return (0); +} diff --git a/sys/dev/proto/proto_busdma.h b/sys/dev/proto/proto_busdma.h new file mode 100644 index 000000000000..b4957f58531e --- /dev/null +++ b/sys/dev/proto/proto_busdma.h @@ -0,0 +1,75 @@ +/*- + * Copyright (c) 2015 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _DEV_PROTO_BUSDMA_H_ +#define _DEV_PROTO_BUSDMA_H_ + +struct proto_md; + +struct proto_tag { + LIST_ENTRY(proto_tag) tags; + struct proto_tag *parent; + LIST_ENTRY(proto_tag) peers; + LIST_HEAD(,proto_tag) children; + LIST_HEAD(,proto_md) mds; + bus_addr_t align; + bus_addr_t bndry; + bus_addr_t maxaddr; + bus_size_t maxsz; + bus_size_t maxsegsz; + u_int nsegs; + u_int datarate; +}; + +struct proto_md { + LIST_ENTRY(proto_md) mds; + LIST_ENTRY(proto_md) peers; + struct proto_tag *tag; + void *virtaddr; + vm_paddr_t physaddr; + bus_dma_tag_t bd_tag; + bus_dmamap_t bd_map; +}; + +struct proto_busdma { + LIST_HEAD(,proto_tag) tags; + LIST_HEAD(,proto_md) mds; + bus_dma_tag_t bd_roottag; +}; + +struct proto_busdma *proto_busdma_attach(struct proto_softc *); +int proto_busdma_detach(struct proto_softc *, struct proto_busdma *); + +int proto_busdma_cleanup(struct proto_softc *, struct proto_busdma *); + +int proto_busdma_ioctl(struct proto_softc *, struct proto_busdma *, + struct proto_ioc_busdma *); + +int proto_busdma_mmap_allowed(struct proto_busdma *, vm_paddr_t); + +#endif /* _DEV_PROTO_BUSDMA_H_ */ diff --git a/sys/dev/proto/proto_core.c b/sys/dev/proto/proto_core.c index 5ea0a6c12667..86f08eb2e9d8 100644 --- a/sys/dev/proto/proto_core.c +++ b/sys/dev/proto/proto_core.c @@ -51,6 +51,7 @@ __FBSDID("$FreeBSD$"); #include <dev/proto/proto.h> #include <dev/proto/proto_dev.h> +#include <dev/proto/proto_busdma.h> CTASSERT(SYS_RES_IRQ != PROTO_RES_UNUSED && SYS_RES_MEMORY != PROTO_RES_UNUSED && @@ -58,6 +59,9 @@ CTASSERT(SYS_RES_IRQ != PROTO_RES_UNUSED && CTASSERT(SYS_RES_IRQ != PROTO_RES_PCICFG && SYS_RES_MEMORY != PROTO_RES_PCICFG && SYS_RES_IOPORT != PROTO_RES_PCICFG); +CTASSERT(SYS_RES_IRQ != PROTO_RES_BUSDMA && + SYS_RES_MEMORY != PROTO_RES_BUSDMA && + SYS_RES_IOPORT != PROTO_RES_BUSDMA); devclass_t proto_devclass; char proto_driver_name[] = "proto"; @@ -97,7 +101,7 @@ proto_add_resource(struct proto_softc *sc, int type, int rid, r = sc->sc_res + sc->sc_rescnt++; r->r_type = type; r->r_rid = rid; - r->r_res = res; + r->r_d.res = res; return (0); } @@ -130,7 +134,7 @@ proto_attach(device_t dev) break; case SYS_RES_MEMORY: case SYS_RES_IOPORT: - r->r_size = rman_get_size(r->r_res); + r->r_size = rman_get_size(r->r_d.res); r->r_u.cdev = make_dev(&proto_devsw, res, 0, 0, 0666, "proto/%s/%02x.%s", device_get_desc(dev), r->r_rid, (r->r_type == SYS_RES_IOPORT) ? "io" : "mem"); @@ -144,6 +148,14 @@ proto_attach(device_t dev) r->r_u.cdev->si_drv1 = sc; r->r_u.cdev->si_drv2 = r; break; + case PROTO_RES_BUSDMA: + r->r_d.busdma = proto_busdma_attach(sc); + r->r_size = 0; /* no read(2) nor write(2) */ + r->r_u.cdev = make_dev(&proto_devsw, res, 0, 0, 0666, + "proto/%s/busdma", device_get_desc(dev)); + r->r_u.cdev->si_drv1 = sc; + r->r_u.cdev->si_drv2 = r; + break; } } return (0); @@ -158,7 +170,7 @@ proto_detach(device_t dev) sc = device_get_softc(dev); - /* Don't detach if we have open device filess. */ + /* Don't detach if we have open device files. */ for (res = 0; res < sc->sc_rescnt; res++) { r = sc->sc_res + res; if (r->r_opened) @@ -170,17 +182,22 @@ proto_detach(device_t dev) switch (r->r_type) { case SYS_RES_IRQ: /* XXX TODO */ + bus_release_resource(dev, r->r_type, r->r_rid, + r->r_d.res); break; case SYS_RES_MEMORY: case SYS_RES_IOPORT: + bus_release_resource(dev, r->r_type, r->r_rid, + r->r_d.res); + destroy_dev(r->r_u.cdev); + break; case PROTO_RES_PCICFG: destroy_dev(r->r_u.cdev); break; - } - if (r->r_res != NULL) { - bus_release_resource(dev, r->r_type, r->r_rid, - r->r_res); - r->r_res = NULL; + case PROTO_RES_BUSDMA: + proto_busdma_detach(sc, r->r_d.busdma); + destroy_dev(r->r_u.cdev); + break; } r->r_type = PROTO_RES_UNUSED; } @@ -207,10 +224,14 @@ static int proto_close(struct cdev *cdev, int fflag, int devtype, struct thread *td) { struct proto_res *r; + struct proto_softc *sc; + sc = cdev->si_drv1; r = cdev->si_drv2; if (!atomic_cmpset_acq_ptr(&r->r_opened, (uintptr_t)td->td_proc, 0UL)) return (ENXIO); + if (r->r_type == PROTO_RES_BUSDMA) + proto_busdma_cleanup(sc, r->r_d.busdma); return (0); } @@ -244,21 +265,21 @@ proto_read(struct cdev *cdev, struct uio *uio, int ioflag) switch (width) { case 1: buf.x1[0] = (r->r_type == PROTO_RES_PCICFG) ? - pci_read_config(dev, ofs, 1) : bus_read_1(r->r_res, ofs); + pci_read_config(dev, ofs, 1) : bus_read_1(r->r_d.res, ofs); break; case 2: buf.x2[0] = (r->r_type == PROTO_RES_PCICFG) ? - pci_read_config(dev, ofs, 2) : bus_read_2(r->r_res, ofs); + pci_read_config(dev, ofs, 2) : bus_read_2(r->r_d.res, ofs); break; case 4: buf.x4[0] = (r->r_type == PROTO_RES_PCICFG) ? - pci_read_config(dev, ofs, 4) : bus_read_4(r->r_res, ofs); + pci_read_config(dev, ofs, 4) : bus_read_4(r->r_d.res, ofs); break; #ifndef __i386__ case 8: if (r->r_type == PROTO_RES_PCICFG) return (EINVAL); - buf.x8[0] = bus_read_8(r->r_res, ofs); + buf.x8[0] = bus_read_8(r->r_d.res, ofs); break; #endif default: @@ -305,25 +326,25 @@ proto_write(struct cdev *cdev, struct uio *uio, int ioflag) if (r->r_type == PROTO_RES_PCICFG) pci_write_config(dev, ofs, buf.x1[0], 1); else - bus_write_1(r->r_res, ofs, buf.x1[0]); + bus_write_1(r->r_d.res, ofs, buf.x1[0]); break; case 2: if (r->r_type == PROTO_RES_PCICFG) pci_write_config(dev, ofs, buf.x2[0], 2); else - bus_write_2(r->r_res, ofs, buf.x2[0]); + bus_write_2(r->r_d.res, ofs, buf.x2[0]); break; case 4: if (r->r_type == PROTO_RES_PCICFG) pci_write_config(dev, ofs, buf.x4[0], 4); else - bus_write_4(r->r_res, ofs, buf.x4[0]); + bus_write_4(r->r_d.res, ofs, buf.x4[0]); break; #ifndef __i386__ case 8: if (r->r_type == PROTO_RES_PCICFG) return (EINVAL); - bus_write_8(r->r_res, ofs, buf.x8[0]); + bus_write_8(r->r_d.res, ofs, buf.x8[0]); break; #endif default: @@ -338,20 +359,35 @@ proto_ioctl(struct cdev *cdev, u_long cmd, caddr_t data, int fflag, struct thread *td) { struct proto_ioc_region *region; + struct proto_ioc_busdma *busdma; struct proto_res *r; + struct proto_softc *sc; int error; + sc = cdev->si_drv1; r = cdev->si_drv2; error = 0; switch (cmd) { case PROTO_IOC_REGION: + if (r->r_type == PROTO_RES_BUSDMA) { + error = EINVAL; + break; + } region = (struct proto_ioc_region *)data; region->size = r->r_size; if (r->r_type == PROTO_RES_PCICFG) region->address = 0; else - region->address = rman_get_start(r->r_res); + region->address = rman_get_start(r->r_d.res); + break; + case PROTO_IOC_BUSDMA: + if (r->r_type != PROTO_RES_BUSDMA) { + error = EINVAL; + break; + } + busdma = (struct proto_ioc_busdma *)data; + error = proto_busdma_ioctl(sc, r->r_d.busdma, busdma); break; default: error = ENOIOCTL; @@ -366,19 +402,29 @@ proto_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr, { struct proto_res *r; - r = cdev->si_drv2; - - if (r->r_type != SYS_RES_MEMORY) - return (ENXIO); if (offset & PAGE_MASK) return (EINVAL); if (prot & PROT_EXEC) return (EACCES); - if (offset >= r->r_size) - return (EINVAL); - *paddr = rman_get_start(r->r_res) + offset; + + r = cdev->si_drv2; + + switch (r->r_type) { + case SYS_RES_MEMORY: + if (offset >= r->r_size) + return (EINVAL); + *paddr = rman_get_start(r->r_d.res) + offset; #ifndef __sparc64__ - *memattr = VM_MEMATTR_UNCACHEABLE; + *memattr = VM_MEMATTR_UNCACHEABLE; #endif + break; + case PROTO_RES_BUSDMA: + if (!proto_busdma_mmap_allowed(r->r_d.busdma, offset)) + return (EINVAL); + *paddr = offset; + break; + default: + return (ENXIO); + } return (0); } diff --git a/sys/dev/proto/proto_dev.h b/sys/dev/proto/proto_dev.h index 0ea37495ce3b..0050f0b91804 100644 --- a/sys/dev/proto/proto_dev.h +++ b/sys/dev/proto/proto_dev.h @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2014 Marcel Moolenaar + * Copyright (c) 2014, 2015 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -40,4 +40,35 @@ struct proto_ioc_region { #define PROTO_IOC_REGION _IOWR(PROTO_IOC_CLASS, 1, struct proto_ioc_region) +struct proto_ioc_busdma { + unsigned int request; +#define PROTO_IOC_BUSDMA_TAG_CREATE 1 +#define PROTO_IOC_BUSDMA_TAG_DERIVE 2 +#define PROTO_IOC_BUSDMA_TAG_DESTROY 3 +#define PROTO_IOC_BUSDMA_MEM_ALLOC 10 +#define PROTO_IOC_BUSDMA_MEM_FREE 11 + unsigned long key; + union { + struct { + unsigned long align; + unsigned long bndry; + unsigned long maxaddr; + unsigned long maxsz; + unsigned long maxsegsz; + unsigned int nsegs; + unsigned int datarate; + unsigned int flags; + } tag; + struct { + unsigned long tag; + unsigned int flags; + unsigned int nsegs; + unsigned long physaddr; + } mem; + } u; + unsigned long result; +}; + +#define PROTO_IOC_BUSDMA _IOWR(PROTO_IOC_CLASS, 2, struct proto_ioc_busdma) + #endif /* _DEV_PROTO_H_ */ diff --git a/sys/dev/usb/controller/dwc_otg.c b/sys/dev/usb/controller/dwc_otg.c index 50ead5c290a7..868c7c7e3461 100644 --- a/sys/dev/usb/controller/dwc_otg.c +++ b/sys/dev/usb/controller/dwc_otg.c @@ -180,6 +180,22 @@ dwc_otg_get_hw_ep_profile(struct usb_device *udev, *ppf = NULL; } +static void +dwc_otg_tx_fifo_reset(struct dwc_otg_softc *sc, uint32_t value) +{ + uint32_t temp; + + /* reset FIFO */ + DWC_OTG_WRITE_4(sc, DOTG_GRSTCTL, value); + + /* wait for reset to complete */ + for (temp = 0; temp != 16; temp++) { + value = DWC_OTG_READ_4(sc, DOTG_GRSTCTL); + if (!(value & (GRSTCTL_TXFFLSH | GRSTCTL_RXFFLSH))) + break; + } +} + static int dwc_otg_init_fifo(struct dwc_otg_softc *sc, uint8_t mode) { @@ -331,12 +347,11 @@ dwc_otg_init_fifo(struct dwc_otg_softc *sc, uint8_t mode) } /* reset RX FIFO */ - DWC_OTG_WRITE_4(sc, DOTG_GRSTCTL, - GRSTCTL_RXFFLSH); + dwc_otg_tx_fifo_reset(sc, GRSTCTL_RXFFLSH); if (mode != DWC_MODE_OTG) { /* reset all TX FIFOs */ - DWC_OTG_WRITE_4(sc, DOTG_GRSTCTL, + dwc_otg_tx_fifo_reset(sc, GRSTCTL_TXFIFO(0x10) | GRSTCTL_TXFFLSH); } else { @@ -947,15 +962,21 @@ dwc_otg_setup_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) if (GRXSTSRD_CHNUM_GET(sc->sc_last_rx_status) != 0) goto not_complete; - if ((sc->sc_last_rx_status & GRXSTSRD_DPID_MASK) != - GRXSTSRD_DPID_DATA0) { + if ((sc->sc_last_rx_status & GRXSTSRD_PKTSTS_MASK) != + GRXSTSRD_STP_DATA) { + if ((sc->sc_last_rx_status & GRXSTSRD_PKTSTS_MASK) != + GRXSTSRD_STP_COMPLETE || td->remainder != 0) { + /* release FIFO */ + dwc_otg_common_rx_ack(sc); + goto not_complete; + } /* release FIFO */ dwc_otg_common_rx_ack(sc); - goto not_complete; + return (0); /* complete */ } - if ((sc->sc_last_rx_status & GRXSTSRD_PKTSTS_MASK) != - GRXSTSRD_STP_DATA) { + if ((sc->sc_last_rx_status & GRXSTSRD_DPID_MASK) != + GRXSTSRD_DPID_DATA0) { /* release FIFO */ dwc_otg_common_rx_ack(sc); goto not_complete; @@ -969,14 +990,6 @@ dwc_otg_setup_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) /* get the packet byte count */ count = GRXSTSRD_BCNT_GET(sc->sc_last_rx_status); - /* verify data length */ - if (count != td->remainder) { - DPRINTFN(0, "Invalid SETUP packet " - "length, %d bytes\n", count); - /* release FIFO */ - dwc_otg_common_rx_ack(sc); - goto not_complete; - } if (count != sizeof(req)) { DPRINTFN(0, "Unsupported SETUP packet " "length, %d bytes\n", count); @@ -1002,43 +1015,27 @@ dwc_otg_setup_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) } /* don't send any data by default */ - DWC_OTG_WRITE_4(sc, DOTG_DIEPTSIZ(0), - DXEPTSIZ_SET_NPKT(0) | - DXEPTSIZ_SET_NBYTES(0)); - - temp = sc->sc_in_ctl[0]; - - /* enable IN endpoint */ - DWC_OTG_WRITE_4(sc, DOTG_DIEPCTL(0), - temp | DIEPCTL_EPENA); - DWC_OTG_WRITE_4(sc, DOTG_DIEPCTL(0), - temp | DIEPCTL_SNAK); + DWC_OTG_WRITE_4(sc, DOTG_DIEPTSIZ(0), DIEPCTL_EPDIS); + DWC_OTG_WRITE_4(sc, DOTG_DOEPTSIZ(0), DOEPCTL_EPDIS); /* reset IN endpoint buffer */ - DWC_OTG_WRITE_4(sc, DOTG_GRSTCTL, + dwc_otg_tx_fifo_reset(sc, GRSTCTL_TXFIFO(0) | GRSTCTL_TXFFLSH); /* acknowledge RX status */ dwc_otg_common_rx_ack(sc); - return (0); /* complete */ + td->did_stall = 1; not_complete: /* abort any ongoing transfer, before enabling again */ - - temp = sc->sc_out_ctl[0]; - - temp |= DOEPCTL_EPENA | - DOEPCTL_SNAK; - - /* enable OUT endpoint */ - DWC_OTG_WRITE_4(sc, DOTG_DOEPCTL(0), temp); - if (!td->did_stall) { td->did_stall = 1; DPRINTFN(5, "stalling IN and OUT direction\n"); + temp = sc->sc_out_ctl[0]; + /* set stall after enabling endpoint */ DWC_OTG_WRITE_4(sc, DOTG_DOEPCTL(0), temp | DOEPCTL_STALL); @@ -1049,13 +1046,6 @@ not_complete: DWC_OTG_WRITE_4(sc, DOTG_DIEPCTL(0), temp | DIEPCTL_STALL); } - - /* setup number of buffers to receive */ - DWC_OTG_WRITE_4(sc, DOTG_DOEPTSIZ(0), - DXEPTSIZ_SET_MULTI(3) | - DXEPTSIZ_SET_NPKT(1) | - DXEPTSIZ_SET_NBYTES(sizeof(req))); - return (1); /* not complete */ } @@ -1499,7 +1489,9 @@ dwc_otg_data_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) /* check for SETUP packet */ if ((sc->sc_last_rx_status & GRXSTSRD_PKTSTS_MASK) == - GRXSTSRD_STP_DATA) { + GRXSTSRD_STP_DATA || + (sc->sc_last_rx_status & GRXSTSRD_PKTSTS_MASK) == + GRXSTSRD_STP_COMPLETE) { if (td->remainder == 0) { /* * We are actually complete and have @@ -1584,15 +1576,10 @@ dwc_otg_data_rx(struct dwc_otg_softc *sc, struct dwc_otg_td *td) not_complete: - temp = sc->sc_out_ctl[td->ep_no]; - - temp |= DOEPCTL_EPENA | DOEPCTL_CNAK; - - DWC_OTG_WRITE_4(sc, DOTG_DOEPCTL(td->ep_no), temp); - /* enable SETUP and transfer complete interrupt */ if (td->ep_no == 0) { DWC_OTG_WRITE_4(sc, DOTG_DOEPTSIZ(0), + DXEPTSIZ_SET_MULTI(3) | DXEPTSIZ_SET_NPKT(1) | DXEPTSIZ_SET_NBYTES(td->max_packet_size)); } else { @@ -1601,8 +1588,12 @@ not_complete: DXEPTSIZ_SET_MULTI(1) | DXEPTSIZ_SET_NPKT(4) | DXEPTSIZ_SET_NBYTES(4 * - ((td->max_packet_size + 3) & ~3))); + ((td->max_packet_size + 3) & ~3))); } + temp = sc->sc_out_ctl[td->ep_no]; + DWC_OTG_WRITE_4(sc, DOTG_DOEPCTL(td->ep_no), temp | + DOEPCTL_EPENA | DOEPCTL_CNAK); + return (1); /* not complete */ } @@ -2004,7 +1995,9 @@ repeat: (GRXSTSRD_CHNUM_GET(temp) == 0)) { if ((temp & GRXSTSRD_PKTSTS_MASK) != - GRXSTSRD_STP_DATA) { + GRXSTSRD_STP_DATA && + (temp & GRXSTSRD_PKTSTS_MASK) != + GRXSTSRD_STP_COMPLETE) { /* dump data - wrong direction */ dwc_otg_common_rx_ack(sc); @@ -2209,7 +2202,9 @@ not_complete: (GRXSTSRD_CHNUM_GET(temp) == 0)) { if ((temp & GRXSTSRD_PKTSTS_MASK) == - GRXSTSRD_STP_DATA) { + GRXSTSRD_STP_DATA || + (temp & GRXSTSRD_PKTSTS_MASK) == + GRXSTSRD_STP_COMPLETE) { DPRINTFN(5, "faking complete\n"); /* * Race condition: We are complete! @@ -2634,6 +2629,7 @@ repeat: /* non-data messages we simply skip */ if (temp != GRXSTSRD_STP_DATA && + temp != GRXSTSRD_STP_COMPLETE && temp != GRXSTSRD_OUT_DATA) { dwc_otg_common_rx_ack(sc); goto repeat; @@ -3669,7 +3665,7 @@ dwc_otg_clear_stall_sub_locked(struct dwc_otg_softc *sc, uint32_t mps, /* we only reset the transmit FIFO */ if (ep_dir) { - DWC_OTG_WRITE_4(sc, DOTG_GRSTCTL, + dwc_otg_tx_fifo_reset(sc, GRSTCTL_TXFIFO(ep_no) | GRSTCTL_TXFFLSH); diff --git a/sys/dev/usb/quirk/usb_quirk.c b/sys/dev/usb/quirk/usb_quirk.c index 3cfaef0ddec5..c756b244495d 100644 --- a/sys/dev/usb/quirk/usb_quirk.c +++ b/sys/dev/usb/quirk/usb_quirk.c @@ -94,6 +94,7 @@ static struct usb_quirk_entry usb_quirks[USB_DEV_QUIRKS_MAX] = { USB_QUIRK(SILICONPORTALS, YAPPHONE, 0x100, 0x100, UQ_AU_INP_ASYNC), USB_QUIRK(LOGITECH, UN53B, 0x0000, 0xffff, UQ_NO_STRINGS), USB_QUIRK(REALTEK, RTL8196EU, 0x0000, 0xffff, UQ_CFG_INDEX_1), + USB_QUIRK(REALTEK, RTL8153, 0x0000, 0xffff, UQ_CFG_INDEX_1), USB_QUIRK(ELSA, MODEM1, 0x0000, 0xffff, UQ_CFG_INDEX_1), USB_QUIRK(PLANEX2, MZKUE150N, 0x0000, 0xffff, UQ_CFG_INDEX_1), /* Quirks for printer devices */ diff --git a/sys/dev/usb/template/usb_template.c b/sys/dev/usb/template/usb_template.c index 49bd373a9210..140c0b9b3c23 100644 --- a/sys/dev/usb/template/usb_template.c +++ b/sys/dev/usb/template/usb_template.c @@ -1374,6 +1374,9 @@ usb_temp_setup_by_index(struct usb_device *udev, uint16_t index) case USB_TEMP_SERIALNET: err = usb_temp_setup(udev, &usb_template_serialnet); break; + case USB_TEMP_MIDI: + err = usb_temp_setup(udev, &usb_template_midi); + break; default: return (USB_ERR_INVAL); } diff --git a/sys/dev/usb/template/usb_template.h b/sys/dev/usb/template/usb_template.h index 484608d3de69..1b320c689f1b 100644 --- a/sys/dev/usb/template/usb_template.h +++ b/sys/dev/usb/template/usb_template.h @@ -107,6 +107,7 @@ extern const struct usb_temp_device_desc usb_template_msc; extern const struct usb_temp_device_desc usb_template_mtp; extern const struct usb_temp_device_desc usb_template_phone; extern const struct usb_temp_device_desc usb_template_serialnet; +extern const struct usb_temp_device_desc usb_template_midi; usb_error_t usb_temp_setup(struct usb_device *, const struct usb_temp_device_desc *); diff --git a/sys/dev/usb/template/usb_template_midi.c b/sys/dev/usb/template/usb_template_midi.c new file mode 100644 index 000000000000..9be1b9e5a18c --- /dev/null +++ b/sys/dev/usb/template/usb_template_midi.c @@ -0,0 +1,240 @@ +/* $FreeBSD$ */ +/*- + * Copyright (c) 2015 Hans Petter Selasky. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * This file contains the USB template for an USB MIDI Device. + */ + +#ifdef USB_GLOBAL_INCLUDE_FILE +#include USB_GLOBAL_INCLUDE_FILE +#else +#include <sys/stdint.h> +#include <sys/stddef.h> +#include <sys/param.h> +#include <sys/queue.h> +#include <sys/types.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/bus.h> +#include <sys/module.h> +#include <sys/lock.h> +#include <sys/mutex.h> +#include <sys/condvar.h> +#include <sys/sysctl.h> +#include <sys/sx.h> +#include <sys/unistd.h> +#include <sys/callout.h> +#include <sys/malloc.h> +#include <sys/priv.h> + +#include <dev/usb/usb.h> +#include <dev/usb/usbdi.h> +#include <dev/usb/usb_core.h> + +#include <dev/usb/template/usb_template.h> +#endif /* USB_GLOBAL_INCLUDE_FILE */ + +enum { + INDEX_MIDI_LANG, + INDEX_MIDI_IF, + INDEX_MIDI_PRODUCT, + INDEX_MIDI_MAX, +}; + +#define STRING_MIDI_PRODUCT \ + "M\0I\0D\0I\0 \0T\0e\0s\0t\0 \0D\0e\0v\0i\0c\0e" + +#define STRING_MIDI_IF \ + "M\0I\0D\0I\0 \0i\0n\0t\0e\0r\0f\0a\0c\0e" + +/* make the real string descriptors */ + +USB_MAKE_STRING_DESC(STRING_MIDI_IF, string_midi_if); +USB_MAKE_STRING_DESC(STRING_MIDI_PRODUCT, string_midi_product); + +/* prototypes */ + +static const uint8_t midi_desc_raw_0[9] = { + 0x09, 0x24, 0x01, 0x00, 0x01, 0x09, 0x00, 0x01, 0x01 +}; + +static const void *midi_descs_0[] = { + &midi_desc_raw_0, + NULL +}; + +static const struct usb_temp_interface_desc midi_iface_0 = { + .ppEndpoints = NULL, /* no endpoints */ + .ppRawDesc = midi_descs_0, + .bInterfaceClass = 1, + .bInterfaceSubClass = 1, + .bInterfaceProtocol = 0, + .iInterface = INDEX_MIDI_IF, +}; + +static const struct usb_temp_packet_size midi_mps = { + .mps[USB_SPEED_LOW] = 8, + .mps[USB_SPEED_FULL] = 64, + .mps[USB_SPEED_HIGH] = 512, +}; + +static const uint8_t midi_desc_raw_7[5] = { + 0x05, 0x25, 0x01, 0x01, 0x01 +}; + +static const void *midi_descs_2[] = { + &midi_desc_raw_7, + NULL +}; + +static const struct usb_temp_endpoint_desc midi_bulk_out_ep = { + .ppRawDesc = midi_descs_2, + .pPacketSize = &midi_mps, + .bEndpointAddress = UE_DIR_OUT, + .bmAttributes = UE_BULK, +}; + +static const uint8_t midi_desc_raw_6[5] = { + 0x05, 0x25, 0x01, 0x01, 0x03, +}; + +static const void *midi_descs_3[] = { + &midi_desc_raw_6, + NULL +}; + +static const struct usb_temp_endpoint_desc midi_bulk_in_ep = { + .ppRawDesc = midi_descs_3, + .pPacketSize = &midi_mps, + .bEndpointAddress = UE_DIR_IN, + .bmAttributes = UE_BULK, +}; + +static const struct usb_temp_endpoint_desc *midi_iface_1_ep[] = { + &midi_bulk_out_ep, + &midi_bulk_in_ep, + NULL, +}; + +static const uint8_t midi_desc_raw_1[7] = { + 0x07, 0x24, 0x01, 0x00, 0x01, /* wTotalLength: */ 0x41, 0x00 +}; + +static const uint8_t midi_desc_raw_2[6] = { + 0x06, 0x24, 0x02, 0x01, 0x01, 0x00 +}; + +static const uint8_t midi_desc_raw_3[6] = { + 0x06, 0x24, 0x02, 0x02, 0x02, 0x00 +}; + +static const uint8_t midi_desc_raw_4[9] = { + 0x09, 0x24, 0x03, 0x01, 0x03, 0x01, 0x02, 0x01, 0x00 +}; + +static const uint8_t midi_desc_raw_5[9] = { + 0x09, 0x24, 0x03, 0x02, 0x04, 0x01, 0x01, 0x01, 0x00 +}; + +static const void *midi_descs_1[] = { + &midi_desc_raw_1, + &midi_desc_raw_2, + &midi_desc_raw_3, + &midi_desc_raw_4, + &midi_desc_raw_5, + NULL +}; + +static const struct usb_temp_interface_desc midi_iface_1 = { + .ppRawDesc = midi_descs_1, + .ppEndpoints = midi_iface_1_ep, + .bInterfaceClass = 0x01, /* MIDI */ + .bInterfaceSubClass = 3, /* MIDI streaming */ + .bInterfaceProtocol = 0, + .iInterface = INDEX_MIDI_IF, +}; + +static const struct usb_temp_interface_desc *midi_interfaces[] = { + &midi_iface_0, + &midi_iface_1, + NULL, +}; + +static const struct usb_temp_config_desc midi_config_desc = { + .ppIfaceDesc = midi_interfaces, + .bmAttributes = UC_BUS_POWERED, + .bMaxPower = 25, /* 50 mA */ + .iConfiguration = INDEX_MIDI_PRODUCT, +}; + +static const struct usb_temp_config_desc *midi_configs[] = { + &midi_config_desc, + NULL, +}; + +static usb_temp_get_string_desc_t midi_get_string_desc; + +const struct usb_temp_device_desc usb_template_midi = { + .getStringDesc = &midi_get_string_desc, + .ppConfigDesc = midi_configs, + .idVendor = USB_TEMPLATE_VENDOR, + .idProduct = 0x00BB, + .bcdDevice = 0x0100, + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .iManufacturer = 0, + .iProduct = INDEX_MIDI_PRODUCT, + .iSerialNumber = 0, +}; + +/*------------------------------------------------------------------------* + * midi_get_string_desc + * + * Return values: + * NULL: Failure. No such string. + * Else: Success. Pointer to string descriptor is returned. + *------------------------------------------------------------------------*/ +static const void * +midi_get_string_desc(uint16_t lang_id, uint8_t string_index) +{ + static const void *ptr[INDEX_MIDI_MAX] = { + [INDEX_MIDI_LANG] = &usb_string_lang_en, + [INDEX_MIDI_IF] = &string_midi_if, + [INDEX_MIDI_PRODUCT] = &string_midi_product, + }; + + if (string_index == 0) { + return (&usb_string_lang_en); + } + if (lang_id != 0x0409) { + return (NULL); + } + if (string_index < INDEX_MIDI_MAX) { + return (ptr[string_index]); + } + return (NULL); +} diff --git a/sys/dev/usb/usb_dev.c b/sys/dev/usb/usb_dev.c index 1076a9fe0da8..c48bfc9967e6 100644 --- a/sys/dev/usb/usb_dev.c +++ b/sys/dev/usb/usb_dev.c @@ -830,7 +830,8 @@ usb_fifo_close(struct usb_fifo *f, int fflags) (!f->flag_iserror)) { /* wait until all data has been written */ f->flag_sleeping = 1; - err = cv_wait_sig(&f->cv_io, f->priv_mtx); + err = cv_timedwait_sig(&f->cv_io, f->priv_mtx, + USB_MS_TO_TICKS(USB_DEFAULT_TIMEOUT)); if (err) { DPRINTF("signal received\n"); break; diff --git a/sys/dev/usb/usb_ioctl.h b/sys/dev/usb/usb_ioctl.h index 539f88118824..683f3e61b858 100644 --- a/sys/dev/usb/usb_ioctl.h +++ b/sys/dev/usb/usb_ioctl.h @@ -66,6 +66,7 @@ enum { USB_TEMP_MOUSE, /* USB Mouse */ USB_TEMP_PHONE, /* USB Phone */ USB_TEMP_SERIALNET, /* USB CDC Ethernet and Modem */ + USB_TEMP_MIDI, /* USB MIDI */ USB_TEMP_MAX, }; diff --git a/sys/dev/usb/usbdevs b/sys/dev/usb/usbdevs index f8ba5b5f2f6e..b19f766571ec 100644 --- a/sys/dev/usb/usbdevs +++ b/sys/dev/usb/usbdevs @@ -3748,6 +3748,7 @@ product REALTEK USB20CRW 0x0158 USB20CRW Card Reader product REALTEK RTL8188ETV 0x0179 RTL8188ETV product REALTEK RTL8188CTV 0x018a RTL8188CTV product REALTEK USBKR100 0x8150 USBKR100 USB Ethernet +product REALTEK RTL8153 0x8153 RTL8153 USB Ethernet product REALTEK RTL8188CE_0 0x8170 RTL8188CE product REALTEK RTL8171 0x8171 RTL8171 product REALTEK RTL8172 0x8172 RTL8172 diff --git a/sys/fs/devfs/devfs_vnops.c b/sys/fs/devfs/devfs_vnops.c index 552ddd239883..fe8e9ef3f03f 100644 --- a/sys/fs/devfs/devfs_vnops.c +++ b/sys/fs/devfs/devfs_vnops.c @@ -51,6 +51,7 @@ #include <sys/kernel.h> #include <sys/lock.h> #include <sys/malloc.h> +#include <sys/mman.h> #include <sys/mount.h> #include <sys/namei.h> #include <sys/priv.h> @@ -71,6 +72,10 @@ static struct fileops devfs_ops_f; #include <security/mac/mac_framework.h> +#include <vm/vm.h> +#include <vm/vm_extern.h> +#include <vm/vm_object.h> + static MALLOC_DEFINE(M_CDEVPDATA, "DEVFSP", "Metainfo for cdev-fp data"); struct mtx devfs_de_interlock; @@ -1738,6 +1743,65 @@ devfs_write_f(struct file *fp, struct uio *uio, struct ucred *cred, return (error); } +static int +devfs_mmap_f(struct file *fp, vm_map_t map, vm_offset_t *addr, vm_size_t size, + vm_prot_t prot, vm_prot_t cap_maxprot, int flags, vm_ooffset_t foff, + struct thread *td) +{ + struct cdev *dev; + struct cdevsw *dsw; + struct mount *mp; + struct vnode *vp; + struct file *fpop; + vm_object_t object; + vm_prot_t maxprot; + int error, ref; + + vp = fp->f_vnode; + + /* + * Ensure that file and memory protections are + * compatible. + */ + mp = vp->v_mount; + if (mp != NULL && (mp->mnt_flag & MNT_NOEXEC) != 0) + maxprot = VM_PROT_NONE; + else + maxprot = VM_PROT_EXECUTE; + if ((fp->f_flag & FREAD) != 0) + maxprot |= VM_PROT_READ; + else if ((prot & VM_PROT_READ) != 0) + return (EACCES); + + /* + * Character devices always share mappings, so + * require a writable fd for writable mappings. + */ + if ((fp->f_flag & FWRITE) != 0) + maxprot |= VM_PROT_WRITE; + else if ((prot & VM_PROT_WRITE) != 0) + return (EACCES); + maxprot &= cap_maxprot; + + fpop = td->td_fpop; + error = devfs_fp_check(fp, &dev, &dsw, &ref); + if (error != 0) + return (error); + + error = vm_mmap_cdev(td, size, prot, &maxprot, &flags, dev, dsw, &foff, + &object); + td->td_fpop = fpop; + dev_relthread(dev, ref); + if (error != 0) + return (error); + + error = vm_mmap_object(map, addr, size, prot, maxprot, flags, object, + foff, FALSE, td); + if (error != 0) + vm_object_deallocate(object); + return (error); +} + dev_t dev2udev(struct cdev *x) { @@ -1760,6 +1824,7 @@ static struct fileops devfs_ops_f = { .fo_sendfile = vn_sendfile, .fo_seek = vn_seek, .fo_fill_kinfo = vn_fill_kinfo, + .fo_mmap = devfs_mmap_f, .fo_flags = DFLAG_PASSABLE | DFLAG_SEEKABLE }; diff --git a/sys/fs/procfs/procfs_ctl.c b/sys/fs/procfs/procfs_ctl.c index 1437644d5fa3..15679e36da32 100644 --- a/sys/fs/procfs/procfs_ctl.c +++ b/sys/fs/procfs/procfs_ctl.c @@ -235,6 +235,7 @@ out: } else PROC_LOCK(p); p->p_oppid = 0; + p->p_stops = 0; p->p_flag &= ~P_WAITED; /* XXX ? */ sx_xunlock(&proctree_lock); diff --git a/sys/fs/procfs/procfs_map.c b/sys/fs/procfs/procfs_map.c index eae70229e6bd..b00aac3ac891 100644 --- a/sys/fs/procfs/procfs_map.c +++ b/sys/fs/procfs/procfs_map.c @@ -159,11 +159,11 @@ procfs_doprocmap(PFS_FILL_ARGS) freepath = NULL; fullpath = "-"; if (lobj) { + vp = NULL; switch (lobj->type) { default: case OBJT_DEFAULT: type = "default"; - vp = NULL; break; case OBJT_VNODE: type = "vnode"; @@ -171,13 +171,19 @@ procfs_doprocmap(PFS_FILL_ARGS) vref(vp); break; case OBJT_SWAP: - type = "swap"; - vp = NULL; + if ((lobj->flags & OBJ_TMPFS_NODE) != 0) { + type = "vnode"; + if ((lobj->flags & OBJ_TMPFS) != 0) { + vp = lobj->un_pager.swp.swp_tmpfs; + vref(vp); + } + } else { + type = "swap"; + } break; case OBJT_SG: case OBJT_DEVICE: type = "device"; - vp = NULL; break; } if (lobj != obj) diff --git a/sys/fs/unionfs/union_vfsops.c b/sys/fs/unionfs/union_vfsops.c index e4b9fb50681d..f65ee8c248e7 100644 --- a/sys/fs/unionfs/union_vfsops.c +++ b/sys/fs/unionfs/union_vfsops.c @@ -291,18 +291,11 @@ unionfs_domount(struct mount *mp) } MNT_ILOCK(mp); - /* - * Check mnt_flag - */ if ((ump->um_lowervp->v_mount->mnt_flag & MNT_LOCAL) && (ump->um_uppervp->v_mount->mnt_flag & MNT_LOCAL)) mp->mnt_flag |= MNT_LOCAL; - /* - * Check mnt_kern_flag - */ - if ((ump->um_lowervp->v_mount->mnt_flag & MNTK_SUSPENDABLE) || - (ump->um_uppervp->v_mount->mnt_flag & MNTK_SUSPENDABLE)) + if ((ump->um_uppervp->v_mount->mnt_kern_flag & MNTK_SUSPENDABLE) != 0) mp->mnt_kern_flag |= MNTK_SUSPENDABLE; MNT_IUNLOCK(mp); diff --git a/sys/geom/part/g_part_gpt.c b/sys/geom/part/g_part_gpt.c index 81ddfa27d82b..08a31983a134 100644 --- a/sys/geom/part/g_part_gpt.c +++ b/sys/geom/part/g_part_gpt.c @@ -760,7 +760,7 @@ g_part_gpt_resize(struct g_part_table *basetable, struct g_part_gpt_entry *entry; if (baseentry == NULL) - return (EOPNOTSUPP); + return (g_part_gpt_recover(basetable)); entry = (struct g_part_gpt_entry *)baseentry; baseentry->gpe_end = baseentry->gpe_start + gpp->gpp_size - 1; diff --git a/sys/i386/i386/initcpu.c b/sys/i386/i386/initcpu.c index 9d8c2653aa43..705d915728fb 100644 --- a/sys/i386/i386/initcpu.c +++ b/sys/i386/i386/initcpu.c @@ -102,6 +102,7 @@ u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */ #endif u_int cpu_clflush_line_size = 32; u_int cpu_stdext_feature; +u_int cpu_stdext_feature2; u_int cpu_max_ext_state_size; u_int cpu_mon_mwait_flags; /* MONITOR/MWAIT flags (CPUID.05H.ECX) */ u_int cpu_mon_min_size; /* MONITOR minimum range size, bytes */ diff --git a/sys/i386/i386/pmap.c b/sys/i386/i386/pmap.c index 029a277b5bea..a642d10088f7 100644 --- a/sys/i386/i386/pmap.c +++ b/sys/i386/i386/pmap.c @@ -4035,6 +4035,7 @@ pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr, vm_size_t len, ~PG_W; dst_pmap->pm_stats.resident_count += NBPDR / PAGE_SIZE; + pmap_pde_mappings++; } continue; } diff --git a/sys/i386/i386/trap.c b/sys/i386/i386/trap.c index d783a2bde98c..1ca406bfeed7 100644 --- a/sys/i386/i386/trap.c +++ b/sys/i386/i386/trap.c @@ -998,12 +998,8 @@ trap_fatal(frame, eva) if (frame->tf_eflags & PSL_VM) printf("vm86, "); printf("IOPL = %d\n", (frame->tf_eflags & PSL_IOPL) >> 12); - printf("current process = "); - if (curproc) { - printf("%lu (%s)\n", (u_long)curproc->p_pid, curthread->td_name); - } else { - printf("Idle\n"); - } + printf("current process = %d (%s)\n", + curproc->p_pid, curthread->td_name); #ifdef KDB if (debugger_on_panic || kdb_active) { diff --git a/sys/i386/include/md_var.h b/sys/i386/include/md_var.h index b5bd35ef524d..633e9c586918 100644 --- a/sys/i386/include/md_var.h +++ b/sys/i386/include/md_var.h @@ -49,6 +49,7 @@ extern u_int via_feature_rng; extern u_int via_feature_xcrypt; extern u_int cpu_clflush_line_size; extern u_int cpu_stdext_feature; +extern u_int cpu_stdext_feature2; extern u_int cpu_fxsr; extern u_int cpu_high; extern u_int cpu_id; diff --git a/sys/i386/include/vmparam.h b/sys/i386/include/vmparam.h index cb23b0595649..987ac624abab 100644 --- a/sys/i386/include/vmparam.h +++ b/sys/i386/include/vmparam.h @@ -83,13 +83,12 @@ #define VM_PHYSSEG_MAX 17 /* - * Create two free page pools. Since the i386 kernel virtual address + * Create one free page pool. Since the i386 kernel virtual address * space does not include a mapping onto the machine's entire physical * memory, VM_FREEPOOL_DIRECT is defined as an alias for the default * pool, VM_FREEPOOL_DEFAULT. */ -#define VM_NFREEPOOL 2 -#define VM_FREEPOOL_CACHE 1 +#define VM_NFREEPOOL 1 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 0 diff --git a/sys/kern/imgact_elf.c b/sys/kern/imgact_elf.c index a98a15d146d1..c3953fe083a8 100644 --- a/sys/kern/imgact_elf.c +++ b/sys/kern/imgact_elf.c @@ -732,7 +732,7 @@ __CONCAT(exec_, __elfN(imgact))(struct image_params *imgp) u_long addr, baddr, et_dyn_addr, entry = 0, proghdr = 0; int32_t osrel = 0; int error = 0, i, n, interp_name_len = 0; - const char *interp = NULL, *newinterp = NULL; + const char *err_str = NULL, *interp = NULL, *newinterp = NULL; Elf_Brandinfo *brand_info; char *path; struct sysentvec *sv; @@ -755,11 +755,14 @@ __CONCAT(exec_, __elfN(imgact))(struct image_params *imgp) if ((hdr->e_phoff > PAGE_SIZE) || (u_int)hdr->e_phentsize * hdr->e_phnum > PAGE_SIZE - hdr->e_phoff) { /* Only support headers in first page for now */ + uprintf("Program headers not in the first page\n"); return (ENOEXEC); } - phdr = (const Elf_Phdr *)(imgp->image_header + hdr->e_phoff); - if (!aligned(phdr, Elf_Addr)) + phdr = (const Elf_Phdr *)(imgp->image_header + hdr->e_phoff); + if (!aligned(phdr, Elf_Addr)) { + uprintf("Unaligned program headers\n"); return (ENOEXEC); + } n = 0; baddr = 0; for (i = 0; i < hdr->e_phnum; i++) { @@ -773,8 +776,10 @@ __CONCAT(exec_, __elfN(imgact))(struct image_params *imgp) /* Path to interpreter */ if (phdr[i].p_filesz > MAXPATHLEN || phdr[i].p_offset > PAGE_SIZE || - phdr[i].p_filesz > PAGE_SIZE - phdr[i].p_offset) + phdr[i].p_filesz > PAGE_SIZE - phdr[i].p_offset) { + uprintf("Invalid PT_INTERP\n"); return (ENOEXEC); + } interp = imgp->image_header + phdr[i].p_offset; interp_name_len = phdr[i].p_filesz; break; @@ -795,8 +800,10 @@ __CONCAT(exec_, __elfN(imgact))(struct image_params *imgp) return (ENOEXEC); } if (hdr->e_type == ET_DYN) { - if ((brand_info->flags & BI_CAN_EXEC_DYN) == 0) + if ((brand_info->flags & BI_CAN_EXEC_DYN) == 0) { + uprintf("Cannot execute shared object\n"); return (ENOEXEC); + } /* * Honour the base load address from the dso if it is * non-zero for some reason. @@ -901,12 +908,19 @@ __CONCAT(exec_, __elfN(imgact))(struct image_params *imgp) * not actually fault in all the segments pages. */ PROC_LOCK(imgp->proc); - if (data_size > lim_cur(imgp->proc, RLIMIT_DATA) || - text_size > maxtsiz || - total_size > lim_cur(imgp->proc, RLIMIT_VMEM) || - racct_set(imgp->proc, RACCT_DATA, data_size) != 0 || - racct_set(imgp->proc, RACCT_VMEM, total_size) != 0) { + if (data_size > lim_cur(imgp->proc, RLIMIT_DATA)) + err_str = "Data segment size exceeds process limit"; + else if (text_size > maxtsiz) + err_str = "Text segment size exceeds system limit"; + else if (total_size > lim_cur(imgp->proc, RLIMIT_VMEM)) + err_str = "Total segment size exceeds process limit"; + else if (racct_set(imgp->proc, RACCT_DATA, data_size) != 0) + err_str = "Data segment size exceeds resource limit"; + else if (racct_set(imgp->proc, RACCT_VMEM, total_size) != 0) + err_str = "Total segment size exceeds resource limit"; + if (err_str != NULL) { PROC_UNLOCK(imgp->proc); + uprintf("%s\n", err_str); return (ENOMEM); } diff --git a/sys/kern/kern_proc.c b/sys/kern/kern_proc.c index 6618c0849373..fc33febee40e 100644 --- a/sys/kern/kern_proc.c +++ b/sys/kern/kern_proc.c @@ -2113,7 +2113,15 @@ sysctl_kern_proc_ovmmap(SYSCTL_HANDLER_ARGS) vref(vp); break; case OBJT_SWAP: - kve->kve_type = KVME_TYPE_SWAP; + if ((lobj->flags & OBJ_TMPFS_NODE) != 0) { + kve->kve_type = KVME_TYPE_VNODE; + if ((lobj->flags & OBJ_TMPFS) != 0) { + vp = lobj->un_pager.swp.swp_tmpfs; + vref(vp); + } + } else { + kve->kve_type = KVME_TYPE_SWAP; + } break; case OBJT_DEVICE: kve->kve_type = KVME_TYPE_DEVICE; @@ -2339,7 +2347,15 @@ kern_proc_vmmap_out(struct proc *p, struct sbuf *sb) vref(vp); break; case OBJT_SWAP: - kve->kve_type = KVME_TYPE_SWAP; + if ((lobj->flags & OBJ_TMPFS_NODE) != 0) { + kve->kve_type = KVME_TYPE_VNODE; + if ((lobj->flags & OBJ_TMPFS) != 0) { + vp = lobj->un_pager.swp.swp_tmpfs; + vref(vp); + } + } else { + kve->kve_type = KVME_TYPE_SWAP; + } break; case OBJT_DEVICE: kve->kve_type = KVME_TYPE_DEVICE; diff --git a/sys/kern/kern_tc.c b/sys/kern/kern_tc.c index 9dca0e80e5ea..01c61bd09446 100644 --- a/sys/kern/kern_tc.c +++ b/sys/kern/kern_tc.c @@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$"); #include <sys/timetc.h> #include <sys/timex.h> #include <sys/vdso.h> +#include <machine/atomic.h> /* * A large step happens on boot. This constant detects such steps. @@ -71,7 +72,7 @@ struct timehands { struct timeval th_microtime; struct timespec th_nanotime; /* Fields not to be copied in tc_windup start with th_generation. */ - volatile u_int th_generation; + u_int th_generation; struct timehands *th_next; }; @@ -189,6 +190,33 @@ tc_delta(struct timehands *th) tc->tc_counter_mask); } +static u_int +tc_getgen(struct timehands *th) +{ + +#ifdef SMP + return (atomic_load_acq_int(&th->th_generation)); +#else + u_int gen; + + gen = th->th_generation; + __compiler_membar(); + return (gen); +#endif +} + +static void +tc_setgen(struct timehands *th, u_int newgen) +{ + +#ifdef SMP + atomic_store_rel_int(&th->th_generation, newgen); +#else + __compiler_membar(); + th->th_generation = newgen; +#endif +} + /* * Functions for reading the time. We have to loop until we are sure that * the timehands that we operated on was not updated under our feet. See @@ -204,10 +232,10 @@ fbclock_binuptime(struct bintime *bt) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *bt = th->th_offset; bintime_addx(bt, th->th_scale * tc_delta(th)); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -262,9 +290,9 @@ fbclock_getbinuptime(struct bintime *bt) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *bt = th->th_offset; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -275,9 +303,9 @@ fbclock_getnanouptime(struct timespec *tsp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); bintime2timespec(&th->th_offset, tsp); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -288,9 +316,9 @@ fbclock_getmicrouptime(struct timeval *tvp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); bintime2timeval(&th->th_offset, tvp); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -301,9 +329,9 @@ fbclock_getbintime(struct bintime *bt) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *bt = th->th_offset; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); bintime_add(bt, &boottimebin); } @@ -315,9 +343,9 @@ fbclock_getnanotime(struct timespec *tsp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *tsp = th->th_nanotime; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -328,9 +356,9 @@ fbclock_getmicrotime(struct timeval *tvp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *tvp = th->th_microtime; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } #else /* !FFCLOCK */ void @@ -341,10 +369,10 @@ binuptime(struct bintime *bt) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *bt = th->th_offset; bintime_addx(bt, th->th_scale * tc_delta(th)); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -399,9 +427,9 @@ getbinuptime(struct bintime *bt) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *bt = th->th_offset; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -412,9 +440,9 @@ getnanouptime(struct timespec *tsp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); bintime2timespec(&th->th_offset, tsp); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -425,9 +453,9 @@ getmicrouptime(struct timeval *tvp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); bintime2timeval(&th->th_offset, tvp); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -438,9 +466,9 @@ getbintime(struct bintime *bt) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *bt = th->th_offset; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); bintime_add(bt, &boottimebin); } @@ -452,9 +480,9 @@ getnanotime(struct timespec *tsp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *tsp = th->th_nanotime; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } void @@ -465,9 +493,9 @@ getmicrotime(struct timeval *tvp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *tvp = th->th_microtime; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } #endif /* FFCLOCK */ @@ -880,11 +908,11 @@ ffclock_read_counter(ffcounter *ffcount) */ do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); ffth = fftimehands; delta = tc_delta(th); *ffcount = ffth->tick_ffcount; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); *ffcount += delta; } @@ -988,9 +1016,9 @@ dtrace_getnanotime(struct timespec *tsp) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); *tsp = th->th_nanotime; - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); } /* @@ -1028,7 +1056,7 @@ sysclock_getsnapshot(struct sysclock_snap *clock_snap, int fast) do { th = timehands; - gen = th->th_generation; + gen = tc_getgen(th); fbi->th_scale = th->th_scale; fbi->tick_time = th->th_offset; #ifdef FFCLOCK @@ -1042,7 +1070,7 @@ sysclock_getsnapshot(struct sysclock_snap *clock_snap, int fast) #endif if (!fast) delta = tc_delta(th); - } while (gen == 0 || gen != th->th_generation); + } while (gen == 0 || gen != tc_getgen(th)); clock_snap->delta = delta; clock_snap->sysclock_active = sysclock_active; @@ -1260,7 +1288,7 @@ tc_windup(void) tho = timehands; th = tho->th_next; ogen = th->th_generation; - th->th_generation = 0; + tc_setgen(th, 0); bcopy(tho, th, offsetof(struct timehands, th_generation)); /* @@ -1377,7 +1405,7 @@ tc_windup(void) */ if (++ogen == 0) ogen = 1; - th->th_generation = ogen; + tc_setgen(th, ogen); /* Go live with the new struct timehands. */ #ifdef FFCLOCK @@ -1651,13 +1679,13 @@ pps_capture(struct pps_state *pps) KASSERT(pps != NULL, ("NULL pps pointer in pps_capture")); th = timehands; - pps->capgen = th->th_generation; + pps->capgen = tc_getgen(th); pps->capth = th; #ifdef FFCLOCK pps->capffth = fftimehands; #endif pps->capcount = th->th_counter->tc_get_timecount(th->th_counter); - if (pps->capgen != th->th_generation) + if (pps->capgen != tc_getgen(th)) pps->capgen = 0; } @@ -1677,7 +1705,7 @@ pps_event(struct pps_state *pps, int event) KASSERT(pps != NULL, ("NULL pps pointer in pps_event")); /* If the timecounter was wound up underneath us, bail out. */ - if (pps->capgen == 0 || pps->capgen != pps->capth->th_generation) + if (pps->capgen == 0 || pps->capgen != tc_getgen(pps->capth)) return; /* Things would be easier with arrays. */ @@ -1727,7 +1755,7 @@ pps_event(struct pps_state *pps, int event) bintime2timespec(&bt, &ts); /* If the timecounter was wound up underneath us, bail out. */ - if (pps->capgen != pps->capth->th_generation) + if (pps->capgen != tc_getgen(pps->capth)) return; *pcount = pps->capcount; diff --git a/sys/kern/subr_uio.c b/sys/kern/subr_uio.c index 87892fd82798..410085e3c47c 100644 --- a/sys/kern/subr_uio.c +++ b/sys/kern/subr_uio.c @@ -417,7 +417,7 @@ copyout_map(struct thread *td, vm_offset_t *addr, size_t sz) /* round size up to page boundry */ size = (vm_size_t)round_page(sz); - error = vm_mmap(&vms->vm_map, addr, size, PROT_READ | PROT_WRITE, + error = vm_mmap(&vms->vm_map, addr, size, VM_PROT_READ | VM_PROT_WRITE, VM_PROT_ALL, MAP_PRIVATE | MAP_ANON, OBJT_DEFAULT, NULL, 0); return (error); diff --git a/sys/kern/subr_witness.c b/sys/kern/subr_witness.c index dc343d0162c6..12808073387e 100644 --- a/sys/kern/subr_witness.c +++ b/sys/kern/subr_witness.c @@ -1170,19 +1170,25 @@ witness_checkorder(struct lock_object *lock, int flags, const char *file, /* * Try to perform most checks without a lock. If this succeeds we - * can skip acquiring the lock and return success. + * can skip acquiring the lock and return success. Otherwise we redo + * the check with the lock held to handle races with concurrent updates. */ w1 = plock->li_lock->lo_witness; if (witness_lock_order_check(w1, w)) return; + mtx_lock_spin(&w_mtx); + if (witness_lock_order_check(w1, w)) { + mtx_unlock_spin(&w_mtx); + return; + } + witness_lock_order_add(w1, w); + /* * Check for duplicate locks of the same type. Note that we only * have to check for this on the last lock we just acquired. Any * other cases will be caught as lock order violations. */ - mtx_lock_spin(&w_mtx); - witness_lock_order_add(w1, w); if (w1 == w) { i = w->w_index; if (!(lock->lo_flags & LO_DUPOK) && !(flags & LOP_DUPOK) && @@ -1996,7 +2002,10 @@ _isitmyx(struct witness *w1, struct witness *w2, int rmask, const char *fname) /* The flags on one better be the inverse of the flags on the other */ if (!((WITNESS_ATOD(r1) == r2 && WITNESS_DTOA(r2) == r1) || - (WITNESS_DTOA(r1) == r2 && WITNESS_ATOD(r2) == r1))) { + (WITNESS_DTOA(r1) == r2 && WITNESS_ATOD(r2) == r1))) { + /* Don't squawk if we're potentially racing with an update. */ + if (!mtx_owned(&w_mtx)) + return (0); printf("%s: rmatrix mismatch between %s (index %d) and %s " "(index %d): w_rmatrix[%d][%d] == %hhx but " "w_rmatrix[%d][%d] == %hhx\n", diff --git a/sys/kern/sys_process.c b/sys/kern/sys_process.c index 3bf2db80871f..d82fda030cb8 100644 --- a/sys/kern/sys_process.c +++ b/sys/kern/sys_process.c @@ -402,7 +402,7 @@ ptrace_vm_entry(struct thread *td, struct proc *p, struct ptrace_vm_entry *pve) lobj = tobj; pve->pve_offset += tobj->backing_object_offset; } - vp = (lobj->type == OBJT_VNODE) ? lobj->handle : NULL; + vp = vm_object_vnode(lobj); if (vp != NULL) vref(vp); if (lobj != obj) @@ -963,6 +963,7 @@ kern_ptrace(struct thread *td, int req, pid_t pid, void *addr, int data) CTR1(KTR_PTRACE, "PT_DETACH: pid %d", p->p_pid); p->p_oppid = 0; p->p_flag &= ~(P_TRACED | P_WAITED | P_FOLLOWFORK); + p->p_stops = 0; /* should we send SIGCHLD? */ /* childproc_continued(p); */ diff --git a/sys/kern/uipc_shm.c b/sys/kern/uipc_shm.c index 93c7ed1cdcce..3419c51506c7 100644 --- a/sys/kern/uipc_shm.c +++ b/sys/kern/uipc_shm.c @@ -127,6 +127,7 @@ static fo_chmod_t shm_chmod; static fo_chown_t shm_chown; static fo_seek_t shm_seek; static fo_fill_kinfo_t shm_fill_kinfo; +static fo_mmap_t shm_mmap; /* File descriptor operations. */ static struct fileops shm_ops = { @@ -143,6 +144,7 @@ static struct fileops shm_ops = { .fo_sendfile = vn_sendfile, .fo_seek = shm_seek, .fo_fill_kinfo = shm_fill_kinfo, + .fo_mmap = shm_mmap, .fo_flags = DFLAG_PASSABLE | DFLAG_SEEKABLE }; @@ -851,15 +853,37 @@ sys_shm_unlink(struct thread *td, struct shm_unlink_args *uap) return (error); } -/* - * mmap() helper to validate mmap() requests against shm object state - * and give mmap() the vm_object to use for the mapping. - */ int -shm_mmap(struct shmfd *shmfd, vm_size_t objsize, vm_ooffset_t foff, - vm_object_t *obj) +shm_mmap(struct file *fp, vm_map_t map, vm_offset_t *addr, vm_size_t objsize, + vm_prot_t prot, vm_prot_t cap_maxprot, int flags, + vm_ooffset_t foff, struct thread *td) { + struct shmfd *shmfd; + vm_prot_t maxprot; + int error; + + shmfd = fp->f_data; + maxprot = VM_PROT_NONE; + + /* FREAD should always be set. */ + if ((fp->f_flag & FREAD) != 0) + maxprot |= VM_PROT_EXECUTE | VM_PROT_READ; + if ((fp->f_flag & FWRITE) != 0) + maxprot |= VM_PROT_WRITE; + + /* Don't permit shared writable mappings on read-only descriptors. */ + if ((flags & MAP_SHARED) != 0 && + (maxprot & VM_PROT_WRITE) == 0 && + (prot & VM_PROT_WRITE) != 0) + return (EACCES); + maxprot &= cap_maxprot; +#ifdef MAC + error = mac_posixshm_check_mmap(td->td_ucred, shmfd, prot, flags); + if (error != 0) + return (error); +#endif + /* * XXXRW: This validation is probably insufficient, and subject to * sign errors. It should be fixed. @@ -872,7 +896,11 @@ shm_mmap(struct shmfd *shmfd, vm_size_t objsize, vm_ooffset_t foff, vfs_timestamp(&shmfd->shm_atime); mtx_unlock(&shm_timestamp_lock); vm_object_reference(shmfd->shm_object); - *obj = shmfd->shm_object; + + error = vm_mmap_object(map, addr, objsize, prot, maxprot, flags, + shmfd->shm_object, foff, FALSE, td); + if (error != 0) + vm_object_deallocate(shmfd->shm_object); return (0); } diff --git a/sys/kern/vfs_vnops.c b/sys/kern/vfs_vnops.c index a00da5151b48..573d00941988 100644 --- a/sys/kern/vfs_vnops.c +++ b/sys/kern/vfs_vnops.c @@ -54,6 +54,7 @@ __FBSDID("$FreeBSD$"); #include <sys/proc.h> #include <sys/limits.h> #include <sys/lock.h> +#include <sys/mman.h> #include <sys/mount.h> #include <sys/mutex.h> #include <sys/namei.h> @@ -80,6 +81,7 @@ __FBSDID("$FreeBSD$"); #include <vm/vm_map.h> #include <vm/vm_object.h> #include <vm/vm_page.h> +#include <vm/vnode_pager.h> static fo_rdwr_t vn_read; static fo_rdwr_t vn_write; @@ -90,6 +92,7 @@ static fo_poll_t vn_poll; static fo_kqfilter_t vn_kqfilter; static fo_stat_t vn_statfile; static fo_close_t vn_closefile; +static fo_mmap_t vn_mmap; struct fileops vnops = { .fo_read = vn_io_fault, @@ -105,6 +108,7 @@ struct fileops vnops = { .fo_sendfile = vn_sendfile, .fo_seek = vn_seek, .fo_fill_kinfo = vn_fill_kinfo, + .fo_mmap = vn_mmap, .fo_flags = DFLAG_PASSABLE | DFLAG_SEEKABLE }; @@ -2362,3 +2366,95 @@ vn_fill_kinfo_vnode(struct vnode *vp, struct kinfo_file *kif) kif->kf_un.kf_file.kf_file_rdev = va.va_rdev; return (0); } + +int +vn_mmap(struct file *fp, vm_map_t map, vm_offset_t *addr, vm_size_t size, + vm_prot_t prot, vm_prot_t cap_maxprot, int flags, vm_ooffset_t foff, + struct thread *td) +{ +#ifdef HWPMC_HOOKS + struct pmckern_map_in pkm; +#endif + struct mount *mp; + struct vnode *vp; + vm_object_t object; + vm_prot_t maxprot; + boolean_t writecounted; + int error; + +#if defined(COMPAT_FREEBSD7) || defined(COMPAT_FREEBSD6) || \ + defined(COMPAT_FREEBSD5) || defined(COMPAT_FREEBSD4) + /* + * POSIX shared-memory objects are defined to have + * kernel persistence, and are not defined to support + * read(2)/write(2) -- or even open(2). Thus, we can + * use MAP_ASYNC to trade on-disk coherence for speed. + * The shm_open(3) library routine turns on the FPOSIXSHM + * flag to request this behavior. + */ + if ((fp->f_flag & FPOSIXSHM) != 0) + flags |= MAP_NOSYNC; +#endif + vp = fp->f_vnode; + + /* + * Ensure that file and memory protections are + * compatible. Note that we only worry about + * writability if mapping is shared; in this case, + * current and max prot are dictated by the open file. + * XXX use the vnode instead? Problem is: what + * credentials do we use for determination? What if + * proc does a setuid? + */ + mp = vp->v_mount; + if (mp != NULL && (mp->mnt_flag & MNT_NOEXEC) != 0) + maxprot = VM_PROT_NONE; + else + maxprot = VM_PROT_EXECUTE; + if ((fp->f_flag & FREAD) != 0) + maxprot |= VM_PROT_READ; + else if ((prot & VM_PROT_READ) != 0) + return (EACCES); + + /* + * If we are sharing potential changes via MAP_SHARED and we + * are trying to get write permission although we opened it + * without asking for it, bail out. + */ + if ((flags & MAP_SHARED) != 0) { + if ((fp->f_flag & FWRITE) != 0) + maxprot |= VM_PROT_WRITE; + else if ((prot & VM_PROT_WRITE) != 0) + return (EACCES); + } else { + maxprot |= VM_PROT_WRITE; + cap_maxprot |= VM_PROT_WRITE; + } + maxprot &= cap_maxprot; + + writecounted = FALSE; + error = vm_mmap_vnode(td, size, prot, &maxprot, &flags, vp, + &foff, &object, &writecounted); + if (error != 0) + return (error); + error = vm_mmap_object(map, addr, size, prot, maxprot, flags, object, + foff, writecounted, td); + if (error != 0) { + /* + * If this mapping was accounted for in the vnode's + * writecount, then undo that now. + */ + if (writecounted) + vnode_pager_release_writecount(object, 0, size); + vm_object_deallocate(object); + } +#ifdef HWPMC_HOOKS + /* Inform hwpmc(4) if an executable is being mapped. */ + if (error == 0 && (prot & VM_PROT_EXECUTE) != 0) { + pkm.pm_file = vp; + pkm.pm_address = (uintptr_t) addr; + PMC_CALL_HOOK(td, PMC_FN_MMAP, (void *) &pkm); + } +#endif + return (error); +} diff --git a/sys/mips/conf/AR71XX_BASE b/sys/mips/conf/AR71XX_BASE index 357f9659c66b..d2ff804c22ed 100644 --- a/sys/mips/conf/AR71XX_BASE +++ b/sys/mips/conf/AR71XX_BASE @@ -26,6 +26,9 @@ makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols # modules already built. makeoptions MODULES_OVERRIDE="random gpio ar71xx if_gif if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr ath ath_pci" +# For small memory footprints +options VM_KMEM_SIZE_SCALE=1 + options DDB options KDB diff --git a/sys/mips/conf/AR724X_BASE b/sys/mips/conf/AR724X_BASE index f0be92c93995..7c2845038248 100644 --- a/sys/mips/conf/AR724X_BASE +++ b/sys/mips/conf/AR724X_BASE @@ -27,6 +27,9 @@ makeoptions DEBUG=-g #Build kernel with gdb(1) debug symbols # modules already built. makeoptions MODULES_OVERRIDE="random gpio ar71xx if_gif if_gre if_bridge bridgestp usb wlan wlan_xauth wlan_acl wlan_wep wlan_tkip wlan_ccmp wlan_rssadapt wlan_amrr ath ath_pci hwpmc cam" +# For small memory footprints +options VM_KMEM_SIZE_SCALE=1 + options DDB options KDB diff --git a/sys/mips/include/vmparam.h b/sys/mips/include/vmparam.h index 89caf27d296e..020d0ac0184f 100644 --- a/sys/mips/include/vmparam.h +++ b/sys/mips/include/vmparam.h @@ -149,13 +149,12 @@ #define VM_PHYSSEG_SPARSE /* - * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool + * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool * from which physical pages are allocated and VM_FREEPOOL_DIRECT is * the pool from which physical pages for small UMA objects are * allocated. */ -#define VM_NFREEPOOL 3 -#define VM_FREEPOOL_CACHE 2 +#define VM_NFREEPOOL 2 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 1 diff --git a/sys/modules/Makefile b/sys/modules/Makefile index 7091c3ce0a24..39b8bfd384e3 100644 --- a/sys/modules/Makefile +++ b/sys/modules/Makefile @@ -512,7 +512,6 @@ _io= io .if ${MK_OFED} != "no" || defined(ALL_MODULES) _ipoib= ipoib .endif -_ix= ix _ixv= ixv _linprocfs= linprocfs _linsysfs= linsysfs diff --git a/sys/modules/em/Makefile b/sys/modules/em/Makefile index 3112d010a372..1de7c62298e9 100644 --- a/sys/modules/em/Makefile +++ b/sys/modules/em/Makefile @@ -2,7 +2,8 @@ .PATH: ${.CURDIR}/../../dev/e1000 KMOD = if_em -SRCS = device_if.h bus_if.h pci_if.h opt_inet.h opt_inet6.h +SRCS = device_if.h bus_if.h pci_if.h opt_ddb.h opt_em.h opt_inet.h \ + opt_inet6.h SRCS += $(CORE_SRC) $(LEGACY_SRC) SRCS += $(COMMON_SHARED) $(LEGACY_SHARED) $(PCIE_SHARED) CORE_SRC = if_em.c e1000_osdep.c diff --git a/sys/modules/geom/geom_map/Makefile b/sys/modules/geom/geom_map/Makefile new file mode 100644 index 000000000000..6b26ba9470fe --- /dev/null +++ b/sys/modules/geom/geom_map/Makefile @@ -0,0 +1,8 @@ +# $FreeBSD$ + +.PATH: ${.CURDIR}/../../../geom + +KMOD= geom_map +SRCS= geom_map.c bus_if.h device_if.h + +.include <bsd.kmod.mk> diff --git a/sys/modules/ixl/Makefile b/sys/modules/ixl/Makefile index 13be8ab6fc4c..2f969a5a497f 100644 --- a/sys/modules/ixl/Makefile +++ b/sys/modules/ixl/Makefile @@ -10,7 +10,7 @@ SRCS += if_ixl.c ixl_txrx.c i40e_osdep.c # Shared source SRCS += i40e_common.c i40e_nvm.c i40e_adminq.c i40e_lan_hmc.c i40e_hmc.c -CFLAGS += -DSMP +CFLAGS += -DSMP -DIXL_DEBUG_SYSCTL # Add Flow Director support # CFLAGS += -DIXL_FDIR diff --git a/sys/modules/ixlv/Makefile b/sys/modules/ixlv/Makefile index 2e51bb8b28e7..3e2678e9a3fd 100755 --- a/sys/modules/ixlv/Makefile +++ b/sys/modules/ixlv/Makefile @@ -8,7 +8,7 @@ SRCS += opt_inet.h opt_inet6.h opt_rss.h SRCS += if_ixlv.c ixlvc.c ixl_txrx.c i40e_osdep.c # Shared source -SRCS += i40e_common.c i40e_nvm.c i40e_adminq.c i40e_lan_hmc.c i40e_hmc.c +SRCS += i40e_common.c i40e_nvm.c i40e_adminq.c CFLAGS += -DSMP diff --git a/sys/modules/ixv/Makefile b/sys/modules/ixv/Makefile index f8ce347d3128..32077392152d 100644 --- a/sys/modules/ixv/Makefile +++ b/sys/modules/ixv/Makefile @@ -7,9 +7,8 @@ SRCS = device_if.h bus_if.h pci_if.h SRCS += opt_inet.h opt_inet6.h opt_rss.h SRCS += if_ixv.c ix_txrx.c # Shared source -SRCS += ixgbe_common.c ixgbe_api.c ixgbe_phy.c ixgbe_mbx.c ixgbe_vf.c -SRCS += ixgbe_dcb.c ixgbe_dcb_82598.c ixgbe_dcb_82599.c -SRCS += ixgbe_82598.c ixgbe_82599.c ixgbe_x540.c ixgbe_x550.c +SRCS += ixgbe_common.c ixgbe_api.c ixgbe_phy.c +SRCS += ixgbe_dcb.c ixgbe_mbx.c ixgbe_vf.c CFLAGS+= -I${.CURDIR}/../../dev/ixgbe -DSMP .include <bsd.kmod.mk> diff --git a/sys/modules/proto/Makefile b/sys/modules/proto/Makefile index 4cfbd72a0bdf..3038c77f2f21 100644 --- a/sys/modules/proto/Makefile +++ b/sys/modules/proto/Makefile @@ -5,6 +5,7 @@ KMOD= proto SRCS= \ proto_bus_pci.c \ + proto_busdma.c \ proto_core.c SRCS+= \ diff --git a/sys/modules/usb/template/Makefile b/sys/modules/usb/template/Makefile index fc1cca93d3fa..4164177e8e22 100644 --- a/sys/modules/usb/template/Makefile +++ b/sys/modules/usb/template/Makefile @@ -40,6 +40,7 @@ SRCS= opt_bus.h opt_usb.h device_if.h bus_if.h usb_if.h vnode_if.h usbdevs.h \ usb_template_msc.c \ usb_template_mtp.c \ usb_template_phone.c \ - usb_template_serialnet.c + usb_template_serialnet.c \ + usb_template_midi.c .include <bsd.kmod.mk> diff --git a/sys/net80211/ieee80211.c b/sys/net80211/ieee80211.c index 53f2debedcfe..3902227e8c43 100644 --- a/sys/net80211/ieee80211.c +++ b/sys/net80211/ieee80211.c @@ -1081,7 +1081,7 @@ ieee80211_lookup_channel_rxstatus(struct ieee80211vap *vap, /* Determine a band */ /* XXX should be done by the driver? */ if (rxs->c_freq < 3000) { - flags = IEEE80211_CHAN_B; + flags = IEEE80211_CHAN_G; } else { flags = IEEE80211_CHAN_A; } diff --git a/sys/net80211/ieee80211_freebsd.c b/sys/net80211/ieee80211_freebsd.c index 91907551abc0..3af75dfc78c0 100644 --- a/sys/net80211/ieee80211_freebsd.c +++ b/sys/net80211/ieee80211_freebsd.c @@ -474,6 +474,40 @@ ieee80211_add_callback(struct mbuf *m, return 1; } +int +ieee80211_add_xmit_params(struct mbuf *m, + const struct ieee80211_bpf_params *params) +{ + struct m_tag *mtag; + struct ieee80211_tx_params *tx; + + mtag = m_tag_alloc(MTAG_ABI_NET80211, NET80211_TAG_XMIT_PARAMS, + sizeof(struct ieee80211_tx_params), M_NOWAIT); + if (mtag == NULL) + return (0); + + tx = (struct ieee80211_tx_params *)(mtag+1); + memcpy(&tx->params, params, sizeof(struct ieee80211_bpf_params)); + m_tag_prepend(m, mtag); + return (1); +} + +int +ieee80211_get_xmit_params(struct mbuf *m, + struct ieee80211_bpf_params *params) +{ + struct m_tag *mtag; + struct ieee80211_tx_params *tx; + + mtag = m_tag_locate(m, MTAG_ABI_NET80211, NET80211_TAG_XMIT_PARAMS, + NULL); + if (mtag == NULL) + return (-1); + tx = (struct ieee80211_tx_params *)(mtag + 1); + memcpy(params, &tx->params, sizeof(struct ieee80211_bpf_params)); + return (0); +} + void ieee80211_process_callback(struct ieee80211_node *ni, struct mbuf *m, int status) diff --git a/sys/net80211/ieee80211_freebsd.h b/sys/net80211/ieee80211_freebsd.h index 0241720f7916..162cf4309d49 100644 --- a/sys/net80211/ieee80211_freebsd.h +++ b/sys/net80211/ieee80211_freebsd.h @@ -327,6 +327,9 @@ int ieee80211_add_callback(struct mbuf *m, void (*func)(struct ieee80211_node *, void *, int), void *arg); void ieee80211_process_callback(struct ieee80211_node *, struct mbuf *, int); +#define NET80211_TAG_XMIT_PARAMS 1 +/* See below; this is after the bpf_params definition */ + struct ieee80211com; int ieee80211_parent_xmitpkt(struct ieee80211com *, struct mbuf *); int ieee80211_vap_xmitpkt(struct ieee80211vap *, struct mbuf *); @@ -607,6 +610,16 @@ struct ieee80211_bpf_params { uint8_t ibp_rate3; /* series 4 IEEE tx rate */ }; +#ifdef _KERNEL +struct ieee80211_tx_params { + struct ieee80211_bpf_params params; +}; +int ieee80211_add_xmit_params(struct mbuf *m, + const struct ieee80211_bpf_params *); +int ieee80211_get_xmit_params(struct mbuf *m, + struct ieee80211_bpf_params *); +#endif /* _KERNEL */ + /* * Malloc API. Other BSD operating systems have slightly * different malloc/free namings (eg DragonflyBSD.) diff --git a/sys/net80211/ieee80211_output.c b/sys/net80211/ieee80211_output.c index e1652ea74158..d11628df04ac 100644 --- a/sys/net80211/ieee80211_output.c +++ b/sys/net80211/ieee80211_output.c @@ -508,6 +508,26 @@ ieee80211_raw_output(struct ieee80211vap *vap, struct ieee80211_node *ni, { struct ieee80211com *ic = vap->iv_ic; + /* + * Set node - the caller has taken a reference, so ensure + * that the mbuf has the same node value that + * it would if it were going via the normal path. + */ + m->m_pkthdr.rcvif = (void *)ni; + + /* + * Attempt to add bpf transmit parameters. + * + * For now it's ok to fail; the raw_xmit api still takes + * them as an option. + * + * Later on when ic_raw_xmit() has params removed, + * they'll have to be added - so fail the transmit if + * they can't be. + */ + if (params) + (void) ieee80211_add_xmit_params(m, params); + return (ic->ic_raw_xmit(ni, m, params)); } diff --git a/sys/net80211/ieee80211_scan.c b/sys/net80211/ieee80211_scan.c index 6c950d6bc88d..f28a9829d60d 100644 --- a/sys/net80211/ieee80211_scan.c +++ b/sys/net80211/ieee80211_scan.c @@ -71,15 +71,14 @@ __FBSDID("$FreeBSD$"); void ieee80211_scan_attach(struct ieee80211com *ic) { - /* - * For now, the swscan module does both the - * allocation (so it can pad it) and sets up the net80211 - * bits. - * - * I'll split this stuff later. + * If there's no scan method pointer, attach the + * swscan set as a default. */ - ieee80211_swscan_attach(ic); + if (ic->ic_scan_methods == NULL) + ieee80211_swscan_attach(ic); + else + ic->ic_scan_methods->sc_attach(ic); } void @@ -88,12 +87,11 @@ ieee80211_scan_detach(struct ieee80211com *ic) /* * Ideally we'd do the ss_ops detach call here; - * but then ieee80211_swscan_detach would need - * to be split in two. + * but then sc_detach() would need to be split in two. * * I'll do that later. */ - ieee80211_swscan_detach(ic); + ic->ic_scan_methods->sc_detach(ic); } static const struct ieee80211_roamparam defroam[IEEE80211_MODE_MAX] = { @@ -122,6 +120,8 @@ static const struct ieee80211_roamparam defroam[IEEE80211_MODE_MAX] = { void ieee80211_scan_vattach(struct ieee80211vap *vap) { + struct ieee80211com *ic = vap->iv_ic; + vap->iv_bgscanidle = (IEEE80211_BGSCAN_IDLE_DEFAULT*1000)/hz; vap->iv_bgscanintvl = IEEE80211_BGSCAN_INTVAL_DEFAULT*hz; vap->iv_scanvalid = IEEE80211_SCAN_VALID_DEFAULT*hz; @@ -129,7 +129,7 @@ ieee80211_scan_vattach(struct ieee80211vap *vap) vap->iv_roaming = IEEE80211_ROAMING_AUTO; memcpy(vap->iv_roamparms, defroam, sizeof(defroam)); - ieee80211_swscan_vattach(vap); + ic->ic_scan_methods->sc_vattach(vap); } void @@ -141,7 +141,7 @@ ieee80211_scan_vdetach(struct ieee80211vap *vap) IEEE80211_LOCK(ic); ss = ic->ic_scan; - ieee80211_swscan_vdetach(vap); + ic->ic_scan_methods->sc_vdetach(vap); if (ss != NULL && ss->ss_vap == vap) { if (ss->ss_ops != NULL) { @@ -314,6 +314,7 @@ ieee80211_start_scan(struct ieee80211vap *vap, int flags, u_int nssid, const struct ieee80211_scan_ssid ssids[]) { const struct ieee80211_scanner *scan; + struct ieee80211com *ic = vap->iv_ic; scan = ieee80211_scanner_get(vap->iv_opmode); if (scan == NULL) { @@ -324,8 +325,7 @@ ieee80211_start_scan(struct ieee80211vap *vap, int flags, return 0; } - /* XXX ops */ - return ieee80211_swscan_start_scan(scan, vap, flags, duration, + return ic->ic_scan_methods->sc_start_scan(scan, vap, flags, duration, mindwell, maxdwell, nssid, ssids); } @@ -376,11 +376,10 @@ ieee80211_check_scan(struct ieee80211vap *vap, int flags, /* * XXX TODO: separate things out a bit better. - * XXX TODO: ops */ ieee80211_scan_update_locked(vap, scan); - result = ieee80211_swscan_check_scan(scan, vap, flags, duration, + result = ic->ic_scan_methods->sc_check_scan(scan, vap, flags, duration, mindwell, maxdwell, nssid, ssids); IEEE80211_UNLOCK(ic); @@ -408,6 +407,7 @@ ieee80211_check_scan_current(struct ieee80211vap *vap) int ieee80211_bg_scan(struct ieee80211vap *vap, int flags) { + struct ieee80211com *ic = vap->iv_ic; const struct ieee80211_scanner *scan; // IEEE80211_UNLOCK_ASSERT(sc); @@ -425,10 +425,8 @@ ieee80211_bg_scan(struct ieee80211vap *vap, int flags) * XXX TODO: pull apart the bgscan logic into whatever * belongs here and whatever belongs in the software * scanner. - * - * XXX TODO: ops */ - return (ieee80211_swscan_bg_scan(scan, vap, flags)); + return (ic->ic_scan_methods->sc_bg_scan(scan, vap, flags)); } /* @@ -437,9 +435,9 @@ ieee80211_bg_scan(struct ieee80211vap *vap, int flags) void ieee80211_cancel_scan(struct ieee80211vap *vap) { + struct ieee80211com *ic = vap->iv_ic; - /* XXX TODO: ops */ - ieee80211_swscan_cancel_scan(vap); + ic->ic_scan_methods->sc_cancel_scan(vap); } /* @@ -448,9 +446,9 @@ ieee80211_cancel_scan(struct ieee80211vap *vap) void ieee80211_cancel_anyscan(struct ieee80211vap *vap) { + struct ieee80211com *ic = vap->iv_ic; - /* XXX TODO: ops */ - ieee80211_swscan_cancel_anyscan(vap); + ic->ic_scan_methods->sc_cancel_anyscan(vap); } /* @@ -460,9 +458,9 @@ ieee80211_cancel_anyscan(struct ieee80211vap *vap) void ieee80211_scan_next(struct ieee80211vap *vap) { + struct ieee80211com *ic = vap->iv_ic; - /* XXX TODO: ops */ - ieee80211_swscan_scan_next(vap); + ic->ic_scan_methods->sc_scan_next(vap); } /* @@ -481,8 +479,7 @@ ieee80211_scan_done(struct ieee80211vap *vap) ss = ic->ic_scan; ss->ss_next = ss->ss_last; /* all channels are complete */ - /* XXX TODO: ops */ - ieee80211_swscan_scan_done(vap); + ic->ic_scan_methods->sc_scan_done(vap); IEEE80211_UNLOCK(ic); } @@ -504,8 +501,7 @@ ieee80211_probe_curchan(struct ieee80211vap *vap, int force) return; } - /* XXX TODO: ops */ - ieee80211_swscan_probe_curchan(vap, force); + ic->ic_scan_methods->sc_scan_probe_curchan(vap, force); } #ifdef IEEE80211_DEBUG @@ -567,8 +563,9 @@ ieee80211_add_scan(struct ieee80211vap *vap, const struct ieee80211_frame *wh, int subtype, int rssi, int noise) { + struct ieee80211com *ic = vap->iv_ic; - return (ieee80211_swscan_add_scan(vap, curchan, sp, wh, subtype, + return (ic->ic_scan_methods->sc_add_scan(vap, curchan, sp, wh, subtype, rssi, noise)); } diff --git a/sys/net80211/ieee80211_scan.h b/sys/net80211/ieee80211_scan.h index 8b54186af517..f568b651151c 100644 --- a/sys/net80211/ieee80211_scan.h +++ b/sys/net80211/ieee80211_scan.h @@ -80,6 +80,39 @@ struct ieee80211_scan_ssid { #define IEEE80211_SCAN_MAX_SSID 1 /* max # ssid's to probe */ /* + * High-level implementation visible to ieee80211_scan.[ch]. + * + * The default scanner (ieee80211_scan_sw.[ch]) implements a software + * driven scanner. Firmware driven scanning needs a different set of + * behaviours. + */ +struct ieee80211_scan_methods { + void (*sc_attach)(struct ieee80211com *); + void (*sc_detach)(struct ieee80211com *); + void (*sc_vattach)(struct ieee80211vap *); + void (*sc_vdetach)(struct ieee80211vap *); + void (*sc_set_scan_duration)(struct ieee80211vap *, u_int); + int (*sc_start_scan)(const struct ieee80211_scanner *, + struct ieee80211vap *, int, u_int, u_int, u_int, u_int, + const struct ieee80211_scan_ssid ssids[]); + int (*sc_check_scan)(const struct ieee80211_scanner *, + struct ieee80211vap *, int, u_int, u_int, u_int, u_int, + const struct ieee80211_scan_ssid ssids[]); + int (*sc_bg_scan)(const struct ieee80211_scanner *, + struct ieee80211vap *, int); + void (*sc_cancel_scan)(struct ieee80211vap *); + void (*sc_cancel_anyscan)(struct ieee80211vap *); + void (*sc_scan_next)(struct ieee80211vap *); + void (*sc_scan_done)(struct ieee80211vap *); + void (*sc_scan_probe_curchan)(struct ieee80211vap *, int); + void (*sc_add_scan)(struct ieee80211vap *, + struct ieee80211_channel *, + const struct ieee80211_scanparams *, + const struct ieee80211_frame *, + int, int, int); +}; + +/* * Scan state visible to the 802.11 layer. Scan parameters and * results are stored in this data structure. The ieee80211_scan_state * structure is extended with space that is maintained private to diff --git a/sys/net80211/ieee80211_scan_sw.c b/sys/net80211/ieee80211_scan_sw.c index 22f1cf9c9572..eb58386fc907 100644 --- a/sys/net80211/ieee80211_scan_sw.c +++ b/sys/net80211/ieee80211_scan_sw.c @@ -102,33 +102,7 @@ static void scan_task(void *, int); MALLOC_DEFINE(M_80211_SCAN, "80211scan", "802.11 scan state"); -void -ieee80211_swscan_attach(struct ieee80211com *ic) -{ - struct scan_state *ss; - - ss = (struct scan_state *) IEEE80211_MALLOC(sizeof(struct scan_state), - M_80211_SCAN, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); - if (ss == NULL) { - ic->ic_scan = NULL; - return; - } - callout_init_mtx(&ss->ss_scan_timer, IEEE80211_LOCK_OBJ(ic), 0); - cv_init(&ss->ss_scan_cv, "scan"); - TASK_INIT(&ss->ss_scan_task, 0, scan_task, ss); - - ic->ic_scan = &ss->base; - ss->base.ss_ic = ic; - - ic->ic_scan_curchan = scan_curchan; - ic->ic_scan_mindwell = scan_mindwell; - - /* - * TODO: all of the non-vap scan calls should be methods! - */ -} - -void +static void ieee80211_swscan_detach(struct ieee80211com *ic) { struct ieee80211_scan_state *ss = ic->ic_scan; @@ -159,7 +133,7 @@ ieee80211_swscan_detach(struct ieee80211com *ic) } } -void +static void ieee80211_swscan_vattach(struct ieee80211vap *vap) { /* nothing to do for now */ @@ -169,7 +143,7 @@ ieee80211_swscan_vattach(struct ieee80211vap *vap) } -void +static void ieee80211_swscan_vdetach(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; @@ -185,7 +159,7 @@ ieee80211_swscan_vdetach(struct ieee80211vap *vap) } } -void +static void ieee80211_swscan_set_scan_duration(struct ieee80211vap *vap, u_int duration) { struct ieee80211com *ic = vap->iv_ic; @@ -198,17 +172,6 @@ ieee80211_swscan_set_scan_duration(struct ieee80211vap *vap, u_int duration) SCAN_PRIVATE(ss)->ss_duration = duration; } -void -ieee80211_swscan_run_scan_task(struct ieee80211vap *vap) -{ - struct ieee80211com *ic = vap->iv_ic; - struct ieee80211_scan_state *ss = ic->ic_scan; - - IEEE80211_LOCK_ASSERT(ic); - - ieee80211_runtask(ic, &SCAN_PRIVATE(ss)->ss_scan_task); -} - /* * Start a scan unless one is already going. */ @@ -272,7 +235,7 @@ ieee80211_swscan_start_scan_locked(const struct ieee80211_scanner *scan, ic->ic_flags |= IEEE80211_F_SCAN; /* Start scan task */ - ieee80211_swscan_run_scan_task(vap); + ieee80211_runtask(ic, &SCAN_PRIVATE(ss)->ss_scan_task); } return 1; } else { @@ -289,7 +252,7 @@ ieee80211_swscan_start_scan_locked(const struct ieee80211_scanner *scan, * * Called without the comlock held; grab the comlock as appropriate. */ -int +static int ieee80211_swscan_start_scan(const struct ieee80211_scanner *scan, struct ieee80211vap *vap, int flags, u_int duration, u_int mindwell, u_int maxdwell, @@ -316,7 +279,7 @@ ieee80211_swscan_start_scan(const struct ieee80211_scanner *scan, * * XXX TODO: split out! */ -int +static int ieee80211_swscan_check_scan(const struct ieee80211_scanner *scan, struct ieee80211vap *vap, int flags, u_int duration, u_int mindwell, u_int maxdwell, @@ -374,7 +337,7 @@ ieee80211_swscan_check_scan(const struct ieee80211_scanner *scan, * Restart a previous scan. If the previous scan completed * then we start again using the existing channel list. */ -int +static int ieee80211_swscan_bg_scan(const struct ieee80211_scanner *scan, struct ieee80211vap *vap, int flags) { @@ -465,7 +428,7 @@ ieee80211_swscan_bg_scan(const struct ieee80211_scanner *scan, /* * Cancel any scan currently going on for the specified vap. */ -void +static void ieee80211_swscan_cancel_scan(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; @@ -499,7 +462,7 @@ ieee80211_swscan_cancel_scan(struct ieee80211vap *vap) /* * Cancel any scan currently going on. */ -void +static void ieee80211_swscan_cancel_anyscan(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; @@ -533,7 +496,7 @@ ieee80211_swscan_cancel_anyscan(struct ieee80211vap *vap) * Public access to scan_next for drivers that manage * scanning themselves (e.g. for firmware-based devices). */ -void +static void ieee80211_swscan_scan_next(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; @@ -551,7 +514,7 @@ ieee80211_swscan_scan_next(struct ieee80211vap *vap) * Public access to scan_next for drivers that are not able to scan single * channels (e.g. for firmware-based devices). */ -void +static void ieee80211_swscan_scan_done(struct ieee80211vap *vap) { struct ieee80211com *ic = vap->iv_ic; @@ -570,7 +533,7 @@ ieee80211_swscan_scan_done(struct ieee80211vap *vap) * listen for beacons on the channel; if we receive something * then we'll transmit a probe request. */ -void +static void ieee80211_swscan_probe_curchan(struct ieee80211vap *vap, int force) { struct ieee80211com *ic = vap->iv_ic; @@ -898,7 +861,7 @@ done: /* * Process a beacon or probe response frame. */ -void +static void ieee80211_swscan_add_scan(struct ieee80211vap *vap, struct ieee80211_channel *curchan, const struct ieee80211_scanparams *sp, @@ -946,3 +909,50 @@ ieee80211_swscan_add_scan(struct ieee80211vap *vap, } } +static struct ieee80211_scan_methods swscan_methods = { + .sc_attach = ieee80211_swscan_attach, + .sc_detach = ieee80211_swscan_detach, + .sc_vattach = ieee80211_swscan_vattach, + .sc_vdetach = ieee80211_swscan_vdetach, + .sc_set_scan_duration = ieee80211_swscan_set_scan_duration, + .sc_start_scan = ieee80211_swscan_start_scan, + .sc_check_scan = ieee80211_swscan_check_scan, + .sc_bg_scan = ieee80211_swscan_bg_scan, + .sc_cancel_scan = ieee80211_swscan_cancel_scan, + .sc_cancel_anyscan = ieee80211_swscan_cancel_anyscan, + .sc_scan_next = ieee80211_swscan_scan_next, + .sc_scan_done = ieee80211_swscan_scan_done, + .sc_scan_probe_curchan = ieee80211_swscan_probe_curchan, + .sc_add_scan = ieee80211_swscan_add_scan +}; + +/* + * Default scan attach method. + */ +void +ieee80211_swscan_attach(struct ieee80211com *ic) +{ + struct scan_state *ss; + + /* + * Setup the default methods + */ + ic->ic_scan_methods = &swscan_methods; + + /* Allocate initial scan state */ + ss = (struct scan_state *) IEEE80211_MALLOC(sizeof(struct scan_state), + M_80211_SCAN, IEEE80211_M_NOWAIT | IEEE80211_M_ZERO); + if (ss == NULL) { + ic->ic_scan = NULL; + return; + } + callout_init_mtx(&ss->ss_scan_timer, IEEE80211_LOCK_OBJ(ic), 0); + cv_init(&ss->ss_scan_cv, "scan"); + TASK_INIT(&ss->ss_scan_task, 0, scan_task, ss); + + ic->ic_scan = &ss->base; + ss->base.ss_ic = ic; + + ic->ic_scan_curchan = scan_curchan; + ic->ic_scan_mindwell = scan_mindwell; +} diff --git a/sys/net80211/ieee80211_scan_sw.h b/sys/net80211/ieee80211_scan_sw.h index 7bb0cc378642..8408933bfeb3 100644 --- a/sys/net80211/ieee80211_scan_sw.h +++ b/sys/net80211/ieee80211_scan_sw.h @@ -28,34 +28,5 @@ #define __NET80211_IEEE80211_SCAN_SW_H__ extern void ieee80211_swscan_attach(struct ieee80211com *ic); -extern void ieee80211_swscan_detach(struct ieee80211com *ic); - -extern void ieee80211_swscan_vattach(struct ieee80211vap *vap); -extern void ieee80211_swscan_vdetach(struct ieee80211vap *vap); - -extern int ieee80211_swscan_start_scan(const struct ieee80211_scanner *scan, - struct ieee80211vap *vap, int flags, - u_int duration, u_int mindwell, u_int maxdwell, - u_int nssid, const struct ieee80211_scan_ssid ssids[]); -extern void ieee80211_swscan_set_scan_duration(struct ieee80211vap *vap, - u_int duration); -extern void ieee80211_swscan_run_scan_task(struct ieee80211vap *vap); -extern int ieee80211_swscan_check_scan(const struct ieee80211_scanner *scan, - struct ieee80211vap *vap, int flags, - u_int duration, u_int mindwell, u_int maxdwell, - u_int nssid, const struct ieee80211_scan_ssid ssids[]); -extern int ieee80211_swscan_bg_scan(const struct ieee80211_scanner *scan, - struct ieee80211vap *vap, int flags); -extern void ieee80211_swscan_cancel_scan(struct ieee80211vap *vap); -extern void ieee80211_swscan_cancel_anyscan(struct ieee80211vap *vap); -extern void ieee80211_swscan_scan_next(struct ieee80211vap *vap); -extern void ieee80211_swscan_scan_done(struct ieee80211vap *vap); -extern void ieee80211_swscan_probe_curchan(struct ieee80211vap *vap, - int force); -extern void ieee80211_swscan_add_scan(struct ieee80211vap *vap, - struct ieee80211_channel *curchan, - const struct ieee80211_scanparams *sp, - const struct ieee80211_frame *wh, - int subtype, int rssi, int noise); #endif /* __NET80211_IEEE80211_SCAN_SW_H__ */ diff --git a/sys/net80211/ieee80211_var.h b/sys/net80211/ieee80211_var.h index ec21a0c5c573..26238b88e4f1 100644 --- a/sys/net80211/ieee80211_var.h +++ b/sys/net80211/ieee80211_var.h @@ -197,6 +197,7 @@ struct ieee80211com { struct ieee80211_dfs_state ic_dfs; /* DFS state */ struct ieee80211_scan_state *ic_scan; /* scan state */ + struct ieee80211_scan_methods *ic_scan_methods; /* scan methods */ int ic_lastdata; /* time of last data frame */ int ic_lastscan; /* time last scan completed */ diff --git a/sys/netinet/sctp_sysctl.c b/sys/netinet/sctp_sysctl.c index 285d7fb3f9b4..bb22c2747681 100644 --- a/sys/netinet/sctp_sysctl.c +++ b/sys/netinet/sctp_sysctl.c @@ -418,6 +418,7 @@ sctp_sysctl_handle_assoclist(SYSCTL_HANDLER_ARGS) xinpcb.total_recvs = inp->total_recvs; xinpcb.total_nospaces = inp->total_nospaces; xinpcb.fragmentation_point = inp->sctp_frag_point; + xinpcb.socket = inp->sctp_socket; so = inp->sctp_socket; if ((so == NULL) || (inp->sctp_flags & SCTP_PCB_FLAGS_SOCKET_GONE)) { diff --git a/sys/netinet/sctp_uio.h b/sys/netinet/sctp_uio.h index d22b9d121e84..fd78d3493e02 100644 --- a/sys/netinet/sctp_uio.h +++ b/sys/netinet/sctp_uio.h @@ -1165,7 +1165,12 @@ struct xsctp_inpcb { uint16_t local_port; uint16_t qlen; uint16_t maxqlen; - uint32_t extra_padding[31]; /* future */ + void *socket; +#if defined(__LP64__) + uint32_t extra_padding[29]; /* future */ +#else + uint32_t extra_padding[30]; /* future */ +#endif }; struct xsctp_tcb { diff --git a/sys/powerpc/include/vmparam.h b/sys/powerpc/include/vmparam.h index c79a7c54f2ed..5b808abc1fee 100644 --- a/sys/powerpc/include/vmparam.h +++ b/sys/powerpc/include/vmparam.h @@ -136,13 +136,12 @@ struct pmap_physseg { #endif /* - * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool + * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool * from which physical pages are allocated and VM_FREEPOOL_DIRECT is * the pool from which physical pages for small UMA objects are * allocated. */ -#define VM_NFREEPOOL 3 -#define VM_FREEPOOL_CACHE 2 +#define VM_NFREEPOOL 2 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 1 diff --git a/sys/sparc64/include/vmparam.h b/sys/sparc64/include/vmparam.h index c2f30c3f2734..facec86790ee 100644 --- a/sys/sparc64/include/vmparam.h +++ b/sys/sparc64/include/vmparam.h @@ -75,13 +75,12 @@ #define VM_PHYSSEG_MAX 64 /* - * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool + * Create two free page pools: VM_FREEPOOL_DEFAULT is the default pool * from which physical pages are allocated and VM_FREEPOOL_DIRECT is * the pool from which physical pages for small UMA objects are * allocated. */ -#define VM_NFREEPOOL 3 -#define VM_FREEPOOL_CACHE 2 +#define VM_NFREEPOOL 2 #define VM_FREEPOOL_DEFAULT 0 #define VM_FREEPOOL_DIRECT 1 diff --git a/sys/sys/bus.h b/sys/sys/bus.h index 8b1f1736a17f..42d3a3fea5e8 100644 --- a/sys/sys/bus.h +++ b/sys/sys/bus.h @@ -612,7 +612,7 @@ void bus_data_generation_update(void); #define BUS_PROBE_DEFAULT (-20) /* Base OS default driver */ #define BUS_PROBE_LOW_PRIORITY (-40) /* Older, less desirable drivers */ #define BUS_PROBE_GENERIC (-100) /* generic driver for dev */ -#define BUS_PROBE_HOOVER (-500) /* Generic dev for all devs on bus */ +#define BUS_PROBE_HOOVER (-1000000) /* Driver for any dev on bus */ #define BUS_PROBE_NOWILDCARD (-2000000000) /* No wildcard device matches */ /** diff --git a/sys/sys/file.h b/sys/sys/file.h index d2e3c5e0d99c..cb51c27f76b1 100644 --- a/sys/sys/file.h +++ b/sys/sys/file.h @@ -42,6 +42,7 @@ #include <sys/refcount.h> #include <sys/_lock.h> #include <sys/_mutex.h> +#include <vm/vm.h> struct filedesc; struct stat; @@ -115,6 +116,9 @@ typedef int fo_seek_t(struct file *fp, off_t offset, int whence, struct thread *td); typedef int fo_fill_kinfo_t(struct file *fp, struct kinfo_file *kif, struct filedesc *fdp); +typedef int fo_mmap_t(struct file *fp, vm_map_t map, vm_offset_t *addr, + vm_size_t size, vm_prot_t prot, vm_prot_t cap_maxprot, + int flags, vm_ooffset_t foff, struct thread *td); typedef int fo_flags_t; struct fileops { @@ -131,6 +135,7 @@ struct fileops { fo_sendfile_t *fo_sendfile; fo_seek_t *fo_seek; fo_fill_kinfo_t *fo_fill_kinfo; + fo_mmap_t *fo_mmap; fo_flags_t fo_flags; /* DFLAG_* below */ }; @@ -391,6 +396,18 @@ fo_fill_kinfo(struct file *fp, struct kinfo_file *kif, struct filedesc *fdp) return ((*fp->f_ops->fo_fill_kinfo)(fp, kif, fdp)); } +static __inline int +fo_mmap(struct file *fp, vm_map_t map, vm_offset_t *addr, vm_size_t size, + vm_prot_t prot, vm_prot_t cap_maxprot, int flags, vm_ooffset_t foff, + struct thread *td) +{ + + if (fp->f_ops->fo_mmap == NULL) + return (ENODEV); + return ((*fp->f_ops->fo_mmap)(fp, map, addr, size, prot, cap_maxprot, + flags, foff, td)); +} + #endif /* _KERNEL */ #endif /* !SYS_FILE_H */ diff --git a/sys/sys/mman.h b/sys/sys/mman.h index 53b656ceb28d..19d992e83361 100644 --- a/sys/sys/mman.h +++ b/sys/sys/mman.h @@ -230,8 +230,6 @@ struct shmfd { #endif #ifdef _KERNEL -int shm_mmap(struct shmfd *shmfd, vm_size_t objsize, vm_ooffset_t foff, - vm_object_t *obj); int shm_map(struct file *fp, size_t size, off_t offset, void **memp); int shm_unmap(struct file *fp, void *mem, size_t size); diff --git a/sys/sys/param.h b/sys/sys/param.h index 9bd1dd7d53f5..098d8f80dcd9 100644 --- a/sys/sys/param.h +++ b/sys/sys/param.h @@ -58,7 +58,7 @@ * in the range 5 to 9. */ #undef __FreeBSD_version -#define __FreeBSD_version 1100075 /* Master, propagated to newvers */ +#define __FreeBSD_version 1100076 /* Master, propagated to newvers */ /* * __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD, diff --git a/sys/ufs/ffs/ffs_vnops.c b/sys/ufs/ffs/ffs_vnops.c index 80f32697d820..618ed8e77d42 100644 --- a/sys/ufs/ffs/ffs_vnops.c +++ b/sys/ufs/ffs/ffs_vnops.c @@ -201,8 +201,8 @@ retry: * bo_dirty list. Recheck and resync as needed. */ BO_LOCK(bo); - if (vp->v_type == VREG && (bo->bo_numoutput > 0 || - bo->bo_dirty.bv_cnt > 0)) { + if ((vp->v_type == VREG || vp->v_type == VDIR) && + (bo->bo_numoutput > 0 || bo->bo_dirty.bv_cnt > 0)) { BO_UNLOCK(bo); goto retry; } diff --git a/sys/vm/vm_extern.h b/sys/vm/vm_extern.h index f639a22a5c43..922c3280302c 100644 --- a/sys/vm/vm_extern.h +++ b/sys/vm/vm_extern.h @@ -40,6 +40,8 @@ struct vnode; struct vmem; #ifdef _KERNEL +struct cdev; +struct cdevsw; /* These operate on kernel virtual addresses only. */ vm_offset_t kva_alloc(vm_size_t); @@ -81,10 +83,18 @@ int vm_fault_hold(vm_map_t map, vm_offset_t vaddr, vm_prot_t fault_type, int fault_flags, vm_page_t *m_hold); int vm_fault_quick_hold_pages(vm_map_t map, vm_offset_t addr, vm_size_t len, vm_prot_t prot, vm_page_t *ma, int max_count); -int vm_forkproc(struct thread *, struct proc *, struct thread *, struct vmspace *, int); +int vm_forkproc(struct thread *, struct proc *, struct thread *, + struct vmspace *, int); void vm_waitproc(struct proc *); -int vm_mmap(vm_map_t, vm_offset_t *, vm_size_t, vm_prot_t, vm_prot_t, int, objtype_t, void *, vm_ooffset_t); +int vm_mmap(vm_map_t, vm_offset_t *, vm_size_t, vm_prot_t, vm_prot_t, int, + objtype_t, void *, vm_ooffset_t); +int vm_mmap_object(vm_map_t, vm_offset_t *, vm_size_t, vm_prot_t, + vm_prot_t, int, vm_object_t, vm_ooffset_t, boolean_t, struct thread *); int vm_mmap_to_errno(int rv); +int vm_mmap_cdev(struct thread *, vm_size_t, vm_prot_t, vm_prot_t *, + int *, struct cdev *, struct cdevsw *, vm_ooffset_t *, vm_object_t *); +int vm_mmap_vnode(struct thread *, vm_size_t, vm_prot_t, vm_prot_t *, int *, + struct vnode *, vm_ooffset_t *, vm_object_t *, boolean_t *); void vm_set_page_size(void); void vm_sync_icache(vm_map_t, vm_offset_t, vm_size_t); typedef int (*pmap_pinit_t)(struct pmap *pmap); diff --git a/sys/vm/vm_mmap.c b/sys/vm/vm_mmap.c index 1dd24792a85f..489a987fe3ce 100644 --- a/sys/vm/vm_mmap.c +++ b/sys/vm/vm_mmap.c @@ -100,13 +100,6 @@ SYSCTL_INT(_vm, OID_AUTO, old_mlock, CTLFLAG_RWTUN, &old_mlock, 0, #define MAP_32BIT_MAX_ADDR ((vm_offset_t)1 << 31) #endif -static int vm_mmap_vnode(struct thread *, vm_size_t, vm_prot_t, vm_prot_t *, - int *, struct vnode *, vm_ooffset_t *, vm_object_t *, boolean_t *); -static int vm_mmap_cdev(struct thread *, vm_size_t, vm_prot_t, vm_prot_t *, - int *, struct cdev *, vm_ooffset_t *, vm_object_t *); -static int vm_mmap_shm(struct thread *, vm_size_t, vm_prot_t, vm_prot_t *, - int *, struct shmfd *, vm_ooffset_t, vm_object_t *); - #ifndef _SYS_SYSPROTO_H_ struct sbrk_args { int incr; @@ -197,16 +190,10 @@ sys_mmap(td, uap) struct thread *td; struct mmap_args *uap; { -#ifdef HWPMC_HOOKS - struct pmckern_map_in pkm; -#endif struct file *fp; - struct vnode *vp; vm_offset_t addr; vm_size_t size, pageoff; - vm_prot_t cap_maxprot, maxprot; - void *handle; - objtype_t handle_type; + vm_prot_t cap_maxprot; int align, error, flags, prot; off_t pos; struct vmspace *vms = td->td_proc->p_vmspace; @@ -334,14 +321,22 @@ sys_mmap(td, uap) lim_max(td->td_proc, RLIMIT_DATA)); PROC_UNLOCK(td->td_proc); } - if (flags & MAP_ANON) { + if (size == 0) { + /* + * Return success without mapping anything for old + * binaries that request a page-aligned mapping of + * length 0. For modern binaries, this function + * returns an error earlier. + */ + error = 0; + } else if (flags & MAP_ANON) { /* * Mapping blank space is trivial. + * + * This relies on VM_PROT_* matching PROT_*. */ - handle = NULL; - handle_type = OBJT_DEFAULT; - maxprot = VM_PROT_ALL; - cap_maxprot = VM_PROT_ALL; + error = vm_mmap_object(&vms->vm_map, &addr, size, prot, + VM_PROT_ALL, flags, NULL, pos, FALSE, td); } else { /* * Mapping file, get fp for validation and don't let the @@ -366,93 +361,12 @@ sys_mmap(td, uap) error = EINVAL; goto done; } - if (fp->f_type == DTYPE_SHM) { - handle = fp->f_data; - handle_type = OBJT_SWAP; - maxprot = VM_PROT_NONE; - - /* FREAD should always be set. */ - if (fp->f_flag & FREAD) - maxprot |= VM_PROT_EXECUTE | VM_PROT_READ; - if (fp->f_flag & FWRITE) - maxprot |= VM_PROT_WRITE; - goto map; - } - if (fp->f_type != DTYPE_VNODE) { - error = ENODEV; - goto done; - } -#if defined(COMPAT_FREEBSD7) || defined(COMPAT_FREEBSD6) || \ - defined(COMPAT_FREEBSD5) || defined(COMPAT_FREEBSD4) - /* - * POSIX shared-memory objects are defined to have - * kernel persistence, and are not defined to support - * read(2)/write(2) -- or even open(2). Thus, we can - * use MAP_ASYNC to trade on-disk coherence for speed. - * The shm_open(3) library routine turns on the FPOSIXSHM - * flag to request this behavior. - */ - if (fp->f_flag & FPOSIXSHM) - flags |= MAP_NOSYNC; -#endif - vp = fp->f_vnode; - /* - * Ensure that file and memory protections are - * compatible. Note that we only worry about - * writability if mapping is shared; in this case, - * current and max prot are dictated by the open file. - * XXX use the vnode instead? Problem is: what - * credentials do we use for determination? What if - * proc does a setuid? - */ - if (vp->v_mount != NULL && vp->v_mount->mnt_flag & MNT_NOEXEC) - maxprot = VM_PROT_NONE; - else - maxprot = VM_PROT_EXECUTE; - if (fp->f_flag & FREAD) { - maxprot |= VM_PROT_READ; - } else if (prot & PROT_READ) { - error = EACCES; - goto done; - } - /* - * If we are sharing potential changes (either via - * MAP_SHARED or via the implicit sharing of character - * device mappings), and we are trying to get write - * permission although we opened it without asking - * for it, bail out. - */ - if ((flags & MAP_SHARED) != 0) { - if ((fp->f_flag & FWRITE) != 0) { - maxprot |= VM_PROT_WRITE; - } else if ((prot & PROT_WRITE) != 0) { - error = EACCES; - goto done; - } - } else if (vp->v_type != VCHR || (fp->f_flag & FWRITE) != 0) { - maxprot |= VM_PROT_WRITE; - cap_maxprot |= VM_PROT_WRITE; - } - handle = (void *)vp; - handle_type = OBJT_VNODE; - } -map: - td->td_fpop = fp; - maxprot &= cap_maxprot; - /* This relies on VM_PROT_* matching PROT_*. */ - error = vm_mmap(&vms->vm_map, &addr, size, prot, maxprot, - flags, handle_type, handle, pos); - td->td_fpop = NULL; -#ifdef HWPMC_HOOKS - /* inform hwpmc(4) if an executable is being mapped */ - if (error == 0 && handle_type == OBJT_VNODE && - (prot & PROT_EXEC)) { - pkm.pm_file = handle; - pkm.pm_address = (uintptr_t) addr; - PMC_CALL_HOOK(td, PMC_FN_MMAP, (void *) &pkm); + /* This relies on VM_PROT_* matching PROT_*. */ + error = fo_mmap(fp, &vms->vm_map, &addr, size, prot, + cap_maxprot, flags, pos, td); } -#endif + if (error == 0) td->td_retval[0] = (register_t) (addr + pageoff); done: @@ -1311,9 +1225,6 @@ sys_munlock(td, uap) * * Helper function for vm_mmap. Perform sanity check specific for mmap * operations on vnodes. - * - * For VCHR vnodes, the vnode lock is held over the call to - * vm_mmap_cdev() to keep vp->v_rdev valid. */ int vm_mmap_vnode(struct thread *td, vm_size_t objsize, @@ -1360,12 +1271,6 @@ vm_mmap_vnode(struct thread *td, vm_size_t objsize, *writecounted = TRUE; vnode_pager_update_writecount(obj, 0, objsize); } - } else if (vp->v_type == VCHR) { - error = vm_mmap_cdev(td, objsize, prot, maxprotp, flagsp, - vp->v_rdev, foffp, objp); - if (error == 0) - goto mark_atime; - goto done; } else { error = EINVAL; goto done; @@ -1373,13 +1278,14 @@ vm_mmap_vnode(struct thread *td, vm_size_t objsize, if ((error = VOP_GETATTR(vp, &va, cred))) goto done; #ifdef MAC - error = mac_vnode_check_mmap(cred, vp, prot, flags); + /* This relies on VM_PROT_* matching PROT_*. */ + error = mac_vnode_check_mmap(cred, vp, (int)prot, flags); if (error != 0) goto done; #endif if ((flags & MAP_SHARED) != 0) { if ((va.va_flags & (SF_SNAPSHOT|IMMUTABLE|APPEND)) != 0) { - if (prot & PROT_WRITE) { + if (prot & VM_PROT_WRITE) { error = EPERM; goto done; } @@ -1414,7 +1320,6 @@ vm_mmap_vnode(struct thread *td, vm_size_t objsize, *objp = obj; *flagsp = flags; -mark_atime: vfs_mark_atime(vp, cred); done: @@ -1435,21 +1340,18 @@ done: * operations on cdevs. */ int -vm_mmap_cdev(struct thread *td, vm_size_t objsize, - vm_prot_t prot, vm_prot_t *maxprotp, int *flagsp, - struct cdev *cdev, vm_ooffset_t *foff, vm_object_t *objp) +vm_mmap_cdev(struct thread *td, vm_size_t objsize, vm_prot_t prot, + vm_prot_t *maxprotp, int *flagsp, struct cdev *cdev, struct cdevsw *dsw, + vm_ooffset_t *foff, vm_object_t *objp) { vm_object_t obj; - struct cdevsw *dsw; - int error, flags, ref; + int error, flags; flags = *flagsp; - dsw = dev_refthread(cdev, &ref); - if (dsw == NULL) - return (ENXIO); if (dsw->d_flags & D_MMAP_ANON) { - dev_relthread(cdev, ref); + *objp = NULL; + *foff = 0; *maxprotp = VM_PROT_ALL; *flagsp |= MAP_ANON; return (0); @@ -1458,24 +1360,18 @@ vm_mmap_cdev(struct thread *td, vm_size_t objsize, * cdevs do not provide private mappings of any kind. */ if ((*maxprotp & VM_PROT_WRITE) == 0 && - (prot & PROT_WRITE) != 0) { - dev_relthread(cdev, ref); + (prot & VM_PROT_WRITE) != 0) return (EACCES); - } - if (flags & (MAP_PRIVATE|MAP_COPY)) { - dev_relthread(cdev, ref); + if (flags & (MAP_PRIVATE|MAP_COPY)) return (EINVAL); - } /* * Force device mappings to be shared. */ flags |= MAP_SHARED; #ifdef MAC_XXX - error = mac_cdev_check_mmap(td->td_ucred, cdev, prot); - if (error != 0) { - dev_relthread(cdev, ref); + error = mac_cdev_check_mmap(td->td_ucred, cdev, (int)prot); + if (error != 0) return (error); - } #endif /* * First, try d_mmap_single(). If that is not implemented @@ -1487,7 +1383,6 @@ vm_mmap_cdev(struct thread *td, vm_size_t objsize, * XXX assumes VM_PROT_* == PROT_* */ error = dsw->d_mmap_single(cdev, foff, objsize, objp, (int)prot); - dev_relthread(cdev, ref); if (error != ENODEV) return (error); obj = vm_pager_allocate(OBJT_DEVICE, cdev, objsize, prot, *foff, @@ -1500,59 +1395,89 @@ vm_mmap_cdev(struct thread *td, vm_size_t objsize, } /* - * vm_mmap_shm() - * - * MPSAFE + * vm_mmap() * - * Helper function for vm_mmap. Perform sanity check specific for mmap - * operations on shm file descriptors. + * Internal version of mmap used by exec, sys5 shared memory, and + * various device drivers. Handle is either a vnode pointer, a + * character device, or NULL for MAP_ANON. */ int -vm_mmap_shm(struct thread *td, vm_size_t objsize, - vm_prot_t prot, vm_prot_t *maxprotp, int *flagsp, - struct shmfd *shmfd, vm_ooffset_t foff, vm_object_t *objp) +vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, + vm_prot_t maxprot, int flags, + objtype_t handle_type, void *handle, + vm_ooffset_t foff) { + vm_object_t object; + struct thread *td = curthread; int error; + boolean_t writecounted; - if ((*flagsp & MAP_SHARED) != 0 && - (*maxprotp & VM_PROT_WRITE) == 0 && - (prot & PROT_WRITE) != 0) - return (EACCES); -#ifdef MAC - error = mac_posixshm_check_mmap(td->td_ucred, shmfd, prot, *flagsp); - if (error != 0) - return (error); -#endif - error = shm_mmap(shmfd, objsize, foff, objp); + if (size == 0) + return (EINVAL); + + size = round_page(size); + writecounted = FALSE; + + /* + * Lookup/allocate object. + */ + switch (handle_type) { + case OBJT_DEVICE: { + struct cdevsw *dsw; + struct cdev *cdev; + int ref; + + cdev = handle; + dsw = dev_refthread(cdev, &ref); + if (dsw == NULL) + return (ENXIO); + error = vm_mmap_cdev(td, size, prot, &maxprot, &flags, cdev, + dsw, &foff, &object); + dev_relthread(cdev, ref); + break; + } + case OBJT_VNODE: + error = vm_mmap_vnode(td, size, prot, &maxprot, &flags, + handle, &foff, &object, &writecounted); + break; + case OBJT_DEFAULT: + if (handle == NULL) { + error = 0; + break; + } + /* FALLTHROUGH */ + default: + error = EINVAL; + break; + } if (error) return (error); - return (0); + + error = vm_mmap_object(map, addr, size, prot, maxprot, flags, object, + foff, writecounted, td); + if (error != 0 && object != NULL) { + /* + * If this mapping was accounted for in the vnode's + * writecount, then undo that now. + */ + if (writecounted) + vnode_pager_release_writecount(object, 0, size); + vm_object_deallocate(object); + } + return (error); } /* - * vm_mmap() - * - * MPSAFE - * - * Internal version of mmap. Currently used by mmap, exec, and sys5 - * shared memory. Handle is either a vnode pointer or NULL for MAP_ANON. + * Internal version of mmap that maps a specific VM object into an + * map. Called by mmap for MAP_ANON, vm_mmap, shm_mmap, and vn_mmap. */ int -vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, - vm_prot_t maxprot, int flags, - objtype_t handle_type, void *handle, - vm_ooffset_t foff) +vm_mmap_object(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, + vm_prot_t maxprot, int flags, vm_object_t object, vm_ooffset_t foff, + boolean_t writecounted, struct thread *td) { boolean_t fitit; - vm_object_t object = NULL; - struct thread *td = curthread; int docow, error, findspace, rv; - boolean_t writecounted; - - if (size == 0) - return (0); - - size = round_page(size); if (map == &td->td_proc->p_vmspace->vm_map) { PROC_LOCK(td->td_proc); @@ -1586,11 +1511,11 @@ vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, /* * We currently can only deal with page aligned file offsets. - * The check is here rather than in the syscall because the - * kernel calls this function internally for other mmaping - * operations (such as in exec) and non-aligned offsets will - * cause pmap inconsistencies...so we want to be sure to - * disallow this in all cases. + * The mmap() system call already enforces this by subtracting + * the page offset from the file offset, but checking here + * catches errors in device drivers (e.g. d_single_mmap() + * callbacks) and other internal mapping requests (such as in + * exec). */ if (foff & PAGE_MASK) return (EINVAL); @@ -1603,44 +1528,11 @@ vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, return (EINVAL); fitit = FALSE; } - writecounted = FALSE; - /* - * Lookup/allocate object. - */ - switch (handle_type) { - case OBJT_DEVICE: - error = vm_mmap_cdev(td, size, prot, &maxprot, &flags, - handle, &foff, &object); - break; - case OBJT_VNODE: - error = vm_mmap_vnode(td, size, prot, &maxprot, &flags, - handle, &foff, &object, &writecounted); - break; - case OBJT_SWAP: - error = vm_mmap_shm(td, size, prot, &maxprot, &flags, - handle, foff, &object); - break; - case OBJT_DEFAULT: - if (handle == NULL) { - error = 0; - break; - } - /* FALLTHROUGH */ - default: - error = EINVAL; - break; - } - if (error) - return (error); if (flags & MAP_ANON) { - object = NULL; + if (object != NULL || foff != 0) + return (EINVAL); docow = 0; - /* - * Unnamed anonymous regions always start at 0. - */ - if (handle == 0) - foff = 0; } else if (flags & MAP_PREFAULT_READ) docow = MAP_PREFAULT; else @@ -1693,19 +1585,6 @@ vm_mmap(vm_map_t map, vm_offset_t *addr, vm_size_t size, vm_prot_t prot, VM_MAP_WIRE_USER | ((flags & MAP_STACK) ? VM_MAP_WIRE_HOLESOK : VM_MAP_WIRE_NOHOLES)); } - } else { - /* - * If this mapping was accounted for in the vnode's - * writecount, then undo that now. - */ - if (writecounted) - vnode_pager_release_writecount(object, 0, size); - /* - * Lose the object reference. Will destroy the - * object if it's an unnamed anonymous mapping - * or named anonymous without other references. - */ - vm_object_deallocate(object); } return (vm_mmap_to_errno(rv)); } diff --git a/sys/vm/vm_object.c b/sys/vm/vm_object.c index 30623b2e50cf..e240b67d2fa8 100644 --- a/sys/vm/vm_object.c +++ b/sys/vm/vm_object.c @@ -2287,6 +2287,18 @@ next_page: } } +struct vnode * +vm_object_vnode(vm_object_t object) +{ + + VM_OBJECT_ASSERT_LOCKED(object); + if (object->type == OBJT_VNODE) + return (object->handle); + if (object->type == OBJT_SWAP && (object->flags & OBJ_TMPFS) != 0) + return (object->un_pager.swp.swp_tmpfs); + return (NULL); +} + static int sysctl_vm_object_list(SYSCTL_HANDLER_ARGS) { diff --git a/sys/vm/vm_object.h b/sys/vm/vm_object.h index 731c9e3e8d71..1f591568137c 100644 --- a/sys/vm/vm_object.h +++ b/sys/vm/vm_object.h @@ -322,6 +322,7 @@ boolean_t vm_object_sync(vm_object_t, vm_ooffset_t, vm_size_t, boolean_t, boolean_t); void vm_object_unwire(vm_object_t object, vm_ooffset_t offset, vm_size_t length, uint8_t queue); +struct vnode *vm_object_vnode(vm_object_t object); #endif /* _KERNEL */ #endif /* _VM_OBJECT_ */ diff --git a/sys/vm/vm_page.c b/sys/vm/vm_page.c index 81995a11d348..3b58fb7f55e9 100644 --- a/sys/vm/vm_page.c +++ b/sys/vm/vm_page.c @@ -2708,7 +2708,6 @@ vm_page_cache(vm_page_t m) #else if (TRUE) { #endif - vm_phys_set_pool(VM_FREEPOOL_CACHE, m, 0); vm_phys_free_pages(m, 0); } vm_page_free_wakeup(); diff --git a/sys/vm/vm_reserv.c b/sys/vm/vm_reserv.c index b74c768f48e1..2cfc630026de 100644 --- a/sys/vm/vm_reserv.c +++ b/sys/vm/vm_reserv.c @@ -801,9 +801,6 @@ vm_reserv_free_page(vm_page_t m) rv = vm_reserv_from_page(m); if (rv->object == NULL) return (FALSE); - if ((m->flags & PG_CACHED) != 0 && m->pool != VM_FREEPOOL_CACHE) - vm_phys_set_pool(VM_FREEPOOL_CACHE, rv->pages, - VM_LEVEL_0_ORDER); vm_reserv_depopulate(rv, m - rv->pages); return (TRUE); } diff --git a/sys/x86/acpica/madt.c b/sys/x86/acpica/madt.c index 149e5ddd2285..e81235814f63 100644 --- a/sys/x86/acpica/madt.c +++ b/sys/x86/acpica/madt.c @@ -56,8 +56,8 @@ static struct { } *ioapics; static struct lapic_info { - u_int la_enabled:1; - u_int la_acpi_id:8; + u_int la_enabled; + u_int la_acpi_id; } lapics[MAX_APIC_ID + 1]; int madt_found_sci_override; @@ -255,34 +255,48 @@ madt_walk_table(acpi_subtable_handler *handler, void *arg) } static void +madt_add_cpu(u_int acpi_id, u_int apic_id, u_int flags) +{ + struct lapic_info *la; + + /* + * The MADT does not include a BSP flag, so we have to let the + * MP code figure out which CPU is the BSP on its own. + */ + if (bootverbose) + printf("MADT: Found CPU APIC ID %u ACPI ID %u: %s\n", + apic_id, acpi_id, flags & ACPI_MADT_ENABLED ? + "enabled" : "disabled"); + if (!(flags & ACPI_MADT_ENABLED)) + return; + if (apic_id > MAX_APIC_ID) { + printf("MADT: Ignoring local APIC ID %u (too high)\n", + apic_id); + return; + } + + la = &lapics[apic_id]; + KASSERT(la->la_enabled == 0, ("Duplicate local APIC ID %u", apic_id)); + la->la_enabled = 1; + la->la_acpi_id = acpi_id; + lapic_create(apic_id, 0); +} + +static void madt_probe_cpus_handler(ACPI_SUBTABLE_HEADER *entry, void *arg) { ACPI_MADT_LOCAL_APIC *proc; - struct lapic_info *la; + ACPI_MADT_LOCAL_X2APIC *x2apic; switch (entry->Type) { case ACPI_MADT_TYPE_LOCAL_APIC: - /* - * The MADT does not include a BSP flag, so we have to - * let the MP code figure out which CPU is the BSP on - * its own. - */ proc = (ACPI_MADT_LOCAL_APIC *)entry; - if (bootverbose) - printf("MADT: Found CPU APIC ID %u ACPI ID %u: %s\n", - proc->Id, proc->ProcessorId, - (proc->LapicFlags & ACPI_MADT_ENABLED) ? - "enabled" : "disabled"); - if (!(proc->LapicFlags & ACPI_MADT_ENABLED)) - break; - if (proc->Id > MAX_APIC_ID) - panic("%s: CPU ID %u too high", __func__, proc->Id); - la = &lapics[proc->Id]; - KASSERT(la->la_enabled == 0, - ("Duplicate local APIC ID %u", proc->Id)); - la->la_enabled = 1; - la->la_acpi_id = proc->ProcessorId; - lapic_create(proc->Id, 0); + madt_add_cpu(proc->ProcessorId, proc->Id, proc->LapicFlags); + break; + case ACPI_MADT_TYPE_LOCAL_X2APIC: + x2apic = (ACPI_MADT_LOCAL_X2APIC *)entry; + madt_add_cpu(x2apic->Uid, x2apic->LocalApicId, + x2apic->LapicFlags); break; } } @@ -551,29 +565,44 @@ madt_parse_nmi(ACPI_MADT_NMI_SOURCE *nmi) * Parse an entry for an NMI routed to a local APIC LVT pin. */ static void -madt_parse_local_nmi(ACPI_MADT_LOCAL_APIC_NMI *nmi) +madt_handle_local_nmi(u_int acpi_id, UINT8 Lint, UINT16 IntiFlags) { u_int apic_id, pin; - if (nmi->ProcessorId == 0xff) + if (acpi_id == 0xffffffff) apic_id = APIC_ID_ALL; - else if (madt_find_cpu(nmi->ProcessorId, &apic_id) != 0) { + else if (madt_find_cpu(acpi_id, &apic_id) != 0) { if (bootverbose) printf("MADT: Ignoring local NMI routed to " - "ACPI CPU %u\n", nmi->ProcessorId); + "ACPI CPU %u\n", acpi_id); return; } - if (nmi->Lint == 0) + if (Lint == 0) pin = APIC_LVT_LINT0; else pin = APIC_LVT_LINT1; lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI); - if (!(nmi->IntiFlags & ACPI_MADT_TRIGGER_CONFORMS)) + if (!(IntiFlags & ACPI_MADT_TRIGGER_CONFORMS)) lapic_set_lvt_triggermode(apic_id, pin, - interrupt_trigger(nmi->IntiFlags, 0)); - if (!(nmi->IntiFlags & ACPI_MADT_POLARITY_CONFORMS)) + interrupt_trigger(IntiFlags, 0)); + if (!(IntiFlags & ACPI_MADT_POLARITY_CONFORMS)) lapic_set_lvt_polarity(apic_id, pin, - interrupt_polarity(nmi->IntiFlags, 0)); + interrupt_polarity(IntiFlags, 0)); +} + +static void +madt_parse_local_nmi(ACPI_MADT_LOCAL_APIC_NMI *nmi) +{ + + madt_handle_local_nmi(nmi->ProcessorId == 0xff ? 0xffffffff : + nmi->ProcessorId, nmi->Lint, nmi->IntiFlags); +} + +static void +madt_parse_local_x2apic_nmi(ACPI_MADT_LOCAL_X2APIC_NMI *nmi) +{ + + madt_handle_local_nmi(nmi->Uid, nmi->Lint, nmi->IntiFlags); } /* @@ -594,6 +623,10 @@ madt_parse_ints(ACPI_SUBTABLE_HEADER *entry, void *arg __unused) case ACPI_MADT_TYPE_LOCAL_APIC_NMI: madt_parse_local_nmi((ACPI_MADT_LOCAL_APIC_NMI *)entry); break; + case ACPI_MADT_TYPE_LOCAL_X2APIC_NMI: + madt_parse_local_x2apic_nmi( + (ACPI_MADT_LOCAL_X2APIC_NMI *)entry); + break; } } diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index 9f39d1c82af8..548da4a0e10a 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -903,6 +903,9 @@ printcpuinfo(void) "\013INVPCID" /* Restricted Transactional Memory */ "\014RTM" + "\015PQM" + "\016NFPUSG" + "\020PQE" /* Intel Memory Protection Extensions */ "\017MPX" /* AVX512 Foundation */ @@ -922,6 +925,16 @@ printcpuinfo(void) ); } + if (cpu_stdext_feature2 != 0) { + printf("\n Structured Extended Features2=0x%b", + cpu_stdext_feature2, + "\020" + "\001PREFETCHWT1" + "\004PKU" + "\005OSPKE" + ); + } + if ((cpu_feature2 & CPUID2_XSAVE) != 0) { cpuid_count(0xd, 0x1, regs); if (regs[0] != 0) { @@ -1357,6 +1370,7 @@ identify_cpu(void) cpu_stdext_disable = 0; TUNABLE_INT_FETCH("hw.cpu_stdext_disable", &cpu_stdext_disable); cpu_stdext_feature &= ~cpu_stdext_disable; + cpu_stdext_feature2 = regs[2]; } #ifdef __i386__ @@ -1701,18 +1715,39 @@ print_INTEL_TLB(u_int data) case 0x8: printf("1st-level instruction cache: 16 KB, 4-way set associative, 32 byte line size\n"); break; + case 0x9: + printf("1st-level instruction cache: 32 KB, 4-way set associative, 64 byte line size\n"); + break; case 0xa: printf("1st-level data cache: 8 KB, 2-way set associative, 32 byte line size\n"); break; + case 0xb: + printf("Instruction TLB: 4 MByte pages, 4-way set associative, 4 entries\n"); + break; case 0xc: printf("1st-level data cache: 16 KB, 4-way set associative, 32 byte line size\n"); break; + case 0xd: + printf("1st-level data cache: 16 KBytes, 4-way set associative, 64 byte line size"); + break; + case 0xe: + printf("1st-level data cache: 24 KBytes, 6-way set associative, 64 byte line size\n"); + break; + case 0x1d: + printf("2nd-level cache: 128 KBytes, 2-way set associative, 64 byte line size\n"); + break; + case 0x21: + printf("2nd-level cache: 256 KBytes, 8-way set associative, 64 byte line size\n"); + break; case 0x22: printf("3rd-level cache: 512 KB, 4-way set associative, sectored cache, 64 byte line size\n"); break; case 0x23: printf("3rd-level cache: 1 MB, 8-way set associative, sectored cache, 64 byte line size\n"); break; + case 0x24: + printf("2nd-level cache: 1 MBytes, 16-way set associative, 64 byte line size\n"); + break; case 0x25: printf("3rd-level cache: 2 MB, 8-way set associative, sectored cache, 64 byte line size\n"); break; @@ -1725,13 +1760,13 @@ print_INTEL_TLB(u_int data) case 0x30: printf("1st-level instruction cache: 32 KB, 8-way set associative, 64 byte line size\n"); break; - case 0x39: + case 0x39: /* De-listed in SDM rev. 54 */ printf("2nd-level cache: 128 KB, 4-way set associative, sectored cache, 64 byte line size\n"); break; - case 0x3b: + case 0x3b: /* De-listed in SDM rev. 54 */ printf("2nd-level cache: 128 KB, 2-way set associative, sectored cache, 64 byte line size\n"); break; - case 0x3c: + case 0x3c: /* De-listed in SDM rev. 54 */ printf("2nd-level cache: 256 KB, 4-way set associative, sectored cache, 64 byte line size\n"); break; case 0x41: @@ -1755,6 +1790,34 @@ print_INTEL_TLB(u_int data) case 0x47: printf("3rd-level cache: 8 MB, 8-way set associative, 64 byte line size\n"); break; + case 0x48: + printf("2nd-level cache: 3MByte, 12-way set associative, 64 byte line size\n"); + break; + case 0x49: + if (CPUID_TO_FAMILY(cpu_id) == 0xf && + CPUID_TO_MODEL(cpu_id) == 0x6) + printf("3rd-level cache: 4MB, 16-way set associative, 64-byte line size\n"); + else + printf("2nd-level cache: 4 MByte, 16-way set associative, 64 byte line size"); + break; + case 0x4a: + printf("3rd-level cache: 6MByte, 12-way set associative, 64 byte line size\n"); + break; + case 0x4b: + printf("3rd-level cache: 8MByte, 16-way set associative, 64 byte line size\n"); + break; + case 0x4c: + printf("3rd-level cache: 12MByte, 12-way set associative, 64 byte line size\n"); + break; + case 0x4d: + printf("3rd-level cache: 16MByte, 16-way set associative, 64 byte line size\n"); + break; + case 0x4e: + printf("2nd-level cache: 6MByte, 24-way set associative, 64 byte line size\n"); + break; + case 0x4f: + printf("Instruction TLB: 4 KByte pages, 32 entries\n"); + break; case 0x50: printf("Instruction TLB: 4 KB, 2 MB or 4 MB pages, fully associative, 64 entries\n"); break; @@ -1764,6 +1827,21 @@ print_INTEL_TLB(u_int data) case 0x52: printf("Instruction TLB: 4 KB, 2 MB or 4 MB pages, fully associative, 256 entries\n"); break; + case 0x55: + printf("Instruction TLB: 2-MByte or 4-MByte pages, fully associative, 7 entries\n"); + break; + case 0x56: + printf("Data TLB0: 4 MByte pages, 4-way set associative, 16 entries\n"); + break; + case 0x57: + printf("Data TLB0: 4 KByte pages, 4-way associative, 16 entries\n"); + break; + case 0x59: + printf("Data TLB0: 4 KByte pages, fully associative, 16 entries\n"); + break; + case 0x5a: + printf("Data TLB0: 2-MByte or 4 MByte pages, 4-way set associative, 32 entries\n"); + break; case 0x5b: printf("Data TLB: 4 KB or 4 MB pages, fully associative, 64 entries\n"); break; @@ -1776,6 +1854,12 @@ print_INTEL_TLB(u_int data) case 0x60: printf("1st-level data cache: 16 KB, 8-way set associative, sectored cache, 64 byte line size\n"); break; + case 0x61: + printf("Instruction TLB: 4 KByte pages, fully associative, 48 entries\n"); + break; + case 0x63: + printf("Data TLB: 1 GByte pages, 4-way set associative, 4 entries\n"); + break; case 0x66: printf("1st-level data cache: 8 KB, 4-way set associative, sectored cache, 64 byte line size\n"); break; @@ -1794,6 +1878,9 @@ print_INTEL_TLB(u_int data) case 0x72: printf("Trace cache: 32K-uops, 8-way set associative\n"); break; + case 0x76: + printf("Instruction TLB: 2M/4M pages, fully associative, 8 entries\n"); + break; case 0x78: printf("2nd-level cache: 1 MB, 4-way set associative, 64-byte line size\n"); break; @@ -1815,6 +1902,9 @@ print_INTEL_TLB(u_int data) case 0x7f: printf("2nd-level cache: 512-KB, 2-way set associative, 64-byte line size\n"); break; + case 0x80: + printf("2nd-level cache: 512 KByte, 8-way set associative, 64-byte line size\n"); + break; case 0x82: printf("2nd-level cache: 256 KB, 8-way set associative, 32 byte line size\n"); break; @@ -1833,12 +1923,99 @@ print_INTEL_TLB(u_int data) case 0x87: printf("2nd-level cache: 1 MB, 8-way set associative, 64 byte line size\n"); break; + case 0xa0: + printf("DTLB: 4k pages, fully associative, 32 entries\n"); + break; case 0xb0: printf("Instruction TLB: 4 KB Pages, 4-way set associative, 128 entries\n"); break; + case 0xb1: + printf("Instruction TLB: 2M pages, 4-way, 8 entries or 4M pages, 4-way, 4 entries\n"); + break; + case 0xb2: + printf("Instruction TLB: 4KByte pages, 4-way set associative, 64 entries\n"); + break; case 0xb3: printf("Data TLB: 4 KB Pages, 4-way set associative, 128 entries\n"); break; + case 0xb4: + printf("Data TLB1: 4 KByte pages, 4-way associative, 256 entries\n"); + break; + case 0xb5: + printf("Instruction TLB: 4KByte pages, 8-way set associative, 64 entries\n"); + break; + case 0xb6: + printf("Instruction TLB: 4KByte pages, 8-way set associative, 128 entries\n"); + break; + case 0xba: + printf("Data TLB1: 4 KByte pages, 4-way associative, 64 entries\n"); + break; + case 0xc0: + printf("Data TLB: 4 KByte and 4 MByte pages, 4-way associative, 8 entries\n"); + break; + case 0xc1: + printf("Shared 2nd-Level TLB: 4 KByte/2MByte pages, 8-way associative, 1024 entries\n"); + break; + case 0xc2: + printf("DTLB: 4 KByte/2 MByte pages, 4-way associative, 16 entries\n"); + break; + case 0xc3: + printf("Shared 2nd-Level TLB: 4 KByte /2 MByte pages, 6-way associative, 1536 entries. Also 1GBbyte pages, 4-way, 16 entries\n"); + break; + case 0xca: + printf("Shared 2nd-Level TLB: 4 KByte pages, 4-way associative, 512 entries\n"); + break; + case 0xd0: + printf("3rd-level cache: 512 KByte, 4-way set associative, 64 byte line size\n"); + break; + case 0xd1: + printf("3rd-level cache: 1 MByte, 4-way set associative, 64 byte line size\n"); + break; + case 0xd2: + printf("3rd-level cache: 2 MByte, 4-way set associative, 64 byte line size\n"); + break; + case 0xd6: + printf("3rd-level cache: 1 MByte, 8-way set associative, 64 byte line size\n"); + break; + case 0xd7: + printf("3rd-level cache: 2 MByte, 8-way set associative, 64 byte line size\n"); + break; + case 0xd8: + printf("3rd-level cache: 4 MByte, 8-way set associative, 64 byte line size\n"); + break; + case 0xdc: + printf("3rd-level cache: 1.5 MByte, 12-way set associative, 64 byte line size\n"); + break; + case 0xdd: + printf("3rd-level cache: 3 MByte, 12-way set associative, 64 byte line size\n"); + break; + case 0xde: + printf("3rd-level cache: 6 MByte, 12-way set associative, 64 byte line size\n"); + break; + case 0xe2: + printf("3rd-level cache: 2 MByte, 16-way set associative, 64 byte line size\n"); + break; + case 0xe3: + printf("3rd-level cache: 4 MByte, 16-way set associative, 64 byte line size\n"); + break; + case 0xe4: + printf("3rd-level cache: 8 MByte, 16-way set associative, 64 byte line size\n"); + break; + case 0xea: + printf("3rd-level cache: 12MByte, 24-way set associative, 64 byte line size\n"); + break; + case 0xeb: + printf("3rd-level cache: 18MByte, 24-way set associative, 64 byte line size\n"); + break; + case 0xec: + printf("3rd-level cache: 24MByte, 24-way set associative, 64 byte line size\n"); + break; + case 0xf0: + printf("64-Byte prefetching\n"); + break; + case 0xf1: + printf("128-Byte prefetching\n"); + break; } } diff --git a/tests/sys/kern/ptrace_test.c b/tests/sys/kern/ptrace_test.c index b8d4fa235eab..a64262a7b1da 100644 --- a/tests/sys/kern/ptrace_test.c +++ b/tests/sys/kern/ptrace_test.c @@ -34,11 +34,33 @@ __FBSDID("$FreeBSD$"); #include <sys/wait.h> #include <errno.h> #include <signal.h> +#include <stdio.h> #include <stdlib.h> #include <unistd.h> #include <atf-c.h> /* + * A variant of ATF_REQUIRE that is suitable for use in child + * processes. This only works if the parent process is tripped up by + * the early exit and fails some requirement itself. + */ +#define CHILD_REQUIRE(exp) do { \ + if (!(exp)) \ + child_fail_require(__FILE__, __LINE__, \ + #exp " not met"); \ + } while (0) + +static void __dead2 +child_fail_require(const char *file, int line, const char *str) +{ + char buf[128]; + + snprintf(buf, sizeof(buf), "%s:%d: %s\n", file, line, str); + write(2, buf, strlen(buf)); + _exit(32); +} + +/* * Verify that a parent debugger process "sees" the exit of a debugged * process exactly once when attached via PT_TRACE_ME. */ @@ -51,7 +73,7 @@ ATF_TC_BODY(ptrace__parent_wait_after_trace_me, tc) ATF_REQUIRE((child = fork()) != -1); if (child == 0) { /* Child process. */ - ATF_REQUIRE(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); + CHILD_REQUIRE(ptrace(PT_TRACE_ME, 0, NULL, 0) != -1); /* Trigger a stop. */ raise(SIGSTOP); @@ -100,7 +122,7 @@ ATF_TC_BODY(ptrace__parent_wait_after_attach, tc) close(cpipe[0]); /* Wait for the parent to attach. */ - ATF_REQUIRE(read(cpipe[1], &c, sizeof(c)) == 0); + CHILD_REQUIRE(read(cpipe[1], &c, sizeof(c)) == 0); exit(1); } @@ -154,7 +176,7 @@ ATF_TC_BODY(ptrace__parent_sees_exit_after_child_debugger, tc) close(cpipe[0]); /* Wait for parent to be ready. */ - ATF_REQUIRE(read(cpipe[1], &c, sizeof(c)) == sizeof(c)); + CHILD_REQUIRE(read(cpipe[1], &c, sizeof(c)) == sizeof(c)); exit(1); } @@ -167,25 +189,25 @@ ATF_TC_BODY(ptrace__parent_sees_exit_after_child_debugger, tc) /* Debugger process. */ close(dpipe[0]); - ATF_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) != -1); + CHILD_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) != -1); wpid = waitpid(child, &status, 0); - ATF_REQUIRE(wpid == child); - ATF_REQUIRE(WIFSTOPPED(status)); - ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + CHILD_REQUIRE(wpid == child); + CHILD_REQUIRE(WIFSTOPPED(status)); + CHILD_REQUIRE(WSTOPSIG(status) == SIGSTOP); - ATF_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); + CHILD_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); /* Signal parent that debugger is attached. */ - ATF_REQUIRE(write(dpipe[1], &c, sizeof(c)) == sizeof(c)); + CHILD_REQUIRE(write(dpipe[1], &c, sizeof(c)) == sizeof(c)); /* Wait for parent's failed wait. */ - ATF_REQUIRE(read(dpipe[1], &c, sizeof(c)) == 0); + CHILD_REQUIRE(read(dpipe[1], &c, sizeof(c)) == 0); wpid = waitpid(child, &status, 0); - ATF_REQUIRE(wpid == child); - ATF_REQUIRE(WIFEXITED(status)); - ATF_REQUIRE(WEXITSTATUS(status) == 1); + CHILD_REQUIRE(wpid == child); + CHILD_REQUIRE(WIFEXITED(status)); + CHILD_REQUIRE(WEXITSTATUS(status) == 1); exit(0); } @@ -268,7 +290,7 @@ ATF_TC_BODY(ptrace__parent_sees_exit_after_unrelated_debugger, tc) close(cpipe[0]); /* Wait for parent to be ready. */ - ATF_REQUIRE(read(cpipe[1], &c, sizeof(c)) == sizeof(c)); + CHILD_REQUIRE(read(cpipe[1], &c, sizeof(c)) == sizeof(c)); exit(1); } @@ -284,32 +306,32 @@ ATF_TC_BODY(ptrace__parent_sees_exit_after_unrelated_debugger, tc) * Fork again and drop the debugger parent so that the * debugger is not a child of the main parent. */ - ATF_REQUIRE((fpid = fork()) != -1); + CHILD_REQUIRE((fpid = fork()) != -1); if (fpid != 0) exit(2); /* Debugger process. */ close(dpipe[0]); - ATF_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) != -1); + CHILD_REQUIRE(ptrace(PT_ATTACH, child, NULL, 0) != -1); wpid = waitpid(child, &status, 0); - ATF_REQUIRE(wpid == child); - ATF_REQUIRE(WIFSTOPPED(status)); - ATF_REQUIRE(WSTOPSIG(status) == SIGSTOP); + CHILD_REQUIRE(wpid == child); + CHILD_REQUIRE(WIFSTOPPED(status)); + CHILD_REQUIRE(WSTOPSIG(status) == SIGSTOP); - ATF_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); + CHILD_REQUIRE(ptrace(PT_CONTINUE, child, (caddr_t)1, 0) != -1); /* Signal parent that debugger is attached. */ - ATF_REQUIRE(write(dpipe[1], &c, sizeof(c)) == sizeof(c)); + CHILD_REQUIRE(write(dpipe[1], &c, sizeof(c)) == sizeof(c)); /* Wait for parent's failed wait. */ - ATF_REQUIRE(read(dpipe[1], &c, sizeof(c)) == sizeof(c)); + CHILD_REQUIRE(read(dpipe[1], &c, sizeof(c)) == sizeof(c)); wpid = waitpid(child, &status, 0); - ATF_REQUIRE(wpid == child); - ATF_REQUIRE(WIFEXITED(status)); - ATF_REQUIRE(WEXITSTATUS(status) == 1); + CHILD_REQUIRE(wpid == child); + CHILD_REQUIRE(WIFEXITED(status)); + CHILD_REQUIRE(WEXITSTATUS(status) == 1); exit(0); } diff --git a/tools/bus_space/C/Makefile b/tools/bus_space/C/Makefile index 9d767e82dd90..cb4d43f50100 100644 --- a/tools/bus_space/C/Makefile +++ b/tools/bus_space/C/Makefile @@ -3,6 +3,7 @@ LIB= bus_space SHLIB_MAJOR= 0 SRCS= lang.c +INCS= libbus_space.h CFLAGS+= -I${.CURDIR}/.. diff --git a/tools/bus_space/C/lang.c b/tools/bus_space/C/lang.c index 6408343bd596..9d3c7fbc899a 100644 --- a/tools/bus_space/C/lang.c +++ b/tools/bus_space/C/lang.c @@ -31,9 +31,10 @@ __FBSDID("$FreeBSD$"); #include <errno.h> #include "bus_space.h" +#include "busdma.h" #include "libbus_space.h" -int +int16_t bus_space_read_1(int rid, long ofs) { uint8_t val; @@ -41,7 +42,7 @@ bus_space_read_1(int rid, long ofs) return ((!bs_read(rid, ofs, &val, sizeof(val))) ? -1 : (int)val); } -int +int32_t bus_space_read_2(int rid, long ofs) { uint16_t val; @@ -98,3 +99,59 @@ bus_space_subregion(int rid, long ofs, long sz) return (bs_subregion(rid, ofs, sz)); } + +int +busdma_tag_create(const char *dev, bus_addr_t align, bus_addr_t bndry, + bus_addr_t maxaddr, bus_size_t maxsz, u_int nsegs, bus_size_t maxsegsz, + u_int datarate, u_int flags, busdma_tag_t *out_p) +{ + int res; + + res = bd_tag_create(dev, align, bndry, maxaddr, maxsz, nsegs, maxsegsz, + datarate, flags); + if (res == -1) + return (errno); + *out_p = res; + return (0); +} + +int +busdma_tag_derive(busdma_tag_t tag, bus_addr_t align, bus_addr_t bndry, + bus_addr_t maxaddr, bus_size_t maxsz, u_int nsegs, bus_size_t maxsegsz, + u_int datarate, u_int flags, busdma_tag_t *out_p) +{ + int res; + + res = bd_tag_derive(tag, align, bndry, maxaddr, maxsz, nsegs, maxsegsz, + datarate, flags); + if (res == -1) + return (errno); + *out_p = res; + return (0); +} + +int +busdma_tag_destroy(busdma_tag_t tag) +{ + + return (bd_tag_destroy(tag)); +} + +int +busdma_mem_alloc(busdma_tag_t tag, u_int flags, busdma_md_t *out_p) +{ + int res; + + res = bd_mem_alloc(tag, flags); + if (res == -1) + return (errno); + *out_p = res; + return (0); +} + +int +busdma_mem_free(busdma_md_t md) +{ + + return (bd_mem_free(md)); +} diff --git a/tools/bus_space/C/libbus_space.h b/tools/bus_space/C/libbus_space.h index 3e8860f003bb..55222382a19a 100644 --- a/tools/bus_space/C/libbus_space.h +++ b/tools/bus_space/C/libbus_space.h @@ -1,5 +1,5 @@ /*- - * Copyright (c) 2014 Marcel Moolenaar + * Copyright (c) 2014, 2015 Marcel Moolenaar * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -29,14 +29,32 @@ #ifndef _LIBBUS_SPACE_H_ #define _LIBBUS_SPACE_H_ -int bus_space_map(const char *dev); -int bus_space_read_1(int rid, long ofs); -int bus_space_read_2(int rid, long ofs); +int bus_space_map(const char *dev); +int16_t bus_space_read_1(int rid, long ofs); +int32_t bus_space_read_2(int rid, long ofs); int64_t bus_space_read_4(int rid, long ofs); -int bus_space_subregion(int rid, long ofs, long sz); -int bus_space_unmap(int rid); -int bus_space_write_1(int rid, long ofs, uint8_t val); -int bus_space_write_2(int rid, long ofs, uint16_t val); -int bus_space_write_4(int rid, long ofs, uint32_t val); +int bus_space_subregion(int rid, long ofs, long sz); +int bus_space_unmap(int rid); +int bus_space_write_1(int rid, long ofs, uint8_t val); +int bus_space_write_2(int rid, long ofs, uint16_t val); +int bus_space_write_4(int rid, long ofs, uint32_t val); + +typedef unsigned long bus_addr_t; +typedef unsigned long bus_size_t; +typedef int busdma_tag_t; +typedef int busdma_md_t; + +int busdma_tag_create(const char *dev, bus_addr_t align, bus_addr_t bndry, + bus_addr_t maxaddr, bus_size_t maxsz, u_int nsegs, + bus_size_t maxsegsz, u_int datarate, u_int flags, + busdma_tag_t *out_p); +int busdma_tag_derive(busdma_tag_t tag, bus_addr_t align, bus_addr_t bndry, + bus_addr_t maxaddr, bus_size_t maxsz, u_int nsegs, + bus_size_t maxsegsz, u_int datarate, u_int flags, + busdma_tag_t *out_p); +int busdma_tag_destroy(busdma_tag_t tag); + +int busdma_mem_alloc(busdma_tag_t tag, u_int flags, busdma_md_t *out_p); +int busdma_mem_free(busdma_md_t md); #endif /* _LIBBUS_SPACE_H_ */ diff --git a/tools/bus_space/Makefile.inc b/tools/bus_space/Makefile.inc index a448e3377582..947c85f8bd00 100644 --- a/tools/bus_space/Makefile.inc +++ b/tools/bus_space/Makefile.inc @@ -1,4 +1,4 @@ # $FreeBSD$ .PATH: ${.CURDIR}/.. -SRCS+= bus_space.c +SRCS+= bus_space.c busdma.c diff --git a/tools/bus_space/Python/lang.c b/tools/bus_space/Python/lang.c index f328a7710119..2247360508b1 100644 --- a/tools/bus_space/Python/lang.c +++ b/tools/bus_space/Python/lang.c @@ -30,6 +30,7 @@ __FBSDID("$FreeBSD$"); #include <Python.h> #include "bus_space.h" +#include "busdma.h" static PyObject * bus_read_1(PyObject *self, PyObject *args) @@ -173,6 +174,91 @@ bus_subregion(PyObject *self, PyObject *args) return (Py_BuildValue("i", rid)); } +static PyObject * +busdma_tag_create(PyObject *self, PyObject *args) +{ + char *dev; + u_long align, bndry, maxaddr, maxsz, maxsegsz; + u_int nsegs, datarate, flags; + int tid; + + if (!PyArg_ParseTuple(args, "skkkkIkII", &dev, &align, &bndry, + &maxaddr, &maxsz, &nsegs, &maxsegsz, &datarate, &flags)) + return (NULL); + tid = bd_tag_create(dev, align, bndry, maxaddr, maxsz, nsegs, + maxsegsz, datarate, flags); + if (tid == -1) { + PyErr_SetString(PyExc_IOError, strerror(errno)); + return (NULL); + } + return (Py_BuildValue("i", tid)); +} + +static PyObject * +busdma_tag_derive(PyObject *self, PyObject *args) +{ + u_long align, bndry, maxaddr, maxsz, maxsegsz; + u_int nsegs, datarate, flags; + int ptid, tid; + + if (!PyArg_ParseTuple(args, "ikkkkIkII", &ptid, &align, &bndry, + &maxaddr, &maxsz, &nsegs, &maxsegsz, &datarate, &flags)) + return (NULL); + tid = bd_tag_derive(ptid, align, bndry, maxaddr, maxsz, nsegs, + maxsegsz, datarate, flags); + if (tid == -1) { + PyErr_SetString(PyExc_IOError, strerror(errno)); + return (NULL); + } + return (Py_BuildValue("i", tid)); +} + +static PyObject * +busdma_tag_destroy(PyObject *self, PyObject *args) +{ + int error, tid; + + if (!PyArg_ParseTuple(args, "i", &tid)) + return (NULL); + error = bd_tag_destroy(tid); + if (error) { + PyErr_SetString(PyExc_IOError, strerror(error)); + return (NULL); + } + Py_RETURN_NONE; +} + +static PyObject * +busdma_mem_alloc(PyObject *self, PyObject *args) +{ + u_int flags; + int mdid, tid; + + if (!PyArg_ParseTuple(args, "iI", &tid, &flags)) + return (NULL); + mdid = bd_mem_alloc(tid, flags); + if (mdid == -1) { + PyErr_SetString(PyExc_IOError, strerror(errno)); + return (NULL); + } + return (Py_BuildValue("i", mdid)); +} + +static PyObject * +busdma_mem_free(PyObject *self, PyObject *args) +{ + int error, mdid; + + if (!PyArg_ParseTuple(args, "i", &mdid)) + return (NULL); + error = bd_mem_free(mdid); + if (error) { + PyErr_SetString(PyExc_IOError, strerror(error)); + return (NULL); + } + Py_RETURN_NONE; +} + static PyMethodDef bus_space_methods[] = { { "read_1", bus_read_1, METH_VARARGS, "Read a 1-byte data item." }, { "read_2", bus_read_2, METH_VARARGS, "Read a 2-byte data item." }, @@ -192,9 +278,24 @@ static PyMethodDef bus_space_methods[] = { { NULL, NULL, 0, NULL } }; +static PyMethodDef busdma_methods[] = { + { "tag_create", busdma_tag_create, METH_VARARGS, + "Create a root tag." }, + { "tag_derive", busdma_tag_derive, METH_VARARGS, + "Derive a child tag." }, + { "tag_destroy", busdma_tag_destroy, METH_VARARGS, + "Destroy a tag." }, + { "mem_alloc", busdma_mem_alloc, METH_VARARGS, + "Allocate memory according to the DMA constraints." }, + { "mem_free", busdma_mem_free, METH_VARARGS, + "Free allocated memory." }, + { NULL, NULL, 0, NULL } +}; + PyMODINIT_FUNC initbus_space(void) { Py_InitModule("bus_space", bus_space_methods); + Py_InitModule("busdma", busdma_methods); } diff --git a/tools/bus_space/busdma.c b/tools/bus_space/busdma.c new file mode 100644 index 000000000000..4c6e37cca536 --- /dev/null +++ b/tools/bus_space/busdma.c @@ -0,0 +1,293 @@ +/*- + * Copyright (c) 2015 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/ioctl.h> +#include <sys/mman.h> +#include <errno.h> +#include <fcntl.h> +#include <limits.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +#include "busdma.h" + +#include "../../sys/dev/proto/proto_dev.h" + +struct obj { + int oid; + u_int type; +#define OBJ_TYPE_NONE 0 +#define OBJ_TYPE_TAG 1 +#define OBJ_TYPE_MD 2 + u_int refcnt; + int fd; + struct obj *parent; + u_long key; + union { + struct { + unsigned long align; + unsigned long bndry; + unsigned long maxaddr; + unsigned long maxsz; + unsigned long maxsegsz; + unsigned long nsegs; + unsigned long datarate; + } tag; + struct { + unsigned long physaddr; + void *virtaddr; + } mem; + } u; +}; + +static struct obj **oidtbl = NULL; +static int noids = 0; + +static struct obj * +obj_alloc(u_int type) +{ + struct obj **newtbl, *obj; + int oid; + + obj = malloc(sizeof(struct obj)); + obj->type = type; + obj->refcnt = 0; + + for (oid = 0; oid < noids; oid++) { + if (oidtbl[oid] == 0) + break; + } + if (oid == noids) { + newtbl = realloc(oidtbl, sizeof(struct obj *) * (noids + 1)); + if (newtbl == NULL) { + free(obj); + return (NULL); + } + oidtbl = newtbl; + noids++; + } + oidtbl[oid] = obj; + obj->oid = oid; + return (obj); +} + +static int +obj_free(struct obj *obj) +{ + + oidtbl[obj->oid] = NULL; + free(obj); + return (0); +} + +static struct obj * +obj_lookup(int oid, u_int type) +{ + struct obj *obj; + + if (oid < 0 || oid >= noids) { + errno = EINVAL; + return (NULL); + } + obj = oidtbl[oid]; + if (obj->refcnt == 0) { + errno = ENXIO; + return (NULL); + } + if (type != OBJ_TYPE_NONE && obj->type != type) { + errno = ENODEV; + return (NULL); + } + return (obj); +} + +struct obj * +bd_tag_new(struct obj *ptag, int fd, u_long align, u_long bndry, + u_long maxaddr, u_long maxsz, u_int nsegs, u_long maxsegsz, + u_int datarate, u_int flags) +{ + struct proto_ioc_busdma ioc; + struct obj *tag; + + tag = obj_alloc(OBJ_TYPE_TAG); + if (tag == NULL) + return (NULL); + + memset(&ioc, 0, sizeof(ioc)); + ioc.request = (ptag != NULL) ? PROTO_IOC_BUSDMA_TAG_DERIVE : + PROTO_IOC_BUSDMA_TAG_CREATE; + ioc.key = (ptag != NULL) ? ptag->key : 0; + ioc.u.tag.align = align; + ioc.u.tag.bndry = bndry; + ioc.u.tag.maxaddr = maxaddr; + ioc.u.tag.maxsz = maxsz; + ioc.u.tag.nsegs = nsegs; + ioc.u.tag.maxsegsz = maxsegsz; + ioc.u.tag.datarate = datarate; + ioc.u.tag.flags = flags; + if (ioctl(fd, PROTO_IOC_BUSDMA, &ioc) == -1) { + obj_free(tag); + return (NULL); + } + tag->refcnt = 1; + tag->fd = fd; + tag->parent = ptag; + tag->key = ioc.result; + tag->u.tag.align = ioc.u.tag.align; + tag->u.tag.bndry = ioc.u.tag.bndry; + tag->u.tag.maxaddr = ioc.u.tag.maxaddr; + tag->u.tag.maxsz = ioc.u.tag.maxsz; + tag->u.tag.maxsegsz = ioc.u.tag.maxsegsz; + tag->u.tag.nsegs = ioc.u.tag.nsegs; + tag->u.tag.datarate = ioc.u.tag.datarate; + return (tag); +} + +int +bd_tag_create(const char *dev, u_long align, u_long bndry, u_long maxaddr, + u_long maxsz, u_int nsegs, u_long maxsegsz, u_int datarate, u_int flags) +{ + struct obj *tag; + int fd; + + fd = open(dev, O_RDWR); + if (fd == -1) + return (-1); + + tag = bd_tag_new(NULL, fd, align, bndry, maxaddr, maxsz, nsegs, + maxsegsz, datarate, flags); + if (tag == NULL) { + close(fd); + return (-1); + } + return (tag->oid); +} + +int +bd_tag_derive(int ptid, u_long align, u_long bndry, u_long maxaddr, + u_long maxsz, u_int nsegs, u_long maxsegsz, u_int datarate, u_int flags) +{ + struct obj *ptag, *tag; + + ptag = obj_lookup(ptid, OBJ_TYPE_TAG); + if (ptag == NULL) + return (-1); + + tag = bd_tag_new(ptag, ptag->fd, align, bndry, maxaddr, maxsz, nsegs, + maxsegsz, datarate, flags); + if (tag == NULL) + return (-1); + ptag->refcnt++; + return (tag->oid); +} + +int +bd_tag_destroy(int tid) +{ + struct proto_ioc_busdma ioc; + struct obj *ptag, *tag; + + tag = obj_lookup(tid, OBJ_TYPE_TAG); + if (tag == NULL) + return (errno); + if (tag->refcnt > 1) + return (EBUSY); + + memset(&ioc, 0, sizeof(ioc)); + ioc.request = PROTO_IOC_BUSDMA_TAG_DESTROY; + ioc.key = tag->key; + if (ioctl(tag->fd, PROTO_IOC_BUSDMA, &ioc) == -1) + return (errno); + + if (tag->parent != NULL) + tag->parent->refcnt--; + else + close(tag->fd); + obj_free(tag); + return (0); +} + +int +bd_mem_alloc(int tid, u_int flags) +{ + struct proto_ioc_busdma ioc; + struct obj *md, *tag; + + tag = obj_lookup(tid, OBJ_TYPE_TAG); + if (tag == NULL) + return (-1); + + md = obj_alloc(OBJ_TYPE_MD); + if (md == NULL) + return (-1); + + memset(&ioc, 0, sizeof(ioc)); + ioc.request = PROTO_IOC_BUSDMA_MEM_ALLOC; + ioc.u.mem.tag = tag->key; + ioc.u.mem.flags = flags; + if (ioctl(tag->fd, PROTO_IOC_BUSDMA, &ioc) == -1) { + obj_free(md); + return (-1); + } + + md->refcnt = 1; + md->fd = tag->fd; + md->parent = tag; + tag->refcnt++; + md->key = ioc.result; + md->u.mem.physaddr = ioc.u.mem.physaddr; + md->u.mem.virtaddr = mmap(NULL, tag->u.tag.maxsz, + PROT_READ | PROT_WRITE, MAP_NOCORE | MAP_SHARED, md->fd, + md->u.mem.physaddr); + return (md->oid); +} + +int +bd_mem_free(int mdid) +{ + struct proto_ioc_busdma ioc; + struct obj *md; + + md = obj_lookup(mdid, OBJ_TYPE_MD); + if (md == NULL) + return (errno); + + if (md->u.mem.virtaddr != MAP_FAILED) + munmap(md->u.mem.virtaddr, md->parent->u.tag.maxsz); + memset(&ioc, 0, sizeof(ioc)); + ioc.request = PROTO_IOC_BUSDMA_MEM_FREE; + ioc.key = md->key; + if (ioctl(md->fd, PROTO_IOC_BUSDMA, &ioc) == -1) + return (errno); + + md->parent->refcnt--; + obj_free(md); + return (0); +} diff --git a/tools/bus_space/busdma.h b/tools/bus_space/busdma.h new file mode 100644 index 000000000000..357cb3042588 --- /dev/null +++ b/tools/bus_space/busdma.h @@ -0,0 +1,43 @@ +/*- + * Copyright (c) 2015 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef _TOOLS_BUS_DMA_H_ +#define _TOOLS_BUS_DMA_H_ + +int bd_tag_create(const char *dev, u_long align, u_long bndry, + u_long maxaddr, u_long maxsz, u_int nsegs, u_long maxsegsz, + u_int datarate, u_int flags); +int bd_tag_derive(int tid, u_long align, u_long bndry, u_long maxaddr, + u_long maxsz, u_int nsegs, u_long maxsegsz, u_int datarate, + u_int flags); +int bd_tag_destroy(int tid); + +int bd_mem_alloc(int tid, u_int flags); +int bd_mem_free(int mdid); + +#endif /* _TOOLS_BUS_DMA_H_ */ diff --git a/usr.bin/colcrt/colcrt.1 b/usr.bin/colcrt/colcrt.1 index 8a5445f9339c..1b4aacf8da98 100644 --- a/usr.bin/colcrt/colcrt.1 +++ b/usr.bin/colcrt/colcrt.1 @@ -28,7 +28,7 @@ .\" @(#)colcrt.1 8.1 (Berkeley) 6/30/93 .\" $FreeBSD$ .\" -.Dd July 31, 2004 +.Dd June 6, 2015 .Dt COLCRT 1 .Os .Sh NAME @@ -93,8 +93,8 @@ tbl exum2.n \&| nroff \-ms \&| colcrt \- \&| more .Sh HISTORY The .Nm -command appeared in -.Bx 3.0 . +utility first appeared in +.Bx 1 . .Sh BUGS Should fold underlines onto blanks even with the .Sq Fl diff --git a/usr.bin/colrm/colrm.1 b/usr.bin/colrm/colrm.1 index db365f80ad41..9454ed5588f5 100644 --- a/usr.bin/colrm/colrm.1 +++ b/usr.bin/colrm/colrm.1 @@ -28,7 +28,7 @@ .\" @(#)colrm.1 8.1 (Berkeley) 6/6/93 .\" $FreeBSD$ .\" -.Dd August 4, 2004 +.Dd June 6, 2015 .Dt COLRM 1 .Os .Sh NAME @@ -83,5 +83,10 @@ as described in .Sh HISTORY The .Nm -command appeared in -.Bx 3.0 . +utility first appeared in +.Bx 1 . +.Sh AUTHORS +.An Jeff Schriebman +wrote the original version of +.Nm +in November 1974. diff --git a/usr.bin/expand/expand.1 b/usr.bin/expand/expand.1 index 6be9995611d2..2a5cb91c92c6 100644 --- a/usr.bin/expand/expand.1 +++ b/usr.bin/expand/expand.1 @@ -28,7 +28,7 @@ .\" @(#)expand.1 8.1 (Berkeley) 6/9/93 .\" $FreeBSD$ .\" -.Dd October 13, 2006 +.Dd June 6, 2015 .Dt EXPAND 1 .Os .Sh NAME @@ -110,5 +110,5 @@ utilities conform to .Sh HISTORY The .Nm -command appeared in -.Bx 3.0 . +utility first appeared in +.Bx 1 . diff --git a/usr.bin/fold/fold.1 b/usr.bin/fold/fold.1 index 94372ba8e6d6..b23e838b8563 100644 --- a/usr.bin/fold/fold.1 +++ b/usr.bin/fold/fold.1 @@ -28,7 +28,7 @@ .\" @(#)fold.1 8.1 (Berkeley) 6/6/93 .\" $FreeBSD$ .\" -.Dd December 15, 2006 +.Dd June 6, 2015 .Dt FOLD 1 .Os .Sh NAME @@ -84,6 +84,33 @@ The .Nm utility conforms to .St -p1003.1-2001 . +.Sh HISTORY +The +.Nm +utility first appeared in +.Bx 1 . +It was rewritten for +.Bx 4.3 Reno +to improve speed and modernize style. +The +.Fl b +and +.Fl s +options were added to +.Nx 1.0 +for +.St -p1003.2 +compliance. +.Sh AUTHORS +.An -nosplit +.An Bill Joy +wrote the original version of +.Nm +on June 28, 1977. +.An Kevin Ruddy +rewrote the command in 1990, and +.An J. T. Conklin +added the missing options in 1993. .Sh BUGS If underlining (see .Xr ul 1 ) diff --git a/usr.bin/keylogin/Makefile b/usr.bin/keylogin/Makefile index 2dab2499319e..786efae3ea2b 100644 --- a/usr.bin/keylogin/Makefile +++ b/usr.bin/keylogin/Makefile @@ -4,6 +4,4 @@ PROG= keylogin LIBADD= rpcsvc -WARNS?= 0 - .include <bsd.prog.mk> diff --git a/usr.bin/last/last.1 b/usr.bin/last/last.1 index e552dd685f81..19e0f0bc7f25 100644 --- a/usr.bin/last/last.1 +++ b/usr.bin/last/last.1 @@ -28,7 +28,7 @@ .\" @(#)last.1 8.1 (Berkeley) 6/6/93 .\" $FreeBSD$ .\" -.Dd January 21, 2010 +.Dd June 6, 2015 .Dt LAST 1 .Os .Sh NAME @@ -202,10 +202,15 @@ login data base .Xr ac 8 , .Xr lastlogin 8 .Sh HISTORY -A .Nm -utility appeared in -.Bx 3.0 . +utility first appeared in +.Bx 1 . +.Sh AUTHORS +.An -nosplit +The original version was written by +.An Howard P. Katseff ; +.An Keith Bostic +rewrote it in 1986/87 to add functionality and to improve code quality. .Sh BUGS If a login shell should terminate abnormally for some reason, it is likely that a logout record will not be written to the diff --git a/usr.bin/mail/Makefile b/usr.bin/mail/Makefile index da3e4336b4c7..ea2338b3dded 100644 --- a/usr.bin/mail/Makefile +++ b/usr.bin/mail/Makefile @@ -11,7 +11,7 @@ EFILES= mail.rc LINKS= ${BINDIR}/mail ${BINDIR}/Mail ${BINDIR}/mail ${BINDIR}/mailx MLINKS= mail.1 Mail.1 mail.1 mailx.1 -WARNS?= 1 +WARNS?= 2 .PATH: ${.CURDIR}/misc diff --git a/usr.bin/mail/main.c b/usr.bin/mail/main.c index 31372d03d72d..0699a5572a12 100644 --- a/usr.bin/mail/main.c +++ b/usr.bin/mail/main.c @@ -28,7 +28,7 @@ */ #ifndef lint -static char copyright[] = +static const char copyright[] = "@(#) Copyright (c) 1980, 1993\n\ The Regents of the University of California. All rights reserved.\n"; #endif /* not lint */ diff --git a/usr.bin/mandoc/Makefile b/usr.bin/mandoc/Makefile index e2c59cf5e29e..faa46ed3bdc8 100644 --- a/usr.bin/mandoc/Makefile +++ b/usr.bin/mandoc/Makefile @@ -84,6 +84,6 @@ WARNS?= 2 CFLAGS+= -DHAVE_CONFIG_H \ -I${.CURDIR}/../../lib/libohash/ \ -I${.CURDIR}/../../contrib/sqlite3 -LIBADD= ohash sqlite3 +LIBADD= ohash sqlite3 z .include <bsd.prog.mk> diff --git a/usr.bin/mkstr/mkstr.1 b/usr.bin/mkstr/mkstr.1 index bc5f71151d91..09a277ecee5a 100644 --- a/usr.bin/mkstr/mkstr.1 +++ b/usr.bin/mkstr/mkstr.1 @@ -28,7 +28,7 @@ .\" @(#)mkstr.1 8.1 (Berkeley) 6/6/93 .\" $FreeBSD$ .\" -.Dd November 1, 2002 +.Dd June 6, 2015 .Dt MKSTR 1 .Os .Sh NAME @@ -118,10 +118,16 @@ error(a1, a2, a3, a4) .Xr xstr 1 , .Xr lseek 2 .Sh HISTORY -An +The .Nm -utility appeared in -.Bx 3.0 . +utility first appeared in +.Bx 1 . +.Sh AUTHORS +.An -nosplit +.An Bill Joy +and +.An Chuck Haley , +1977. .Sh BUGS The .Nm diff --git a/usr.bin/mkstr/mkstr.c b/usr.bin/mkstr/mkstr.c index 9f64d0ccd1a1..2025effb98e4 100644 --- a/usr.bin/mkstr/mkstr.c +++ b/usr.bin/mkstr/mkstr.c @@ -76,8 +76,8 @@ __FBSDID("$FreeBSD$"); * existing error message file for recompilation of single routines. */ -FILE *mesgread, *mesgwrite; -char name[100], *np; +static FILE *mesgread, *mesgwrite; +static char name[100], *np; void copystr(void); int fgetNUL(char *, int, FILE *); @@ -267,7 +267,7 @@ inithash(void) #define NBUCKETS 511 -struct hash { +static struct hash { long hval; unsigned hpt; struct hash *hnext; diff --git a/usr.bin/rsh/Makefile b/usr.bin/rsh/Makefile index d7c26a5e71b8..2005f2317f24 100644 --- a/usr.bin/rsh/Makefile +++ b/usr.bin/rsh/Makefile @@ -4,8 +4,6 @@ PROG= rsh CFLAGS+=-I${.CURDIR}/../../libexec/rlogind -WARNS?= 2 - BINOWN= root BINMODE=4555 diff --git a/usr.bin/rsh/rsh.c b/usr.bin/rsh/rsh.c index a19539a8a8fd..5fa33e24b26b 100644 --- a/usr.bin/rsh/rsh.c +++ b/usr.bin/rsh/rsh.c @@ -77,10 +77,10 @@ __FBSDID("$FreeBSD$"); /* * rsh - remote shell */ -int rfd2; +static int rfd2; -int family = PF_UNSPEC; -char rlogin[] = "rlogin"; +static int family = PF_UNSPEC; +static char rlogin[] = "rlogin"; void connect_timeout(int); char *copyargs(char * const *); diff --git a/usr.bin/rup/Makefile b/usr.bin/rup/Makefile index 4b5131e03c9c..54e114ee158f 100644 --- a/usr.bin/rup/Makefile +++ b/usr.bin/rup/Makefile @@ -2,8 +2,7 @@ PROG= rup -WARNS?= 1 - +WARNS?= 3 LIBADD= rpcsvc .include <bsd.prog.mk> diff --git a/usr.bin/systat/Makefile b/usr.bin/systat/Makefile index 672aadcea5ae..bb279d56e8c8 100644 --- a/usr.bin/systat/Makefile +++ b/usr.bin/systat/Makefile @@ -14,7 +14,7 @@ SRCS+= icmp6.c ip6.c CFLAGS+= -DINET6 .endif -WARNS?= 0 +WARNS?= 1 LIBADD= ncursesw m devstat kvm diff --git a/usr.bin/systat/main.c b/usr.bin/systat/main.c index e0e627af12af..fd938307df2e 100644 --- a/usr.bin/systat/main.c +++ b/usr.bin/systat/main.c @@ -138,7 +138,6 @@ main(int argc, char **argv) { char errbuf[_POSIX2_LINE_MAX], dummy; size_t size; - double t; struct cmdentry *cmd = NULL; (void) setlocale(LC_ALL, ""); diff --git a/usr.bin/top/Makefile b/usr.bin/top/Makefile index 67ab20d8d79a..e7ace685a4f3 100644 --- a/usr.bin/top/Makefile +++ b/usr.bin/top/Makefile @@ -30,8 +30,8 @@ sigdesc.h: ${SIGCONV_AWK} ${SIGNAL_H} awk -f ${SIGCONV_AWK} < ${SIGNAL_H} > ${.TARGET} CLEANFILES+= top.local.h top.x -.SUFFIXES: .X .x .H .h -.X.x .H.h: +.SUFFIXES: .xs .x .hs .h +.xs.x .hs.h: @${ECHO} Making ${.TARGET} from ${.IMPSRC} @sed -e's,%LoadMax%,5.0,g' \ -e's,%TableSize%,20011,g' \ diff --git a/usr.bin/tset/tset.1 b/usr.bin/tset/tset.1 index f0935b7bee06..5f2641f126e8 100644 --- a/usr.bin/tset/tset.1 +++ b/usr.bin/tset/tset.1 @@ -28,7 +28,7 @@ .\" @(#)tset.1 8.1 (Berkeley) 6/9/93 .\" $FreeBSD$ .\" -.Dd June 9, 1993 +.Dd June 6, 2015 .Dt TSET 1 .Os .Sh NAME @@ -400,5 +400,22 @@ older terminal interfaces. .Sh HISTORY The .Nm -command appeared in -.Bx 3.0 . +and +.Nm reset +utilities first appeared in +.Bx 1 . +.Sh AUTHORS +.An -nosplit +The original version of +.Nm tset +was written by +.An Eric P. Allman +in October 1977, and +.Nm reset +was originally written by +.An Kurt Shoens . +The current version also contains code by +.An Zeyd M. Ben-Halim , +.An Eric S. Raymond , +and +.An Thomas E. Dickey . diff --git a/usr.bin/vgrind/regexp.c b/usr.bin/vgrind/regexp.c index cd57835e5464..8390cf18e1e1 100644 --- a/usr.bin/vgrind/regexp.c +++ b/usr.bin/vgrind/regexp.c @@ -91,7 +91,7 @@ STRNCMP(register char *s1, register char *s2, register int len) * internal format. * * Either meta symbols (\a \d or \p) or character strings or - * operations ( alternation or perenthesizing ) can be + * operations ( alternation or parenthesizing ) can be * specified. Each starts with a descriptor byte. The descriptor * byte has STR set for strings, META set for meta symbols * and OPER set for operations. @@ -110,7 +110,7 @@ STRNCMP(register char *s1, register char *s2, register int len) * character count * the string * - * operatins := descriptor + * operations := descriptor * symbol * character count */ diff --git a/usr.bin/vgrind/vgrindefs.c b/usr.bin/vgrind/vgrindefs.c index c48a0483b0ca..3c310a9b84fc 100644 --- a/usr.bin/vgrind/vgrindefs.c +++ b/usr.bin/vgrind/vgrindefs.c @@ -35,6 +35,8 @@ __FBSDID("$FreeBSD$"); #define MAXHOP 32 /* max number of tc= indirections */ #include <ctype.h> +#include <fcntl.h> +#include <string.h> #include <unistd.h> /* @@ -308,7 +310,7 @@ tdecode(register char *str, char **area) register int c; cp = *area; - while (c = *str++) { + while ((c = *str++)) { if (c == ':' && *(cp-1) != '\\') break; *cp++ = c; diff --git a/usr.bin/vtfontcvt/Makefile b/usr.bin/vtfontcvt/Makefile index a9802f7400f1..cfb271bf3ae2 100644 --- a/usr.bin/vtfontcvt/Makefile +++ b/usr.bin/vtfontcvt/Makefile @@ -3,6 +3,4 @@ PROG= vtfontcvt MAN8= vtfontcvt.8 -WARNS?= 6 - .include <bsd.prog.mk> diff --git a/usr.sbin/ctld/login.c b/usr.sbin/ctld/login.c index c6b83d947adf..8029130b1e21 100644 --- a/usr.sbin/ctld/login.c +++ b/usr.sbin/ctld/login.c @@ -557,7 +557,7 @@ login_negotiate_key(struct pdu *request, const char *name, tmp = conn->conn_data_segment_limit; } conn->conn_max_data_segment_length = tmp; - keys_add_int(response_keys, name, tmp); + keys_add_int(response_keys, name, conn->conn_data_segment_limit); } else if (strcmp(name, "MaxBurstLength") == 0) { tmp = strtoul(value, NULL, 10); if (tmp <= 0) { diff --git a/usr.sbin/pw/grupd.c b/usr.sbin/pw/grupd.c index 8735831595f0..d52a345b48fb 100644 --- a/usr.sbin/pw/grupd.c +++ b/usr.sbin/pw/grupd.c @@ -39,28 +39,14 @@ static const char rcsid[] = #include "pwupd.h" -static char * grpath = _PATH_PWD; - -int -setgrdir(const char * dir) -{ - if (dir == NULL) - return -1; - else - grpath = strdup(dir); - if (grpath == NULL) - return -1; - - return 0; -} - char * getgrpath(const char * file) { static char pathbuf[MAXPATHLEN]; - snprintf(pathbuf, sizeof pathbuf, "%s/%s", grpath, file); - return pathbuf; + snprintf(pathbuf, sizeof pathbuf, "%s/%s", conf.etcpath, file); + + return (pathbuf); } static int @@ -76,7 +62,7 @@ gr_update(struct group * grp, char const * group) if (group != NULL) old_gr = GETGRNAM(group); - if (gr_init(grpath, NULL)) + if (gr_init(conf.etcpath, NULL)) err(1, "gr_init()"); if ((pfd = gr_lock()) == -1) { diff --git a/usr.sbin/pw/pw.8 b/usr.sbin/pw/pw.8 index 076f2eb562ad..9074313e17bb 100644 --- a/usr.sbin/pw/pw.8 +++ b/usr.sbin/pw/pw.8 @@ -24,7 +24,7 @@ .\" .\" $FreeBSD$ .\" -.Dd October 29, 2012 +.Dd June 3, 2015 .Dt PW 8 .Os .Sh NAME @@ -32,6 +32,7 @@ .Nd create, remove, modify & display system users and groups .Sh SYNOPSIS .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar useradd .Op name|uid @@ -57,6 +58,7 @@ .Op Fl P .Op Fl Y .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar useradd .Op name|uid @@ -76,6 +78,7 @@ .Op Fl s Ar shell .Op Fl y Ar path .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar userdel .Op name|uid @@ -84,6 +87,7 @@ .Op Fl r .Op Fl Y .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar usermod .Op name|uid @@ -109,6 +113,7 @@ .Op Fl P .Op Fl Y .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar usershow .Op name|uid @@ -119,11 +124,13 @@ .Op Fl 7 .Op Fl a .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar usernext .Op Fl C Ar config .Op Fl q .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar groupadd .Op group|gid @@ -138,6 +145,7 @@ .Op Fl P .Op Fl Y .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar groupdel .Op group|gid @@ -145,6 +153,7 @@ .Op Fl g Ar gid .Op Fl Y .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar groupmod .Op group|gid @@ -161,6 +170,7 @@ .Op Fl P .Op Fl Y .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar groupshow .Op group|gid @@ -170,17 +180,20 @@ .Op Fl P .Op Fl a .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar groupnext .Op Fl C Ar config .Op Fl q .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar lock .Op name|uid .Op Fl C Ar config .Op Fl q .Nm +.Op Fl R Ar rootdir .Op Fl V Ar etcdir .Ar unlock .Op name|uid @@ -246,6 +259,12 @@ options. .Pp The following flags are common to most or all modes of operation: .Bl -tag -width "-G grouplist" +.It Fl R Ar rootdir +Specifies an alternate root directory within which +.Nm +will operate. +Any paths specified will be relative to +.Va rootdir . .It Fl V Ar etcdir This flag sets an alternate location for the password, group and configuration files, and may be used to maintain a user/group database in an alternate location. diff --git a/usr.sbin/pw/pw.c b/usr.sbin/pw/pw.c index 0c41f03e565c..30fb55b4f61d 100644 --- a/usr.sbin/pw/pw.c +++ b/usr.sbin/pw/pw.c @@ -33,6 +33,7 @@ static const char rcsid[] = #include <fcntl.h> #include <locale.h> #include <paths.h> +#include <stdbool.h> #include <sys/wait.h> #include "pw.h" @@ -56,7 +57,7 @@ static const char *Combo2[] = { struct pwf PWF = { - 0, + PWF_REGULAR, setpwent, endpwent, getpwent, @@ -71,7 +72,7 @@ struct pwf PWF = }; struct pwf VPWF = { - 1, + PWF_ALT, vsetpwent, vendpwent, vgetpwent, @@ -84,6 +85,8 @@ struct pwf VPWF = vgetgrnam, }; +struct pwconf conf; + static struct cargs arglist; static int getindex(const char *words[], const char *word); @@ -96,36 +99,45 @@ main(int argc, char *argv[]) int ch; int mode = -1; int which = -1; + long id = -1; char *config = NULL; - struct userconf *cnf; struct stat st; + const char *errstr; + char arg, *name; + bool relocated, nis; static const char *opts[W_NUM][M_NUM] = { { /* user */ - "V:C:qn:u:c:d:e:p:g:G:mM:k:s:oL:i:w:h:H:Db:NPy:Y", - "V:C:qn:u:rY", - "V:C:qn:u:c:d:e:p:g:G:mM:l:k:s:w:L:h:H:FNPY", - "V:C:qn:u:FPa7", - "V:C:q", - "V:C:q", - "V:C:q" + "R:V:C:qn:u:c:d:e:p:g:G:mM:k:s:oL:i:w:h:H:Db:NPy:Y", + "R:V:C:qn:u:rY", + "R:V:C:qn:u:c:d:e:p:g:G:mM:l:k:s:w:L:h:H:FNPY", + "R:V:C:qn:u:FPa7", + "R:V:C:q", + "R:V:C:q", + "R:V:C:q" }, { /* grp */ - "V:C:qn:g:h:H:M:opNPY", - "V:C:qn:g:Y", - "V:C:qn:d:g:l:h:H:FM:m:NPY", - "V:C:qn:g:FPa", - "V:C:q" + "R:V:C:qn:g:h:H:M:opNPY", + "R:V:C:qn:g:Y", + "R:V:C:qn:d:g:l:h:H:FM:m:NPY", + "R:V:C:qn:g:FPa", + "R:V:C:q" } }; - static int (*funcs[W_NUM]) (struct userconf * _cnf, int _mode, struct cargs * _args) = + static int (*funcs[W_NUM]) (int _mode, char *_name, long _id, + struct cargs * _args) = { /* Request handlers */ pw_user, pw_group }; + name = NULL; + relocated = nis = false; + memset(&conf, 0, sizeof(conf)); + strlcpy(conf.etcpath, _PATH_PWD, sizeof(conf.etcpath)); + LIST_INIT(&arglist); (void)setlocale(LC_ALL, ""); @@ -141,7 +153,12 @@ main(int argc, char *argv[]) /* * Special case, allow pw -V<dir> <operation> [args] for scripts etc. */ - if (argv[1][1] == 'V') { + arg = argv[1][1]; + if (arg == 'V' || arg == 'R') { + if (relocated) + errx(EXIT_FAILURE, "Both '-R' and '-V' " + "specified, only one accepted"); + relocated = true; optarg = &argv[1][2]; if (*optarg == '\0') { if (stat(argv[2], &st) != 0) @@ -155,7 +172,14 @@ main(int argc, char *argv[]) ++argv; --argc; } - addarg(&arglist, 'V', optarg); + memcpy(&PWF, &VPWF, sizeof PWF); + if (arg == 'R') { + strlcpy(conf.rootdir, optarg, + sizeof(conf.rootdir)); + PWF._altdir = PWF_ROOTDIR; + } + snprintf(conf.etcpath, sizeof(conf.etcpath), + "%s%s", optarg, arg == 'R' ? "/etc" : ""); } else break; } @@ -170,9 +194,15 @@ main(int argc, char *argv[]) mode = tmp % M_NUM; } else if (strcmp(argv[1], "help") == 0 && argv[2] == NULL) cmdhelp(mode, which); - else if (which != -1 && mode != -1) - addarg(&arglist, 'n', argv[1]); - else + else if (which != -1 && mode != -1) { + if (strspn(argv[1], "0123456789") == strlen(argv[1])) { + id = strtonum(argv[1], 0, LONG_MAX, &errstr); + if (errstr != NULL) + errx(EX_USAGE, "Bad id '%s': %s", + argv[1], errstr); + } else + name = argv[1]; + } else errx(EX_USAGE, "unknown keyword `%s'", argv[1]); ++argv; --argc; @@ -191,17 +221,82 @@ main(int argc, char *argv[]) optarg = NULL; while ((ch = getopt(argc, argv, opts[which][mode])) != -1) { - if (ch == '?') + switch (ch) { + case '?': errx(EX_USAGE, "unknown switch"); - else + break; + case '7': + conf.v7 = true; + break; + case 'C': + conf.config = optarg; + config = conf.config; + break; + case 'N': + conf.dryrun = true; + break; + case 'l': + if (strlen(optarg) >= MAXLOGNAME) + errx(EX_USAGE, "new name too long: %s", optarg); + conf.newname = optarg; + break; + case 'P': + conf.pretty = true; + break; + case 'Y': + nis = true; + break; + case 'g': + if (which == 0) { /* for user* */ + addarg(&arglist, 'g', optarg); + break; + } + if (strspn(optarg, "0123456789") != strlen(optarg)) + errx(EX_USAGE, "-g expects a number"); + id = strtonum(optarg, 0, LONG_MAX, &errstr); + if (errstr != NULL) + errx(EX_USAGE, "Bad id '%s': %s", optarg, + errstr); + break; + case 'u': + if (strspn(optarg, "0123456789,") != strlen(optarg)) + errx(EX_USAGE, "-u expects a number"); + if (strchr(optarg, ',') != NULL) { + addarg(&arglist, 'u', optarg); + break; + } + id = strtonum(optarg, 0, LONG_MAX, &errstr); + if (errstr != NULL) + errx(EX_USAGE, "Bad id '%s': %s", optarg, + errstr); + break; + case 'n': + if (strspn(optarg, "0123456789") != strlen(optarg)) { + name = optarg; + break; + } + id = strtonum(optarg, 0, LONG_MAX, &errstr); + if (errstr != NULL) + errx(EX_USAGE, "Bad id '%s': %s", optarg, + errstr); + break; + case 'o': + conf.checkduplicate = true; + break; + default: addarg(&arglist, ch, optarg); + break; + } optarg = NULL; } + if (name != NULL && strlen(name) >= MAXLOGNAME) + errx(EX_USAGE, "name too long: %s", name); + /* * Must be root to attempt an update */ - if (geteuid() != 0 && mode != M_PRINT && mode != M_NEXT && getarg(&arglist, 'N')==NULL) + if (geteuid() != 0 && mode != M_PRINT && mode != M_NEXT && !conf.dryrun) errx(EX_NOPERM, "you must be root to run this program"); /* @@ -215,34 +310,24 @@ main(int argc, char *argv[]) * Set our base working path if not overridden */ - config = getarg(&arglist, 'C') ? getarg(&arglist, 'C')->val : NULL; - - if (getarg(&arglist, 'V') != NULL) { - char * etcpath = getarg(&arglist, 'V')->val; - if (*etcpath) { - if (config == NULL) { /* Only override config location if -C not specified */ - asprintf(&config, "%s/pw.conf", etcpath); - if (config == NULL) - errx(EX_OSERR, "out of memory"); - } - memcpy(&PWF, &VPWF, sizeof PWF); - setpwdir(etcpath); - setgrdir(etcpath); - } + if (config == NULL) { /* Only override config location if -C not specified */ + asprintf(&config, "%s/pw.conf", conf.etcpath); + if (config == NULL) + errx(EX_OSERR, "out of memory"); } /* * Now, let's do the common initialisation */ - cnf = read_userconfig(config); + conf.userconf = read_userconfig(config); - ch = funcs[which] (cnf, mode, &arglist); + ch = funcs[which] (mode, name, id, &arglist); /* * If everything went ok, and we've been asked to update * the NIS maps, then do it now */ - if (ch == EXIT_SUCCESS && getarg(&arglist, 'Y') != NULL) { + if (ch == EXIT_SUCCESS && nis) { pid_t pid; fflush(NULL); @@ -260,7 +345,7 @@ main(int argc, char *argv[]) if ((i = WEXITSTATUS(i)) != 0) errx(ch, "make exited with status %d", i); else - pw_log(cnf, mode, which, "NIS maps updated"); + pw_log(conf.userconf, mode, which, "NIS maps updated"); } } return ch; @@ -303,6 +388,7 @@ cmdhelp(int mode, int which) { "usage: pw useradd [name] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-C config configuration file\n" "\t-q quiet operation\n" " Adding users:\n" @@ -325,6 +411,7 @@ cmdhelp(int mode, int which) "\t-N no update\n" " Setting defaults:\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-D set user defaults\n" "\t-b dir default home root dir\n" "\t-e period default expiry period\n" @@ -341,12 +428,14 @@ cmdhelp(int mode, int which) "\t-y path set NIS passwd file path\n", "usage: pw userdel [uid|name] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-n name login name\n" "\t-u uid user id\n" "\t-Y update NIS maps\n" "\t-r remove home & contents\n", "usage: pw usermod [uid|name] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-C config configuration file\n" "\t-q quiet operation\n" "\t-F force add if no user\n" @@ -370,6 +459,7 @@ cmdhelp(int mode, int which) "\t-N no update\n", "usage: pw usershow [uid|name] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-n name login name\n" "\t-u uid user id\n" "\t-F force print\n" @@ -378,6 +468,7 @@ cmdhelp(int mode, int which) "\t-7 print in v7 format\n", "usage: pw usernext [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-C config configuration file\n" "\t-q quiet operation\n", "usage pw: lock [switches]\n" @@ -392,6 +483,7 @@ cmdhelp(int mode, int which) { "usage: pw groupadd [group|gid] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-C config configuration file\n" "\t-q quiet operation\n" "\t-n group group name\n" @@ -402,11 +494,13 @@ cmdhelp(int mode, int which) "\t-N no update\n", "usage: pw groupdel [group|gid] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-n name group name\n" "\t-g gid group id\n" "\t-Y update NIS maps\n", "usage: pw groupmod [group|gid] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-C config configuration file\n" "\t-q quiet operation\n" "\t-F force add if not exists\n" @@ -420,6 +514,7 @@ cmdhelp(int mode, int which) "\t-N no update\n", "usage: pw groupshow [group|gid] [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-n name group name\n" "\t-g gid group id\n" "\t-F force print\n" @@ -427,6 +522,7 @@ cmdhelp(int mode, int which) "\t-a print all accounting groups\n", "usage: pw groupnext [switches]\n" "\t-V etcdir alternate /etc location\n" + "\t-R rootir alternate root directory\n" "\t-C config configuration file\n" "\t-q quiet operation\n" } diff --git a/usr.sbin/pw/pw.h b/usr.sbin/pw/pw.h index a1ed0c47f4ea..6239004b61f7 100644 --- a/usr.sbin/pw/pw.h +++ b/usr.sbin/pw/pw.h @@ -72,30 +72,6 @@ struct carg LIST_HEAD(cargs, carg); -struct userconf -{ - int default_password; /* Default password for new users? */ - int reuse_uids; /* Reuse uids? */ - int reuse_gids; /* Reuse gids? */ - char *nispasswd; /* Path to NIS version of the passwd file */ - char *dotdir; /* Where to obtain skeleton files */ - char *newmail; /* Mail to send to new accounts */ - char *logfile; /* Where to log changes */ - char *home; /* Where to create home directory */ - mode_t homemode; /* Home directory permissions */ - char *shelldir; /* Where shells are located */ - char **shells; /* List of shells */ - char *shell_default; /* Default shell */ - char *default_group; /* Default group number */ - char **groups; /* Default (additional) groups */ - char *default_class; /* Default user class */ - uid_t min_uid, max_uid; /* Allowed range of uids */ - gid_t min_gid, max_gid; /* Allowed range of gids */ - int expire_days; /* Days to expiry */ - int password_days; /* Days to password expiry */ - int numgroups; /* (internal) size of default_group array */ -}; - #define _DEF_DIRMODE (S_IRWXU | S_IRWXG | S_IRWXO) #define _PATH_PW_CONF "/etc/pw.conf" #define _UC_MAXLINE 1024 @@ -106,9 +82,9 @@ int write_userconfig(char const * file); struct carg *addarg(struct cargs * _args, int ch, char *argstr); struct carg *getarg(struct cargs * _args, int ch); -int pw_user(struct userconf * cnf, int mode, struct cargs * _args); -int pw_group(struct userconf * cnf, int mode, struct cargs * _args); -char *pw_checkname(u_char *name, int gecos); +int pw_user(int mode, char *name, long id, struct cargs * _args); +int pw_group(int mode, char *name, long id, struct cargs * _args); +char *pw_checkname(char *name, int gecos); int addnispwent(const char *path, struct passwd *pwd); int delnispwent(const char *path, const char *login); diff --git a/usr.sbin/pw/pw_group.c b/usr.sbin/pw/pw_group.c index c0011601a23b..b9cce0dcafbc 100644 --- a/usr.sbin/pw/pw_group.c +++ b/usr.sbin/pw/pw_group.c @@ -44,20 +44,18 @@ static const char rcsid[] = static struct passwd *lookup_pwent(const char *user); static void delete_members(char ***members, int *grmembers, int *i, struct carg *arg, struct group *grp); -static int print_group(struct group * grp, int pretty); -static gid_t gr_gidpolicy(struct userconf * cnf, struct cargs * args); +static int print_group(struct group * grp); +static gid_t gr_gidpolicy(struct userconf * cnf, long id); int -pw_group(struct userconf * cnf, int mode, struct cargs * args) +pw_group(int mode, char *name, long id, struct cargs * args) { int rc; - struct carg *a_newname = getarg(args, 'l'); - struct carg *a_name = getarg(args, 'n'); - struct carg *a_gid = getarg(args, 'g'); struct carg *arg; struct group *grp = NULL; int grmembers = 0; char **members = NULL; + struct userconf *cnf = conf.userconf; static struct group fakegroup = { @@ -67,11 +65,6 @@ pw_group(struct userconf * cnf, int mode, struct cargs * args) NULL }; - if (a_gid != NULL) { - if (strspn(a_gid->val, "0123456789") != strlen(a_gid->val)) - errx(EX_USAGE, "-g expects a number"); - } - if (mode == M_LOCK || mode == M_UNLOCK) errx(EX_USAGE, "'lock' command is not available for groups"); @@ -80,7 +73,7 @@ pw_group(struct userconf * cnf, int mode, struct cargs * args) * next gid to stdout */ if (mode == M_NEXT) { - gid_t next = gr_gidpolicy(cnf, args); + gid_t next = gr_gidpolicy(cnf, id); if (getarg(args, 'q')) return next; printf("%u\n", next); @@ -88,77 +81,71 @@ pw_group(struct userconf * cnf, int mode, struct cargs * args) } if (mode == M_PRINT && getarg(args, 'a')) { - int pretty = getarg(args, 'P') != NULL; - SETGRENT(); while ((grp = GETGRENT()) != NULL) - print_group(grp, pretty); + print_group(grp); ENDGRENT(); return EXIT_SUCCESS; } - if (a_gid == NULL) { - if (a_name == NULL) - errx(EX_DATAERR, "group name or id required"); + if (id < 0 && name == NULL) + errx(EX_DATAERR, "group name or id required"); - if (mode != M_ADD && grp == NULL && isdigit((unsigned char)*a_name->val)) { - (a_gid = a_name)->ch = 'g'; - a_name = NULL; - } - } - grp = (a_name != NULL) ? GETGRNAM(a_name->val) : GETGRGID((gid_t) atoi(a_gid->val)); + grp = (name != NULL) ? GETGRNAM(name) : GETGRGID(id); if (mode == M_UPDATE || mode == M_DELETE || mode == M_PRINT) { - if (a_name == NULL && grp == NULL) /* Try harder */ - grp = GETGRGID(atoi(a_gid->val)); + if (name == NULL && grp == NULL) /* Try harder */ + grp = GETGRGID(id); if (grp == NULL) { if (mode == M_PRINT && getarg(args, 'F')) { char *fmems[1]; fmems[0] = NULL; - fakegroup.gr_name = a_name ? a_name->val : "nogroup"; - fakegroup.gr_gid = a_gid ? (gid_t) atol(a_gid->val) : (gid_t)-1; + fakegroup.gr_name = name ? name : "nogroup"; + fakegroup.gr_gid = (gid_t) id; fakegroup.gr_mem = fmems; - return print_group(&fakegroup, getarg(args, 'P') != NULL); + return print_group(&fakegroup); } - errx(EX_DATAERR, "unknown group `%s'", a_name ? a_name->val : a_gid->val); + if (name == NULL) + errx(EX_DATAERR, "unknown group `%s'", name); + else + errx(EX_DATAERR, "unknown group `%ld'", id); } - if (a_name == NULL) /* Needed later */ - a_name = addarg(args, 'n', grp->gr_name); + if (name == NULL) /* Needed later */ + name = grp->gr_name; /* * Handle deletions now */ if (mode == M_DELETE) { - gid_t gid = grp->gr_gid; - rc = delgrent(grp); if (rc == -1) - err(EX_IOERR, "group '%s' not available (NIS?)", grp->gr_name); + err(EX_IOERR, "group '%s' not available (NIS?)", + name); else if (rc != 0) { err(EX_IOERR, "group update"); } - pw_log(cnf, mode, W_GROUP, "%s(%u) removed", a_name->val, gid); + pw_log(cnf, mode, W_GROUP, "%s(%ld) removed", name, id); return EXIT_SUCCESS; } else if (mode == M_PRINT) - return print_group(grp, getarg(args, 'P') != NULL); + return print_group(grp); - if (a_gid) - grp->gr_gid = (gid_t) atoi(a_gid->val); + if (id > 0) + grp->gr_gid = (gid_t) id; - if (a_newname != NULL) - grp->gr_name = pw_checkname((u_char *)a_newname->val, 0); + if (conf.newname != NULL) + grp->gr_name = pw_checkname(conf.newname, 0); } else { - if (a_name == NULL) /* Required */ + if (name == NULL) /* Required */ errx(EX_DATAERR, "group name required"); else if (grp != NULL) /* Exists */ - errx(EX_DATAERR, "group name `%s' already exists", a_name->val); + errx(EX_DATAERR, "group name `%s' already exists", name); extendarray(&members, &grmembers, 200); members[0] = NULL; grp = &fakegroup; - grp->gr_name = pw_checkname((u_char *)a_name->val, 0); + grp->gr_name = pw_checkname(name, 0); grp->gr_passwd = "*"; - grp->gr_gid = gr_gidpolicy(cnf, args); + grp->gr_gid = gr_gidpolicy(cnf, id); grp->gr_mem = members; } @@ -257,8 +244,8 @@ pw_group(struct userconf * cnf, int mode, struct cargs * args) grp->gr_mem = members; } - if (getarg(args, 'N') != NULL) - return print_group(grp, getarg(args, 'P') != NULL); + if (conf.dryrun) + return print_group(grp); if (mode == M_ADD && (rc = addgrent(grp)) != 0) { if (rc == -1) @@ -266,7 +253,7 @@ pw_group(struct userconf * cnf, int mode, struct cargs * args) grp->gr_name); else err(EX_IOERR, "group update"); - } else if (mode == M_UPDATE && (rc = chggrent(a_name->val, grp)) != 0) { + } else if (mode == M_UPDATE && (rc = chggrent(name, grp)) != 0) { if (rc == -1) errx(EX_IOERR, "group '%s' not available (NIS?)", grp->gr_name); @@ -274,9 +261,10 @@ pw_group(struct userconf * cnf, int mode, struct cargs * args) err(EX_IOERR, "group update"); } - arg = a_newname != NULL ? a_newname : a_name; + if (conf.newname != NULL) + name = conf.newname; /* grp may have been invalidated */ - if ((grp = GETGRNAM(arg->val)) == NULL) + if ((grp = GETGRNAM(name)) == NULL) errx(EX_SOFTWARE, "group disappeared during update"); pw_log(cnf, mode, W_GROUP, "%s(%u)", grp->gr_name, grp->gr_gid); @@ -348,19 +336,18 @@ delete_members(char ***members, int *grmembers, int *i, struct carg *arg, static gid_t -gr_gidpolicy(struct userconf * cnf, struct cargs * args) +gr_gidpolicy(struct userconf * cnf, long id) { struct group *grp; gid_t gid = (gid_t) - 1; - struct carg *a_gid = getarg(args, 'g'); /* * Check the given gid, if any */ - if (a_gid != NULL) { - gid = (gid_t) atol(a_gid->val); + if (id > 0) { + gid = (gid_t) id; - if ((grp = GETGRGID(gid)) != NULL && getarg(args, 'o') == NULL) + if ((grp = GETGRGID(gid)) != NULL && conf.checkduplicate) errx(EX_DATAERR, "gid `%u' has already been allocated", grp->gr_gid); } else { struct bitmap bm; @@ -411,9 +398,9 @@ gr_gidpolicy(struct userconf * cnf, struct cargs * args) static int -print_group(struct group * grp, int pretty) +print_group(struct group * grp) { - if (!pretty) { + if (!conf.pretty) { char *buf = NULL; buf = gr_make(grp); diff --git a/usr.sbin/pw/pw_user.c b/usr.sbin/pw/pw_user.c index 48eb934d7624..c3b2751e26a8 100644 --- a/usr.sbin/pw/pw_user.c +++ b/usr.sbin/pw/pw_user.c @@ -51,9 +51,11 @@ static const char rcsid[] = static char locked_str[] = "*LOCKED*"; -static int print_user(struct passwd * pwd, int pretty, int v7); -static uid_t pw_uidpolicy(struct userconf * cnf, struct cargs * args); -static uid_t pw_gidpolicy(struct userconf * cnf, struct cargs * args, char *nam, gid_t prefer); +static int delete_user(struct userconf *cnf, struct passwd *pwd, + char *name, int delete, int mode); +static int print_user(struct passwd * pwd); +static uid_t pw_uidpolicy(struct userconf * cnf, long id); +static uid_t pw_gidpolicy(struct cargs * args, char *nam, gid_t prefer); static time_t pw_pwdpolicy(struct userconf * cnf, struct cargs * args); static time_t pw_exppolicy(struct userconf * cnf, struct cargs * args); static char *pw_homepolicy(struct userconf * cnf, struct cargs * args, char const * user); @@ -63,6 +65,27 @@ static char *shell_path(char const * path, char *shells[], char *sh); static void rmat(uid_t uid); static void rmopie(char const * name); +static void +create_and_populate_homedir(int mode, struct passwd *pwd) +{ + char *homedir, *dotdir; + struct userconf *cnf = conf.userconf; + + homedir = dotdir = NULL; + + if (conf.rootdir[0] != '\0') { + asprintf(&homedir, "%s/%s", conf.rootdir, pwd->pw_dir); + if (homedir == NULL) + errx(EX_OSERR, "out of memory"); + asprintf(&dotdir, "%s/%s", conf.rootdir, cnf->dotdir); + } + + copymkdir(homedir ? homedir : pwd->pw_dir, dotdir ? dotdir: cnf->dotdir, + cnf->homemode, pwd->pw_uid, pwd->pw_gid); + pw_log(cnf, mode, W_USER, "%s(%u) home %s made", pwd->pw_name, + pwd->pw_uid, pwd->pw_dir); +} + /*- * -C config configuration file * -q quiet operation @@ -96,18 +119,18 @@ static void rmopie(char const * name); */ int -pw_user(struct userconf * cnf, int mode, struct cargs * args) +pw_user(int mode, char *name, long id, struct cargs * args) { int rc, edited = 0; char *p = NULL; char *passtmp; - struct carg *a_name; - struct carg *a_uid; struct carg *arg; struct passwd *pwd = NULL; struct group *grp; struct stat st; + struct userconf *cnf; char line[_PASSWORD_LEN+1]; + char path[MAXPATHLEN]; FILE *fp; char *dmode_c; void *set = NULL; @@ -129,6 +152,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) #endif }; + cnf = conf.userconf; /* * With M_NEXT, we only need to return the @@ -136,11 +160,11 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) */ if (mode == M_NEXT) { - uid_t next = pw_uidpolicy(cnf, args); + uid_t next = pw_uidpolicy(cnf, id); if (getarg(args, 'q')) return next; printf("%u:", next); - pw_group(cnf, mode, args); + pw_group(mode, name, -1, args); return EXIT_SUCCESS; } @@ -240,7 +264,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) } } if ((arg = getarg(args, 'L')) != NULL) - cnf->default_class = pw_checkname((u_char *)arg->val, 0); + cnf->default_class = pw_checkname(arg->val, 0); if ((arg = getarg(args, 'G')) != NULL && arg->val) { int i = 0; @@ -268,7 +292,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) if ((arg = getarg(args, 'w')) != NULL) cnf->default_password = boolean_val(arg->val, cnf->default_password); if (mode == M_ADD && getarg(args, 'D')) { - if (getarg(args, 'n') != NULL) + if (name != NULL) errx(EX_DATAERR, "can't combine `-D' with `-n name'"); if ((arg = getarg(args, 'u')) != NULL && (p = strtok(arg->val, ", \t")) != NULL) { if ((cnf->min_uid = (uid_t) atoi(p)) == 0) @@ -283,45 +307,24 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) cnf->max_gid = 32000; } - arg = getarg(args, 'C'); - if (write_userconfig(arg ? arg->val : NULL)) - return EXIT_SUCCESS; + if (write_userconfig(conf.config)) + return (EXIT_SUCCESS); err(EX_IOERR, "config udpate"); } if (mode == M_PRINT && getarg(args, 'a')) { - int pretty = getarg(args, 'P') != NULL; - int v7 = getarg(args, '7') != NULL; SETPWENT(); while ((pwd = GETPWENT()) != NULL) - print_user(pwd, pretty, v7); + print_user(pwd); ENDPWENT(); return EXIT_SUCCESS; } - if ((a_name = getarg(args, 'n')) != NULL) - pwd = GETPWNAM(pw_checkname((u_char *)a_name->val, 0)); - a_uid = getarg(args, 'u'); + if (name != NULL) + pwd = GETPWNAM(pw_checkname(name, 0)); - if (a_uid == NULL) { - if (a_name == NULL) - errx(EX_DATAERR, "user name or id required"); - - /* - * Determine whether 'n' switch is name or uid - we don't - * really don't really care which we have, but we need to - * know. - */ - if (mode != M_ADD && pwd == NULL - && strspn(a_name->val, "0123456789") == strlen(a_name->val) - && *a_name->val) { - (a_uid = a_name)->ch = 'u'; - a_name = NULL; - } - } else { - if (strspn(a_uid->val, "0123456789") != strlen(a_uid->val)) - errx(EX_USAGE, "-u expects a number"); - } + if (id < 0 && name == NULL) + errx(EX_DATAERR, "user name or id required"); /* * Update, delete & print require that the user exists @@ -329,24 +332,22 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) if (mode == M_UPDATE || mode == M_DELETE || mode == M_PRINT || mode == M_LOCK || mode == M_UNLOCK) { - if (a_name == NULL && pwd == NULL) /* Try harder */ - pwd = GETPWUID(atoi(a_uid->val)); + if (name == NULL && pwd == NULL) /* Try harder */ + pwd = GETPWUID(id); if (pwd == NULL) { if (mode == M_PRINT && getarg(args, 'F')) { - fakeuser.pw_name = a_name ? a_name->val : "nouser"; - fakeuser.pw_uid = a_uid ? (uid_t) atol(a_uid->val) : (uid_t) -1; - return print_user(&fakeuser, - getarg(args, 'P') != NULL, - getarg(args, '7') != NULL); + fakeuser.pw_name = name ? name : "nouser"; + fakeuser.pw_uid = (uid_t) id; + return print_user(&fakeuser); } - if (a_name == NULL) - errx(EX_NOUSER, "no such uid `%s'", a_uid->val); - errx(EX_NOUSER, "no such user `%s'", a_name->val); + if (name == NULL) + errx(EX_NOUSER, "no such uid `%ld'", id); + errx(EX_NOUSER, "no such user `%s'", name); } - if (a_name == NULL) /* May be needed later */ - a_name = addarg(args, 'n', newstr(pwd->pw_name)); + if (name == NULL) + name = pwd->pw_name; /* * The M_LOCK and M_UNLOCK functions simply add or remove @@ -371,128 +372,24 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) errx(EX_DATAERR, "user '%s' is not locked", pwd->pw_name); pwd->pw_passwd += sizeof(locked_str)-1; edited = 1; - } else if (mode == M_DELETE) { - /* - * Handle deletions now - */ - char file[MAXPATHLEN]; - char home[MAXPATHLEN]; - uid_t uid = pwd->pw_uid; - struct group *gr; - char grname[LOGNAMESIZE]; - - if (strcmp(pwd->pw_name, "root") == 0) - errx(EX_DATAERR, "cannot remove user 'root'"); - - if (!PWALTDIR()) { - /* - * Remove opie record from /etc/opiekeys - */ - - rmopie(pwd->pw_name); - - /* - * Remove crontabs - */ - snprintf(file, sizeof(file), "/var/cron/tabs/%s", pwd->pw_name); - if (access(file, F_OK) == 0) { - snprintf(file, sizeof(file), "crontab -u %s -r", pwd->pw_name); - system(file); - } - } - /* - * Save these for later, since contents of pwd may be - * invalidated by deletion - */ - snprintf(file, sizeof(file), "%s/%s", _PATH_MAILDIR, pwd->pw_name); - strlcpy(home, pwd->pw_dir, sizeof(home)); - gr = GETGRGID(pwd->pw_gid); - if (gr != NULL) - strlcpy(grname, gr->gr_name, LOGNAMESIZE); - else - grname[0] = '\0'; - - rc = delpwent(pwd); - if (rc == -1) - err(EX_IOERR, "user '%s' does not exist", pwd->pw_name); - else if (rc != 0) - err(EX_IOERR, "passwd update"); - - if (cnf->nispasswd && *cnf->nispasswd=='/') { - rc = delnispwent(cnf->nispasswd, a_name->val); - if (rc == -1) - warnx("WARNING: user '%s' does not exist in NIS passwd", pwd->pw_name); - else if (rc != 0) - warn("WARNING: NIS passwd update"); - /* non-fatal */ - } - - grp = GETGRNAM(a_name->val); - if (grp != NULL && - (grp->gr_mem == NULL || *grp->gr_mem == NULL) && - strcmp(a_name->val, grname) == 0) - delgrent(GETGRNAM(a_name->val)); - SETGRENT(); - while ((grp = GETGRENT()) != NULL) { - int i, j; - char group[MAXLOGNAME]; - if (grp->gr_mem != NULL) { - for (i = 0; grp->gr_mem[i] != NULL; i++) { - if (!strcmp(grp->gr_mem[i], a_name->val)) { - for (j = i; grp->gr_mem[j] != NULL; j++) - grp->gr_mem[j] = grp->gr_mem[j+1]; - strlcpy(group, grp->gr_name, MAXLOGNAME); - chggrent(group, grp); - } - } - } - } - ENDGRENT(); - - pw_log(cnf, mode, W_USER, "%s(%u) account removed", a_name->val, uid); - - if (!PWALTDIR()) { - /* - * Remove mail file - */ - remove(file); - - /* - * Remove at jobs - */ - if (getpwuid(uid) == NULL) - rmat(uid); - - /* - * Remove home directory and contents - */ - if (getarg(args, 'r') != NULL && *home == '/' && getpwuid(uid) == NULL) { - if (stat(home, &st) != -1) { - rm_r(home, uid); - pw_log(cnf, mode, W_USER, "%s(%u) home '%s' %sremoved", - a_name->val, uid, home, - stat(home, &st) == -1 ? "" : "not completely "); - } - } - } - return EXIT_SUCCESS; - } else if (mode == M_PRINT) - return print_user(pwd, - getarg(args, 'P') != NULL, - getarg(args, '7') != NULL); + } else if (mode == M_DELETE) + return (delete_user(cnf, pwd, name, + getarg(args, 'r') != NULL, mode)); + else if (mode == M_PRINT) + return print_user(pwd); /* * The rest is edit code */ - if ((arg = getarg(args, 'l')) != NULL) { + if (conf.newname != NULL) { if (strcmp(pwd->pw_name, "root") == 0) errx(EX_DATAERR, "can't rename `root' account"); - pwd->pw_name = pw_checkname((u_char *)arg->val, 0); + pwd->pw_name = pw_checkname(conf.newname, 0); edited = 1; } - if ((arg = getarg(args, 'u')) != NULL && isdigit((unsigned char)*arg->val)) { - pwd->pw_uid = (uid_t) atol(arg->val); + if (id > 0 && isdigit((unsigned char)*arg->val)) { + pwd->pw_uid = (uid_t)id; edited = 1; if (pwd->pw_uid != 0 && strcmp(pwd->pw_name, "root") == 0) errx(EX_DATAERR, "can't change uid of `root' account"); @@ -593,19 +490,19 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) * Add code */ - if (a_name == NULL) /* Required */ + if (name == NULL) /* Required */ errx(EX_DATAERR, "login name required"); - else if ((pwd = GETPWNAM(a_name->val)) != NULL) /* Exists */ - errx(EX_DATAERR, "login name `%s' already exists", a_name->val); + else if ((pwd = GETPWNAM(name)) != NULL) /* Exists */ + errx(EX_DATAERR, "login name `%s' already exists", name); /* * Now, set up defaults for a new user */ pwd = &fakeuser; - pwd->pw_name = a_name->val; + pwd->pw_name = name; pwd->pw_class = cnf->default_class ? cnf->default_class : ""; - pwd->pw_uid = pw_uidpolicy(cnf, args); - pwd->pw_gid = pw_gidpolicy(cnf, args, pwd->pw_name, (gid_t) pwd->pw_uid); + pwd->pw_uid = pw_uidpolicy(cnf, id); + pwd->pw_gid = pw_gidpolicy(args, pwd->pw_name, (gid_t) pwd->pw_uid); pwd->pw_change = pw_pwdpolicy(cnf, args); pwd->pw_expire = pw_exppolicy(cnf, args); pwd->pw_dir = pw_homepolicy(cnf, args, pwd->pw_name); @@ -625,7 +522,7 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) * Shared add/edit code */ if ((arg = getarg(args, 'c')) != NULL) { - char *gecos = pw_checkname((u_char *)arg->val, 1); + char *gecos = pw_checkname(arg->val, 1); if (strcmp(pwd->pw_gecos, gecos) != 0) { pwd->pw_gecos = gecos; edited = 1; @@ -696,10 +593,8 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) /* * Special case: -N only displays & exits */ - if (getarg(args, 'N') != NULL) - return print_user(pwd, - getarg(args, 'P') != NULL, - getarg(args, '7') != NULL); + if (conf.dryrun) + return print_user(pwd); if (mode == M_ADD) { edited = 1; /* Always */ @@ -719,13 +614,13 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) } } else if (mode == M_UPDATE || mode == M_LOCK || mode == M_UNLOCK) { if (edited) { /* Only updated this if required */ - rc = chgpwent(a_name->val, pwd); + rc = chgpwent(name, pwd); if (rc == -1) errx(EX_IOERR, "user '%s' does not exist (NIS?)", pwd->pw_name); else if (rc != 0) err(EX_IOERR, "passwd file update"); if ( cnf->nispasswd && *cnf->nispasswd=='/') { - rc = chgnispwent(cnf->nispasswd, a_name->val, pwd); + rc = chgnispwent(cnf->nispasswd, name, pwd); if (rc == -1) warn("User '%s' not found in NIS passwd", pwd->pw_name); else @@ -777,16 +672,16 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) /* go get a current version of pwd */ - pwd = GETPWNAM(a_name->val); + pwd = GETPWNAM(name); if (pwd == NULL) { /* This will fail when we rename, so special case that */ - if (mode == M_UPDATE && (arg = getarg(args, 'l')) != NULL) { - a_name->val = arg->val; /* update new name */ - pwd = GETPWNAM(a_name->val); /* refetch renamed rec */ + if (mode == M_UPDATE && conf.newname != NULL) { + name = conf.newname; /* update new name */ + pwd = GETPWNAM(name); /* refetch renamed rec */ } } if (pwd == NULL) /* can't go on without this */ - errx(EX_NOUSER, "user '%s' disappeared during update", a_name->val); + errx(EX_NOUSER, "user '%s' disappeared during update", name); grp = GETGRGID(pwd->pw_gid); pw_log(cnf, mode, W_USER, "%s(%u):%s(%u):%s:%s:%s", @@ -800,11 +695,13 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) * doesn't hurt anything to create the empty mailfile */ if (mode == M_ADD) { - if (!PWALTDIR()) { - snprintf(line, sizeof(line), "%s/%s", _PATH_MAILDIR, pwd->pw_name); - close(open(line, O_RDWR | O_CREAT, 0600)); /* Preserve contents & + if (PWALTDIR() != PWF_ALT) { + arg = getarg(args, 'R'); + snprintf(path, sizeof(path), "%s%s/%s", + arg ? arg->val : "", _PATH_MAILDIR, pwd->pw_name); + close(open(path, O_RDWR | O_CREAT, 0600)); /* Preserve contents & * mtime */ - chown(line, pwd->pw_uid, pwd->pw_gid); + chown(path, pwd->pw_uid, pwd->pw_gid); } } @@ -813,12 +710,9 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) * that this also `works' for editing users if -m is used, but * existing files will *not* be overwritten. */ - if (!PWALTDIR() && getarg(args, 'm') != NULL && pwd->pw_dir && *pwd->pw_dir == '/' && pwd->pw_dir[1]) { - copymkdir(pwd->pw_dir, cnf->dotdir, cnf->homemode, pwd->pw_uid, pwd->pw_gid); - pw_log(cnf, mode, W_USER, "%s(%u) home %s made", - pwd->pw_name, pwd->pw_uid, pwd->pw_dir); - } - + if (PWALTDIR() != PWF_ALT && getarg(args, 'm') != NULL && pwd->pw_dir && + *pwd->pw_dir == '/' && pwd->pw_dir[1]) + create_and_populate_homedir(mode, pwd); /* * Finally, send mail to the new user as well, if we are asked to @@ -846,19 +740,18 @@ pw_user(struct userconf * cnf, int mode, struct cargs * args) static uid_t -pw_uidpolicy(struct userconf * cnf, struct cargs * args) +pw_uidpolicy(struct userconf * cnf, long id) { struct passwd *pwd; uid_t uid = (uid_t) - 1; - struct carg *a_uid = getarg(args, 'u'); /* * Check the given uid, if any */ - if (a_uid != NULL) { - uid = (uid_t) atol(a_uid->val); + if (id > 0) { + uid = (uid_t) id; - if ((pwd = GETPWUID(uid)) != NULL && getarg(args, 'o') == NULL) + if ((pwd = GETPWUID(uid)) != NULL && conf.checkduplicate) errx(EX_DATAERR, "uid `%u' has already been allocated", pwd->pw_uid); } else { struct bitmap bm; @@ -902,11 +795,12 @@ pw_uidpolicy(struct userconf * cnf, struct cargs * args) static uid_t -pw_gidpolicy(struct userconf * cnf, struct cargs * args, char *nam, gid_t prefer) +pw_gidpolicy(struct cargs * args, char *nam, gid_t prefer) { struct group *grp; gid_t gid = (uid_t) - 1; struct carg *a_gid = getarg(args, 'g'); + struct userconf *cnf = conf.userconf; /* * If no arg given, see if default can help out @@ -933,7 +827,6 @@ pw_gidpolicy(struct userconf * cnf, struct cargs * args, char *nam, gid_t prefer char tmp[32]; LIST_INIT(&grpargs); - addarg(&grpargs, 'n', nam); /* * We need to auto-create a group with the user's name. We @@ -948,15 +841,13 @@ pw_gidpolicy(struct userconf * cnf, struct cargs * args, char *nam, gid_t prefer snprintf(tmp, sizeof(tmp), "%u", prefer); addarg(&grpargs, 'g', tmp); } - if (getarg(args, 'N')) - { - addarg(&grpargs, 'N', NULL); + if (conf.dryrun) { addarg(&grpargs, 'q', NULL); - gid = pw_group(cnf, M_NEXT, &grpargs); + gid = pw_group(M_NEXT, nam, -1, &grpargs); } else { - pw_group(cnf, M_ADD, &grpargs); + pw_group(M_ADD, nam, -1, &grpargs); if ((grp = GETGRNAM(nam)) != NULL) gid = grp->gr_gid; } @@ -1111,7 +1002,7 @@ pw_password(struct userconf * cnf, struct cargs * args, char const * user) * We give this information back to the user */ if (getarg(args, 'h') == NULL && getarg(args, 'H') == NULL && - getarg(args, 'N') == NULL) { + !conf.dryrun) { if (isatty(STDOUT_FILENO)) printf("Password for '%s' is: ", user); printf("%s\n", pwbuf); @@ -1133,17 +1024,124 @@ pw_password(struct userconf * cnf, struct cargs * args, char const * user) return pw_pwcrypt(pwbuf); } +static int +delete_user(struct userconf *cnf, struct passwd *pwd, char *name, + int delete, int mode) +{ + char file[MAXPATHLEN]; + char home[MAXPATHLEN]; + uid_t uid = pwd->pw_uid; + struct group *gr, *grp; + char grname[LOGNAMESIZE]; + int rc; + struct stat st; + + if (strcmp(pwd->pw_name, "root") == 0) + errx(EX_DATAERR, "cannot remove user 'root'"); + + if (!PWALTDIR()) { + /* + * Remove opie record from /etc/opiekeys + */ + + rmopie(pwd->pw_name); + + /* + * Remove crontabs + */ + snprintf(file, sizeof(file), "/var/cron/tabs/%s", pwd->pw_name); + if (access(file, F_OK) == 0) { + snprintf(file, sizeof(file), "crontab -u %s -r", pwd->pw_name); + system(file); + } + } + /* + * Save these for later, since contents of pwd may be + * invalidated by deletion + */ + snprintf(file, sizeof(file), "%s/%s", _PATH_MAILDIR, pwd->pw_name); + strlcpy(home, pwd->pw_dir, sizeof(home)); + gr = GETGRGID(pwd->pw_gid); + if (gr != NULL) + strlcpy(grname, gr->gr_name, LOGNAMESIZE); + else + grname[0] = '\0'; + + rc = delpwent(pwd); + if (rc == -1) + err(EX_IOERR, "user '%s' does not exist", pwd->pw_name); + else if (rc != 0) + err(EX_IOERR, "passwd update"); + + if (cnf->nispasswd && *cnf->nispasswd=='/') { + rc = delnispwent(cnf->nispasswd, name); + if (rc == -1) + warnx("WARNING: user '%s' does not exist in NIS passwd", pwd->pw_name); + else if (rc != 0) + warn("WARNING: NIS passwd update"); + /* non-fatal */ + } + + grp = GETGRNAM(name); + if (grp != NULL && + (grp->gr_mem == NULL || *grp->gr_mem == NULL) && + strcmp(name, grname) == 0) + delgrent(GETGRNAM(name)); + SETGRENT(); + while ((grp = GETGRENT()) != NULL) { + int i, j; + char group[MAXLOGNAME]; + if (grp->gr_mem == NULL) + continue; + + for (i = 0; grp->gr_mem[i] != NULL; i++) { + if (strcmp(grp->gr_mem[i], name) != 0) + continue; + + for (j = i; grp->gr_mem[j] != NULL; j++) + grp->gr_mem[j] = grp->gr_mem[j+1]; + strlcpy(group, grp->gr_name, MAXLOGNAME); + chggrent(group, grp); + } + } + ENDGRENT(); + + pw_log(cnf, mode, W_USER, "%s(%u) account removed", name, uid); + + if (!PWALTDIR()) { + /* + * Remove mail file + */ + remove(file); + + /* + * Remove at jobs + */ + if (getpwuid(uid) == NULL) + rmat(uid); + + /* + * Remove home directory and contents + */ + if (delete && *home == '/' && getpwuid(uid) == NULL && + stat(home, &st) != -1) { + rm_r(home, uid); + pw_log(cnf, mode, W_USER, "%s(%u) home '%s' %sremoved", + name, uid, home, + stat(home, &st) == -1 ? "" : "not completely "); + } + } + + return (EXIT_SUCCESS); +} static int -print_user(struct passwd * pwd, int pretty, int v7) +print_user(struct passwd * pwd) { - if (!pretty) { + if (!conf.pretty) { char *buf; - if (!v7) - pwd->pw_passwd = (pwd->pw_passwd == NULL) ? "" : "*"; - - buf = v7 ? pw_make_v7(pwd) : pw_make(pwd); + buf = conf.v7 ? pw_make_v7(pwd) : pw_make(pwd); printf("%s\n", buf); free(buf); } else { @@ -1217,11 +1215,11 @@ print_user(struct passwd * pwd, int pretty, int v7) return EXIT_SUCCESS; } -char * -pw_checkname(u_char *name, int gecos) +char * +pw_checkname(char *name, int gecos) { char showch[8]; - u_char const *badchars, *ch, *showtype; + const char *badchars, *ch, *showtype; int reject; ch = name; @@ -1272,7 +1270,8 @@ pw_checkname(u_char *name, int gecos) if (!gecos && (ch - name) > LOGNAMESIZE) errx(EX_DATAERR, "name too long `%s' (max is %d)", name, LOGNAMESIZE); - return (char *)name; + + return (name); } diff --git a/usr.sbin/pw/pwupd.c b/usr.sbin/pw/pwupd.c index 89d085634c3b..f9e1959f44a7 100644 --- a/usr.sbin/pw/pwupd.c +++ b/usr.sbin/pw/pwupd.c @@ -44,28 +44,12 @@ static const char rcsid[] = #include "pwupd.h" -static char pathpwd[] = _PATH_PWD; -static char * pwpath = pathpwd; - -int -setpwdir(const char * dir) -{ - if (dir == NULL) - return (-1); - else - pwpath = strdup(dir); - if (pwpath == NULL) - return (-1); - - return (0); -} - char * getpwpath(char const * file) { static char pathbuf[MAXPATHLEN]; - snprintf(pathbuf, sizeof pathbuf, "%s/%s", pwpath, file); + snprintf(pathbuf, sizeof pathbuf, "%s/%s", conf.etcpath, file); return (pathbuf); } @@ -80,9 +64,9 @@ pwdb_check(void) args[i++] = _PATH_PWD_MKDB; args[i++] = "-C"; - if (pwpath != pathpwd) { + if (strcmp(conf.etcpath, _PATH_PWD) != 0) { args[i++] = "-d"; - args[i++] = pwpath; + args[i++] = conf.etcpath; } args[i++] = getpwpath(_MASTERPASSWD); args[i] = NULL; @@ -117,7 +101,7 @@ pw_update(struct passwd * pwd, char const * user) if (user != NULL) old_pw = GETPWNAM(user); - if (pw_init(pwpath, NULL)) + if (pw_init(conf.etcpath, NULL)) err(1, "pw_init()"); if ((pfd = pw_lock()) == -1) { pw_fini(); diff --git a/usr.sbin/pw/pwupd.h b/usr.sbin/pw/pwupd.h index 1d135117bc56..8f46e7d5ca52 100644 --- a/usr.sbin/pw/pwupd.h +++ b/usr.sbin/pw/pwupd.h @@ -29,11 +29,13 @@ #ifndef _PWUPD_H_ #define _PWUPD_H_ +#include <sys/cdefs.h> +#include <sys/param.h> #include <sys/types.h> + #include <pwd.h> #include <grp.h> - -#include <sys/cdefs.h> +#include <stdbool.h> #if defined(__FreeBSD__) #define RET_SETGRENT int @@ -41,8 +43,7 @@ #define RET_SETGRENT void #endif -struct pwf -{ +struct pwf { int _altdir; void (*_setpwent)(void); void (*_endpwent)(void); @@ -56,8 +57,44 @@ struct pwf struct group * (*_getgrnam)(const char * nam); }; +struct userconf { + int default_password; /* Default password for new users? */ + int reuse_uids; /* Reuse uids? */ + int reuse_gids; /* Reuse gids? */ + char *nispasswd; /* Path to NIS version of the passwd file */ + char *dotdir; /* Where to obtain skeleton files */ + char *newmail; /* Mail to send to new accounts */ + char *logfile; /* Where to log changes */ + char *home; /* Where to create home directory */ + mode_t homemode; /* Home directory permissions */ + char *shelldir; /* Where shells are located */ + char **shells; /* List of shells */ + char *shell_default; /* Default shell */ + char *default_group; /* Default group number */ + char **groups; /* Default (additional) groups */ + char *default_class; /* Default user class */ + uid_t min_uid, max_uid; /* Allowed range of uids */ + gid_t min_gid, max_gid; /* Allowed range of gids */ + int expire_days; /* Days to expiry */ + int password_days; /* Days to password expiry */ + int numgroups; /* (internal) size of default_group array */ +}; + +struct pwconf { + char rootdir[MAXPATHLEN]; + char etcpath[MAXPATHLEN]; + char *newname; + char *config; + bool dryrun; + bool pretty; + bool v7; + bool checkduplicate; + struct userconf *userconf; +}; + extern struct pwf PWF; extern struct pwf VPWF; +extern struct pwconf conf; #define SETPWENT() PWF._setpwent() #define ENDPWENT() PWF._endpwent() @@ -71,6 +108,10 @@ extern struct pwf VPWF; #define GETGRGID(gid) PWF._getgrgid(gid) #define GETGRNAM(nam) PWF._getgrnam(nam) +#define PWF_REGULAR 0 +#define PWF_ALT 1 +#define PWF_ROOTDIR 2 + #define PWALTDIR() PWF._altdir #ifndef _PATH_PWD #define _PATH_PWD "/etc" @@ -87,14 +128,12 @@ int addpwent(struct passwd * pwd); int delpwent(struct passwd * pwd); int chgpwent(char const * login, struct passwd * pwd); -int setpwdir(const char * dir); char * getpwpath(char const * file); int addgrent(struct group * grp); int delgrent(struct group * grp); int chggrent(char const * name, struct group * grp); -int setgrdir(const char * dir); char * getgrpath(const char *file); void vsetpwent(void); diff --git a/usr.sbin/pw/tests/Makefile b/usr.sbin/pw/tests/Makefile index 37d9c71281ed..193b8ab58530 100644 --- a/usr.sbin/pw/tests/Makefile +++ b/usr.sbin/pw/tests/Makefile @@ -7,6 +7,7 @@ TESTSDIR= ${TESTSBASE}/usr.sbin/pw ATF_TESTS_SH= pw_etcdir \ pw_lock \ + pw_config \ pw_groupdel \ pw_groupmod \ pw_useradd \ @@ -18,7 +19,8 @@ ATF_TESTS_SH= pw_etcdir \ TEST_METADATA.${tp}+= required_user="root" .endfor -FILES= group helper_functions.shin master.passwd +FILES= group helper_functions.shin master.passwd pw.conf \ + pw-modified.conf FILESDIR= ${TESTSDIR} ATF_TESTS_SH+= pw_test diff --git a/usr.sbin/pw/tests/pw-modified.conf b/usr.sbin/pw/tests/pw-modified.conf new file mode 100644 index 000000000000..84f44e758872 --- /dev/null +++ b/usr.sbin/pw/tests/pw-modified.conf @@ -0,0 +1,62 @@ +# +# pw.conf - user/group configuration defaults +# + +# Password for new users? no=nologin yes=loginid none=blank random=random +defaultpasswd = "no" + +# Reuse gaps in uid sequence? (yes or no) +reuseuids = "no" + +# Reuse gaps in gid sequence? (yes or no) +reusegids = "no" + +# Path to the NIS passwd file (blank or 'no' for none) +nispasswd = + +# Obtain default dotfiles from this directory +skeleton = "/usr/share/skel" + +# Mail this file to new user (/etc/newuser.msg or no) +newmail = "no" + +# Log add/change/remove information in this file +logfile = "/var/log/userlog" + +# Root directory in which $HOME directory is created +home = "/home" + +# Mode for the new $HOME directory, will be modified by umask +homemode = 0777 + +# Colon separated list of directories containing valid shells +shellpath = "/bin" + +# Comma separated list of available shells (without paths) +shells = "sh","csh","tcsh" + +# Default shell (without path) +defaultshell = "sh" + +# Default group (leave blank for new group per user) +defaultgroup = "" + +# Extra groups for new users +extragroups = + +# Default login class for new users +defaultclass = "" + +# Range of valid default user ids +minuid = 2000 +maxuid = 5000 + +# Range of valid default group ids +mingid = 2100 +maxgid = 6000 + +# Days after which account expires (0=disabled) +expire_days = 0 + +# Days after which password expires (0=disabled) +password_days = 0 diff --git a/usr.sbin/pw/tests/pw.conf b/usr.sbin/pw/tests/pw.conf new file mode 100644 index 000000000000..4e493f683e7d --- /dev/null +++ b/usr.sbin/pw/tests/pw.conf @@ -0,0 +1,62 @@ +# +# pw.conf - user/group configuration defaults +# + +# Password for new users? no=nologin yes=loginid none=blank random=random +defaultpasswd = "no" + +# Reuse gaps in uid sequence? (yes or no) +reuseuids = "no" + +# Reuse gaps in gid sequence? (yes or no) +reusegids = "no" + +# Path to the NIS passwd file (blank or 'no' for none) +nispasswd = + +# Obtain default dotfiles from this directory +skeleton = "/usr/share/skel" + +# Mail this file to new user (/etc/newuser.msg or no) +newmail = "no" + +# Log add/change/remove information in this file +logfile = "/var/log/userlog" + +# Root directory in which $HOME directory is created +home = "/home" + +# Mode for the new $HOME directory, will be modified by umask +homemode = 0777 + +# Colon separated list of directories containing valid shells +shellpath = "/bin" + +# Comma separated list of available shells (without paths) +shells = "sh","csh","tcsh" + +# Default shell (without path) +defaultshell = "sh" + +# Default group (leave blank for new group per user) +defaultgroup = "" + +# Extra groups for new users +extragroups = + +# Default login class for new users +defaultclass = "" + +# Range of valid default user ids +minuid = 1000 +maxuid = 32000 + +# Range of valid default group ids +mingid = 1000 +maxgid = 32000 + +# Days after which account expires (0=disabled) +expire_days = 0 + +# Days after which password expires (0=disabled) +password_days = 0 diff --git a/usr.sbin/pw/tests/pw_config.sh b/usr.sbin/pw/tests/pw_config.sh new file mode 100755 index 000000000000..fb6489a0b31c --- /dev/null +++ b/usr.sbin/pw/tests/pw_config.sh @@ -0,0 +1,26 @@ +# $FreeBSD$ + +# Import helper functions +. $(atf_get_srcdir)/helper_functions.shin + +atf_test_case generate_config +generate_config_body() { + atf_check -s exit:0 \ + ${PW} useradd -D -C ${HOME}/foo.conf + atf_check -o file:$(atf_get_srcdir)/pw.conf \ + cat ${HOME}/foo.conf +} + +atf_test_case modify_config_uid_gid_boundaries +modify_config_uid_gid_boundaries_body() { + atf_check -s exit:0 \ + ${PW} useradd -D -C ${HOME}/foo.conf \ + -u 2000,5000 -i 2100,6000 + atf_check -o file:$(atf_get_srcdir)/pw-modified.conf \ + cat ${HOME}/foo.conf +} + +atf_init_test_cases() { + atf_add_test_case generate_config + atf_add_test_case modify_config_uid_gid_boundaries +} diff --git a/usr.sbin/pw/tests/pw_groupmod.sh b/usr.sbin/pw/tests/pw_groupmod.sh index ad7ad0a3b7cf..9ea8a6d6c9dd 100755 --- a/usr.sbin/pw/tests/pw_groupmod.sh +++ b/usr.sbin/pw/tests/pw_groupmod.sh @@ -71,10 +71,21 @@ do_not_duplicate_group_on_gid_change_body() { atf_check -o inline:"testgroup:*:12345:\n" -s exit:0 -x grep "^testgroup" ${HOME}/group } +atf_test_case groupmod_rename +groupmod_rename_body() { + populate_etc_skel + + atf_check -s exit:0 ${PW} groupadd foo + atf_check -s exit:0 ${PW} groupmod foo -l bar + atf_check -s exit:0 -o match:"^bar:.*" \ + grep "^bar:.*" ${HOME}/group +} + atf_init_test_cases() { atf_add_test_case groupmod_user atf_add_test_case groupmod_invalid_user atf_add_test_case groupmod_bug_193704 atf_add_test_case usermod_bug_185666 atf_add_test_case do_not_duplicate_group_on_gid_change + atf_add_test_case groupmod_rename } diff --git a/usr.sbin/pw/tests/pw_useradd.sh b/usr.sbin/pw/tests/pw_useradd.sh index 48612ed59aec..27a8624b60ee 100755 --- a/usr.sbin/pw/tests/pw_useradd.sh +++ b/usr.sbin/pw/tests/pw_useradd.sh @@ -169,12 +169,19 @@ user_add_password_expiration_date_relative_body() { atf_fail "Expiration time($TIME) was not within $EPOCH - $BUF seconds." } +atf_test_case user_add_name_too_long +user_add_name_too_long_body() { + populate_etc_skel + atf_check -e match:"too long" -s exit:64 \ + ${PW} useradd name_very_vert_very_very_very_long +} + atf_init_test_cases() { atf_add_test_case user_add atf_add_test_case user_add_noupdate atf_add_test_case user_add_comments atf_add_test_case user_add_comments_noupdate - atf_add_test_case user_add_comments_invalid + atf_add_test_case user_add_comments_invalid atf_add_test_case user_add_comments_invalid_noupdate atf_add_test_case user_add_homedir atf_add_test_case user_add_account_expiration_epoch @@ -185,4 +192,5 @@ atf_init_test_cases() { atf_add_test_case user_add_password_expiration_date_numeric atf_add_test_case user_add_password_expiration_date_month atf_add_test_case user_add_password_expiration_date_relative + atf_add_test_case user_add_name_too_long } diff --git a/usr.sbin/pw/tests/pw_usermod.sh b/usr.sbin/pw/tests/pw_usermod.sh index 88bd3163a621..dbc6481a202e 100755 --- a/usr.sbin/pw/tests/pw_usermod.sh +++ b/usr.sbin/pw/tests/pw_usermod.sh @@ -100,13 +100,34 @@ user_mod_name_noupdate_body() { grep "^foo:.*" $HOME/master.passwd } +atf_test_case user_mod_rename +user_mod_rename_body() { + populate_etc_skel + + atf_check -s exit:0 ${PW} useradd foo + atf_check -s exit:0 ${PW} usermod foo -l bar + atf_check -s exit:0 -o match:"^bar:.*" \ + grep "^bar:.*" ${HOME}/master.passwd +} + +atf_test_case user_mod_rename_too_long +user_mod_rename_too_long_body() { + populate_etc_skel + + atf_check -s exit:0 ${PW} useradd foo + atf_check -s exit:64 -e match:"too long" ${PW} usermod foo \ + -l name_very_very_very_very_very_long +} + atf_init_test_cases() { atf_add_test_case user_mod atf_add_test_case user_mod_noupdate atf_add_test_case user_mod_comments atf_add_test_case user_mod_comments_noupdate - atf_add_test_case user_mod_comments_invalid - atf_add_test_case user_mod_comments_invalid_noupdate - atf_add_test_case user_mod_name + atf_add_test_case user_mod_comments_invalid + atf_add_test_case user_mod_comments_invalid_noupdate + atf_add_test_case user_mod_rename atf_add_test_case user_mod_name_noupdate + atf_add_test_case user_mod_rename + atf_add_test_case user_mod_rename_too_long } diff --git a/usr.sbin/pwd_mkdb/pwd_mkdb.8 b/usr.sbin/pwd_mkdb/pwd_mkdb.8 index 209f06e57028..9af5ea916a92 100644 --- a/usr.sbin/pwd_mkdb/pwd_mkdb.8 +++ b/usr.sbin/pwd_mkdb/pwd_mkdb.8 @@ -36,7 +36,7 @@ .Nd "generate the password databases" .Sh SYNOPSIS .Nm -.Op Fl BCiLNp +.Op Fl BCilLNp .Op Fl d Ar directory .Op Fl s Ar cachesize .Op Fl u Ar username @@ -61,14 +61,10 @@ different from the historic Version 7 style format. .Pp The options are as follows: .Bl -tag -width flag -.It Fl B -Store data in big-endian format. .It Fl C Check if the password file is in the correct format. Do not change, add, or remove any files. -.It Fl L -Store data in little-endian format. .It Fl N Tell .Nm @@ -116,6 +112,34 @@ encrypted password and the insecure version has an asterisk (``*'') The databases are used by the C library password routines (see .Xr getpwent 3 ) . .Pp +By default, +the +.Nm +utility generates new, +machine independent format +.Pq v4 +entries only. +For compatibility with +.Fx 5.0 +and earlier releases, +the +.Fl l +option may be specified, +which enables generation of legacy format +.Pq v3 +entries. +The legacy format entries are endianness dependent. +.Pp +The following options may be specified and will affect the +generation of legacy entries. +.Pp +.Bl -tag -width flag +.It Fl B +Store data in big-endian format. +.It Fl L +Store data in little-endian format. +.El +.Pp The .Nm utility exits zero on success, non-zero on failure. diff --git a/usr.sbin/pwd_mkdb/pwd_mkdb.c b/usr.sbin/pwd_mkdb/pwd_mkdb.c index 0ba68a5e365c..69a2faefa8e7 100644 --- a/usr.sbin/pwd_mkdb/pwd_mkdb.c +++ b/usr.sbin/pwd_mkdb/pwd_mkdb.c @@ -112,15 +112,15 @@ main(int argc, char *argv[]) char sbuf2[MAXPATHLEN]; char *username; u_int method, methoduid; - int Cflag, dflag, iflag; + int Cflag, dflag, iflag, lflag; int nblock = 0; - iflag = dflag = Cflag = 0; + iflag = dflag = Cflag = lflag = 0; strcpy(prefix, _PATH_PWD); makeold = 0; username = NULL; oldfp = NULL; - while ((ch = getopt(argc, argv, "BCLNd:ips:u:v")) != -1) + while ((ch = getopt(argc, argv, "BCLlNd:ips:u:v")) != -1) switch(ch) { case 'B': /* big-endian output */ openinfo.lorder = BIG_ENDIAN; @@ -128,6 +128,9 @@ main(int argc, char *argv[]) case 'C': /* verify only */ Cflag = 1; break; + case 'l': /* generate legacy entries */ + lflag = 1; + break; case 'L': /* little-endian output */ openinfo.lorder = LITTLE_ENDIAN; break; @@ -465,94 +468,96 @@ main(int argc, char *argv[]) error("put"); } - /* Create insecure data. (legacy version) */ - p = buf; - COMPACT(pwd.pw_name); - COMPACT("*"); - LSCALAR(pwd.pw_uid); - LSCALAR(pwd.pw_gid); - LSCALAR(pwd.pw_change); - COMPACT(pwd.pw_class); - COMPACT(pwd.pw_gecos); - COMPACT(pwd.pw_dir); - COMPACT(pwd.pw_shell); - LSCALAR(pwd.pw_expire); - LSCALAR(pwd.pw_fields); - data.size = p - buf; - - /* Create secure data. (legacy version) */ - p = sbuf; - COMPACT(pwd.pw_name); - COMPACT(pwd.pw_passwd); - LSCALAR(pwd.pw_uid); - LSCALAR(pwd.pw_gid); - LSCALAR(pwd.pw_change); - COMPACT(pwd.pw_class); - COMPACT(pwd.pw_gecos); - COMPACT(pwd.pw_dir); - COMPACT(pwd.pw_shell); - LSCALAR(pwd.pw_expire); - LSCALAR(pwd.pw_fields); - sdata.size = p - sbuf; - - /* Store insecure by name. */ - tbuf[0] = LEGACY_VERSION(_PW_KEYBYNAME); - len = strlen(pwd.pw_name); - memmove(tbuf + 1, pwd.pw_name, len); - key.size = len + 1; - if ((dp->put)(dp, &key, &data, method) == -1) - error("put"); - - /* Store insecure by number. */ - tbuf[0] = LEGACY_VERSION(_PW_KEYBYNUM); - store = HTOL(cnt); - memmove(tbuf + 1, &store, sizeof(store)); - key.size = sizeof(store) + 1; - if ((dp->put)(dp, &key, &data, method) == -1) - error("put"); - - /* Store insecure by uid. */ - tbuf[0] = LEGACY_VERSION(_PW_KEYBYUID); - store = HTOL(pwd.pw_uid); - memmove(tbuf + 1, &store, sizeof(store)); - key.size = sizeof(store) + 1; - if ((dp->put)(dp, &key, &data, methoduid) == -1) - error("put"); + if (lflag) { + /* Create insecure data. (legacy version) */ + p = buf; + COMPACT(pwd.pw_name); + COMPACT("*"); + LSCALAR(pwd.pw_uid); + LSCALAR(pwd.pw_gid); + LSCALAR(pwd.pw_change); + COMPACT(pwd.pw_class); + COMPACT(pwd.pw_gecos); + COMPACT(pwd.pw_dir); + COMPACT(pwd.pw_shell); + LSCALAR(pwd.pw_expire); + LSCALAR(pwd.pw_fields); + data.size = p - buf; + + /* Create secure data. (legacy version) */ + p = sbuf; + COMPACT(pwd.pw_name); + COMPACT(pwd.pw_passwd); + LSCALAR(pwd.pw_uid); + LSCALAR(pwd.pw_gid); + LSCALAR(pwd.pw_change); + COMPACT(pwd.pw_class); + COMPACT(pwd.pw_gecos); + COMPACT(pwd.pw_dir); + COMPACT(pwd.pw_shell); + LSCALAR(pwd.pw_expire); + LSCALAR(pwd.pw_fields); + sdata.size = p - sbuf; + + /* Store insecure by name. */ + tbuf[0] = LEGACY_VERSION(_PW_KEYBYNAME); + len = strlen(pwd.pw_name); + memmove(tbuf + 1, pwd.pw_name, len); + key.size = len + 1; + if ((dp->put)(dp, &key, &data, method) == -1) + error("put"); - /* Store secure by name. */ - tbuf[0] = LEGACY_VERSION(_PW_KEYBYNAME); - len = strlen(pwd.pw_name); - memmove(tbuf + 1, pwd.pw_name, len); - key.size = len + 1; - if ((sdp->put)(sdp, &key, &sdata, method) == -1) - error("put"); + /* Store insecure by number. */ + tbuf[0] = LEGACY_VERSION(_PW_KEYBYNUM); + store = HTOL(cnt); + memmove(tbuf + 1, &store, sizeof(store)); + key.size = sizeof(store) + 1; + if ((dp->put)(dp, &key, &data, method) == -1) + error("put"); - /* Store secure by number. */ - tbuf[0] = LEGACY_VERSION(_PW_KEYBYNUM); - store = HTOL(cnt); - memmove(tbuf + 1, &store, sizeof(store)); - key.size = sizeof(store) + 1; - if ((sdp->put)(sdp, &key, &sdata, method) == -1) - error("put"); + /* Store insecure by uid. */ + tbuf[0] = LEGACY_VERSION(_PW_KEYBYUID); + store = HTOL(pwd.pw_uid); + memmove(tbuf + 1, &store, sizeof(store)); + key.size = sizeof(store) + 1; + if ((dp->put)(dp, &key, &data, methoduid) == -1) + error("put"); - /* Store secure by uid. */ - tbuf[0] = LEGACY_VERSION(_PW_KEYBYUID); - store = HTOL(pwd.pw_uid); - memmove(tbuf + 1, &store, sizeof(store)); - key.size = sizeof(store) + 1; - if ((sdp->put)(sdp, &key, &sdata, methoduid) == -1) - error("put"); + /* Store secure by name. */ + tbuf[0] = LEGACY_VERSION(_PW_KEYBYNAME); + len = strlen(pwd.pw_name); + memmove(tbuf + 1, pwd.pw_name, len); + key.size = len + 1; + if ((sdp->put)(sdp, &key, &sdata, method) == -1) + error("put"); - /* Store insecure and secure special plus and special minus */ - if (pwd.pw_name[0] == '+' || pwd.pw_name[0] == '-') { - tbuf[0] = LEGACY_VERSION(_PW_KEYYPBYNUM); - store = HTOL(ypcnt); + /* Store secure by number. */ + tbuf[0] = LEGACY_VERSION(_PW_KEYBYNUM); + store = HTOL(cnt); memmove(tbuf + 1, &store, sizeof(store)); key.size = sizeof(store) + 1; - if ((dp->put)(dp, &key, &data, method) == -1) - error("put"); if ((sdp->put)(sdp, &key, &sdata, method) == -1) error("put"); + + /* Store secure by uid. */ + tbuf[0] = LEGACY_VERSION(_PW_KEYBYUID); + store = HTOL(pwd.pw_uid); + memmove(tbuf + 1, &store, sizeof(store)); + key.size = sizeof(store) + 1; + if ((sdp->put)(sdp, &key, &sdata, methoduid) == -1) + error("put"); + + /* Store insecure and secure special plus and special minus */ + if (pwd.pw_name[0] == '+' || pwd.pw_name[0] == '-') { + tbuf[0] = LEGACY_VERSION(_PW_KEYYPBYNUM); + store = HTOL(ypcnt); + memmove(tbuf + 1, &store, sizeof(store)); + key.size = sizeof(store) + 1; + if ((dp->put)(dp, &key, &data, method) == -1) + error("put"); + if ((sdp->put)(sdp, &key, &sdata, method) == -1) + error("put"); + } } } /* Create original format password file entry */ @@ -583,12 +588,14 @@ main(int argc, char *argv[]) error("put"); if ((sdp->put)(sdp, &key, &data, method) == -1) error("put"); - tbuf[0] = LEGACY_VERSION(_PW_KEYYPENABLED); - key.size = 1; - if ((dp->put)(dp, &key, &data, method) == -1) - error("put"); - if ((sdp->put)(sdp, &key, &data, method) == -1) - error("put"); + if (lflag) { + tbuf[0] = LEGACY_VERSION(_PW_KEYYPENABLED); + key.size = 1; + if ((dp->put)(dp, &key, &data, method) == -1) + error("put"); + if ((sdp->put)(sdp, &key, &data, method) == -1) + error("put"); + } } if ((dp->close)(dp) == -1) |