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-rw-r--r--Makefile4
-rw-r--r--Makefile.inc11
-rwxr-xr-xcontrib/binutils/bfd/config.bfd2
-rw-r--r--contrib/gcc/config/rs6000/freebsdspe.h77
-rw-r--r--gnu/lib/libgcc/Makefile2
-rw-r--r--gnu/lib/libgomp/Makefile2
-rw-r--r--gnu/usr.bin/binutils/Makefile.inc04
-rw-r--r--gnu/usr.bin/cc/Makefile.tgt2
-rw-r--r--gnu/usr.bin/cc/cc_tools/Makefile.hdrs4
-rw-r--r--gnu/usr.bin/cc/include/Makefile3
-rw-r--r--gnu/usr.bin/gdb/Makefile.inc2
-rw-r--r--gnu/usr.bin/gdb/libgdb/Makefile2
-rw-r--r--lib/libarchive/Makefile2
-rw-r--r--lib/libc/powerpcspe/Makefile.inc7
-rw-r--r--lib/libc/powerpcspe/SYS.h70
-rw-r--r--lib/libc/powerpcspe/Symbol.map59
-rw-r--r--lib/libc/powerpcspe/_fpmath.h49
-rw-r--r--lib/libc/powerpcspe/arith.h16
-rw-r--r--lib/libc/powerpcspe/gd_qnan.h21
-rw-r--r--lib/libc/powerpcspe/gen/Makefile.inc11
-rw-r--r--lib/libc/powerpcspe/gen/_ctx_start.S46
-rw-r--r--lib/libc/powerpcspe/gen/_set_tp.c35
-rw-r--r--lib/libc/powerpcspe/gen/_setjmp.S117
-rw-r--r--lib/libc/powerpcspe/gen/eabi.S34
-rw-r--r--lib/libc/powerpcspe/gen/fabs.S38
-rw-r--r--lib/libc/powerpcspe/gen/flt_rounds.c57
-rw-r--r--lib/libc/powerpcspe/gen/fpgetmask.c49
-rw-r--r--lib/libc/powerpcspe/gen/fpgetround.c49
-rw-r--r--lib/libc/powerpcspe/gen/fpgetsticky.c55
-rw-r--r--lib/libc/powerpcspe/gen/fpsetmask.c53
-rw-r--r--lib/libc/powerpcspe/gen/fpsetround.c53
-rw-r--r--lib/libc/powerpcspe/gen/infinity.c17
-rw-r--r--lib/libc/powerpcspe/gen/makecontext.c120
-rw-r--r--lib/libc/powerpcspe/gen/setjmp.S138
-rw-r--r--lib/libc/powerpcspe/gen/signalcontext.c103
-rw-r--r--lib/libc/powerpcspe/gen/sigsetjmp.S150
-rw-r--r--lib/libc/powerpcspe/gen/syncicache.c103
-rw-r--r--lib/libc/powerpcspe/softfloat/milieu.h49
-rw-r--r--lib/libc/powerpcspe/softfloat/powerpc-gcc.h92
-rw-r--r--lib/libc/powerpcspe/softfloat/softfloat.h307
-rw-r--r--lib/libc/powerpcspe/sys/Makefile.inc8
-rw-r--r--lib/libc/powerpcspe/sys/brk.S76
-rw-r--r--lib/libc/powerpcspe/sys/cerror.S58
-rw-r--r--lib/libc/powerpcspe/sys/exect.S42
-rw-r--r--lib/libc/powerpcspe/sys/ptrace.S61
-rw-r--r--lib/libc/powerpcspe/sys/sbrk.S73
-rw-r--r--lib/libc/powerpcspe/sys/setlogin.S51
-rw-r--r--lib/msun/powerpc/fenv.h5
-rw-r--r--share/mk/bsd.cpu.mk6
-rw-r--r--share/mk/bsd.endian.mk1
-rw-r--r--share/mk/local.meta.sys.mk2
-rw-r--r--share/mk/sys.mk2
-rw-r--r--sys/boot/powerpc/Makefile5
-rw-r--r--sys/conf/Makefile.powerpc4
-rw-r--r--sys/conf/files.powerpc29
-rw-r--r--sys/conf/kern.mk5
-rw-r--r--sys/conf/ldscript.powerpcspe144
-rw-r--r--sys/conf/options.powerpc1
-rw-r--r--sys/modules/Makefile8
-rw-r--r--sys/powerpc/booke/booke_machdep.c5
-rw-r--r--sys/powerpc/booke/spe.c183
-rw-r--r--sys/powerpc/conf/MPC85XXSPE100
-rw-r--r--sys/powerpc/include/param.h4
-rw-r--r--sys/powerpc/include/spr.h1
-rw-r--r--sys/powerpc/include/trap.h1
-rw-r--r--sys/powerpc/powerpc/trap.c39
-rw-r--r--usr.sbin/Makefile.powerpc2
67 files changed, 2890 insertions, 31 deletions
diff --git a/Makefile b/Makefile
index 00dbc23bb79c..b5d51341135e 100644
--- a/Makefile
+++ b/Makefile
@@ -239,7 +239,7 @@ _MAKE+= MK_META_MODE=no
_TARGET_ARCH= ${TARGET:S/pc98/i386/:S/arm64/aarch64/}
.elif !defined(TARGET) && defined(TARGET_ARCH) && \
${TARGET_ARCH} != ${MACHINE_ARCH}
-_TARGET= ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/:C/riscv64/riscv/}
+_TARGET= ${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/aarch64/arm64/:C/powerpc64/powerpc/:C/powerpcspe/powerpc/:C/riscv64/riscv/}
.endif
.if defined(TARGET) && !defined(_TARGET)
_TARGET=${TARGET}
@@ -422,7 +422,7 @@ _UNIVERSE_TARGETS= ${TARGETS}
TARGET_ARCHES_arm?= arm armeb armv6
TARGET_ARCHES_arm64?= aarch64
TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32
-TARGET_ARCHES_powerpc?= powerpc powerpc64
+TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpcspe
TARGET_ARCHES_pc98?= i386
.for target in ${TARGETS}
TARGET_ARCHES_${target}?= ${target}
diff --git a/Makefile.inc1 b/Makefile.inc1
index a89a893a9eec..99918b3703e8 100644
--- a/Makefile.inc1
+++ b/Makefile.inc1
@@ -358,6 +358,7 @@ KNOWN_ARCHES?= aarch64/arm64 \
mipsn32/mips \
powerpc \
powerpc64/powerpc \
+ powerpcspe/powerpc \
riscv64/riscv \
sparc64
diff --git a/contrib/binutils/bfd/config.bfd b/contrib/binutils/bfd/config.bfd
index 6b108c0b8fdb..1365ac12f8a5 100755
--- a/contrib/binutils/bfd/config.bfd
+++ b/contrib/binutils/bfd/config.bfd
@@ -1103,7 +1103,7 @@ case "${targ}" in
want64=true
;;
#endif
- powerpc-*-*bsd* | powerpc-*-elf* | powerpc-*-sysv4* | powerpc-*-eabi* | \
+ powerpc-*-*bsd* | powerpcspe-*-*bsd* | powerpc-*-elf* | powerpc-*-sysv4* | powerpc-*-eabi* | \
powerpc-*-solaris2* | powerpc-*-linux-* | powerpc-*-rtems* | \
powerpc-*-chorus*)
targ_defvec=bfd_elf32_powerpc_vec
diff --git a/contrib/gcc/config/rs6000/freebsdspe.h b/contrib/gcc/config/rs6000/freebsdspe.h
new file mode 100644
index 000000000000..9c960298f6ef
--- /dev/null
+++ b/contrib/gcc/config/rs6000/freebsdspe.h
@@ -0,0 +1,77 @@
+/* Definitions of target machine for GNU compiler,
+ for PowerPC e500 machines running FreeBSD.
+ Based on linuxspe.h
+ Copyright (C) 2003, 2004 Free Software Foundation, Inc.
+ Contributed by Aldy Hernandez (aldy@quesejoda.com).
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it
+ under the terms of the GNU General Public License as published
+ by the Free Software Foundation; either version 2, or (at your
+ option) any later version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
+ License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING. If not, write to the
+ Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston,
+ MA 02110-1301, USA. */
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (PowerPC E500 FreeBSD)");
+
+/* Override rs6000.h and sysv4.h definition. */
+#undef TARGET_DEFAULT
+#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_STRICT_ALIGN)
+
+#undef TARGET_SPE_ABI
+#undef TARGET_SPE
+#undef TARGET_E500
+#undef TARGET_ISEL
+#undef TARGET_FPRS
+#undef TARGET_E500_SINGLE
+#undef TARGET_E500_DOUBLE
+
+#define TARGET_SPE_ABI rs6000_spe_abi
+#define TARGET_SPE rs6000_spe
+#define TARGET_E500 (rs6000_cpu == PROCESSOR_PPC8540)
+#define TARGET_ISEL rs6000_isel
+#define TARGET_FPRS (rs6000_float_gprs == 0)
+#define TARGET_E500_SINGLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 1)
+#define TARGET_E500_DOUBLE (TARGET_HARD_FLOAT && rs6000_float_gprs == 2)
+
+#undef SUBSUBTARGET_OVERRIDE_OPTIONS
+#define SUBSUBTARGET_OVERRIDE_OPTIONS \
+ if (rs6000_select[1].string == NULL) \
+ rs6000_cpu = PROCESSOR_PPC8540; \
+ if (!rs6000_explicit_options.abi) \
+ rs6000_spe_abi = 1; \
+ if (!rs6000_explicit_options.float_gprs) \
+ rs6000_float_gprs = 1; \
+ /* See note below. */ \
+ /*if (!rs6000_explicit_options.long_double)*/ \
+ /* rs6000_long_double_type_size = 128;*/ \
+ if (!rs6000_explicit_options.spe) \
+ rs6000_spe = 1; \
+ if (!rs6000_explicit_options.isel) \
+ rs6000_isel = 1; \
+ if (target_flags & MASK_64BIT) \
+ error ("-m64 not supported in this configuration")
+
+/* The e500 ABI says that either long doubles are 128 bits, or if
+ implemented in any other size, the compiler/linker should error out.
+ We have no emulation libraries for 128 bit long doubles, and I hate
+ the dozens of failures on the regression suite. So I'm breaking ABI
+ specifications, until I properly fix the emulation.
+
+ Enable these later.
+#undef CPP_LONGDOUBLE_DEFAULT_SPEC
+#define CPP_LONGDOUBLE_DEFAULT_SPEC "-D__LONG_DOUBLE_128__=1"
+*/
+
+#undef ASM_DEFAULT_SPEC
+#define ASM_DEFAULT_SPEC "-mppc -mspe -me500"
diff --git a/gnu/lib/libgcc/Makefile b/gnu/lib/libgcc/Makefile
index b101b4f2ea91..3186458f0866 100644
--- a/gnu/lib/libgcc/Makefile
+++ b/gnu/lib/libgcc/Makefile
@@ -173,7 +173,7 @@ LIB2FUNCS_EXTRA+= fixdfdi.c fixunssfsi.c
.endif
.endif
-.if ${TARGET_ARCH} == "powerpc"
+.if ${TARGET_ARCH} == "powerpc" || ${TARGET_ARCH} == "powerpcspe"
# from config/rs6000/t-ppccomm
LIB2FUNCS_EXTRA = tramp.asm
LIB2FUNCS_STATIC_EXTRA = eabi.asm
diff --git a/gnu/lib/libgomp/Makefile b/gnu/lib/libgomp/Makefile
index d428bd3f24c6..b4abf7958bcc 100644
--- a/gnu/lib/libgomp/Makefile
+++ b/gnu/lib/libgomp/Makefile
@@ -24,7 +24,7 @@ VERSION_MAP= ${SRCDIR}/libgomp.map
# Target-specific OpenMP configuration
.if ${MACHINE_CPUARCH} == arm || ${MACHINE_CPUARCH} == i386 || \
- ${MACHINE_ARCH} == powerpc || \
+ ${MACHINE_ARCH} == powerpc || ${MACHINE_ARCH} == powerpcspe || \
(${MACHINE_CPUARCH} == mips && ${MACHINE_ARCH:Mmips64*} == "")
OMP_LOCK_ALIGN = 4
OMP_LOCK_KIND= 4
diff --git a/gnu/usr.bin/binutils/Makefile.inc0 b/gnu/usr.bin/binutils/Makefile.inc0
index 28062d587393..597d451c8a10 100644
--- a/gnu/usr.bin/binutils/Makefile.inc0
+++ b/gnu/usr.bin/binutils/Makefile.inc0
@@ -7,7 +7,7 @@
VERSION= "2.17.50 [FreeBSD] 2007-07-03"
.if defined(TARGET_ARCH)
-TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc64/powerpc/}
+TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc(64|spe)/powerpc/}
.else
TARGET_CPUARCH=${MACHINE_CPUARCH}
.endif
@@ -30,7 +30,7 @@ RELSRC= ${RELTOP}/../../../contrib/binutils
SRCDIR= ${.CURDIR}/${RELSRC}
.if ${TARGET_CPUARCH} == "arm" || ${TARGET_CPUARCH} == "i386" || \
- ${TARGET_ARCH} == "powerpc" || \
+ ${TARGET_ARCH} == "powerpc" || ${TARGET_ARCH} == "powerpcspe" || \
(${TARGET_CPUARCH} == "mips" && ${TARGET_ARCH:Mmips64*} == "")
CFLAGS+= -DBFD_DEFAULT_TARGET_SIZE=32
.else
diff --git a/gnu/usr.bin/cc/Makefile.tgt b/gnu/usr.bin/cc/Makefile.tgt
index 63be261ff48d..0337ecf2bfcb 100644
--- a/gnu/usr.bin/cc/Makefile.tgt
+++ b/gnu/usr.bin/cc/Makefile.tgt
@@ -4,7 +4,7 @@
# MACHINE_CPUARCH, but there's no easy way to export make functions...
.if defined(TARGET_ARCH)
-TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc64/powerpc/}
+TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc(64spe)/powerpc/}
.else
TARGET_CPUARCH=${MACHINE_CPUARCH}
.endif
diff --git a/gnu/usr.bin/cc/cc_tools/Makefile.hdrs b/gnu/usr.bin/cc/cc_tools/Makefile.hdrs
index 959d7a73e985..f2576f7fdf0a 100644
--- a/gnu/usr.bin/cc/cc_tools/Makefile.hdrs
+++ b/gnu/usr.bin/cc/cc_tools/Makefile.hdrs
@@ -46,6 +46,10 @@ TARGET_INC+= ${GCC_CPU}/bpabi.h
TARGET_INC+= ${GCC_CPU}/biarch64.h
TARGET_INC+= ${GCC_CPU}/default64.h
.endif
+.if ${TARGET_ARCH} == "powerpcspe"
+TARGET_INC+= ${GCC_CPU}/freebsdspe.h
+TARGET_INC+= ${GCC_CPU}/e500-double.h
+.endif
TARGET_INC+= ${GCC_CPU}/freebsd.h
.if ${TARGET_CPUARCH} == "amd64"
TARGET_INC+= ${GCC_CPU}/freebsd64.h
diff --git a/gnu/usr.bin/cc/include/Makefile b/gnu/usr.bin/cc/include/Makefile
index 48060ecc7750..bcca48a7a722 100644
--- a/gnu/usr.bin/cc/include/Makefile
+++ b/gnu/usr.bin/cc/include/Makefile
@@ -14,7 +14,8 @@ INCS= ammintrin.h emmintrin.h mmintrin.h mm3dnow.h pmmintrin.h \
INCS+= wmmintrin.h __wmmintrin_aes.h __wmmintrin_pclmul.h
.elif ${TARGET_ARCH} == "arm"
INCS= mmintrin.h
-.elif ${TARGET_ARCH} == "powerpc" || ${TARGET_ARCH} == "powerpc64"
+.elif ${TARGET_ARCH} == "powerpc" || ${TARGET_ARCH} == "powerpc64" || \
+ ${TARGET_ARCH} == "powerpcspe"
INCS= ppc-asm.h altivec.h spe.h
.endif
diff --git a/gnu/usr.bin/gdb/Makefile.inc b/gnu/usr.bin/gdb/Makefile.inc
index 34dc90797d08..5bce6a91f01e 100644
--- a/gnu/usr.bin/gdb/Makefile.inc
+++ b/gnu/usr.bin/gdb/Makefile.inc
@@ -23,7 +23,7 @@ OBJ_RL= ${OBJ_ROOT}/../lib/libreadline/readline
# MACHINE_CPUARCH, but there's no easy way to export make functions...
.if defined(TARGET_ARCH)
-TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc64/powerpc/}
+TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc(64|spe)/powerpc/}
.else
TARGET_CPUARCH=${MACHINE_CPUARCH}
.endif
diff --git a/gnu/usr.bin/gdb/libgdb/Makefile b/gnu/usr.bin/gdb/libgdb/Makefile
index ed00525fad3f..71bb9ff494da 100644
--- a/gnu/usr.bin/gdb/libgdb/Makefile
+++ b/gnu/usr.bin/gdb/libgdb/Makefile
@@ -4,7 +4,7 @@
# MACHINE_CPUARCH, but there's no easy way to export make functions...
.if defined(TARGET_ARCH)
-TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc64/powerpc/}
+TARGET_CPUARCH=${TARGET_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb)?/arm/:C/powerpc(64|spe)/powerpc/}
.else
TARGET_CPUARCH=${MACHINE_CPUARCH}
.endif
diff --git a/lib/libarchive/Makefile b/lib/libarchive/Makefile
index ce390f8372eb..67aff5cecb26 100644
--- a/lib/libarchive/Makefile
+++ b/lib/libarchive/Makefile
@@ -30,7 +30,7 @@ SHARED_CFLAGS+= -DHAVE_ICONV=1 -DHAVE_ICONV_H=1 -DICONV_CONST=
.endif
.if ${MACHINE_ARCH:Marm*} != "" || ${MACHINE_ARCH:Mmips*} != "" || \
- ${MACHINE_ARCH:Msparc64*} != ""
+ ${MACHINE_ARCH:Msparc64*} != "" || ${MACHINE_ARCH:Mpowerpc*} != ""
NO_WCAST_ALIGN= yes
.if ${MACHINE_ARCH:M*64*} == ""
CFLAGS+= -DPPMD_32BIT
diff --git a/lib/libc/powerpcspe/Makefile.inc b/lib/libc/powerpcspe/Makefile.inc
new file mode 100644
index 000000000000..05d1e44f8b82
--- /dev/null
+++ b/lib/libc/powerpcspe/Makefile.inc
@@ -0,0 +1,7 @@
+# $FreeBSD$
+
+SRCS+= trivial-vdso_tc.c
+
+# Long double is 64-bits
+MDSRCS+=machdep_ldisd.c
+SYM_MAPS+=${LIBC_SRCTOP}/powerpcspe/Symbol.map
diff --git a/lib/libc/powerpcspe/SYS.h b/lib/libc/powerpcspe/SYS.h
new file mode 100644
index 000000000000..f0665c09c144
--- /dev/null
+++ b/lib/libc/powerpcspe/SYS.h
@@ -0,0 +1,70 @@
+/*-
+ * Copyright (c) 2002 Benno Rice. All rights reserved.
+ * Copyright (c) 2002 David E. O'Brien. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the author nor the names of any contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $NetBSD: SYS.h,v 1.8 2002/01/14 00:55:56 thorpej Exp $
+ * $FreeBSD$
+ */
+
+#include <sys/syscall.h>
+#include <machine/asm.h>
+
+#define _SYSCALL(name) \
+ .text; \
+ .align 2; \
+ li 0,(SYS_##name); \
+ sc
+
+#define SYSCALL(name) \
+ .text; \
+ .align 2; \
+2: b PIC_PLT(CNAME(HIDENAME(cerror))); \
+ENTRY(__sys_##name); \
+ WEAK_REFERENCE(__sys_##name, name); \
+ WEAK_REFERENCE(__sys_##name, _##name); \
+ _SYSCALL(name); \
+ bso 2b
+
+#define PSEUDO(name) \
+ .text; \
+ .align 2; \
+ENTRY(__sys_##name); \
+ WEAK_REFERENCE(__sys_##name, _##name); \
+ _SYSCALL(name); \
+ bnslr; \
+ b PIC_PLT(CNAME(HIDENAME(cerror)))
+
+#define RSYSCALL(name) \
+ .text; \
+ .align 2; \
+2: b PIC_PLT(CNAME(HIDENAME(cerror))); \
+ENTRY(__sys_##name); \
+ WEAK_REFERENCE(__sys_##name, name); \
+ WEAK_REFERENCE(__sys_##name, _##name); \
+ _SYSCALL(name); \
+ bnslr; \
+ b PIC_PLT(CNAME(HIDENAME(cerror)))
diff --git a/lib/libc/powerpcspe/Symbol.map b/lib/libc/powerpcspe/Symbol.map
new file mode 100644
index 000000000000..f695c81bb27f
--- /dev/null
+++ b/lib/libc/powerpcspe/Symbol.map
@@ -0,0 +1,59 @@
+/*
+ * $FreeBSD$
+ */
+
+/*
+ * This only needs to contain symbols that are not listed in
+ * symbol maps from other parts of libc (i.e., not found in
+ * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...).
+ */
+FBSD_1.0 {
+ /* PSEUDO syscalls */
+ _exit;
+
+ _mcount;
+ _setjmp;
+ _longjmp;
+ fabs;
+ __flt_rounds;
+ fpgetmask;
+ fpgetround;
+ fpgetsticky;
+ fpsetmask;
+ fpsetround;
+ __infinity;
+ __nan;
+ makecontext;
+ setjmp;
+ longjmp;
+ sigsetjmp;
+ siglongjmp;
+ htonl;
+ htons;
+ ntohl;
+ ntohs;
+ brk;
+ exect;
+ sbrk;
+ vfork;
+};
+
+FBSD_1.3 {
+ __eabi;
+};
+
+FBSDprivate_1.0 {
+ /* PSEUDO syscalls */
+ __sys_getlogin;
+ _getlogin;
+ __sys_exit;
+
+ _set_tp;
+ _fpgetsticky;
+ __makecontext;
+ __longjmp;
+ signalcontext;
+ __signalcontext;
+ __syncicache;
+ _end;
+};
diff --git a/lib/libc/powerpcspe/_fpmath.h b/lib/libc/powerpcspe/_fpmath.h
new file mode 100644
index 000000000000..6d80eb4bdf4e
--- /dev/null
+++ b/lib/libc/powerpcspe/_fpmath.h
@@ -0,0 +1,49 @@
+/*-
+ * Copyright (c) 2003 David Schultz <das@FreeBSD.ORG>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+union IEEEl2bits {
+ long double e;
+ struct {
+ unsigned int sign :1;
+ unsigned int exp :11;
+ unsigned int manh :20;
+ unsigned int manl :32;
+ } bits;
+};
+
+#define mask_nbit_l(u) ((void)0)
+#define LDBL_IMPLICIT_NBIT
+#define LDBL_NBIT 0
+
+#define LDBL_MANH_SIZE 20
+#define LDBL_MANL_SIZE 32
+
+#define LDBL_TO_ARRAY32(u, a) do { \
+ (a)[0] = (uint32_t)(u).bits.manl; \
+ (a)[1] = (uint32_t)(u).bits.manh; \
+} while(0)
diff --git a/lib/libc/powerpcspe/arith.h b/lib/libc/powerpcspe/arith.h
new file mode 100644
index 000000000000..8e2c9ec597b3
--- /dev/null
+++ b/lib/libc/powerpcspe/arith.h
@@ -0,0 +1,16 @@
+/*
+ * MD header for contrib/gdtoa
+ *
+ * $FreeBSD$
+ */
+
+/*
+ * NOTE: The definitions in this file must be correct or strtod(3) and
+ * floating point formats in printf(3) will break! The file can be
+ * generated by running contrib/gdtoa/arithchk.c on the target
+ * architecture. See contrib/gdtoa/gdtoaimp.h for details.
+ */
+
+#define IEEE_MC68k
+#define Arith_Kind_ASL 2
+#define Double_Align
diff --git a/lib/libc/powerpcspe/gd_qnan.h b/lib/libc/powerpcspe/gd_qnan.h
new file mode 100644
index 000000000000..d70d8c318c4c
--- /dev/null
+++ b/lib/libc/powerpcspe/gd_qnan.h
@@ -0,0 +1,21 @@
+/*
+ * MD header for contrib/gdtoa
+ *
+ * This file can be generated by compiling and running contrib/gdtoa/qnan.c
+ * on the target architecture after arith.h has been generated.
+ *
+ * $FreeBSD$
+ */
+
+#define f_QNAN 0x7fc00000
+#define d_QNAN0 0x7ff80000
+#define d_QNAN1 0x0
+#define ld_QNAN0 0x7ff80000
+#define ld_QNAN1 0x0
+#define ld_QNAN2 0x0
+#define ld_QNAN3 0x0
+#define ldus_QNAN0 0x7ff8
+#define ldus_QNAN1 0x0
+#define ldus_QNAN2 0x0
+#define ldus_QNAN3 0x0
+#define ldus_QNAN4 0x0
diff --git a/lib/libc/powerpcspe/gen/Makefile.inc b/lib/libc/powerpcspe/gen/Makefile.inc
new file mode 100644
index 000000000000..2a00ba332b94
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/Makefile.inc
@@ -0,0 +1,11 @@
+# $FreeBSD$
+
+SRCS += _ctx_start.S eabi.S fabs.S flt_rounds.c fpgetmask.c fpgetround.c \
+ fpgetsticky.c fpsetmask.c fpsetround.c \
+ infinity.c ldexp.c makecontext.c _setjmp.S \
+ setjmp.S sigsetjmp.S signalcontext.c syncicache.c \
+ _set_tp.c \
+ trivial-getcontextx.c
+
+
+
diff --git a/lib/libc/powerpcspe/gen/_ctx_start.S b/lib/libc/powerpcspe/gen/_ctx_start.S
new file mode 100644
index 000000000000..4b9fc1d53ae0
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/_ctx_start.S
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2004 Suleiman Souhlal
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+ #include <machine/asm.h>
+
+ __FBSDID("$FreeBSD$");
+
+ .globl CNAME(_ctx_done)
+ .globl CNAME(abort)
+
+ ENTRY(_ctx_start)
+ mtlr %r14
+ blrl /* branch to start function */
+ mr %r3,%r15 /* pass pointer to ucontext as argument */
+ bl PIC_PLT(CNAME(_ctx_done)) /* branch to ctxt completion func */
+ /*
+ * we should never return from the
+ * above branch.
+ */
+ bl PIC_PLT(CNAME(abort)) /* abort */
+ END(_cts_start)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/gen/_set_tp.c b/lib/libc/powerpcspe/gen/_set_tp.c
new file mode 100644
index 000000000000..eeb062f30217
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/_set_tp.c
@@ -0,0 +1,35 @@
+/*-
+ * Copyright (c) 2004 Doug Rabson
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+#include "libc_private.h"
+
+void
+_set_tp(void *tpval)
+{
+
+ __asm __volatile("mr 2,%0" :: "r"((char*)tpval + 0x7008));
+}
diff --git a/lib/libc/powerpcspe/gen/_setjmp.S b/lib/libc/powerpcspe/gen/_setjmp.S
new file mode 100644
index 000000000000..0dd28fa2deb4
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/_setjmp.S
@@ -0,0 +1,117 @@
+/*-
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: _setjmp.S,v 1.1 1997/03/29 20:55:53 thorpej Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * C library -- _setjmp, _longjmp
+ *
+ * _longjmp(a,v)
+ * will generate a "return(v?v:1)" from the last call to
+ * _setjmp(a)
+ * by restoring registers from the stack.
+ * The previous signal state is NOT restored.
+ *
+ * jmpbuf layout:
+ * +------------+
+ * | unused |
+ * +------------+
+ * | unused |
+ * | |
+ * | (4 words) |
+ * | |
+ * +------------+
+ * | saved regs |
+ * | ... |
+ */
+
+ENTRY(_setjmp)
+ mflr %r11
+ mfcr %r12
+ evstdd %r1,24+0*8(%r3)
+ evstdd %r2,24+1*8(%r3)
+ evstdd %r11,24+2*8(%r3)
+ evstdd %r12,24+3*8(%r3)
+ evstdd %r13,24+4*8(%r3)
+ evstdd %r14,24+5*8(%r3)
+ evstdd %r15,24+6*8(%r3)
+ evstdd %r16,24+7*8(%r3)
+ evstdd %r17,24+8*8(%r3)
+ evstdd %r18,24+9*8(%r3)
+ evstdd %r19,24+10*8(%r3)
+ evstdd %r20,24+11*8(%r3)
+ evstdd %r21,24+12*8(%r3)
+ evstdd %r22,24+13*8(%r3)
+ evstdd %r23,24+14*8(%r3)
+ evstdd %r24,24+15*8(%r3)
+ evstdd %r25,24+16*8(%r3)
+ evstdd %r26,24+17*8(%r3)
+ evstdd %r27,24+18*8(%r3)
+ evstdd %r28,24+19*8(%r3)
+ evstdd %r29,24+20*8(%r3)
+ evstdd %r30,24+21*8(%r3)
+ evstdd %r31,24+22*8(%r3)
+
+ li %r3,0
+ blr
+END(_setjmp)
+
+ENTRY(_longjmp)
+ evldd %r1,24+0*8(%r3)
+ evldd %r2,24+1*8(%r3)
+ evldd %r11,24+2*8(%r3)
+ evldd %r12,24+3*8(%r3)
+ evldd %r13,24+4*8(%r3)
+ evldd %r14,24+5*8(%r3)
+ evldd %r15,24+6*8(%r3)
+ evldd %r16,24+7*8(%r3)
+ evldd %r17,24+8*8(%r3)
+ evldd %r18,24+9*8(%r3)
+ evldd %r19,24+10*8(%r3)
+ evldd %r20,24+11*8(%r3)
+ evldd %r21,24+12*8(%r3)
+ evldd %r22,24+13*8(%r3)
+ evldd %r23,24+14*8(%r3)
+ evldd %r24,24+15*8(%r3)
+ evldd %r25,24+16*8(%r3)
+ evldd %r26,24+17*8(%r3)
+ evldd %r27,24+18*8(%r3)
+ evldd %r28,24+19*8(%r3)
+ evldd %r29,24+20*8(%r3)
+ evldd %r30,24+21*8(%r3)
+ evldd %r31,24+22*8(%r3)
+
+ mtlr %r11
+ mtcr %r12
+ or. %r3,%r4,%r4
+ bnelr
+ li %r3,1
+ blr
+END(_longjmp)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/gen/eabi.S b/lib/libc/powerpcspe/gen/eabi.S
new file mode 100644
index 000000000000..3296af88a4d1
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/eabi.S
@@ -0,0 +1,34 @@
+/*
+ * Copyright (c) 2011 Marcel Moolenaar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+ENTRY(__eabi)
+ blr
+END(__eabi)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/gen/fabs.S b/lib/libc/powerpcspe/gen/fabs.S
new file mode 100644
index 000000000000..da806f025394
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/fabs.S
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * double fabs(double)
+ */
+ENTRY(fabs)
+ efdabs %f1,%f1
+ blr
+END(fabs)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/gen/flt_rounds.c b/lib/libc/powerpcspe/gen/flt_rounds.c
new file mode 100644
index 000000000000..1334021fb7fa
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/flt_rounds.c
@@ -0,0 +1,57 @@
+/* $NetBSD: flt_rounds.c,v 1.4.10.3 2002/03/22 20:41:53 nathanw Exp $ */
+
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by Mark Brinicombe
+ * for the NetBSD Project.
+ * 4. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <machine/float.h>
+#include <machine/spr.h>
+
+#ifndef _SOFT_FLOAT
+static const int map[] = {
+ 1, /* round to nearest */
+ 0, /* round to zero */
+ 2, /* round to positive infinity */
+ 3 /* round to negative infinity */
+};
+
+int
+__flt_rounds()
+{
+ uint32_t fpscr;
+
+ __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR));
+ return map[(fpscr & 0x03)];
+}
+#endif
diff --git a/lib/libc/powerpcspe/gen/fpgetmask.c b/lib/libc/powerpcspe/gen/fpgetmask.c
new file mode 100644
index 000000000000..3103e05ba41d
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/fpgetmask.c
@@ -0,0 +1,49 @@
+/* $NetBSD: fpgetmask.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Dan Winship.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <machine/spr.h>
+#include <ieeefp.h>
+
+#ifndef _SOFT_FLOAT
+fp_except_t
+fpgetmask()
+{
+ uint32_t fpscr;
+
+ __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR));
+ return ((fp_except_t)((fpscr >> 3) & 0x1f));
+}
+#endif
diff --git a/lib/libc/powerpcspe/gen/fpgetround.c b/lib/libc/powerpcspe/gen/fpgetround.c
new file mode 100644
index 000000000000..7815559f7b5a
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/fpgetround.c
@@ -0,0 +1,49 @@
+/* $NetBSD: fpgetround.c,v 1.3 2002/01/13 21:45:47 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Dan Winship.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <machine/spr.h>
+#include <ieeefp.h>
+
+#ifndef _SOFT_FLOAT
+fp_rnd_t
+fpgetround()
+{
+ uint32_t fpscr;
+
+ __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR));
+ return ((fp_rnd_t)(fpscr & 0x3));
+}
+#endif
diff --git a/lib/libc/powerpcspe/gen/fpgetsticky.c b/lib/libc/powerpcspe/gen/fpgetsticky.c
new file mode 100644
index 000000000000..87962637bc3c
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/fpgetsticky.c
@@ -0,0 +1,55 @@
+/* $NetBSD: fpgetsticky.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Dan Winship.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#include <sys/cdefs.h>
+
+#include "namespace.h"
+
+#include <sys/types.h>
+#include <machine/spr.h>
+#include <ieeefp.h>
+
+#ifndef _SOFT_FLOAT
+#ifdef __weak_alias
+__weak_alias(fpgetsticky,_fpgetsticky)
+#endif
+
+fp_except_t
+fpgetsticky()
+{
+ uint32_t fpscr;
+
+ __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR));
+ return ((fp_except_t)((fpscr >> 25) & 0x1f));
+}
+#endif
diff --git a/lib/libc/powerpcspe/gen/fpsetmask.c b/lib/libc/powerpcspe/gen/fpsetmask.c
new file mode 100644
index 000000000000..24c0b3828b7f
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/fpsetmask.c
@@ -0,0 +1,53 @@
+/* $NetBSD: fpsetmask.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Dan Winship.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <machine/spr.h>
+#include <ieeefp.h>
+
+#ifndef _SOFT_FLOAT
+fp_except_t
+fpsetmask(fp_except_t mask)
+{
+ uint32_t fpscr;
+ fp_rnd_t old;
+
+ __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR));
+ old = (fp_rnd_t)((fpscr >> 3) & 0x1f);
+ fpscr = (fpscr & 0xffffff07) | (mask << 3);
+ __asm__ __volatile("mtspr %1,%0" :: "r"(fpscr), "K"(SPR_SPEFSCR));
+ return (old);
+}
+#endif
diff --git a/lib/libc/powerpcspe/gen/fpsetround.c b/lib/libc/powerpcspe/gen/fpsetround.c
new file mode 100644
index 000000000000..b5340a6d9ea2
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/fpsetround.c
@@ -0,0 +1,53 @@
+/* $NetBSD: fpsetround.c,v 1.3 2002/01/13 21:45:48 thorpej Exp $ */
+
+/*
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Dan Winship.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/types.h>
+#include <machine/spr.h>
+#include <ieeefp.h>
+
+#ifndef _SOFT_FLOAT
+fp_rnd_t
+fpsetround(fp_rnd_t rnd_dir)
+{
+ uint32_t fpscr;
+ fp_rnd_t old;
+
+ __asm__ __volatile("mfspr %0, %1" : "=r"(fpscr) : "K"(SPR_SPEFSCR) );
+ old = (fp_rnd_t)(fpscr & 0x3);
+ fpscr = (fpscr & 0xfffffffc) | rnd_dir;
+ __asm__ __volatile("mtspr %1, %0" :: "r"(fpscr), "K"(SPR_SPEFSCR));
+ return (old);
+}
+#endif
diff --git a/lib/libc/powerpcspe/gen/infinity.c b/lib/libc/powerpcspe/gen/infinity.c
new file mode 100644
index 000000000000..cf1695e68028
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/infinity.c
@@ -0,0 +1,17 @@
+#include <sys/cdefs.h>
+#if 0
+#if defined(LIBC_SCCS) && !defined(lint)
+__RCSID("$NetBSD: infinity.c,v 1.2 1998/11/14 19:31:02 christos Exp $");
+#endif /* LIBC_SCCS and not lint */
+#endif
+__FBSDID("$FreeBSD$");
+
+/* infinity.c */
+
+#include <math.h>
+
+/* bytes for +Infinity on powerpc */
+const union __infinity_un __infinity = { { 0x7f, 0xf0, 0, 0, 0, 0, 0, 0 } };
+
+/* bytes for NaN */
+const union __nan_un __nan = { { 0xff, 0xc0, 0, 0 } };
diff --git a/lib/libc/powerpcspe/gen/makecontext.c b/lib/libc/powerpcspe/gen/makecontext.c
new file mode 100644
index 000000000000..d66e82457a4e
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/makecontext.c
@@ -0,0 +1,120 @@
+/*
+ * Copyright (c) 2004 Suleiman Souhlal
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+
+#include <stdarg.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <ucontext.h>
+
+__weak_reference(__makecontext, makecontext);
+
+void _ctx_done(ucontext_t *ucp);
+void _ctx_start(void);
+
+void
+_ctx_done(ucontext_t *ucp)
+{
+ if (ucp->uc_link == NULL)
+ exit(0);
+ else {
+ /* invalidate context */
+ ucp->uc_mcontext.mc_len = 0;
+
+ setcontext((const ucontext_t *)ucp->uc_link);
+
+ abort(); /* should never return from above call */
+ }
+}
+
+void
+__makecontext(ucontext_t *ucp, void (*start)(void), int argc, ...)
+{
+ mcontext_t *mc;
+ char *sp;
+ va_list ap;
+ int i, regargs, stackargs;
+
+ /* Sanity checks */
+ if ((ucp == NULL) || (argc < 0) || (argc > NCARGS)
+ || (ucp->uc_stack.ss_sp == NULL)
+ || (ucp->uc_stack.ss_size < MINSIGSTKSZ)) {
+ /* invalidate context */
+ ucp->uc_mcontext.mc_len = 0;
+ return;
+ }
+
+ /*
+ * The stack must have space for the frame pointer, saved
+ * link register, overflow arguments, and be 16-byte
+ * aligned.
+ */
+ stackargs = (argc > 8) ? argc - 8 : 0;
+ sp = (char *) ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size
+ - sizeof(uint32_t)*(stackargs + 2);
+ sp = (char *)((uint32_t)sp & ~0x1f);
+
+ mc = &ucp->uc_mcontext;
+
+ /*
+ * Up to 8 register args. Assumes all args are 32-bit and
+ * integer only. Not sure how to cater for floating point,
+ * although 64-bit args will work if aligned correctly
+ * in the arg list.
+ */
+ regargs = (argc > 8) ? 8 : argc;
+ va_start(ap, argc);
+ for (i = 0; i < regargs; i++)
+ mc->mc_gpr[3 + i] = va_arg(ap, uint32_t);
+
+ /*
+ * Overflow args go onto the stack
+ */
+ if (argc > 8) {
+ uint32_t *argp;
+
+ /* Skip past frame pointer and saved LR */
+ argp = (uint32_t *)sp + 2;
+
+ for (i = 0; i < stackargs; i++)
+ *argp++ = va_arg(ap, uint32_t);
+ }
+ va_end(ap);
+
+ /*
+ * Use caller-saved regs 14/15 to hold params that _ctx_start
+ * will use to invoke the user-supplied func
+ */
+ mc->mc_srr0 = (uint32_t) _ctx_start;
+ mc->mc_gpr[1] = (uint32_t) sp; /* new stack pointer */
+ mc->mc_gpr[14] = (uint32_t) start; /* r14 <- start */
+ mc->mc_gpr[15] = (uint32_t) ucp; /* r15 <- ucp */
+}
diff --git a/lib/libc/powerpcspe/gen/setjmp.S b/lib/libc/powerpcspe/gen/setjmp.S
new file mode 100644
index 000000000000..3d70b5b4a419
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/setjmp.S
@@ -0,0 +1,138 @@
+/*-
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: setjmp.S,v 1.3 1998/10/03 12:30:38 tsubai Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/syscall.h>
+
+/*
+ * C library -- setjmp, longjmp
+ *
+ * longjmp(a,v)
+ * will generate a "return(v?v:1)" from the last call to
+ * setjmp(a)
+ * by restoring registers from the stack.
+ * The previous signal state is restored.
+ *
+ * jmpbuf layout:
+ * +------------+
+ * | unused |
+ * +------------+
+ * | sig state |
+ * | |
+ * | (4 words) |
+ * | |
+ * +------------+
+ * | saved regs |
+ * | ... |
+ */
+
+ENTRY(setjmp)
+ mr %r6,%r3
+ li %r3,1 /* SIG_BLOCK, but doesn't matter */
+ /* since set == NULL */
+ li %r4,0 /* set = NULL */
+ mr %r5,%r6 /* &oset */
+ addi %r5,%r5,4
+ li %r0, SYS_sigprocmask /*sigprocmask(SIG_BLOCK, NULL, &oset)*/
+ sc /*assume no error XXX */
+ mflr %r11 /* r11 <- link reg */
+ mfcr %r12 /* r12 <- condition reg */
+ mr %r10,%r1 /* r10 <- stackptr */
+ mr %r9,%r2 /* r9 <- global ptr */
+ evstdd %r9,24+0*8(%r6)
+ evstdd %r10,24+1*8(%r6)
+ evstdd %r11,24+2*8(%r6)
+ evstdd %r12,24+3*8(%r6)
+ evstdd %r13,24+4*8(%r6)
+ evstdd %r14,24+5*8(%r6)
+ evstdd %r15,24+6*8(%r6)
+ evstdd %r16,24+7*8(%r6)
+ evstdd %r17,24+8*8(%r6)
+ evstdd %r18,24+9*8(%r6)
+ evstdd %r19,24+10*8(%r6)
+ evstdd %r20,24+11*8(%r6)
+ evstdd %r21,24+12*8(%r6)
+ evstdd %r22,24+13*8(%r6)
+ evstdd %r23,24+14*8(%r6)
+ evstdd %r24,24+15*8(%r6)
+ evstdd %r25,24+16*8(%r6)
+ evstdd %r26,24+17*8(%r6)
+ evstdd %r27,24+18*8(%r6)
+ evstdd %r28,24+19*8(%r6)
+ evstdd %r29,24+20*8(%r6)
+ evstdd %r30,24+21*8(%r6)
+ evstdd %r31,24+22*8(%r6)
+
+ li %r3,0 /* return (0) */
+ blr
+END(setjmp)
+
+ WEAK_REFERENCE(CNAME(__longjmp), longjmp)
+ENTRY(__longjmp)
+ evldd %r9,24+0*8(%r6)
+ evldd %r10,24+1*8(%r6)
+ evldd %r11,24+2*8(%r6)
+ evldd %r12,24+3*8(%r6)
+ evldd %r13,24+4*8(%r6)
+ evldd %r14,24+5*8(%r6)
+ evldd %r15,24+6*8(%r6)
+ evldd %r16,24+7*8(%r6)
+ evldd %r17,24+8*8(%r6)
+ evldd %r18,24+9*8(%r6)
+ evldd %r19,24+10*8(%r6)
+ evldd %r20,24+11*8(%r6)
+ evldd %r21,24+12*8(%r6)
+ evldd %r22,24+13*8(%r6)
+ evldd %r23,24+14*8(%r6)
+ evldd %r24,24+15*8(%r6)
+ evldd %r25,24+16*8(%r6)
+ evldd %r26,24+17*8(%r6)
+ evldd %r27,24+18*8(%r6)
+ evldd %r28,24+19*8(%r6)
+ evldd %r29,24+20*8(%r6)
+ evldd %r30,24+21*8(%r6)
+ evldd %r31,24+22*8(%r6)
+
+ mr %r6,%r4 /* save val param */
+ mtlr %r11 /* r11 -> link reg */
+ mtcr %r12 /* r12 -> condition reg */
+ mr %r1,%r10 /* r10 -> stackptr */
+ mr %r4,%r3
+ li %r3,3 /* SIG_SETMASK */
+ addi %r4,%r4,4 /* &set */
+ li %r5,0 /* oset = NULL */
+ li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */
+ sc /* assume no error XXX */
+ or. %r3,%r6,%r6
+ bnelr
+ li %r3,1
+ blr
+END(__longjmp)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/gen/signalcontext.c b/lib/libc/powerpcspe/gen/signalcontext.c
new file mode 100644
index 000000000000..30e2be848b2b
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/signalcontext.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2004 Marcel Moolenaar, Peter Grehan
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/ucontext.h>
+#include <signal.h>
+#include <stdlib.h>
+#include <strings.h>
+
+typedef void (*handler_t)(uint32_t, uint32_t, uint32_t);
+
+/* Prototypes */
+static void ctx_wrapper(ucontext_t *ucp, handler_t func, uint32_t sig,
+ uint32_t sig_si, uint32_t sig_uc);
+
+__weak_reference(__signalcontext, signalcontext);
+
+int
+__signalcontext(ucontext_t *ucp, int sig, __sighandler_t *func)
+{
+ siginfo_t *sig_si;
+ ucontext_t *sig_uc;
+ uint32_t sp;
+
+ /* Bail out if we don't have a valid ucontext pointer. */
+ if (ucp == NULL)
+ abort();
+
+ /*
+ * Build a 16-byte-aligned signal frame
+ */
+ sp = (ucp->uc_mcontext.mc_gpr[1] - sizeof(ucontext_t)) & ~15UL;
+ sig_uc = (ucontext_t *)sp;
+ bcopy(ucp, sig_uc, sizeof(*sig_uc));
+ sp = (sp - sizeof(siginfo_t)) & ~15UL;
+ sig_si = (siginfo_t *)sp;
+ bzero(sig_si, sizeof(*sig_si));
+ sig_si->si_signo = sig;
+
+ /*
+ * Subtract 8 bytes from stack to allow for frameptr
+ */
+ sp -= 2*sizeof(uint32_t);
+ sp &= ~15UL;
+
+ /*
+ * Setup the ucontext of the signal handler.
+ */
+ bzero(&ucp->uc_mcontext, sizeof(ucp->uc_mcontext));
+ ucp->uc_link = sig_uc;
+ sigdelset(&ucp->uc_sigmask, sig);
+
+ ucp->uc_mcontext.mc_vers = _MC_VERSION;
+ ucp->uc_mcontext.mc_len = sizeof(struct __mcontext);
+ ucp->uc_mcontext.mc_srr0 = (uint32_t) ctx_wrapper;
+ ucp->uc_mcontext.mc_gpr[1] = (uint32_t) sp;
+ ucp->uc_mcontext.mc_gpr[3] = (uint32_t) func;
+ ucp->uc_mcontext.mc_gpr[4] = (uint32_t) sig;
+ ucp->uc_mcontext.mc_gpr[5] = (uint32_t) sig_si;
+ ucp->uc_mcontext.mc_gpr[6] = (uint32_t) sig_uc;
+
+ return (0);
+}
+
+static void
+ctx_wrapper(ucontext_t *ucp, handler_t func, uint32_t sig, uint32_t sig_si,
+ uint32_t sig_uc)
+{
+
+ (*func)(sig, sig_si, sig_uc);
+ if (ucp->uc_link == NULL)
+ exit(0);
+ setcontext((const ucontext_t *)ucp->uc_link);
+ /* should never get here */
+ abort();
+ /* NOTREACHED */
+}
diff --git a/lib/libc/powerpcspe/gen/sigsetjmp.S b/lib/libc/powerpcspe/gen/sigsetjmp.S
new file mode 100644
index 000000000000..31737e0d8558
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/sigsetjmp.S
@@ -0,0 +1,150 @@
+/*-
+ * Copyright (c) 2016 Justin Hibbits
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: sigsetjmp.S,v 1.4 1998/10/03 12:30:38 tsubai Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * C library -- sigsetjmp, siglongjmp
+ *
+ * siglongjmp(a,v)
+ * will generate a "return(v?v:1)" from the last call to
+ * sigsetjmp(a, savemask)
+ * by restoring registers from the stack.
+ * The previous signal state is restored if savemask is non-zero
+ *
+ * jmpbuf layout:
+ * +------------+
+ * | savemask |
+ * +------------+
+ * | sig state |
+ * | |
+ * | (4 words) |
+ * | |
+ * +------------+
+ * | saved regs |
+ * | ... |
+ */
+
+
+#include <sys/syscall.h>
+
+ENTRY(sigsetjmp)
+ mr %r6,%r3
+ stw %r4,0(%r3)
+ or. %r7,%r4,%r4
+ beq 1f
+ li %r3,1 /* SIG_BLOCK, but doesn't matter */
+ /* since set == NULL */
+ li %r4,0 /* set = NULL */
+ mr %r5,%r6 /* &oset */
+ addi %r5,%r5,4
+ li %r0, SYS_sigprocmask /* sigprocmask(SIG_BLOCK, NULL, &oset)*/
+ sc /* assume no error XXX */
+1:
+ mflr %r11
+ mfcr %r12
+ mr %r10,%r1
+ mr %r9,%r2
+
+ /* FPRs */
+ evstdd %r9,24+0*8(%r6)
+ evstdd %r10,24+1*8(%r6)
+ evstdd %r11,24+2*8(%r6)
+ evstdd %r12,24+3*8(%r6)
+ evstdd %r13,24+4*8(%r6)
+ evstdd %r14,24+5*8(%r6)
+ evstdd %r15,24+6*8(%r6)
+ evstdd %r16,24+7*8(%r6)
+ evstdd %r17,24+8*8(%r6)
+ evstdd %r18,24+9*8(%r6)
+ evstdd %r19,24+10*8(%r6)
+ evstdd %r20,24+11*8(%r6)
+ evstdd %r21,24+12*8(%r6)
+ evstdd %r22,24+13*8(%r6)
+ evstdd %r23,24+14*8(%r6)
+ evstdd %r24,24+15*8(%r6)
+ evstdd %r25,24+16*8(%r6)
+ evstdd %r26,24+17*8(%r6)
+ evstdd %r27,24+18*8(%r6)
+ evstdd %r28,24+19*8(%r6)
+ evstdd %r29,24+20*8(%r6)
+ evstdd %r30,24+21*8(%r6)
+ evstdd %r31,24+22*8(%r6)
+
+ li %r3,0
+ blr
+END(sigsetjmp)
+
+ENTRY(siglongjmp)
+
+ /* FPRs */
+ evldd %r9,24+0*8(%r6)
+ evldd %r10,24+1*8(%r6)
+ evldd %r11,24+2*8(%r6)
+ evldd %r12,24+3*8(%r6)
+ evldd %r13,24+4*8(%r6)
+ evldd %r14,24+5*8(%r6)
+ evldd %r15,24+6*8(%r6)
+ evldd %r16,24+7*8(%r6)
+ evldd %r17,24+8*8(%r6)
+ evldd %r18,24+9*8(%r6)
+ evldd %r19,24+10*8(%r6)
+ evldd %r20,24+11*8(%r6)
+ evldd %r21,24+12*8(%r6)
+ evldd %r22,24+13*8(%r6)
+ evldd %r23,24+14*8(%r6)
+ evldd %r24,24+15*8(%r6)
+ evldd %r25,24+16*8(%r6)
+ evldd %r26,24+17*8(%r6)
+ evldd %r27,24+18*8(%r6)
+ evldd %r28,24+19*8(%r6)
+ evldd %r29,24+20*8(%r6)
+ evldd %r30,24+21*8(%r6)
+ evldd %r31,24+22*8(%r6)
+
+ lwz %r7,0(%r3)
+ mr %r6,%r4
+ mtlr %r11
+ mtcr %r12
+ mr %r1,%r10
+ or. %r7,%r7,%r7
+ beq 1f
+ mr %r4,%r3
+ li %r3,3 /* SIG_SETMASK */
+ addi %r4,%r4,4 /* &set */
+ li %r5,0 /* oset = NULL */
+ li %r0,SYS_sigprocmask /* sigprocmask(SIG_SET, &set, NULL) */
+ sc /* assume no error XXX */
+1:
+ or. %r3,%r6,%r6
+ bnelr
+ li %r3,1
+ blr
+END(siglongjmp)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/gen/syncicache.c b/lib/libc/powerpcspe/gen/syncicache.c
new file mode 100644
index 000000000000..aa025cca8bc6
--- /dev/null
+++ b/lib/libc/powerpcspe/gen/syncicache.c
@@ -0,0 +1,103 @@
+/*-
+ * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
+ * Copyright (C) 1995-1997, 1999 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: syncicache.c,v 1.2 1999/05/05 12:36:40 tsubai Exp $
+ */
+
+#ifndef lint
+static const char rcsid[] =
+ "$FreeBSD$";
+#endif /* not lint */
+
+#include <sys/param.h>
+#if defined(_KERNEL) || defined(_STANDALONE)
+#include <sys/time.h>
+#include <sys/proc.h>
+#include <vm/vm.h>
+#endif
+#include <sys/sysctl.h>
+
+#include <machine/cpu.h>
+#include <machine/md_var.h>
+
+#ifdef _STANDALONE
+int cacheline_size = 32;
+#endif
+
+#if !defined(_KERNEL) && !defined(_STANDALONE)
+#include <stdlib.h>
+
+int cacheline_size = 0;
+
+static void getcachelinesize(void);
+
+static void
+getcachelinesize()
+{
+ static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
+ int clen;
+
+ clen = sizeof(cacheline_size);
+
+ if (sysctl(cachemib, nitems(cachemib), &cacheline_size, &clen,
+ NULL, 0) < 0 || !cacheline_size) {
+ abort();
+ }
+}
+#endif
+
+void
+__syncicache(void *from, int len)
+{
+ int l, off;
+ char *p;
+
+#if !defined(_KERNEL) && !defined(_STANDALONE)
+ if (!cacheline_size)
+ getcachelinesize();
+#endif
+
+ off = (u_int)from & (cacheline_size - 1);
+ l = len += off;
+ p = (char *)from - off;
+
+ do {
+ __asm __volatile ("dcbst 0,%0" :: "r"(p));
+ p += cacheline_size;
+ } while ((l -= cacheline_size) > 0);
+ __asm __volatile ("sync");
+ p = (char *)from - off;
+ do {
+ __asm __volatile ("icbi 0,%0" :: "r"(p));
+ p += cacheline_size;
+ } while ((len -= cacheline_size) > 0);
+ __asm __volatile ("sync; isync");
+}
+
diff --git a/lib/libc/powerpcspe/softfloat/milieu.h b/lib/libc/powerpcspe/softfloat/milieu.h
new file mode 100644
index 000000000000..e2e43b150073
--- /dev/null
+++ b/lib/libc/powerpcspe/softfloat/milieu.h
@@ -0,0 +1,49 @@
+/* $NetBSD: milieu.h,v 1.1 2000/12/29 20:13:54 bjh21 Exp $ */
+/* $FreeBSD$ */
+
+/*
+===============================================================================
+
+This C header file is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2a.
+
+Written by John R. Hauser. This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704. Funding was partially provided by the
+National Science Foundation under grant MIP-9311980. The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
+TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) they include prominent notice that the work is derivative, and (2) they
+include prominent notice akin to these four paragraphs for those parts of
+this code that are retained.
+
+===============================================================================
+*/
+
+/*
+-------------------------------------------------------------------------------
+Include common integer types and flags.
+-------------------------------------------------------------------------------
+*/
+#include "powerpc-gcc.h"
+
+/*
+-------------------------------------------------------------------------------
+Symbolic Boolean literals.
+-------------------------------------------------------------------------------
+*/
+enum {
+ FALSE = 0,
+ TRUE = 1
+};
diff --git a/lib/libc/powerpcspe/softfloat/powerpc-gcc.h b/lib/libc/powerpcspe/softfloat/powerpc-gcc.h
new file mode 100644
index 000000000000..e2f8680dd74e
--- /dev/null
+++ b/lib/libc/powerpcspe/softfloat/powerpc-gcc.h
@@ -0,0 +1,92 @@
+/* $NetBSD: arm-gcc.h,v 1.2 2001/02/21 18:09:25 bjh21 Exp $ */
+/* $FreeBSD$ */
+
+/*
+-------------------------------------------------------------------------------
+One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
+-------------------------------------------------------------------------------
+*/
+#define BIGENDIAN
+
+/*
+-------------------------------------------------------------------------------
+The macro `BITS64' can be defined to indicate that 64-bit integer types are
+supported by the compiler.
+-------------------------------------------------------------------------------
+*/
+#define BITS64
+
+/*
+-------------------------------------------------------------------------------
+Each of the following `typedef's defines the most convenient type that holds
+integers of at least as many bits as specified. For example, `uint8' should
+be the most convenient type that can hold unsigned integers of as many as
+8 bits. The `flag' type must be able to hold either a 0 or 1. For most
+implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
+to the same as `int'.
+-------------------------------------------------------------------------------
+*/
+typedef int flag;
+typedef unsigned int uint8;
+typedef int int8;
+typedef unsigned int uint16;
+typedef int int16;
+typedef unsigned int uint32;
+typedef signed int int32;
+#ifdef BITS64
+typedef unsigned long long int uint64;
+typedef signed long long int int64;
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Each of the following `typedef's defines a type that holds integers
+of _exactly_ the number of bits specified. For instance, for most
+implementation of C, `bits16' and `sbits16' should be `typedef'ed to
+`unsigned short int' and `signed short int' (or `short int'), respectively.
+-------------------------------------------------------------------------------
+*/
+typedef unsigned char bits8;
+typedef signed char sbits8;
+typedef unsigned short int bits16;
+typedef signed short int sbits16;
+typedef unsigned int bits32;
+typedef signed int sbits32;
+#ifdef BITS64
+typedef unsigned long long int bits64;
+typedef signed long long int sbits64;
+#endif
+
+#ifdef BITS64
+/*
+-------------------------------------------------------------------------------
+The `LIT64' macro takes as its argument a textual integer literal and
+if necessary ``marks'' the literal as having a 64-bit integer type.
+For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
+appended with the letters `LL' standing for `long long', which is `gcc's
+name for the 64-bit integer type. Some compilers may allow `LIT64' to be
+defined as the identity macro: `#define LIT64( a ) a'.
+-------------------------------------------------------------------------------
+*/
+#define LIT64( a ) a##LL
+#endif
+
+/*
+-------------------------------------------------------------------------------
+The macro `INLINE' can be used before functions that should be inlined. If
+a compiler does not support explicit inlining, this macro should be defined
+to be `static'.
+-------------------------------------------------------------------------------
+*/
+#define INLINE static __inline
+
+/*
+-------------------------------------------------------------------------------
+The ARM FPA is odd in that it stores doubles high-order word first, no matter
+what the endianness of the CPU. VFP is sane.
+-------------------------------------------------------------------------------
+*/
+#if defined(SOFTFLOAT_FOR_GCC)
+#define FLOAT64_DEMANGLE(a) (a)
+#define FLOAT64_MANGLE(a) (a)
+#endif
diff --git a/lib/libc/powerpcspe/softfloat/softfloat.h b/lib/libc/powerpcspe/softfloat/softfloat.h
new file mode 100644
index 000000000000..6b9c9b06956d
--- /dev/null
+++ b/lib/libc/powerpcspe/softfloat/softfloat.h
@@ -0,0 +1,307 @@
+/* $NetBSD: softfloat.h,v 1.6 2002/05/12 13:12:46 bjh21 Exp $ */
+/* $FreeBSD$ */
+
+/* This is a derivative work. */
+
+/*
+===============================================================================
+
+This C header file is part of the SoftFloat IEC/IEEE Floating-point
+Arithmetic Package, Release 2a.
+
+Written by John R. Hauser. This work was made possible in part by the
+International Computer Science Institute, located at Suite 600, 1947 Center
+Street, Berkeley, California 94704. Funding was partially provided by the
+National Science Foundation under grant MIP-9311980. The original version
+of this code was written as part of a project to build a fixed-point vector
+processor in collaboration with the University of California at Berkeley,
+overseen by Profs. Nelson Morgan and John Wawrzynek. More information
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
+arithmetic/SoftFloat.html'.
+
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
+TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
+
+Derivative works are acceptable, even for commercial purposes, so long as
+(1) they include prominent notice that the work is derivative, and (2) they
+include prominent notice akin to these four paragraphs for those parts of
+this code that are retained.
+
+===============================================================================
+*/
+
+/*
+-------------------------------------------------------------------------------
+The macro `FLOATX80' must be defined to enable the extended double-precision
+floating-point format `floatx80'. If this macro is not defined, the
+`floatx80' type will not be defined, and none of the functions that either
+input or output the `floatx80' type will be defined. The same applies to
+the `FLOAT128' macro and the quadruple-precision format `float128'.
+-------------------------------------------------------------------------------
+*/
+/* #define FLOATX80 */
+/* #define FLOAT128 */
+
+#include <machine/ieeefp.h>
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point types.
+-------------------------------------------------------------------------------
+*/
+typedef unsigned int float32;
+typedef unsigned long long float64;
+#ifdef FLOATX80
+typedef struct {
+ unsigned short high;
+ unsigned long long low;
+} floatx80;
+#endif
+#ifdef FLOAT128
+typedef struct {
+ unsigned long long high, low;
+} float128;
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point underflow tininess-detection mode.
+-------------------------------------------------------------------------------
+*/
+#ifndef SOFTFLOAT_FOR_GCC
+extern int8 float_detect_tininess;
+#endif
+enum {
+ float_tininess_after_rounding = 0,
+ float_tininess_before_rounding = 1
+};
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point rounding mode.
+-------------------------------------------------------------------------------
+*/
+extern fp_rnd_t float_rounding_mode;
+enum {
+ float_round_nearest_even = FP_RN,
+ float_round_to_zero = FP_RZ,
+ float_round_down = FP_RM,
+ float_round_up = FP_RP
+};
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE floating-point exception flags.
+-------------------------------------------------------------------------------
+*/
+typedef fp_except_t fp_except;
+
+extern fp_except float_exception_flags;
+extern fp_except float_exception_mask;
+enum {
+ float_flag_inexact = FP_X_IMP,
+ float_flag_underflow = FP_X_UFL,
+ float_flag_overflow = FP_X_OFL,
+ float_flag_divbyzero = FP_X_DZ,
+ float_flag_invalid = FP_X_INV
+};
+
+/*
+-------------------------------------------------------------------------------
+Routine to raise any or all of the software IEC/IEEE floating-point
+exception flags.
+-------------------------------------------------------------------------------
+*/
+void float_raise( fp_except );
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE integer-to-floating-point conversion routines.
+-------------------------------------------------------------------------------
+*/
+float32 int32_to_float32( int );
+float64 int32_to_float64( int );
+#ifdef FLOATX80
+floatx80 int32_to_floatx80( int );
+#endif
+#ifdef FLOAT128
+float128 int32_to_float128( int );
+#endif
+float32 int64_to_float32( long long );
+float64 int64_to_float64( long long );
+#ifdef FLOATX80
+floatx80 int64_to_floatx80( long long );
+#endif
+#ifdef FLOAT128
+float128 int64_to_float128( long long );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE single-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int float32_to_int32( float32 );
+int float32_to_int32_round_to_zero( float32 );
+unsigned int float32_to_uint32_round_to_zero( float32 );
+long long float32_to_int64( float32 );
+long long float32_to_int64_round_to_zero( float32 );
+float64 float32_to_float64( float32 );
+#ifdef FLOATX80
+floatx80 float32_to_floatx80( float32 );
+#endif
+#ifdef FLOAT128
+float128 float32_to_float128( float32 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE single-precision operations.
+-------------------------------------------------------------------------------
+*/
+float32 float32_round_to_int( float32 );
+float32 float32_add( float32, float32 );
+float32 float32_sub( float32, float32 );
+float32 float32_mul( float32, float32 );
+float32 float32_div( float32, float32 );
+float32 float32_rem( float32, float32 );
+float32 float32_sqrt( float32 );
+int float32_eq( float32, float32 );
+int float32_le( float32, float32 );
+int float32_lt( float32, float32 );
+int float32_eq_signaling( float32, float32 );
+int float32_le_quiet( float32, float32 );
+int float32_lt_quiet( float32, float32 );
+#ifndef SOFTFLOAT_FOR_GCC
+int float32_is_signaling_nan( float32 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE double-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int float64_to_int32( float64 );
+int float64_to_int32_round_to_zero( float64 );
+unsigned int float64_to_uint32_round_to_zero( float64 );
+long long float64_to_int64( float64 );
+long long float64_to_int64_round_to_zero( float64 );
+float32 float64_to_float32( float64 );
+#ifdef FLOATX80
+floatx80 float64_to_floatx80( float64 );
+#endif
+#ifdef FLOAT128
+float128 float64_to_float128( float64 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE double-precision operations.
+-------------------------------------------------------------------------------
+*/
+float64 float64_round_to_int( float64 );
+float64 float64_add( float64, float64 );
+float64 float64_sub( float64, float64 );
+float64 float64_mul( float64, float64 );
+float64 float64_div( float64, float64 );
+float64 float64_rem( float64, float64 );
+float64 float64_sqrt( float64 );
+int float64_eq( float64, float64 );
+int float64_le( float64, float64 );
+int float64_lt( float64, float64 );
+int float64_eq_signaling( float64, float64 );
+int float64_le_quiet( float64, float64 );
+int float64_lt_quiet( float64, float64 );
+#ifndef SOFTFLOAT_FOR_GCC
+int float64_is_signaling_nan( float64 );
+#endif
+
+#ifdef FLOATX80
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE extended double-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int floatx80_to_int32( floatx80 );
+int floatx80_to_int32_round_to_zero( floatx80 );
+long long floatx80_to_int64( floatx80 );
+long long floatx80_to_int64_round_to_zero( floatx80 );
+float32 floatx80_to_float32( floatx80 );
+float64 floatx80_to_float64( floatx80 );
+#ifdef FLOAT128
+float128 floatx80_to_float128( floatx80 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE extended double-precision rounding precision. Valid
+values are 32, 64, and 80.
+-------------------------------------------------------------------------------
+*/
+extern int floatx80_rounding_precision;
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE extended double-precision operations.
+-------------------------------------------------------------------------------
+*/
+floatx80 floatx80_round_to_int( floatx80 );
+floatx80 floatx80_add( floatx80, floatx80 );
+floatx80 floatx80_sub( floatx80, floatx80 );
+floatx80 floatx80_mul( floatx80, floatx80 );
+floatx80 floatx80_div( floatx80, floatx80 );
+floatx80 floatx80_rem( floatx80, floatx80 );
+floatx80 floatx80_sqrt( floatx80 );
+int floatx80_eq( floatx80, floatx80 );
+int floatx80_le( floatx80, floatx80 );
+int floatx80_lt( floatx80, floatx80 );
+int floatx80_eq_signaling( floatx80, floatx80 );
+int floatx80_le_quiet( floatx80, floatx80 );
+int floatx80_lt_quiet( floatx80, floatx80 );
+int floatx80_is_signaling_nan( floatx80 );
+
+#endif
+
+#ifdef FLOAT128
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE quadruple-precision conversion routines.
+-------------------------------------------------------------------------------
+*/
+int float128_to_int32( float128 );
+int float128_to_int32_round_to_zero( float128 );
+long long float128_to_int64( float128 );
+long long float128_to_int64_round_to_zero( float128 );
+float32 float128_to_float32( float128 );
+float64 float128_to_float64( float128 );
+#ifdef FLOATX80
+floatx80 float128_to_floatx80( float128 );
+#endif
+
+/*
+-------------------------------------------------------------------------------
+Software IEC/IEEE quadruple-precision operations.
+-------------------------------------------------------------------------------
+*/
+float128 float128_round_to_int( float128 );
+float128 float128_add( float128, float128 );
+float128 float128_sub( float128, float128 );
+float128 float128_mul( float128, float128 );
+float128 float128_div( float128, float128 );
+float128 float128_rem( float128, float128 );
+float128 float128_sqrt( float128 );
+int float128_eq( float128, float128 );
+int float128_le( float128, float128 );
+int float128_lt( float128, float128 );
+int float128_eq_signaling( float128, float128 );
+int float128_le_quiet( float128, float128 );
+int float128_lt_quiet( float128, float128 );
+int float128_is_signaling_nan( float128 );
+
+#endif
+
diff --git a/lib/libc/powerpcspe/sys/Makefile.inc b/lib/libc/powerpcspe/sys/Makefile.inc
new file mode 100644
index 000000000000..4948f6754c9f
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/Makefile.inc
@@ -0,0 +1,8 @@
+# $FreeBSD$
+
+MDASM+= brk.S cerror.S exect.S ptrace.S sbrk.S setlogin.S
+
+# Don't generate default code for these syscalls:
+NOASM= break.o exit.o getlogin.o openbsd_poll.o sstk.o yield.o
+
+PSEUDO= _getlogin.o _exit.o
diff --git a/lib/libc/powerpcspe/sys/brk.S b/lib/libc/powerpcspe/sys/brk.S
new file mode 100644
index 000000000000..e14be1058b51
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/brk.S
@@ -0,0 +1,76 @@
+/*-
+ * Copyright (c) 2002 Peter Grehan.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: brk.S,v 1.9 2000/06/26 06:25:43 kleink Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ .globl HIDENAME(curbrk)
+ .globl HIDENAME(minbrk)
+ .globl CNAME(_end)
+
+ .data
+HIDENAME(minbrk):
+ .long CNAME(_end)
+
+ .text
+
+ENTRY(brk)
+#ifdef PIC
+ mflr %r10
+ bl _GLOBAL_OFFSET_TABLE_@local-4
+ mflr %r9
+ mtlr %r10
+ lwz %r5,HIDENAME(minbrk)@got(%r9)
+ lwz %r6,0(%r5)
+#else
+ lis %r5,HIDENAME(minbrk)@ha
+ lwz %r6,HIDENAME(minbrk)@l(%r5)
+#endif
+ cmplw %r6,%r3 /* if (minbrk <= r3) */
+ bgt 0f
+ mr %r6,%r3 /* r6 = r3 */
+0:
+ mr %r3,%r6 /* new break value */
+ li %r0,SYS_break
+ sc /* assume, that r5 is kept */
+ bso 1f
+#ifdef PIC
+ lwz %r7,HIDENAME(curbrk)@got(%r9)
+ stw %r6,0(%r7)
+#else
+ lis %r7,HIDENAME(curbrk)@ha /* record new break */
+ stw %r6,HIDENAME(curbrk)@l(%r7)
+#endif
+ blr /* return 0 */
+
+1:
+ b PIC_PLT(HIDENAME(cerror))
+END(brk)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/sys/cerror.S b/lib/libc/powerpcspe/sys/cerror.S
new file mode 100644
index 000000000000..3ca04fb4a19d
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/cerror.S
@@ -0,0 +1,58 @@
+/*-
+ * Copyright (c) 2002 Peter Grehan.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: cerror.S,v 1.5 2000/01/27 14:58:48 kleink Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ .globl HIDENAME(cerror)
+ .hidden HIDENAME(cerror)
+ .globl CNAME(__error)
+
+ /*
+ * The __error() function is thread aware. For non-threaded
+ * programs and the initial threaded in threaded programs,
+ * it returns a pointer to the global errno variable.
+ */
+HIDENAME(cerror):
+ mflr %r0
+ stwu %r1,-16(%r1) /* allocate new stack frame */
+ stw %r0,20(%r1) /* and save lr, r31 */
+ stw %r31,8(%r1)
+ mr %r31,%r3 /* stash errval in callee-saved register */
+ bl PIC_PLT(CNAME(__error))
+ stw %r31,0(%r3) /* store errval into &errno */
+ lwz %r0,20(%r1)
+ lwz %r31,8(%r1)
+ mtlr %r0
+ la %r1,16(%r1)
+ li %r3,-1
+ li %r4,-1
+ blr /* return to callers caller */
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/sys/exect.S b/lib/libc/powerpcspe/sys/exect.S
new file mode 100644
index 000000000000..701f5b00f45c
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/exect.S
@@ -0,0 +1,42 @@
+/*-
+ * Copyright (c) 2002 Peter Grehan.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: exect.S,v 1.3 1998/05/25 15:28:03 ws Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ENTRY(exect)
+ li %r0,SYS_execve
+ sc
+ bso 1f
+ blr
+1:
+ b PIC_PLT(HIDENAME(cerror))
+END(exect)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/sys/ptrace.S b/lib/libc/powerpcspe/sys/ptrace.S
new file mode 100644
index 000000000000..cff463dd009c
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/ptrace.S
@@ -0,0 +1,61 @@
+/*-
+ * Copyright (c) 2002 Peter Grehan.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: ptrace.S,v 1.3 2000/02/23 20:16:57 kleink Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ENTRY(ptrace)
+ mflr %r0
+ stwu %r1,-32(%r1)
+ stw %r0,36(%r1)
+ stw %r3,8(%r1)
+ stw %r4,12(%r1)
+ stw %r5,16(%r1)
+ stw %r6,20(%r1)
+
+ bl PIC_PLT(CNAME(__error))
+ li %r7,0
+ stw %r7,0(%r3)
+
+ lwz %r3,8(%r1)
+ lwz %r4,12(%r1)
+ lwz %r5,16(%r1)
+ lwz %r0,36(%r1)
+ lwz %r6,20(%r1)
+ mtlr %r0
+ la %r1,32(%r1)
+ li %r0,SYS_ptrace
+ sc
+ bso 1f
+ blr
+1:
+ b PIC_PLT(HIDENAME(cerror))
+END(ptrace)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/sys/sbrk.S b/lib/libc/powerpcspe/sys/sbrk.S
new file mode 100644
index 000000000000..f058d112e863
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/sbrk.S
@@ -0,0 +1,73 @@
+/*-
+ * Copyright (c) 2002 Peter Grehan.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: sbrk.S,v 1.8 2000/06/26 06:25:44 kleink Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ .globl HIDENAME(curbrk)
+ .globl CNAME(_end)
+
+ .data
+HIDENAME(curbrk):
+ .long CNAME(_end)
+
+ .text
+ENTRY(sbrk)
+
+#ifdef PIC
+ mflr %r10
+ bl _GLOBAL_OFFSET_TABLE_@local-4
+ mflr %r5
+ mtlr %r10
+ lwz %r5,HIDENAME(curbrk)@got(%r5)
+ lwz %r6,0(%r5)
+#else
+ lis %r5,HIDENAME(curbrk)@ha
+ lwz %r6,HIDENAME(curbrk)@l(%r5) /* r6 = old break */
+#endif
+ cmpwi %r3,0 /* sbrk(0) - return curbrk */
+ beq 1f
+ add %r3,%r3,%r6
+ mr %r7,%r3 /* r7 = new break */
+ li %r0,SYS_break
+ sc /* break(new_break) */
+ bso 2f
+#ifdef PIC
+ stw %r7,0(%r5)
+#else
+ stw %r7,HIDENAME(curbrk)@l(%r5) /* record new break */
+#endif
+1:
+ mr %r3,%r6 /* set return value */
+ blr
+2:
+ b PIC_PLT(HIDENAME(cerror))
+END(sbrk)
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/libc/powerpcspe/sys/setlogin.S b/lib/libc/powerpcspe/sys/setlogin.S
new file mode 100644
index 000000000000..e0d6d3c012ce
--- /dev/null
+++ b/lib/libc/powerpcspe/sys/setlogin.S
@@ -0,0 +1,51 @@
+/*-
+ * Copyright (c) 2002 Peter Grehan.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/* $NetBSD: setlogin.S,v 1.3 1998/11/24 11:14:57 tsubai Exp $ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+#include "SYS.h"
+
+ .globl CNAME(_logname_valid) /* in _getlogin() */
+
+SYSCALL(setlogin)
+#ifdef PIC
+ mflr %r10
+ bl _GLOBAL_OFFSET_TABLE_@local-4
+ mflr %r4
+ lwz %r4,CNAME(_logname_valid)@got(%r4)
+ li %r5,%r0
+ stw %r5,0(%r4)
+ mtlr %r10
+#else
+ lis %r4,CNAME(_logname_valid)@ha
+ li %r5,0
+ stw %r5,CNAME(_logname_valid)@l(%r4)
+#endif
+ blr
+
+ .section .note.GNU-stack,"",%progbits
diff --git a/lib/msun/powerpc/fenv.h b/lib/msun/powerpc/fenv.h
index 33de3750a93a..8fbecd7c0806 100644
--- a/lib/msun/powerpc/fenv.h
+++ b/lib/msun/powerpc/fenv.h
@@ -87,8 +87,13 @@ extern const fenv_t __fe_dfl_env;
FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT)
#ifndef _SOFT_FLOAT
+#ifdef __SPE__
+#define __mffs(__env) __asm __volatile("mfspr %0, 512" : "=r" (*(__env)))
+#define __mtfsf(__env) __asm __volatile("mtspr 512,%0" : : "r" (__env))
+#else
#define __mffs(__env) __asm __volatile("mffs %0" : "=f" (*(__env)))
#define __mtfsf(__env) __asm __volatile("mtfsf 255,%0" : : "f" (__env))
+#endif
#else
#define __mffs(__env)
#define __mtfsf(__env)
diff --git a/share/mk/bsd.cpu.mk b/share/mk/bsd.cpu.mk
index a967f892846b..211b6fc87723 100644
--- a/share/mk/bsd.cpu.mk
+++ b/share/mk/bsd.cpu.mk
@@ -137,6 +137,8 @@ _CPUCFLAGS = -Wa,-me500 -msoft-float
. else
_CPUCFLAGS = -mcpu=${CPUTYPE} -mno-powerpc64
. endif
+. elif ${MACHINE_ARCH} == "powerpcspe"
+_CPUCFLAGS = -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double
. elif ${MACHINE_ARCH} == "powerpc64"
_CPUCFLAGS = -mcpu=${CPUTYPE}
. elif ${MACHINE_CPUARCH} == "mips"
@@ -327,6 +329,10 @@ CFLAGS += -mfloat-abi=softfp
.endif
.endif
+.if ${MACHINE_ARCH} == "powerpcspe"
+CFLAGS += -mcpu=8540 -Wa,-me500 -mspe=yes -mabi=spe -mfloat-gprs=double
+.endif
+
.if ${MACHINE_CPUARCH} == "riscv"
CFLAGS += -msoft-float
ACFLAGS += -msoft-float
diff --git a/share/mk/bsd.endian.mk b/share/mk/bsd.endian.mk
index c7ec42cb2876..a264b67e0407 100644
--- a/share/mk/bsd.endian.mk
+++ b/share/mk/bsd.endian.mk
@@ -9,6 +9,7 @@
TARGET_ENDIANNESS= 1234
.elif ${MACHINE_ARCH} == "powerpc" || \
${MACHINE_ARCH} == "powerpc64" || \
+ ${MACHINE_ARCH} == "powerpcspe" || \
${MACHINE_ARCH} == "sparc64" || \
(${MACHINE} == "arm" && ${MACHINE_ARCH:Marm*eb*} != "") || \
${MACHINE_ARCH:Mmips*} != ""
diff --git a/share/mk/local.meta.sys.mk b/share/mk/local.meta.sys.mk
index 2ac23d613b1f..49f625ccefa9 100644
--- a/share/mk/local.meta.sys.mk
+++ b/share/mk/local.meta.sys.mk
@@ -46,7 +46,7 @@ OBJROOT:= ${OBJROOT:H:tA}/${OBJROOT:T}
TARGET_ARCHES_arm?= arm armeb armv6
TARGET_ARCHES_arm64?= aarch64
TARGET_ARCHES_mips?= mipsel mips mips64el mips64 mipsn32 mipsn32el
-TARGET_ARCHES_powerpc?= powerpc powerpc64
+TARGET_ARCHES_powerpc?= powerpc powerpc64 powerpcspe
TARGET_ARCHES_pc98?= i386
TARGET_ARCHES_riscv?= riscv64
diff --git a/share/mk/sys.mk b/share/mk/sys.mk
index 28387f61bc49..6efa99410d0a 100644
--- a/share/mk/sys.mk
+++ b/share/mk/sys.mk
@@ -13,7 +13,7 @@ unix ?= We run FreeBSD, not UNIX.
# and/or endian. This is called MACHINE_CPU in NetBSD, but that's used
# for something different in FreeBSD.
#
-MACHINE_CPUARCH=${MACHINE_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/powerpc64/powerpc/:C/riscv64/riscv/}
+MACHINE_CPUARCH=${MACHINE_ARCH:C/mips(n32|64)?(el)?/mips/:C/arm(v6)?(eb|hf)?/arm/:C/powerpc(64|spe)/powerpc/:C/riscv64/riscv/}
.endif
diff --git a/sys/boot/powerpc/Makefile b/sys/boot/powerpc/Makefile
index 1f3a528b2f08..e3ac008fb799 100644
--- a/sys/boot/powerpc/Makefile
+++ b/sys/boot/powerpc/Makefile
@@ -1,5 +1,8 @@
# $FreeBSD$
-SUBDIR= boot1.chrp kboot ofw ps3 uboot
+SUBDIR= boot1.chrp kboot ofw uboot
+.if ${MACHINE_ARCH} != "powerpcspe"
+SUBDIR+= ps3
+.endif
.include <bsd.subdir.mk>
diff --git a/sys/conf/Makefile.powerpc b/sys/conf/Makefile.powerpc
index 769b068ed5f2..e529ef7cc11d 100644
--- a/sys/conf/Makefile.powerpc
+++ b/sys/conf/Makefile.powerpc
@@ -35,6 +35,10 @@ LDSCRIPT_NAME?= ldscript.${MACHINE_ARCH}
INCLUDES+= -I$S/contrib/libfdt
+.if "${MACHINE_ARCH}" == "powerpcspe"
+# Force __SPE__, since the builtin will be removed later with -mno-spe
+CFLAGS+= -mabi=spe -D__SPE__
+.endif
CFLAGS+= -msoft-float -Wa,-many
# Build position-independent kernel
diff --git a/sys/conf/files.powerpc b/sys/conf/files.powerpc
index aee0a1022b9c..7ccc3a6ae2fb 100644
--- a/sys/conf/files.powerpc
+++ b/sys/conf/files.powerpc
@@ -82,25 +82,25 @@ kern/kern_clocksource.c standard
kern/subr_dummy_vdso_tc.c standard
kern/syscalls.c optional ktr
kern/subr_sfbuf.c standard
-libkern/ashldi3.c optional powerpc
-libkern/ashrdi3.c optional powerpc
+libkern/ashldi3.c optional powerpc | powerpcspe
+libkern/ashrdi3.c optional powerpc | powerpcspe
libkern/bcmp.c standard
-libkern/cmpdi2.c optional powerpc
-libkern/divdi3.c optional powerpc
+libkern/cmpdi2.c optional powerpc | powerpcspe
+libkern/divdi3.c optional powerpc | powerpcspe
libkern/ffs.c standard
libkern/ffsl.c standard
libkern/ffsll.c standard
libkern/fls.c standard
libkern/flsl.c standard
libkern/flsll.c standard
-libkern/lshrdi3.c optional powerpc
+libkern/lshrdi3.c optional powerpc | powerpcspe
libkern/memmove.c standard
libkern/memset.c standard
-libkern/moddi3.c optional powerpc
-libkern/qdivrem.c optional powerpc
-libkern/ucmpdi2.c optional powerpc
-libkern/udivdi3.c optional powerpc
-libkern/umoddi3.c optional powerpc
+libkern/moddi3.c optional powerpc | powerpcspe
+libkern/qdivrem.c optional powerpc | powerpcspe
+libkern/ucmpdi2.c optional powerpc | powerpcspe
+libkern/udivdi3.c optional powerpc | powerpcspe
+libkern/umoddi3.c optional powerpc | powerpcspe
powerpc/aim/locore.S optional aim no-obj
powerpc/aim/aim_machdep.c optional aim
powerpc/aim/mmu_oea.c optional aim powerpc
@@ -115,6 +115,7 @@ powerpc/booke/machdep_e500.c optional booke_e500
powerpc/booke/mp_cpudep.c optional booke smp
powerpc/booke/platform_bare.c optional booke
powerpc/booke/pmap.c optional booke
+powerpc/booke/spe.c optional powerpcspe
powerpc/cpufreq/dfs.c optional cpufreq
powerpc/cpufreq/pcr.c optional cpufreq aim
powerpc/cpufreq/pmufreq.c optional cpufreq aim pmu
@@ -179,7 +180,7 @@ powerpc/powermac/smusat.c optional powermac smu
powerpc/powermac/uninorth.c optional powermac
powerpc/powermac/uninorthpci.c optional powermac pci
powerpc/powermac/vcoregpio.c optional powermac
-powerpc/powerpc/altivec.c standard
+powerpc/powerpc/altivec.c optional powerpc | powerpc64
powerpc/powerpc/autoconf.c standard
powerpc/powerpc/bcopy.c standard
powerpc/powerpc/bus_machdep.c standard
@@ -193,7 +194,7 @@ powerpc/powerpc/db_hwwatch.c optional ddb
powerpc/powerpc/db_interface.c optional ddb
powerpc/powerpc/db_trace.c optional ddb
powerpc/powerpc/dump_machdep.c standard
-powerpc/powerpc/elf32_machdep.c optional powerpc | compat_freebsd32
+powerpc/powerpc/elf32_machdep.c optional powerpc | powerpcspe | compat_freebsd32
powerpc/powerpc/elf64_machdep.c optional powerpc64
powerpc/powerpc/exec_machdep.c standard
powerpc/powerpc/fpu.c standard
@@ -216,9 +217,9 @@ powerpc/powerpc/platform_if.m standard
powerpc/powerpc/ptrace_machdep.c standard
powerpc/powerpc/sc_machdep.c optional sc
powerpc/powerpc/setjmp.S standard
-powerpc/powerpc/sigcode32.S optional powerpc | compat_freebsd32
+powerpc/powerpc/sigcode32.S optional powerpc | powerpcspe | compat_freebsd32
powerpc/powerpc/sigcode64.S optional powerpc64
-powerpc/powerpc/swtch32.S optional powerpc
+powerpc/powerpc/swtch32.S optional powerpc | powerpcspe
powerpc/powerpc/swtch64.S optional powerpc64
powerpc/powerpc/stack_machdep.c optional ddb | stack
powerpc/powerpc/suswintr.c standard
diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk
index be296f7849ed..15a6bf557013 100644
--- a/sys/conf/kern.mk
+++ b/sys/conf/kern.mk
@@ -167,6 +167,10 @@ CFLAGS.gcc+= -msoft-float
INLINE_LIMIT?= 15000
.endif
+.if ${MACHINE_ARCH} == "powerpcspe"
+CFLAGS+= -mno-spe
+.endif
+
#
# Use dot symbols on powerpc64 to make ddb happy
#
@@ -261,6 +265,7 @@ LD_EMULATION_mips64el= elf64ltsmip_fbsd
LD_EMULATION_mipsn32= elf32btsmipn32_fbsd
LD_EMULATION_mipsn32el= elf32btsmipn32_fbsd # I don't think this is a thing that works
LD_EMULATION_powerpc= elf32ppc_fbsd
+LD_EMULATION_powerpcspe= elf32ppc_fbsd
LD_EMULATION_powerpc64= elf64ppc_fbsd
LD_EMULATION_riscv= elf64riscv
LD_EMULATION_sparc64= elf64_sparc_fbsd
diff --git a/sys/conf/ldscript.powerpcspe b/sys/conf/ldscript.powerpcspe
new file mode 100644
index 000000000000..b190dc193b02
--- /dev/null
+++ b/sys/conf/ldscript.powerpcspe
@@ -0,0 +1,144 @@
+/* $FreeBSD$ */
+
+OUTPUT_FORMAT("elf32-powerpc-freebsd", "elf32-powerpc-freebsd",
+ "elf32-powerpc-freebsd")
+OUTPUT_ARCH(powerpc)
+ENTRY(__start)
+SEARCH_DIR(/usr/lib);
+PROVIDE (__stack = 0);
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+
+ . = kernbase + SIZEOF_HEADERS;
+ PROVIDE (begin = . - SIZEOF_HEADERS);
+
+ .text :
+ {
+ *(.text)
+ *(.stub)
+ /* .gnu.warning sections are handled specially by elf32.em. */
+ *(.gnu.warning)
+ *(.gnu.linkonce.t*)
+ } =0
+ _etext = .;
+ PROVIDE (etext = .);
+
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .gnu.version : { *(.gnu.version) }
+ .gnu.version_d : { *(.gnu.version_d) }
+ .gnu.version_r : { *(.gnu.version_r) }
+ .rela.text :
+ { *(.rela.text) *(.rela.gnu.linkonce.t*) }
+ .rela.data :
+ { *(.rela.data) *(.rela.gnu.linkonce.d*) }
+ .rela.rodata :
+ { *(.rela.rodata) *(.rela.gnu.linkonce.r*) }
+ .rela.got : { *(.rela.got) }
+ .rela.got1 : { *(.rela.got1) }
+ .rela.got2 : { *(.rela.got2) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rela.init : { *(.rela.init) }
+ .rela.fini : { *(.rela.fini) }
+ .rela.bss : { *(.rela.bss) }
+ .rela.plt : { *(.rela.plt) }
+ .rela.sdata : { *(.rela.sdata) }
+ .rela.sbss : { *(.rela.sbss) }
+ .rela.sdata2 : { *(.rela.sdata2) }
+ .rela.sbss2 : { *(.rela.sbss2) }
+
+ .init : { *(.init) } =0
+ .fini : { *(.fini) } =0
+ .rodata : { *(.rodata) *(.gnu.linkonce.r*) }
+ .rodata1 : { *(.rodata1) }
+ .sdata2 : { *(.sdata2) }
+ .sbss2 : { *(.sbss2) }
+ /* Adjust the address for the data segment to the next page up. */
+ . = ((. + 0x1000) & ~(0x1000 - 1));
+ .data :
+ {
+ *(.data)
+ *(.gnu.linkonce.d*)
+ CONSTRUCTORS
+ }
+ .data1 : { *(.data1) }
+ .got1 : { *(.got1) }
+ .dynamic : { *(.dynamic) }
+ /* Put .ctors and .dtors next to the .got2 section, so that the pointers
+ get relocated with -mrelocatable. Also put in the .fixup pointers.
+ The current compiler no longer needs this, but keep it around for 2.7.2 */
+ PROVIDE (_GOT2_START_ = .);
+ .got2 : { *(.got2) }
+ PROVIDE (__CTOR_LIST__ = .);
+ .ctors : { *(.ctors) }
+ PROVIDE (__CTOR_END__ = .);
+ PROVIDE (__DTOR_LIST__ = .);
+ .dtors : { *(.dtors) }
+ PROVIDE (__DTOR_END__ = .);
+ PROVIDE (_FIXUP_START_ = .);
+ .fixup : { *(.fixup) }
+ PROVIDE (_FIXUP_END_ = .);
+ PROVIDE (_GOT2_END_ = .);
+ PROVIDE (_GOT_START_ = .);
+ .got : { *(.got) }
+ .got.plt : { *(.got.plt) }
+ PROVIDE (_GOT_END_ = .);
+ /* We want the small data sections together, so single-instruction offsets
+ can access them all, and initialized data all before uninitialized, so
+ we can shorten the on-disk segment size. */
+ .sdata : { *(.sdata) }
+ _edata = .;
+ PROVIDE (edata = .);
+ .sbss :
+ {
+ PROVIDE (__sbss_start = .);
+ *(.sbss)
+ *(.scommon)
+ *(.dynsbss)
+ PROVIDE (__sbss_end = .);
+ }
+ .plt : { *(.plt) }
+ .bss :
+ {
+ PROVIDE (__bss_start = .);
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+ /* These must appear regardless of . */
+}
+
diff --git a/sys/conf/options.powerpc b/sys/conf/options.powerpc
index 4926947c7da7..3e82696983dd 100644
--- a/sys/conf/options.powerpc
+++ b/sys/conf/options.powerpc
@@ -9,6 +9,7 @@ CELL
POWERPC
POWERPC64
+POWERPCSPE
FPU_EMU
diff --git a/sys/modules/Makefile b/sys/modules/Makefile
index fbaefc3ebe9a..dc8a7cf36961 100644
--- a/sys/modules/Makefile
+++ b/sys/modules/Makefile
@@ -510,7 +510,8 @@ _txp= txp
.if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \
${MACHINE_CPUARCH} != "mips" && \
- ${MACHINE_ARCH} != "powerpc" && ${MACHINE_CPUARCH} != "riscv"
+ ${MACHINE_ARCH} != "powerpc" && ${MACHINE_ARCH} != "powerpcspe" && \
+ ${MACHINE_CPUARCH} != "riscv"
_cxgbe= cxgbe
.endif
@@ -753,7 +754,6 @@ _cfi= cfi
_cpufreq= cpufreq
_drm= drm
_exca= exca
-_nvram= powermac_nvram
_pccard= pccard
_wi= wi
.endif
@@ -761,6 +761,10 @@ _wi= wi
.if ${MACHINE_ARCH} == "powerpc64"
_drm2= drm2
.endif
+.if ${MACHINE_ARCH} == "powerpc64" || ${MACHINE_ARCH} == "powerpc"
+# Don't build powermac_nvram for powerpcspe, it's never supported.
+_nvram= powermac_nvram
+.endif
.if ${MACHINE_CPUARCH} == "sparc64"
_auxio= auxio
diff --git a/sys/powerpc/booke/booke_machdep.c b/sys/powerpc/booke/booke_machdep.c
index 8d04f7ee1133..cbd7fc403cfb 100644
--- a/sys/powerpc/booke/booke_machdep.c
+++ b/sys/powerpc/booke/booke_machdep.c
@@ -242,6 +242,11 @@ ivor_setup(void)
case FSL_E500mc:
case FSL_E5500:
SET_TRAP(SPR_IVOR7, int_fpu);
+ break;
+ case FSL_E500v1:
+ case FSL_E500v2:
+ SET_TRAP(SPR_IVOR32, int_vec);
+ break;
}
}
diff --git a/sys/powerpc/booke/spe.c b/sys/powerpc/booke/spe.c
new file mode 100644
index 000000000000..45eb7798b2c4
--- /dev/null
+++ b/sys/powerpc/booke/spe.c
@@ -0,0 +1,183 @@
+/*-
+ * Copyright (C) 1996 Wolfgang Solfrank.
+ * Copyright (C) 1996 TooLs GmbH.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by TooLs GmbH.
+ * 4. The name of TooLs GmbH may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
+ * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * $NetBSD: fpu.c,v 1.5 2001/07/22 11:29:46 wiz Exp $
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/proc.h>
+#include <sys/systm.h>
+#include <sys/limits.h>
+
+#include <machine/altivec.h>
+#include <machine/pcb.h>
+#include <machine/psl.h>
+
+static void
+save_vec_int(struct thread *td)
+{
+ int msr;
+ struct pcb *pcb;
+
+ pcb = td->td_pcb;
+
+ /*
+ * Temporarily re-enable the vector unit during the save
+ */
+ msr = mfmsr();
+ mtmsr(msr | PSL_VEC);
+ isync();
+
+ /*
+ * Save the vector registers and SPEFSCR to the PCB
+ */
+#define EVSTDW(n) __asm ("evstdw %1,0(%0)" \
+ :: "b"(pcb->pcb_vec.vr[n]), "n"(n));
+ EVSTDW(0); EVSTDW(1); EVSTDW(2); EVSTDW(3);
+ EVSTDW(4); EVSTDW(5); EVSTDW(6); EVSTDW(7);
+ EVSTDW(8); EVSTDW(9); EVSTDW(10); EVSTDW(11);
+ EVSTDW(12); EVSTDW(13); EVSTDW(14); EVSTDW(15);
+ EVSTDW(16); EVSTDW(17); EVSTDW(18); EVSTDW(19);
+ EVSTDW(20); EVSTDW(21); EVSTDW(22); EVSTDW(23);
+ EVSTDW(24); EVSTDW(25); EVSTDW(26); EVSTDW(27);
+ EVSTDW(28); EVSTDW(29); EVSTDW(30); EVSTDW(31);
+#undef EVSTDW
+
+ __asm ( "evxor 0,0,0\n"
+ "evaddumiaaw 0,0\n"
+ "evstdd 0,0(%0)" :: "b"(&pcb->pcb_vec.vr[17][0]));
+ pcb->pcb_vec.vscr = mfspr(SPR_SPEFSCR);
+
+ /*
+ * Disable vector unit again
+ */
+ isync();
+ mtmsr(msr);
+
+}
+
+void
+enable_vec(struct thread *td)
+{
+ int msr;
+ struct pcb *pcb;
+ struct trapframe *tf;
+
+ pcb = td->td_pcb;
+ tf = trapframe(td);
+
+ /*
+ * Save the thread's SPE CPU number, and set the CPU's current
+ * vector thread
+ */
+ td->td_pcb->pcb_veccpu = PCPU_GET(cpuid);
+ PCPU_SET(vecthread, td);
+
+ /*
+ * Enable the vector unit for when the thread returns from the
+ * exception. If this is the first time the unit has been used by
+ * the thread, initialise the vector registers and VSCR to 0, and
+ * set the flag to indicate that the vector unit is in use.
+ */
+ tf->srr1 |= PSL_VEC;
+ if (!(pcb->pcb_flags & PCB_VEC)) {
+ memset(&pcb->pcb_vec, 0, sizeof pcb->pcb_vec);
+ pcb->pcb_flags |= PCB_VEC;
+ }
+
+ /*
+ * Temporarily enable the vector unit so the registers
+ * can be restored.
+ */
+ msr = mfmsr();
+ mtmsr(msr | PSL_VEC);
+ isync();
+
+ /* Restore SPEFSCR and ACC. Use %r0 as the scratch for ACC. */
+ mtspr(SPR_SPEFSCR, pcb->pcb_vec.vscr);
+ __asm __volatile("evldd 0, 0(%0); evmra 0,0\n"
+ :: "b"(&pcb->pcb_vec.vr[17][0]));
+
+ /*
+ * The lower half of each register will be restored on trap return. Use
+ * %r0 as a scratch register, and restore it last.
+ */
+#define EVLDW(n) __asm __volatile("evldw 0, 0(%0); evmergehilo "#n",0,"#n \
+ :: "b"(&pcb->pcb_vec.vr[n]));
+ EVLDW(1); EVLDW(2); EVLDW(3); EVLDW(4);
+ EVLDW(5); EVLDW(6); EVLDW(7); EVLDW(8);
+ EVLDW(9); EVLDW(10); EVLDW(11); EVLDW(12);
+ EVLDW(13); EVLDW(14); EVLDW(15); EVLDW(16);
+ EVLDW(17); EVLDW(18); EVLDW(19); EVLDW(20);
+ EVLDW(21); EVLDW(22); EVLDW(23); EVLDW(24);
+ EVLDW(25); EVLDW(26); EVLDW(27); EVLDW(28);
+ EVLDW(29); EVLDW(30); EVLDW(31); EVLDW(0);
+#undef EVLDW
+
+ isync();
+ mtmsr(msr);
+}
+
+void
+save_vec(struct thread *td)
+{
+ struct pcb *pcb;
+
+ pcb = td->td_pcb;
+
+ save_vec_int(td);
+
+ /*
+ * Clear the current vec thread and pcb's CPU id
+ * XXX should this be left clear to allow lazy save/restore ?
+ */
+ pcb->pcb_veccpu = INT_MAX;
+ PCPU_SET(vecthread, NULL);
+}
+
+/*
+ * Save SPE state without dropping ownership. This will only save state if
+ * the current vector-thread is `td'.
+ */
+void
+save_vec_nodrop(struct thread *td)
+{
+ struct thread *vtd;
+
+ vtd = PCPU_GET(vecthread);
+ if (td != vtd) {
+ return;
+ }
+
+ save_vec_int(td);
+}
diff --git a/sys/powerpc/conf/MPC85XXSPE b/sys/powerpc/conf/MPC85XXSPE
new file mode 100644
index 000000000000..781d6899d316
--- /dev/null
+++ b/sys/powerpc/conf/MPC85XXSPE
@@ -0,0 +1,100 @@
+#
+# Custom kernel for Freescale MPC85XX development boards like the CDS etc.
+#
+# $FreeBSD$
+#
+
+cpu BOOKE
+cpu BOOKE_E500
+ident MPC85XX
+
+machine powerpc powerpcspe
+
+include "dpaa/config.dpaa"
+makeoptions DEBUG="-Wa,-me500 -g"
+makeoptions WERROR="-Werror -Wno-format -Wno-redundant-decls"
+makeoptions NO_MODULES=yes
+
+options FPU_EMU
+
+options _KPOSIX_PRIORITY_SCHEDULING
+options ALT_BREAK_TO_DEBUGGER
+options BREAK_TO_DEBUGGER
+options BOOTP
+options BOOTP_NFSROOT
+#options BOOTP_NFSV3
+options CD9660
+options COMPAT_43
+options DDB
+#options DEADLKRES
+options DEVICE_POLLING
+#options DIAGNOSTIC
+options FDT
+#makeoptions FDT_DTS_FILE=mpc8555cds.dts
+options FFS
+options GDB
+options GEOM_PART_GPT
+options INET
+options INET6
+options TCP_HHOOK # hhook(9) framework for TCP
+options INVARIANTS
+options INVARIANT_SUPPORT
+options KDB
+options KTRACE
+options MD_ROOT
+options MPC85XX
+options MSDOSFS
+options NFS_ROOT
+options NFSCL
+options NFSLOCKD
+options PROCFS
+options PSEUDOFS
+options SCHED_ULE
+options CAPABILITIES
+options CAPABILITY_MODE
+options SMP
+options SYSVMSG
+options SYSVSEM
+options SYSVSHM
+options WITNESS
+options WITNESS_SKIPSPIN
+
+device ata
+device bpf
+device cfi
+device crypto
+device cryptodev
+device da
+device ds1553
+device em
+device alc
+device ether
+device fxp
+device gpio
+device iic
+device iicbus
+#device isa
+device loop
+device md
+device miibus
+device pass
+device pci
+device quicc
+device random
+#device rl
+device scbus
+device scc
+device sec
+device tsec
+device tun
+device uart
+options USB_DEBUG # enable debug msgs
+#device uhci
+device ehci
+device umass
+device usb
+device vlan
+
+# P1022 DIU
+device diu
+device videomode
diff --git a/sys/powerpc/include/param.h b/sys/powerpc/include/param.h
index 453915cba4df..a74ccf212a8f 100644
--- a/sys/powerpc/include/param.h
+++ b/sys/powerpc/include/param.h
@@ -57,9 +57,13 @@
#ifdef __powerpc64__
#define MACHINE_ARCH "powerpc64"
#else
+#ifdef __SPE__
+#define MACHINE_ARCH "powerpcspe"
+#else
#define MACHINE_ARCH "powerpc"
#endif
#endif
+#endif
#define MID_MACHINE MID_POWERPC
#ifdef __powerpc64__
#ifndef MACHINE_ARCH32
diff --git a/sys/powerpc/include/spr.h b/sys/powerpc/include/spr.h
index 86dac97bc01c..bfd205fb2002 100644
--- a/sys/powerpc/include/spr.h
+++ b/sys/powerpc/include/spr.h
@@ -192,6 +192,7 @@
#define FSL_E5500 0x8024
#define FSL_E6500 0x8040
+#define SPR_SPEFSCR 0x200 /* ..8 Signal Processing Engine FSCR. */
#define SPR_IBAT0U 0x210 /* .68 Instruction BAT Reg 0 Upper */
#define SPR_IBAT0U 0x210 /* .6. Instruction BAT Reg 0 Upper */
#define SPR_IBAT0L 0x211 /* .6. Instruction BAT Reg 0 Lower */
diff --git a/sys/powerpc/include/trap.h b/sys/powerpc/include/trap.h
index 81c40c9bffaf..34cd98dabab9 100644
--- a/sys/powerpc/include/trap.h
+++ b/sys/powerpc/include/trap.h
@@ -112,6 +112,7 @@
/* Macros to extract register information */
#define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f) /* source or target */
#define EXC_ALI_RA(dsisr) (dsisr & 0x1f)
+#define EXC_ALI_SPE_REG(instr) ((instr >> 21) & 0x1f)
/*
* SRR1 bits for program exception traps. These identify what caused
diff --git a/sys/powerpc/powerpc/trap.c b/sys/powerpc/powerpc/trap.c
index d1860513fe45..b0a86701ac47 100644
--- a/sys/powerpc/powerpc/trap.c
+++ b/sys/powerpc/powerpc/trap.c
@@ -750,9 +750,47 @@ static int
fix_unaligned(struct thread *td, struct trapframe *frame)
{
struct thread *fputhread;
+#ifdef __SPE__
+ uint32_t inst;
+#endif
int indicator, reg;
double *fpr;
+#ifdef __SPE__
+ indicator = (frame->cpu.booke.esr & (ESR_ST|ESR_SPE));
+ if (indicator & ESR_SPE) {
+ if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
+ return (-1);
+ reg = EXC_ALI_SPE_REG(inst);
+ fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
+ fputhread = PCPU_GET(vecthread);
+
+ /* Juggle the FPU to ensure that we've initialized
+ * the FPRs, and that their current state is in
+ * the PCB.
+ */
+ if (fputhread != td) {
+ if (fputhread)
+ save_vec(fputhread);
+ enable_vec(td);
+ }
+ save_vec(td);
+
+ if (!(indicator & ESR_ST)) {
+ if (copyin((void *)frame->dar, fpr,
+ sizeof(double)) != 0)
+ return (-1);
+ frame->fixreg[reg] = td->td_pcb->pcb_vec.vr[reg][1];
+ enable_vec(td);
+ } else {
+ td->td_pcb->pcb_vec.vr[reg][1] = frame->fixreg[reg];
+ if (copyout(fpr, (void *)frame->dar,
+ sizeof(double)) != 0)
+ return (-1);
+ }
+ return (0);
+ }
+#else
indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
switch (indicator) {
@@ -786,6 +824,7 @@ fix_unaligned(struct thread *td, struct trapframe *frame)
return (0);
break;
}
+#endif
return (-1);
}
diff --git a/usr.sbin/Makefile.powerpc b/usr.sbin/Makefile.powerpc
index 131eb571cdc4..4e234ab8dce9 100644
--- a/usr.sbin/Makefile.powerpc
+++ b/usr.sbin/Makefile.powerpc
@@ -1,4 +1,6 @@
# $FreeBSD$
+.if ${MACHINE_ARCH} != "powerpcspe"
SUBDIR+= nvram
+.endif
SUBDIR+= ofwdump