diff options
| -rw-r--r-- | sys/amd64/amd64/identcpu.c | 17 | ||||
| -rw-r--r-- | sys/i386/i386/identcpu.c | 17 |
2 files changed, 26 insertions, 8 deletions
diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c index 359eed2398dc..8869f979e24b 100644 --- a/sys/amd64/amd64/identcpu.c +++ b/sys/amd64/amd64/identcpu.c @@ -36,7 +36,7 @@ * SUCH DAMAGE. * * from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp - * $Id: identcpu.c,v 1.40 1998/01/25 17:01:31 kato Exp $ + * $Id: identcpu.c,v 1.41 1998/01/25 23:45:33 kato Exp $ */ #include "opt_cpu.h" @@ -664,6 +664,8 @@ void finishidentcpu(void) { int isblue = 0; + u_char ccr3; + u_long regs[4]; if (strcmp(cpu_vendor, "CyrixInstead") == 0) { if (cpu == CPU_486) { @@ -719,11 +721,18 @@ finishidentcpu(void) default: /* M2 and later CPUs are treated as M2. */ cpu = CPU_M2; + /* - * XXX - * Execute cpuid instrunction here and fix cpu_id and - * cpu_feature variables. + * enable cpuid instruction. */ + ccr3 = read_cyrix_reg(CCR3); + write_cyrix_reg(CCR3, CCR3_MAPEN0); + write_cyrix_reg(CCR4, read_cyrix_reg(CCR4) | CCR4_CPUID); + write_cyrix_reg(CCR3, ccr3); + + do_cpuid(1, regs); + cpu_id = regs[0]; /* eax */ + cpu_feature = regs[3]; /* edx */ break; } } diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c index 359eed2398dc..8869f979e24b 100644 --- a/sys/i386/i386/identcpu.c +++ b/sys/i386/i386/identcpu.c @@ -36,7 +36,7 @@ * SUCH DAMAGE. * * from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp - * $Id: identcpu.c,v 1.40 1998/01/25 17:01:31 kato Exp $ + * $Id: identcpu.c,v 1.41 1998/01/25 23:45:33 kato Exp $ */ #include "opt_cpu.h" @@ -664,6 +664,8 @@ void finishidentcpu(void) { int isblue = 0; + u_char ccr3; + u_long regs[4]; if (strcmp(cpu_vendor, "CyrixInstead") == 0) { if (cpu == CPU_486) { @@ -719,11 +721,18 @@ finishidentcpu(void) default: /* M2 and later CPUs are treated as M2. */ cpu = CPU_M2; + /* - * XXX - * Execute cpuid instrunction here and fix cpu_id and - * cpu_feature variables. + * enable cpuid instruction. */ + ccr3 = read_cyrix_reg(CCR3); + write_cyrix_reg(CCR3, CCR3_MAPEN0); + write_cyrix_reg(CCR4, read_cyrix_reg(CCR4) | CCR4_CPUID); + write_cyrix_reg(CCR3, ccr3); + + do_cpuid(1, regs); + cpu_id = regs[0]; /* eax */ + cpu_feature = regs[3]; /* edx */ break; } } |