diff options
| -rw-r--r-- | sys/ia64/ia64/sapic.c | 31 | ||||
| -rw-r--r-- | sys/ia64/include/sapicvar.h | 3 |
2 files changed, 33 insertions, 1 deletions
diff --git a/sys/ia64/ia64/sapic.c b/sys/ia64/ia64/sapic.c index e13b8d598e8d..5b478d263905 100644 --- a/sys/ia64/ia64/sapic.c +++ b/sys/ia64/ia64/sapic.c @@ -26,6 +26,8 @@ * $FreeBSD$ */ +#include "opt_ddb.h" + #include <sys/param.h> #include <sys/malloc.h> #include <sys/kernel.h> @@ -74,7 +76,7 @@ sapic_write(struct sapic *sa, int which, u_int32_t value) ia64_mf_a(); } -#if 0 +#ifdef DDB static void sapic_read_rte(struct sapic *sa, int which, @@ -147,5 +149,32 @@ sapic_eoi(struct sapic *sa, int vector) vm_offset_t reg = sa->sa_registers; *(volatile u_int32_t *) (reg + SAPIC_APIC_EOI) = vector; + ia64_mf(); } +#ifdef DDB + +#include <ddb/ddb.h> + +void +sapic_print(struct sapic *sa, int input) +{ + struct sapic_rte rte; + + sapic_read_rte(sa, input, &rte); + if (rte.rte_mask == 0) { + db_printf("%3d %d %d %s %s %s %s %s ID=%x EID=%x\n", + rte.rte_vector, + rte.rte_delivery_mode, + rte.rte_destination_mode, + rte.rte_delivery_status ? "DS" : " ", + rte.rte_polarity ? "low-active " : "high-active", + rte.rte_rirr ? "RIRR" : " ", + rte.rte_trigger_mode ? "level" : "edge ", + rte.rte_flushen ? "F" : " ", + rte.rte_destination_id, + rte.rte_destination_eid); + } +} + +#endif diff --git a/sys/ia64/include/sapicvar.h b/sys/ia64/include/sapicvar.h index 8fbdf903ca79..298b4bc60cbc 100644 --- a/sys/ia64/include/sapicvar.h +++ b/sys/ia64/include/sapicvar.h @@ -46,5 +46,8 @@ struct sapic *sapic_create(int id, int base, u_int64_t address); void sapic_enable(struct sapic *sa, int input, int vector, int trigger_mode, int polarity); void sapic_eoi(struct sapic *sa, int vector); +#ifdef DDB +void sapic_print(struct sapic *sa, int input); +#endif #endif /* ! _MACHINE_SAPICVAR_H_ */ |