diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/CodeGen/ImplicitNullChecks.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/CodeGen/ImplicitNullChecks.cpp | 13 | 
1 files changed, 7 insertions, 6 deletions
diff --git a/contrib/llvm-project/llvm/lib/CodeGen/ImplicitNullChecks.cpp b/contrib/llvm-project/llvm/lib/CodeGen/ImplicitNullChecks.cpp index 1e82ea659617..0bbedb0a5ea6 100644 --- a/contrib/llvm-project/llvm/lib/CodeGen/ImplicitNullChecks.cpp +++ b/contrib/llvm-project/llvm/lib/CodeGen/ImplicitNullChecks.cpp @@ -50,6 +50,7 @@  #include "llvm/IR/BasicBlock.h"  #include "llvm/IR/DebugLoc.h"  #include "llvm/IR/LLVMContext.h" +#include "llvm/InitializePasses.h"  #include "llvm/MC/MCInstrDesc.h"  #include "llvm/MC/MCRegisterInfo.h"  #include "llvm/Pass.h" @@ -278,12 +279,12 @@ bool ImplicitNullChecks::canReorder(const MachineInstr *A,      if (!(MOA.isReg() && MOA.getReg()))        continue; -    unsigned RegA = MOA.getReg(); +    Register RegA = MOA.getReg();      for (auto MOB : B->operands()) {        if (!(MOB.isReg() && MOB.getReg()))          continue; -      unsigned RegB = MOB.getReg(); +      Register RegB = MOB.getReg();        if (TRI->regsOverlap(RegA, RegB) && (MOA.isDef() || MOB.isDef()))          return false; @@ -371,7 +372,7 @@ ImplicitNullChecks::isSuitableMemoryOp(const MachineInstr &MI,    // We want the mem access to be issued at a sane offset from PointerReg,    // so that if PointerReg is null then the access reliably page faults. -  if (!((MI.mayLoad() || MI.mayStore()) && !MI.isPredicable() && +  if (!(MI.mayLoadOrStore() && !MI.isPredicable() &&          -PageSize < Offset && Offset < PageSize))      return SR_Unsuitable; @@ -517,7 +518,7 @@ bool ImplicitNullChecks::analyzeBlockForNullChecks(    //    // we must ensure that there are no instructions between the 'test' and    // conditional jump that modify %rax. -  const unsigned PointerReg = MBP.LHS.getReg(); +  const Register PointerReg = MBP.LHS.getReg();    assert(MBP.ConditionDef->getParent() ==  &MBB && "Should be in basic block"); @@ -689,7 +690,7 @@ void ImplicitNullChecks::rewriteNullChecks(      for (const MachineOperand &MO : FaultingInstr->operands()) {        if (!MO.isReg() || !MO.isDef())          continue; -      unsigned Reg = MO.getReg(); +      Register Reg = MO.getReg();        if (!Reg || MBB->isLiveIn(Reg))          continue;        MBB->addLiveIn(Reg); @@ -697,7 +698,7 @@ void ImplicitNullChecks::rewriteNullChecks(      if (auto *DepMI = NC.getOnlyDependency()) {        for (auto &MO : DepMI->operands()) { -        if (!MO.isReg() || !MO.getReg() || !MO.isDef()) +        if (!MO.isReg() || !MO.getReg() || !MO.isDef() || MO.isDead())            continue;          if (!NC.getNotNullSucc()->isLiveIn(MO.getReg()))            NC.getNotNullSucc()->addLiveIn(MO.getReg());  | 
