diff options
Diffstat (limited to 'contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp')
| -rw-r--r-- | contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp | 17 | 
1 files changed, 8 insertions, 9 deletions
diff --git a/contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp b/contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp index bb908618b679..5abf50e5bd10 100644 --- a/contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp +++ b/contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp @@ -128,8 +128,7 @@ AggressiveAntiDepBreaker::AggressiveAntiDepBreaker(     }    DEBUG(dbgs() << "AntiDep Critical-Path Registers:"); -  DEBUG(for (int r = CriticalPathSet.find_first(); r != -1; -             r = CriticalPathSet.find_next(r)) +  DEBUG(for (unsigned r : CriticalPathSet.set_bits())            dbgs() << " " << TRI->getName(r));    DEBUG(dbgs() << '\n');  } @@ -163,9 +162,11 @@ void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {    // callee-saved register that is not saved in the prolog.    const MachineFrameInfo &MFI = MF.getFrameInfo();    BitVector Pristine = MFI.getPristineRegs(MF); -  for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) { +  for (const MCPhysReg *I = MF.getRegInfo().getCalleeSavedRegs(); *I; +       ++I) {      unsigned Reg = *I; -    if (!IsReturnBlock && !Pristine.test(Reg)) continue; +    if (!IsReturnBlock && !Pristine.test(Reg)) +      continue;      for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {        unsigned AliasReg = *AI;        State->UnionGroups(AliasReg, 0); @@ -569,7 +570,7 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(        DEBUG({          dbgs() << " ::"; -        for (int r = BV.find_first(); r != -1; r = BV.find_next(r)) +        for (unsigned r : BV.set_bits())            dbgs() << " " << TRI->getName(r);          dbgs() << "\n";        }); @@ -962,10 +963,8 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(                // sure to update that as well.                const SUnit *SU = MISUnitMap[Q.second.Operand->getParent()];                if (!SU) continue; -              for (DbgValueVector::iterator DVI = DbgValues.begin(), -                     DVE = DbgValues.end(); DVI != DVE; ++DVI) -                if (DVI->second == Q.second.Operand->getParent()) -                  UpdateDbgValue(*DVI->first, AntiDepReg, NewReg); +              UpdateDbgValues(DbgValues, Q.second.Operand->getParent(), +                              AntiDepReg, NewReg);              }              // We just went back in time and modified history; the  | 
