diff options
Diffstat (limited to 'contrib/llvm/lib/CodeGen/LivePhysRegs.cpp')
| -rw-r--r-- | contrib/llvm/lib/CodeGen/LivePhysRegs.cpp | 89 | 
1 files changed, 55 insertions, 34 deletions
diff --git a/contrib/llvm/lib/CodeGen/LivePhysRegs.cpp b/contrib/llvm/lib/CodeGen/LivePhysRegs.cpp index 9f7d7cf54848..0dc1079b2ad4 100644 --- a/contrib/llvm/lib/CodeGen/LivePhysRegs.cpp +++ b/contrib/llvm/lib/CodeGen/LivePhysRegs.cpp @@ -53,7 +53,7 @@ void LivePhysRegs::stepBackward(const MachineInstr &MI) {          continue;        removeReg(Reg);      } else if (O->isRegMask()) -      removeRegsInMask(*O, nullptr); +      removeRegsInMask(*O);    }    // Add uses to the set. @@ -142,66 +142,85 @@ bool LivePhysRegs::available(const MachineRegisterInfo &MRI,  /// Add live-in registers of basic block \p MBB to \p LiveRegs.  void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {    for (const auto &LI : MBB.liveins()) { -    MCSubRegIndexIterator S(LI.PhysReg, TRI); -    if (LI.LaneMask.all() || (LI.LaneMask.any() && !S.isValid())) { -      addReg(LI.PhysReg); +    unsigned Reg = LI.PhysReg; +    LaneBitmask Mask = LI.LaneMask; +    MCSubRegIndexIterator S(Reg, TRI); +    assert(Mask.any() && "Invalid livein mask"); +    if (Mask.all() || !S.isValid()) { +      addReg(Reg);        continue;      }      for (; S.isValid(); ++S) {        unsigned SI = S.getSubRegIndex(); -      if ((LI.LaneMask & TRI->getSubRegIndexLaneMask(SI)).any()) +      if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())          addReg(S.getSubReg());      }    }  } -/// Add pristine registers to the given \p LiveRegs. This function removes -/// actually saved callee save registers when \p InPrologueEpilogue is false. -static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF, -                         const MachineFrameInfo &MFI, -                         const TargetRegisterInfo &TRI) { +/// Adds all callee saved registers to \p LiveRegs. +static void addCalleeSavedRegs(LivePhysRegs &LiveRegs, +                               const MachineFunction &MF) {    const MachineRegisterInfo &MRI = MF.getRegInfo(); -  for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; -       ++CSR) +  for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)      LiveRegs.addReg(*CSR); +} + +/// Adds pristine registers to the given \p LiveRegs. Pristine registers are +/// callee saved registers that are unused in the function. +static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF) { +  const MachineFrameInfo &MFI = MF.getFrameInfo(); +  if (!MFI.isCalleeSavedInfoValid()) +    return; +  /// Add all callee saved regs, then remove the ones that are saved+restored. +  addCalleeSavedRegs(LiveRegs, MF); +  /// Remove the ones that are not saved/restored; they are pristine.    for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())      LiveRegs.removeReg(Info.getReg());  }  void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) { -  // To get the live-outs we simply merge the live-ins of all successors. -  for (const MachineBasicBlock *Succ : MBB.successors()) -    addBlockLiveIns(*Succ); +  if (!MBB.succ_empty()) { +    // To get the live-outs we simply merge the live-ins of all successors. +    for (const MachineBasicBlock *Succ : MBB.successors()) +      addBlockLiveIns(*Succ); +  } else if (MBB.isReturnBlock()) { +    // For the return block: Add all callee saved registers that are saved and +    // restored (somewhere); This does not include callee saved registers that +    // are unused and hence not saved and restored; they are called pristine. +    const MachineFunction &MF = *MBB.getParent(); +    const MachineFrameInfo &MFI = MF.getFrameInfo(); +    if (MFI.isCalleeSavedInfoValid()) { +      for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo()) +        addReg(Info.getReg()); +    } +  }  }  void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) { -  const MachineFunction &MF = *MBB.getParent(); -  const MachineFrameInfo &MFI = MF.getFrameInfo(); -  if (MFI.isCalleeSavedInfoValid()) { -    if (MBB.isReturnBlock()) { -      // The return block has no successors whose live-ins we could merge -      // below. So instead we add the callee saved registers manually. -      const MachineRegisterInfo &MRI = MF.getRegInfo(); -      for (const MCPhysReg *I = MRI.getCalleeSavedRegs(); *I; ++I) -        addReg(*I); -    } else { -      addPristines(*this, MF, MFI, *TRI); -    } +  if (!MBB.succ_empty()) { +    const MachineFunction &MF = *MBB.getParent(); +    addPristines(*this, MF); +    addLiveOutsNoPristines(MBB); +  } else if (MBB.isReturnBlock()) { +    // For the return block: Add all callee saved registers. +    const MachineFunction &MF = *MBB.getParent(); +    const MachineFrameInfo &MFI = MF.getFrameInfo(); +    if (MFI.isCalleeSavedInfoValid()) +      addCalleeSavedRegs(*this, MF);    } - -  addLiveOutsNoPristines(MBB);  }  void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {    const MachineFunction &MF = *MBB.getParent(); -  const MachineFrameInfo &MFI = MF.getFrameInfo(); -  if (MFI.isCalleeSavedInfoValid()) -    addPristines(*this, MF, MFI, *TRI); +  addPristines(*this, MF);    addBlockLiveIns(MBB);  } -void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI, +void llvm::computeLiveIns(LivePhysRegs &LiveRegs, +                          const MachineRegisterInfo &MRI,                            MachineBasicBlock &MBB) { +  const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();    assert(MBB.livein_empty());    LiveRegs.init(TRI);    LiveRegs.addLiveOutsNoPristines(MBB); @@ -209,10 +228,12 @@ void llvm::computeLiveIns(LivePhysRegs &LiveRegs, const TargetRegisterInfo &TRI,      LiveRegs.stepBackward(MI);    for (unsigned Reg : LiveRegs) { +    if (MRI.isReserved(Reg)) +      continue;      // Skip the register if we are about to add one of its super registers.      bool ContainsSuperReg = false;      for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) { -      if (LiveRegs.contains(*SReg)) { +      if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) {          ContainsSuperReg = true;          break;        }  | 
