diff options
Diffstat (limited to 'contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp')
| -rw-r--r-- | contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 11 | 
1 files changed, 6 insertions, 5 deletions
diff --git a/contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp index dd515b0bf2f1..f236f10ba75a 100644 --- a/contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp +++ b/contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp @@ -16,6 +16,7 @@  #include "SIDefines.h"  #include "SIInstrInfo.h"  #include "SIRegisterInfo.h" +#include "MCTargetDesc/AMDGPUMCTargetDesc.h"  #include "Utils/AMDGPUBaseInfo.h"  #include "llvm/ADT/iterator_range.h"  #include "llvm/CodeGen/MachineFunction.h" @@ -39,7 +40,7 @@ using namespace llvm;  GCNHazardRecognizer::GCNHazardRecognizer(const MachineFunction &MF) :    CurrCycleInstr(nullptr),    MF(MF), -  ST(MF.getSubtarget<SISubtarget>()), +  ST(MF.getSubtarget<GCNSubtarget>()),    TII(*ST.getInstrInfo()),    TRI(TII.getRegisterInfo()),    ClauseUses(TRI.getNumRegUnits()), @@ -355,13 +356,13 @@ int GCNHazardRecognizer::checkSoftClauseHazards(MachineInstr *MEM) {  }  int GCNHazardRecognizer::checkSMRDHazards(MachineInstr *SMRD) { -  const SISubtarget &ST = MF.getSubtarget<SISubtarget>(); +  const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();    int WaitStatesNeeded = 0;    WaitStatesNeeded = checkSoftClauseHazards(SMRD);    // This SMRD hazard only affects SI. -  if (ST.getGeneration() != SISubtarget::SOUTHERN_ISLANDS) +  if (ST.getGeneration() != AMDGPUSubtarget::SOUTHERN_ISLANDS)      return WaitStatesNeeded;    // A read of an SGPR by SMRD instruction requires 4 wait states when the @@ -398,7 +399,7 @@ int GCNHazardRecognizer::checkSMRDHazards(MachineInstr *SMRD) {  }  int GCNHazardRecognizer::checkVMEMHazards(MachineInstr* VMEM) { -  if (ST.getGeneration() < SISubtarget::VOLCANIC_ISLANDS) +  if (ST.getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS)      return 0;    int WaitStatesNeeded = checkSoftClauseHazards(VMEM); @@ -634,7 +635,7 @@ int GCNHazardRecognizer::checkRFEHazards(MachineInstr *RFE) {  }  int GCNHazardRecognizer::checkAnyInstHazards(MachineInstr *MI) { -  if (MI->isDebugValue()) +  if (MI->isDebugInstr())      return 0;    const SIRegisterInfo *TRI = ST.getRegisterInfo();  | 
