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-rw-r--r--include/llvm/CodeGen/BasicTTIImpl.h14
-rw-r--r--include/llvm/CodeGen/GlobalISel/InstructionSelector.h17
-rw-r--r--include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h6
-rw-r--r--include/llvm/CodeGen/LiveStacks.h (renamed from include/llvm/CodeGen/LiveStackAnalysis.h)8
-rw-r--r--include/llvm/CodeGen/MachineOperand.h7
-rw-r--r--include/llvm/CodeGen/RuntimeLibcalls.def3
-rw-r--r--include/llvm/CodeGen/SDNodeProperties.td34
-rw-r--r--include/llvm/CodeGen/SelectionDAGNodes.h12
-rw-r--r--include/llvm/CodeGen/TargetLowering.h11
9 files changed, 85 insertions, 27 deletions
diff --git a/include/llvm/CodeGen/BasicTTIImpl.h b/include/llvm/CodeGen/BasicTTIImpl.h
index bb5e7f9e8e30..f1f9275b0786 100644
--- a/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/include/llvm/CodeGen/BasicTTIImpl.h
@@ -302,9 +302,13 @@ public:
}
unsigned getFPOpCost(Type *Ty) {
- // By default, FP instructions are no more expensive since they are
- // implemented in HW. Target specific TTI can override this.
- return TargetTransformInfo::TCC_Basic;
+ // Check whether FADD is available, as a proxy for floating-point in
+ // general.
+ const TargetLoweringBase *TLI = getTLI();
+ EVT VT = TLI->getValueType(DL, Ty);
+ if (TLI->isOperationLegalOrCustomOrPromote(ISD::FADD, VT))
+ return TargetTransformInfo::TCC_Basic;
+ return TargetTransformInfo::TCC_Expensive;
}
unsigned getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) {
@@ -398,6 +402,10 @@ public:
return BaseT::getInstructionLatency(I);
}
+ bool isOutOfOrder() const {
+ return getST()->getSchedModel().isOutOfOrder();
+ }
+
/// @}
/// \name Vector TTI Implementations
diff --git a/include/llvm/CodeGen/GlobalISel/InstructionSelector.h b/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
index e599a1b179ec..4264a866b6c0 100644
--- a/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
+++ b/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
@@ -282,10 +282,6 @@ enum {
/// Provides the logic to select generic machine instructions.
class InstructionSelector {
public:
- using I64ImmediatePredicateFn = bool (*)(int64_t);
- using APIntImmediatePredicateFn = bool (*)(const APInt &);
- using APFloatImmediatePredicateFn = bool (*)(const APFloat &);
-
virtual ~InstructionSelector() = default;
/// Select the (possibly generic) instruction \p I to only use target-specific
@@ -319,9 +315,6 @@ public:
struct MatcherInfoTy {
const LLT *TypeObjects;
const PredicateBitset *FeatureBitsets;
- const I64ImmediatePredicateFn *I64ImmPredicateFns;
- const APIntImmediatePredicateFn *APIntImmPredicateFns;
- const APFloatImmediatePredicateFn *APFloatImmPredicateFns;
const ComplexMatcherMemFn *ComplexPredicates;
};
@@ -340,6 +333,16 @@ protected:
const RegisterBankInfo &RBI, const PredicateBitset &AvailableFeatures,
CodeGenCoverage &CoverageInfo) const;
+ virtual bool testImmPredicate_I64(unsigned, int64_t) const {
+ llvm_unreachable("Subclasses must override this to use tablegen");
+ }
+ virtual bool testImmPredicate_APInt(unsigned, const APInt &) const {
+ llvm_unreachable("Subclasses must override this to use tablegen");
+ }
+ virtual bool testImmPredicate_APFloat(unsigned, const APFloat &) const {
+ llvm_unreachable("Subclasses must override this to use tablegen");
+ }
+
/// Constrain a register operand of an instruction \p I to a specified
/// register class. This could involve inserting COPYs before (for uses) or
/// after (for defs) and may replace the operand of \p I.
diff --git a/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h b/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
index ac2c055ab145..bf834cf8f5e3 100644
--- a/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
+++ b/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
@@ -181,7 +181,7 @@ bool InstructionSelector::executeMatchTable(
else
llvm_unreachable("Expected Imm or CImm operand");
- if (!MatcherInfo.I64ImmPredicateFns[Predicate](Value))
+ if (!testImmPredicate_I64(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
@@ -202,7 +202,7 @@ bool InstructionSelector::executeMatchTable(
else
llvm_unreachable("Expected Imm or CImm operand");
- if (!MatcherInfo.APIntImmPredicateFns[Predicate](Value))
+ if (!testImmPredicate_APInt(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
@@ -221,7 +221,7 @@ bool InstructionSelector::executeMatchTable(
assert(Predicate > GIPFP_APFloat_Invalid && "Expected a valid predicate");
APFloat Value = State.MIs[InsnID]->getOperand(1).getFPImm()->getValueAPF();
- if (!MatcherInfo.APFloatImmPredicateFns[Predicate](Value))
+ if (!testImmPredicate_APFloat(Predicate, Value))
if (handleReject() == RejectAndGiveUp)
return false;
break;
diff --git a/include/llvm/CodeGen/LiveStackAnalysis.h b/include/llvm/CodeGen/LiveStacks.h
index c90ae7b184f4..44ed785f7b53 100644
--- a/include/llvm/CodeGen/LiveStackAnalysis.h
+++ b/include/llvm/CodeGen/LiveStacks.h
@@ -1,4 +1,4 @@
-//===- LiveStackAnalysis.h - Live Stack Slot Analysis -----------*- C++ -*-===//
+//===- LiveStacks.h - Live Stack Slot Analysis ------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -13,8 +13,8 @@
//
//===----------------------------------------------------------------------===//
-#ifndef LLVM_CODEGEN_LIVESTACKANALYSIS_H
-#define LLVM_CODEGEN_LIVESTACKANALYSIS_H
+#ifndef LLVM_CODEGEN_LIVESTACKS_H
+#define LLVM_CODEGEN_LIVESTACKS_H
#include "llvm/CodeGen/LiveInterval.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
@@ -100,4 +100,4 @@ public:
} // end namespace llvm
-#endif // LLVM_CODEGEN_LIVESTACK_ANALYSIS_H
+#endif
diff --git a/include/llvm/CodeGen/MachineOperand.h b/include/llvm/CodeGen/MachineOperand.h
index ccf0917ed085..4be7942c2c64 100644
--- a/include/llvm/CodeGen/MachineOperand.h
+++ b/include/llvm/CodeGen/MachineOperand.h
@@ -29,6 +29,7 @@ class GlobalValue;
class MachineBasicBlock;
class MachineInstr;
class MachineRegisterInfo;
+class MCCFIInstruction;
class MDNode;
class ModuleSlotTracker;
class TargetMachine;
@@ -250,6 +251,12 @@ public:
static void printStackObjectReference(raw_ostream &OS, unsigned FrameIndex,
bool IsFixed, StringRef Name);
+ /// Print the offset with explicit +/- signs.
+ static void printOperandOffset(raw_ostream &OS, int64_t Offset);
+
+ /// Print an IRSlotNumber.
+ static void printIRSlotNumber(raw_ostream &OS, int Slot);
+
/// Print the MachineOperand to \p os.
/// Providing a valid \p TRI and \p IntrinsicInfo results in a more
/// target-specific printing. If \p TRI and \p IntrinsicInfo are null, the
diff --git a/include/llvm/CodeGen/RuntimeLibcalls.def b/include/llvm/CodeGen/RuntimeLibcalls.def
index e042ae982e86..7695e9d782ef 100644
--- a/include/llvm/CodeGen/RuntimeLibcalls.def
+++ b/include/llvm/CodeGen/RuntimeLibcalls.def
@@ -165,6 +165,8 @@ HANDLE_LIBCALL(SINCOS_F64, nullptr)
HANDLE_LIBCALL(SINCOS_F80, nullptr)
HANDLE_LIBCALL(SINCOS_F128, nullptr)
HANDLE_LIBCALL(SINCOS_PPCF128, nullptr)
+HANDLE_LIBCALL(SINCOS_STRET_F32, nullptr)
+HANDLE_LIBCALL(SINCOS_STRET_F64, nullptr)
HANDLE_LIBCALL(POW_F32, "powf")
HANDLE_LIBCALL(POW_F64, "pow")
HANDLE_LIBCALL(POW_F80, "powl")
@@ -334,6 +336,7 @@ HANDLE_LIBCALL(O_PPCF128, "__gcc_qunord")
HANDLE_LIBCALL(MEMCPY, "memcpy")
HANDLE_LIBCALL(MEMMOVE, "memmove")
HANDLE_LIBCALL(MEMSET, "memset")
+HANDLE_LIBCALL(BZERO, nullptr)
// Element-wise unordered-atomic memory of different sizes
HANDLE_LIBCALL(MEMCPY_ELEMENT_UNORDERED_ATOMIC_1, "__llvm_memcpy_element_unordered_atomic_1")
diff --git a/include/llvm/CodeGen/SDNodeProperties.td b/include/llvm/CodeGen/SDNodeProperties.td
new file mode 100644
index 000000000000..83bbab2fdc8d
--- /dev/null
+++ b/include/llvm/CodeGen/SDNodeProperties.td
@@ -0,0 +1,34 @@
+//===- SDNodeProperties.td - Common code for DAG isels ---*- tablegen -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+class SDNodeProperty;
+
+// Selection DAG Pattern Operations
+class SDPatternOperator {
+ list<SDNodeProperty> Properties = [];
+}
+
+//===----------------------------------------------------------------------===//
+// Selection DAG Node Properties.
+//
+// Note: These are hard coded into tblgen.
+//
+def SDNPCommutative : SDNodeProperty; // X op Y == Y op X
+def SDNPAssociative : SDNodeProperty; // (X op Y) op Z == X op (Y op Z)
+def SDNPHasChain : SDNodeProperty; // R/W chain operand and result
+def SDNPOutGlue : SDNodeProperty; // Write a flag result
+def SDNPInGlue : SDNodeProperty; // Read a flag operand
+def SDNPOptInGlue : SDNodeProperty; // Optionally read a flag operand
+def SDNPMayStore : SDNodeProperty; // May write to memory, sets 'mayStore'.
+def SDNPMayLoad : SDNodeProperty; // May read memory, sets 'mayLoad'.
+def SDNPSideEffect : SDNodeProperty; // Sets 'HasUnmodelledSideEffects'.
+def SDNPMemOperand : SDNodeProperty; // Touches memory, has assoc MemOperand
+def SDNPVariadic : SDNodeProperty; // Node has variable arguments.
+def SDNPWantRoot : SDNodeProperty; // ComplexPattern gets the root of match
+def SDNPWantParent : SDNodeProperty; // ComplexPattern gets the parent
diff --git a/include/llvm/CodeGen/SelectionDAGNodes.h b/include/llvm/CodeGen/SelectionDAGNodes.h
index 7de2e766d521..522c2f1b2cb2 100644
--- a/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -189,8 +189,8 @@ public:
inline bool isUndef() const;
inline unsigned getMachineOpcode() const;
inline const DebugLoc &getDebugLoc() const;
- inline void dump() const;
- inline void dumpr() const;
+ inline void dump(const SelectionDAG *G = nullptr) const;
+ inline void dumpr(const SelectionDAG *G = nullptr) const;
/// Return true if this operand (which must be a chain) reaches the
/// specified operand without crossing any side-effecting instructions.
@@ -1089,12 +1089,12 @@ inline const DebugLoc &SDValue::getDebugLoc() const {
return Node->getDebugLoc();
}
-inline void SDValue::dump() const {
- return Node->dump();
+inline void SDValue::dump(const SelectionDAG *G) const {
+ return Node->dump(G);
}
-inline void SDValue::dumpr() const {
- return Node->dumpr();
+inline void SDValue::dumpr(const SelectionDAG *G) const {
+ return Node->dumpr(G);
}
// Define inline functions from the SDUse class.
diff --git a/include/llvm/CodeGen/TargetLowering.h b/include/llvm/CodeGen/TargetLowering.h
index 0fa19d09e776..380e3b19dc80 100644
--- a/include/llvm/CodeGen/TargetLowering.h
+++ b/include/llvm/CodeGen/TargetLowering.h
@@ -824,8 +824,8 @@ public:
/// also combined within this function. Currently, the minimum size check is
/// performed in findJumpTable() in SelectionDAGBuiler and
/// getEstimatedNumberOfCaseClusters() in BasicTTIImpl.
- bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases,
- uint64_t Range) const {
+ virtual bool isSuitableForJumpTable(const SwitchInst *SI, uint64_t NumCases,
+ uint64_t Range) const {
const bool OptForSize = SI->getParent()->getParent()->optForSize();
const unsigned MinDensity = getMinimumJumpTableDensity(OptForSize);
const unsigned MaxJumpTableSize =
@@ -1276,7 +1276,7 @@ public:
}
/// Return lower limit for number of blocks in a jump table.
- unsigned getMinimumJumpTableEntries() const;
+ virtual unsigned getMinimumJumpTableEntries() const;
/// Return lower limit of the density in a jump table.
unsigned getMinimumJumpTableDensity(bool OptForSize) const;
@@ -2429,7 +2429,7 @@ private:
PromoteToType;
/// Stores the name each libcall.
- const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL];
+ const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL + 1];
/// The ISD::CondCode that should be used to test the result of each of the
/// comparison libcall against zero.
@@ -2438,6 +2438,9 @@ private:
/// Stores the CallingConv that should be used for each libcall.
CallingConv::ID LibcallCallingConvs[RTLIB::UNKNOWN_LIBCALL];
+ /// Set default libcall names and calling conventions.
+ void InitLibcalls(const Triple &TT);
+
protected:
/// Return true if the extension represented by \p I is free.
/// \pre \p I is a sign, zero, or fp extension and
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-31 18:36:39 +0000