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-rw-r--r--include/llvm/Target/Mangler.h2
-rw-r--r--include/llvm/Target/Target.td30
-rw-r--r--include/llvm/Target/TargetAsmLexer.h10
-rw-r--r--include/llvm/Target/TargetData.h5
-rw-r--r--include/llvm/Target/TargetInstrInfo.h57
-rw-r--r--include/llvm/Target/TargetLowering.h63
-rw-r--r--include/llvm/Target/TargetLoweringObjectFile.h182
-rw-r--r--include/llvm/Target/TargetMachOWriterInfo.h112
-rw-r--r--include/llvm/Target/TargetMachine.h212
-rw-r--r--include/llvm/Target/TargetOpcodes.h72
-rw-r--r--include/llvm/Target/TargetOptions.h11
-rw-r--r--include/llvm/Target/TargetRegisterInfo.h6
-rw-r--r--include/llvm/Target/TargetRegistry.h36
13 files changed, 199 insertions, 599 deletions
diff --git a/include/llvm/Target/Mangler.h b/include/llvm/Target/Mangler.h
index 04de4e9610e2..45cbf9da1e4e 100644
--- a/include/llvm/Target/Mangler.h
+++ b/include/llvm/Target/Mangler.h
@@ -1,4 +1,4 @@
-//===-- llvm/Support/Mangler.h - Self-contained name mangler ----*- C++ -*-===//
+//===-- llvm/Target/Mangler.h - Self-contained name mangler ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index 354e7438b1fe..9a117dff3151 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -376,7 +376,7 @@ class OptionalDefOperand<ValueType ty, dag OpTypes, dag defaultops>
// InstrInfo - This class should only be instantiated once to provide parameters
-// which are global to the the target machine.
+// which are global to the target machine.
//
class InstrInfo {
// If the target wants to associate some target-specific information with each
@@ -399,19 +399,19 @@ def PHI : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops variable_ops);
let AsmString = "PHINODE";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
}
def INLINEASM : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops variable_ops);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
}
def DBG_LABEL : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops i32imm:$id);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let hasCtrlDep = 1;
let isNotDuplicable = 1;
}
@@ -419,7 +419,7 @@ def EH_LABEL : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops i32imm:$id);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let hasCtrlDep = 1;
let isNotDuplicable = 1;
}
@@ -427,7 +427,7 @@ def GC_LABEL : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops i32imm:$id);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let hasCtrlDep = 1;
let isNotDuplicable = 1;
}
@@ -435,21 +435,21 @@ def KILL : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops variable_ops);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let neverHasSideEffects = 1;
}
def EXTRACT_SUBREG : Instruction {
let OutOperandList = (ops unknown:$dst);
let InOperandList = (ops unknown:$supersrc, i32imm:$subidx);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let neverHasSideEffects = 1;
}
def INSERT_SUBREG : Instruction {
let OutOperandList = (ops unknown:$dst);
let InOperandList = (ops unknown:$supersrc, unknown:$subsrc, i32imm:$subidx);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let neverHasSideEffects = 1;
let Constraints = "$supersrc = $dst";
}
@@ -457,7 +457,7 @@ def IMPLICIT_DEF : Instruction {
let OutOperandList = (ops unknown:$dst);
let InOperandList = (ops);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let neverHasSideEffects = 1;
let isReMaterializable = 1;
let isAsCheapAsAMove = 1;
@@ -466,22 +466,22 @@ def SUBREG_TO_REG : Instruction {
let OutOperandList = (ops unknown:$dst);
let InOperandList = (ops unknown:$implsrc, unknown:$subsrc, i32imm:$subidx);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let neverHasSideEffects = 1;
}
def COPY_TO_REGCLASS : Instruction {
let OutOperandList = (ops unknown:$dst);
let InOperandList = (ops unknown:$src, i32imm:$regclass);
let AsmString = "";
- let Namespace = "TargetInstrInfo";
+ let Namespace = "TargetOpcode";
let neverHasSideEffects = 1;
let isAsCheapAsAMove = 1;
}
-def DEBUG_VALUE : Instruction {
+def DBG_VALUE : Instruction {
let OutOperandList = (ops);
let InOperandList = (ops variable_ops);
- let AsmString = "DEBUG_VALUE";
- let Namespace = "TargetInstrInfo";
+ let AsmString = "DBG_VALUE";
+ let Namespace = "TargetOpcode";
let isAsCheapAsAMove = 1;
}
}
diff --git a/include/llvm/Target/TargetAsmLexer.h b/include/llvm/Target/TargetAsmLexer.h
index daba1ba88b99..9fcf449a86cd 100644
--- a/include/llvm/Target/TargetAsmLexer.h
+++ b/include/llvm/Target/TargetAsmLexer.h
@@ -38,12 +38,22 @@ protected: // Can only create subclasses.
/// TheTarget - The Target that this machine was created for.
const Target &TheTarget;
+ MCAsmLexer *Lexer;
public:
virtual ~TargetAsmLexer();
const Target &getTarget() const { return TheTarget; }
+ /// InstallLexer - Set the lexer to get tokens from lower-level lexer \arg L.
+ void InstallLexer(MCAsmLexer &L) {
+ Lexer = &L;
+ }
+
+ MCAsmLexer *getLexer() {
+ return Lexer;
+ }
+
/// Lex - Consume the next token from the input stream and return it.
const AsmToken &Lex() {
return CurTok = LexToken();
diff --git a/include/llvm/Target/TargetData.h b/include/llvm/Target/TargetData.h
index 2e63188989ab..cc88dae9fa68 100644
--- a/include/llvm/Target/TargetData.h
+++ b/include/llvm/Target/TargetData.h
@@ -224,6 +224,11 @@ public:
/// getABITypeAlignment - Return the minimum ABI-required alignment for the
/// specified type.
unsigned char getABITypeAlignment(const Type *Ty) const;
+
+ /// getABIIntegerTypeAlignment - Return the minimum ABI-required alignment for
+ /// an integer type of the specified bitwidth.
+ unsigned char getABIIntegerTypeAlignment(unsigned BitWidth) const;
+
/// getCallFrameTypeAlignment - Return the minimum ABI-required alignment
/// for the specified type when it is part of a call frame.
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 7144fe092e68..d95e4e8acdef 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -45,55 +45,6 @@ public:
TargetInstrInfo(const TargetInstrDesc *desc, unsigned NumOpcodes);
virtual ~TargetInstrInfo();
- // Invariant opcodes: All instruction sets have these as their low opcodes.
- enum {
- PHI = 0,
- INLINEASM = 1,
- DBG_LABEL = 2,
- EH_LABEL = 3,
- GC_LABEL = 4,
-
- /// KILL - This instruction is a noop that is used only to adjust the liveness
- /// of registers. This can be useful when dealing with sub-registers.
- KILL = 5,
-
- /// EXTRACT_SUBREG - This instruction takes two operands: a register
- /// that has subregisters, and a subregister index. It returns the
- /// extracted subregister value. This is commonly used to implement
- /// truncation operations on target architectures which support it.
- EXTRACT_SUBREG = 6,
-
- /// INSERT_SUBREG - This instruction takes three operands: a register
- /// that has subregisters, a register providing an insert value, and a
- /// subregister index. It returns the value of the first register with
- /// the value of the second register inserted. The first register is
- /// often defined by an IMPLICIT_DEF, as is commonly used to implement
- /// anyext operations on target architectures which support it.
- INSERT_SUBREG = 7,
-
- /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
- IMPLICIT_DEF = 8,
-
- /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except
- /// that the first operand is an immediate integer constant. This constant
- /// is often zero, as is commonly used to implement zext operations on
- /// target architectures which support it, such as with x86-64 (with
- /// zext from i32 to i64 via implicit zero-extension).
- SUBREG_TO_REG = 9,
-
- /// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
- /// register-to-register copy into a specific register class. This is only
- /// used between instruction selection and MachineInstr creation, before
- /// virtual registers have been created for all the instructions, and it's
- /// only needed in cases where the register classes implied by the
- /// instructions are insufficient. The actual MachineInstrs to perform
- /// the copy are emitted with the TargetInstrInfo::copyRegToReg hook.
- COPY_TO_REGCLASS = 10,
-
- // DEBUG_VALUE - a mapping of the llvm.dbg.value intrinsic
- DEBUG_VALUE = 11
- };
-
unsigned getNumOpcodes() const { return NumOpcodes; }
/// get - Return the machine instruction descriptor that corresponds to the
@@ -109,7 +60,7 @@ public:
/// that aren't always available.
bool isTriviallyReMaterializable(const MachineInstr *MI,
AliasAnalysis *AA = 0) const {
- return MI->getOpcode() == IMPLICIT_DEF ||
+ return MI->getOpcode() == TargetOpcode::IMPLICIT_DEF ||
(MI->getDesc().isRematerializable() &&
(isReallyTriviallyReMaterializable(MI, AA) ||
isReallyTriviallyReMaterializableGeneric(MI, AA)));
@@ -167,12 +118,12 @@ public:
SrcReg == DstReg)
return true;
- if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG &&
+ if (MI.getOpcode() == TargetOpcode::EXTRACT_SUBREG &&
MI.getOperand(0).getReg() == MI.getOperand(1).getReg())
return true;
- if ((MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
- MI.getOpcode() == TargetInstrInfo::SUBREG_TO_REG) &&
+ if ((MI.getOpcode() == TargetOpcode::INSERT_SUBREG ||
+ MI.getOpcode() == TargetOpcode::SUBREG_TO_REG) &&
MI.getOperand(0).getReg() == MI.getOperand(2).getReg())
return true;
return false;
diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 15da8456f172..c6ac89a8ac19 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -46,7 +46,10 @@ namespace llvm {
class MachineFunction;
class MachineFrameInfo;
class MachineInstr;
+ class MachineJumpTableInfo;
class MachineModuleInfo;
+ class MCContext;
+ class MCExpr;
class DwarfWriter;
class SDNode;
class SDValue;
@@ -115,10 +118,6 @@ public:
MVT getPointerTy() const { return PointerTy; }
MVT getShiftAmountTy() const { return ShiftAmountTy; }
- /// usesGlobalOffsetTable - Return true if this target uses a GOT for PIC
- /// codegen.
- bool usesGlobalOffsetTable() const { return UsesGlobalOffsetTable; }
-
/// isSelectExpensive - Return true if the select operation is expensive for
/// this target.
bool isSelectExpensive() const { return SelectIsExpensive; }
@@ -347,6 +346,11 @@ public:
return true;
}
+ /// canOpTrap - Returns true if the operation can trap for the value type.
+ /// VT must be a legal type. By default, we optimistically assume most
+ /// operations don't trap except for divide and remainder.
+ virtual bool canOpTrap(unsigned Op, EVT VT) const;
+
/// isVectorClearMaskLegal - Similar to isShuffleMaskLegal. This is
/// used by Targets can use this to indicate if there is a suitable
/// VECTOR_SHUFFLE that can be used to replace a VAND with a constant
@@ -752,11 +756,31 @@ public:
return false;
}
+ /// getJumpTableEncoding - Return the entry encoding for a jump table in the
+ /// current function. The returned value is a member of the
+ /// MachineJumpTableInfo::JTEntryKind enum.
+ virtual unsigned getJumpTableEncoding() const;
+
+ virtual const MCExpr *
+ LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI,
+ const MachineBasicBlock *MBB, unsigned uid,
+ MCContext &Ctx) const {
+ assert(0 && "Need to implement this hook if target has custom JTIs");
+ return 0;
+ }
+
/// getPICJumpTableRelocaBase - Returns relocation base for the given PIC
/// jumptable.
virtual SDValue getPICJumpTableRelocBase(SDValue Table,
- SelectionDAG &DAG) const;
+ SelectionDAG &DAG) const;
+ /// getPICJumpTableRelocBaseExpr - This returns the relocation base for the
+ /// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an
+ /// MCExpr.
+ virtual const MCExpr *
+ getPICJumpTableRelocBaseExpr(const MachineFunction *MF,
+ unsigned JTI, MCContext &Ctx) const;
+
/// isOffsetFoldingLegal - Return true if folding a constant offset
/// with the given GlobalAddress is legal. It is frequently not legal in
/// PIC relocation models.
@@ -886,10 +910,6 @@ public:
//
protected:
- /// setUsesGlobalOffsetTable - Specify that this target does or doesn't use a
- /// GOT for PC-relative code.
- void setUsesGlobalOffsetTable(bool V) { UsesGlobalOffsetTable = V; }
-
/// setShiftAmountType - Describe the type that should be used for shift
/// amounts. This type defaults to the pointer type.
void setShiftAmountType(MVT VT) { ShiftAmountTy = VT; }
@@ -1152,15 +1172,9 @@ public:
/// described by the Ins array. The implementation should fill in the
/// InVals array with legal-type return values from the call, and return
/// the resulting token chain value.
- ///
- /// The isTailCall flag here is normative. If it is true, the
- /// implementation must emit a tail call. The
- /// IsEligibleForTailCallOptimization hook should be used to catch
- /// cases that cannot be handled.
- ///
virtual SDValue
LowerCall(SDValue Chain, SDValue Callee,
- CallingConv::ID CallConv, bool isVarArg, bool isTailCall,
+ CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
const SmallVectorImpl<ISD::OutputArg> &Outs,
const SmallVectorImpl<ISD::InputArg> &Ins,
DebugLoc dl, SelectionDAG &DAG,
@@ -1286,19 +1300,6 @@ public:
assert(0 && "ReplaceNodeResults not implemented for this target!");
}
- /// IsEligibleForTailCallOptimization - Check whether the call is eligible for
- /// tail call optimization. Targets which want to do tail call optimization
- /// should override this function.
- virtual bool
- IsEligibleForTailCallOptimization(SDValue Callee,
- CallingConv::ID CalleeCC,
- bool isVarArg,
- const SmallVectorImpl<ISD::InputArg> &Ins,
- SelectionDAG& DAG) const {
- // Conservative default: no calls are eligible.
- return false;
- }
-
/// getTargetNodeName() - This method returns the name of a target specific
/// DAG node.
virtual const char *getTargetNodeName(unsigned Opcode) const;
@@ -1572,10 +1573,6 @@ private:
///
bool IsLittleEndian;
- /// UsesGlobalOffsetTable - True if this target uses a GOT for PIC codegen.
- ///
- bool UsesGlobalOffsetTable;
-
/// SelectIsExpensive - Tells the code generator not to expand operations
/// into sequences that use the select operations if possible.
bool SelectIsExpensive;
diff --git a/include/llvm/Target/TargetLoweringObjectFile.h b/include/llvm/Target/TargetLoweringObjectFile.h
index d3e5cf2119a3..42d88a00a5a5 100644
--- a/include/llvm/Target/TargetLoweringObjectFile.h
+++ b/include/llvm/Target/TargetLoweringObjectFile.h
@@ -25,6 +25,7 @@ namespace llvm {
class MCExpr;
class MCSection;
class MCSectionMachO;
+ class MCSymbol;
class MCContext;
class GlobalValue;
class TargetMachine;
@@ -175,187 +176,26 @@ public:
return 0;
}
- /// getSymbolForDwarfGlobalReference - Return an MCExpr to use for a
- /// pc-relative reference to the specified global variable from exception
- /// handling information. In addition to the symbol, this returns
- /// by-reference:
- ///
- /// IsIndirect - True if the returned symbol is actually a stub that contains
- /// the address of the symbol, false if the symbol is the global itself.
- ///
- /// IsPCRel - True if the symbol reference is already pc-relative, false if
- /// the caller needs to subtract off the address of the reference from the
- /// symbol.
+ /// getSymbolForDwarfGlobalReference - Return an MCExpr to use for a reference
+ /// to the specified global variable from exception handling information.
///
virtual const MCExpr *
getSymbolForDwarfGlobalReference(const GlobalValue *GV, Mangler *Mang,
- MachineModuleInfo *MMI,
- bool &IsIndirect, bool &IsPCRel) const;
-
-protected:
- virtual const MCSection *
- SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
- Mangler *Mang, const TargetMachine &TM) const;
-};
-
-
-
+ MachineModuleInfo *MMI, unsigned Encoding) const;
-class TargetLoweringObjectFileELF : public TargetLoweringObjectFile {
- mutable void *UniquingMap;
-protected:
- /// TLSDataSection - Section directive for Thread Local data.
- ///
- const MCSection *TLSDataSection; // Defaults to ".tdata".
-
- /// TLSBSSSection - Section directive for Thread Local uninitialized data.
- /// Null if this target doesn't support a BSS section.
- ///
- const MCSection *TLSBSSSection; // Defaults to ".tbss".
-
- const MCSection *DataRelSection;
- const MCSection *DataRelLocalSection;
- const MCSection *DataRelROSection;
- const MCSection *DataRelROLocalSection;
-
- const MCSection *MergeableConst4Section;
- const MCSection *MergeableConst8Section;
- const MCSection *MergeableConst16Section;
-
-protected:
- const MCSection *getELFSection(StringRef Section, unsigned Type,
- unsigned Flags, SectionKind Kind,
- bool IsExplicit = false) const;
-public:
- TargetLoweringObjectFileELF() : UniquingMap(0) {}
- ~TargetLoweringObjectFileELF();
-
- virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
-
- /// getSectionForConstant - Given a constant with the SectionKind, return a
- /// section that it should be placed in.
- virtual const MCSection *getSectionForConstant(SectionKind Kind) const;
-
-
- virtual const MCSection *
- getExplicitSectionGlobal(const GlobalValue *GV, SectionKind Kind,
- Mangler *Mang, const TargetMachine &TM) const;
-
- virtual const MCSection *
- SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
- Mangler *Mang, const TargetMachine &TM) const;
-};
-
-
-
-class TargetLoweringObjectFileMachO : public TargetLoweringObjectFile {
- mutable void *UniquingMap;
-
- const MCSection *CStringSection;
- const MCSection *UStringSection;
- const MCSection *TextCoalSection;
- const MCSection *ConstTextCoalSection;
- const MCSection *ConstDataCoalSection;
- const MCSection *ConstDataSection;
- const MCSection *DataCoalSection;
- const MCSection *DataCommonSection;
- const MCSection *DataBSSSection;
- const MCSection *FourByteConstantSection;
- const MCSection *EightByteConstantSection;
- const MCSection *SixteenByteConstantSection;
-
- const MCSection *LazySymbolPointerSection;
- const MCSection *NonLazySymbolPointerSection;
-public:
- TargetLoweringObjectFileMachO() : UniquingMap(0) {}
- ~TargetLoweringObjectFileMachO();
-
- virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
-
- virtual const MCSection *
- SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
- Mangler *Mang, const TargetMachine &TM) const;
-
- virtual const MCSection *
- getExplicitSectionGlobal(const GlobalValue *GV, SectionKind Kind,
- Mangler *Mang, const TargetMachine &TM) const;
-
- virtual const MCSection *getSectionForConstant(SectionKind Kind) const;
-
- /// shouldEmitUsedDirectiveFor - This hook allows targets to selectively
- /// decide not to emit the UsedDirective for some symbols in llvm.used.
- /// FIXME: REMOVE this (rdar://7071300)
- virtual bool shouldEmitUsedDirectiveFor(const GlobalValue *GV,
- Mangler *) const;
-
- /// getMachOSection - Return the MCSection for the specified mach-o section.
- /// This requires the operands to be valid.
- const MCSectionMachO *getMachOSection(StringRef Segment,
- StringRef Section,
- unsigned TypeAndAttributes,
- SectionKind K) const {
- return getMachOSection(Segment, Section, TypeAndAttributes, 0, K);
- }
- const MCSectionMachO *getMachOSection(StringRef Segment,
- StringRef Section,
- unsigned TypeAndAttributes,
- unsigned Reserved2,
- SectionKind K) const;
-
- /// getTextCoalSection - Return the "__TEXT,__textcoal_nt" section we put weak
- /// text symbols into.
- const MCSection *getTextCoalSection() const {
- return TextCoalSection;
- }
-
- /// getConstTextCoalSection - Return the "__TEXT,__const_coal" section
- /// we put weak read-only symbols into.
- const MCSection *getConstTextCoalSection() const {
- return ConstTextCoalSection;
- }
-
- /// getLazySymbolPointerSection - Return the section corresponding to
- /// the .lazy_symbol_pointer directive.
- const MCSection *getLazySymbolPointerSection() const {
- return LazySymbolPointerSection;
- }
-
- /// getNonLazySymbolPointerSection - Return the section corresponding to
- /// the .non_lazy_symbol_pointer directive.
- const MCSection *getNonLazySymbolPointerSection() const {
- return NonLazySymbolPointerSection;
- }
-
- /// getSymbolForDwarfGlobalReference - The mach-o version of this method
- /// defaults to returning a stub reference.
virtual const MCExpr *
- getSymbolForDwarfGlobalReference(const GlobalValue *GV, Mangler *Mang,
- MachineModuleInfo *MMI,
- bool &IsIndirect, bool &IsPCRel) const;
-};
+ getSymbolForDwarfReference(const MCSymbol *Sym, MachineModuleInfo *MMI,
+ unsigned Encoding) const;
+ virtual unsigned getPersonalityEncoding() const;
+ virtual unsigned getLSDAEncoding() const;
+ virtual unsigned getFDEEncoding() const;
+ virtual unsigned getTTypeEncoding() const;
-
-class TargetLoweringObjectFileCOFF : public TargetLoweringObjectFile {
- mutable void *UniquingMap;
-public:
- TargetLoweringObjectFileCOFF() : UniquingMap(0) {}
- ~TargetLoweringObjectFileCOFF();
-
- virtual void Initialize(MCContext &Ctx, const TargetMachine &TM);
-
- virtual const MCSection *
- getExplicitSectionGlobal(const GlobalValue *GV, SectionKind Kind,
- Mangler *Mang, const TargetMachine &TM) const;
-
+protected:
virtual const MCSection *
SelectSectionForGlobal(const GlobalValue *GV, SectionKind Kind,
Mangler *Mang, const TargetMachine &TM) const;
-
- /// getCOFFSection - Return the MCSection for the specified COFF section.
- /// FIXME: Switch this to a semantic view eventually.
- const MCSection *getCOFFSection(StringRef Name, bool isDirective,
- SectionKind K) const;
};
} // end namespace llvm
diff --git a/include/llvm/Target/TargetMachOWriterInfo.h b/include/llvm/Target/TargetMachOWriterInfo.h
deleted file mode 100644
index f723bb5bee6a..000000000000
--- a/include/llvm/Target/TargetMachOWriterInfo.h
+++ /dev/null
@@ -1,112 +0,0 @@
-//===-- llvm/Target/TargetMachOWriterInfo.h - MachO Writer Info--*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file defines the TargetMachOWriterInfo class.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_TARGET_TARGETMACHOWRITERINFO_H
-#define LLVM_TARGET_TARGETMACHOWRITERINFO_H
-
-#include "llvm/CodeGen/MachineRelocation.h"
-
-namespace llvm {
-
- class MachineBasicBlock;
- class OutputBuffer;
-
- //===--------------------------------------------------------------------===//
- // TargetMachOWriterInfo
- //===--------------------------------------------------------------------===//
-
- class TargetMachOWriterInfo {
- uint32_t CPUType; // CPU specifier
- uint32_t CPUSubType; // Machine specifier
- public:
- // The various CPU_TYPE_* constants are already defined by at least one
- // system header file and create compilation errors if not respected.
-#if !defined(CPU_TYPE_I386)
-#define CPU_TYPE_I386 7
-#endif
-#if !defined(CPU_TYPE_X86_64)
-#define CPU_TYPE_X86_64 (CPU_TYPE_I386 | 0x1000000)
-#endif
-#if !defined(CPU_TYPE_ARM)
-#define CPU_TYPE_ARM 12
-#endif
-#if !defined(CPU_TYPE_SPARC)
-#define CPU_TYPE_SPARC 14
-#endif
-#if !defined(CPU_TYPE_POWERPC)
-#define CPU_TYPE_POWERPC 18
-#endif
-#if !defined(CPU_TYPE_POWERPC64)
-#define CPU_TYPE_POWERPC64 (CPU_TYPE_POWERPC | 0x1000000)
-#endif
-
- // Constants for the cputype field
- // see <mach/machine.h>
- enum {
- HDR_CPU_TYPE_I386 = CPU_TYPE_I386,
- HDR_CPU_TYPE_X86_64 = CPU_TYPE_X86_64,
- HDR_CPU_TYPE_ARM = CPU_TYPE_ARM,
- HDR_CPU_TYPE_SPARC = CPU_TYPE_SPARC,
- HDR_CPU_TYPE_POWERPC = CPU_TYPE_POWERPC,
- HDR_CPU_TYPE_POWERPC64 = CPU_TYPE_POWERPC64
- };
-
-#if !defined(CPU_SUBTYPE_I386_ALL)
-#define CPU_SUBTYPE_I386_ALL 3
-#endif
-#if !defined(CPU_SUBTYPE_X86_64_ALL)
-#define CPU_SUBTYPE_X86_64_ALL 3
-#endif
-#if !defined(CPU_SUBTYPE_ARM_ALL)
-#define CPU_SUBTYPE_ARM_ALL 0
-#endif
-#if !defined(CPU_SUBTYPE_SPARC_ALL)
-#define CPU_SUBTYPE_SPARC_ALL 0
-#endif
-#if !defined(CPU_SUBTYPE_POWERPC_ALL)
-#define CPU_SUBTYPE_POWERPC_ALL 0
-#endif
-
- // Constants for the cpusubtype field
- // see <mach/machine.h>
- enum {
- HDR_CPU_SUBTYPE_I386_ALL = CPU_SUBTYPE_I386_ALL,
- HDR_CPU_SUBTYPE_X86_64_ALL = CPU_SUBTYPE_X86_64_ALL,
- HDR_CPU_SUBTYPE_ARM_ALL = CPU_SUBTYPE_ARM_ALL,
- HDR_CPU_SUBTYPE_SPARC_ALL = CPU_SUBTYPE_SPARC_ALL,
- HDR_CPU_SUBTYPE_POWERPC_ALL = CPU_SUBTYPE_POWERPC_ALL
- };
-
- TargetMachOWriterInfo(uint32_t cputype, uint32_t cpusubtype)
- : CPUType(cputype), CPUSubType(cpusubtype) {}
- virtual ~TargetMachOWriterInfo();
-
- virtual MachineRelocation GetJTRelocation(unsigned Offset,
- MachineBasicBlock *MBB) const;
-
- virtual unsigned GetTargetRelocation(MachineRelocation &MR,
- unsigned FromIdx,
- unsigned ToAddr,
- unsigned ToIdx,
- OutputBuffer &RelocOut,
- OutputBuffer &SecOut,
- bool Scattered,
- bool Extern) const { return 0; }
-
- uint32_t getCPUType() const { return CPUType; }
- uint32_t getCPUSubType() const { return CPUSubType; }
- };
-
-} // end llvm namespace
-
-#endif // LLVM_TARGET_TARGETMACHOWRITERINFO_H
diff --git a/include/llvm/Target/TargetMachine.h b/include/llvm/Target/TargetMachine.h
index 4db3d3ed3035..c496e11926e1 100644
--- a/include/llvm/Target/TargetMachine.h
+++ b/include/llvm/Target/TargetMachine.h
@@ -29,14 +29,11 @@ class TargetIntrinsicInfo;
class TargetJITInfo;
class TargetLowering;
class TargetFrameInfo;
-class MachineCodeEmitter;
class JITCodeEmitter;
-class ObjectCodeEmitter;
class TargetRegisterInfo;
class PassManagerBase;
class PassManager;
class Pass;
-class TargetMachOWriterInfo;
class TargetELFWriterInfo;
class formatted_raw_ostream;
@@ -61,16 +58,6 @@ namespace CodeModel {
};
}
-namespace FileModel {
- enum Model {
- Error,
- None,
- AsmFile,
- MachOFile,
- ElfFile
- };
-}
-
// Code generation optimization level.
namespace CodeGenOpt {
enum Level {
@@ -81,15 +68,6 @@ namespace CodeGenOpt {
};
}
-// Specify if we should encode the LSDA pointer in the FDE as 4- or 8-bytes.
-namespace DwarfLSDAEncoding {
- enum Encoding {
- Default,
- FourByte,
- EightByte
- };
-}
-
//===----------------------------------------------------------------------===//
///
/// TargetMachine - Primary interface to the complete machine description for
@@ -163,11 +141,6 @@ public:
return InstrItineraryData();
}
- /// getMachOWriterInfo - If this target supports a Mach-O writer, return
- /// information for it, otherwise return null.
- ///
- virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
-
/// getELFWriterInfo - If this target supports an ELF writer, return
/// information for it, otherwise return null.
///
@@ -197,24 +170,13 @@ public:
/// is false.
static void setAsmVerbosityDefault(bool);
- /// getLSDAEncoding - Returns the LSDA pointer encoding. The choices are
- /// 4-byte, 8-byte, and target default. The CIE is hard-coded to indicate that
- /// the LSDA pointer in the FDE section is an "sdata4", and should be encoded
- /// as a 4-byte pointer by default. However, some systems may require a
- /// different size due to bugs or other conditions. We will default to a
- /// 4-byte encoding unless the system tells us otherwise.
- ///
- /// FIXME: This call-back isn't good! We should be using the correct encoding
- /// regardless of the system. However, there are some systems which have bugs
- /// that prevent this from occuring.
- virtual DwarfLSDAEncoding::Encoding getLSDAEncoding() const {
- return DwarfLSDAEncoding::Default;
- }
-
/// CodeGenFileType - These enums are meant to be passed into
- /// addPassesToEmitFile to indicate what type of file to emit.
+ /// addPassesToEmitFile to indicate what type of file to emit, and returned by
+ /// it to indicate what type of file could actually be made.
enum CodeGenFileType {
- AssemblyFile, ObjectFile, DynamicLibrary
+ CGFT_AssemblyFile,
+ CGFT_ObjectFile,
+ CGFT_Null // Do not emit any output.
};
/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
@@ -223,61 +185,17 @@ public:
/// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code
- /// generation.
- /// This method should return FileModel::Error if emission of this file type
- /// is not supported.
- ///
- virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
- formatted_raw_ostream &,
- CodeGenFileType,
- CodeGenOpt::Level) {
- return FileModel::None;
- }
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &,
- MachineCodeEmitter *,
- CodeGenOpt::Level) {
- return true;
- }
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &,
- JITCodeEmitter *,
- CodeGenOpt::Level) {
- return true;
- }
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &,
- ObjectCodeEmitter *,
- CodeGenOpt::Level) {
- return true;
- }
-
- /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MachineCodeEmitter object to handle
- /// actually outputting the machine code and resolving things like the address
- /// of functions. This method returns true if machine code emission is
- /// not supported.
- ///
- virtual bool addPassesToEmitMachineCode(PassManagerBase &,
- MachineCodeEmitter &,
- CodeGenOpt::Level) {
+ /// generation. This method should return true if emission of this file type
+ /// is not supported, or false on success.
+ virtual bool addPassesToEmitFile(PassManagerBase &,
+ formatted_raw_ostream &,
+ CodeGenFileType Filetype,
+ CodeGenOpt::Level) {
return true;
}
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MachineCodeEmitter object to handle
+ /// get machine code emitted. This uses a JITCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method returns true if machine code emission is
/// not supported.
@@ -312,9 +230,6 @@ protected: // Can only create subclasses.
bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
private:
- // These routines are used by addPassesToEmitFileFinish and
- // addPassesToEmitMachineCode to set the CodeModel if it's still marked
- // as default.
virtual void setCodeModelForJIT();
virtual void setCodeModelForStatic();
@@ -322,56 +237,15 @@ public:
/// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code
- /// generation. If OptLevel is None, the code generator should emit code as fast
- /// as possible, though the generated code may be less efficient. This method
- /// should return FileModel::Error if emission of this file type is not
- /// supported.
- ///
- /// The default implementation of this method adds components from the
- /// LLVM retargetable code generator, invoking the methods below to get
- /// target-specific passes in standard locations.
- ///
- virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
- formatted_raw_ostream &Out,
- CodeGenFileType FileType,
- CodeGenOpt::Level);
+ /// generation. If OptLevel is None, the code generator should emit code as
+ /// fast as possible, though the generated code may be less efficient.
+ virtual bool addPassesToEmitFile(PassManagerBase &PM,
+ formatted_raw_ostream &Out,
+ CodeGenFileType FileType,
+ CodeGenOpt::Level);
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
- MachineCodeEmitter *MCE,
- CodeGenOpt::Level);
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
- JITCodeEmitter *JCE,
- CodeGenOpt::Level);
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
- ObjectCodeEmitter *OCE,
- CodeGenOpt::Level);
-
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MachineCodeEmitter object to handle
- /// actually outputting the machine code and resolving things like the address
- /// of functions. This method returns true if machine code emission is
- /// not supported.
- ///
- virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
- MachineCodeEmitter &MCE,
- CodeGenOpt::Level);
-
- /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MachineCodeEmitter object to handle
+ /// get machine code emitted. This uses a JITCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method returns true if machine code emission is
/// not supported.
@@ -424,61 +298,13 @@ public:
/// code emitter, if supported. If this is not supported, 'true' should be
/// returned.
virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- MachineCodeEmitter &) {
- return true;
- }
-
- /// addCodeEmitter - This pass should be overridden by the target to add a
- /// code emitter, if supported. If this is not supported, 'true' should be
- /// returned.
- virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
JITCodeEmitter &) {
return true;
}
- /// addSimpleCodeEmitter - This pass should be overridden by the target to add
- /// a code emitter (without setting flags), if supported. If this is not
- /// supported, 'true' should be returned.
- virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- MachineCodeEmitter &) {
- return true;
- }
-
- /// addSimpleCodeEmitter - This pass should be overridden by the target to add
- /// a code emitter (without setting flags), if supported. If this is not
- /// supported, 'true' should be returned.
- virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- JITCodeEmitter &) {
- return true;
- }
-
- /// addSimpleCodeEmitter - This pass should be overridden by the target to add
- /// a code emitter (without setting flags), if supported. If this is not
- /// supported, 'true' should be returned.
- virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- ObjectCodeEmitter &) {
- return true;
- }
-
/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
/// on this target. User flag overrides.
virtual bool getEnableTailMergeDefault() const { return true; }
-
- /// addAssemblyEmitter - Helper function which creates a target specific
- /// assembly printer, if available.
- ///
- /// \return Returns 'false' on success.
- bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
- bool /* VerboseAsmDefault */,
- formatted_raw_ostream &);
-
- /// addObjectFileEmitter - Helper function which creates a target specific
- /// object files emitter, if available. This interface is temporary, for
- /// bringing up MCAssembler-based object file emitters.
- ///
- /// \return Returns 'false' on success.
- bool addObjectFileEmitter(PassManagerBase &, CodeGenOpt::Level,
- formatted_raw_ostream &);
};
} // End llvm namespace
diff --git a/include/llvm/Target/TargetOpcodes.h b/include/llvm/Target/TargetOpcodes.h
new file mode 100644
index 000000000000..10cb45fa5345
--- /dev/null
+++ b/include/llvm/Target/TargetOpcodes.h
@@ -0,0 +1,72 @@
+//===-- llvm/Target/TargetOpcodes.h - Target Indep Opcodes ------*- C++ -*-===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines the target independent instruction opcodes.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_TARGET_TARGETOPCODES_H
+#define LLVM_TARGET_TARGETOPCODES_H
+
+namespace llvm {
+
+// Invariant opcodes: All instruction sets have these as their low opcodes.
+namespace TargetOpcode {
+ enum {
+ PHI = 0,
+ INLINEASM = 1,
+ DBG_LABEL = 2,
+ EH_LABEL = 3,
+ GC_LABEL = 4,
+
+ /// KILL - This instruction is a noop that is used only to adjust the
+ /// liveness of registers. This can be useful when dealing with
+ /// sub-registers.
+ KILL = 5,
+
+ /// EXTRACT_SUBREG - This instruction takes two operands: a register
+ /// that has subregisters, and a subregister index. It returns the
+ /// extracted subregister value. This is commonly used to implement
+ /// truncation operations on target architectures which support it.
+ EXTRACT_SUBREG = 6,
+
+ /// INSERT_SUBREG - This instruction takes three operands: a register
+ /// that has subregisters, a register providing an insert value, and a
+ /// subregister index. It returns the value of the first register with
+ /// the value of the second register inserted. The first register is
+ /// often defined by an IMPLICIT_DEF, as is commonly used to implement
+ /// anyext operations on target architectures which support it.
+ INSERT_SUBREG = 7,
+
+ /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
+ IMPLICIT_DEF = 8,
+
+ /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except
+ /// that the first operand is an immediate integer constant. This constant
+ /// is often zero, as is commonly used to implement zext operations on
+ /// target architectures which support it, such as with x86-64 (with
+ /// zext from i32 to i64 via implicit zero-extension).
+ SUBREG_TO_REG = 9,
+
+ /// COPY_TO_REGCLASS - This instruction is a placeholder for a plain
+ /// register-to-register copy into a specific register class. This is only
+ /// used between instruction selection and MachineInstr creation, before
+ /// virtual registers have been created for all the instructions, and it's
+ /// only needed in cases where the register classes implied by the
+ /// instructions are insufficient. The actual MachineInstrs to perform
+ /// the copy are emitted with the TargetInstrInfo::copyRegToReg hook.
+ COPY_TO_REGCLASS = 10,
+
+ // DBG_VALUE - a mapping of the llvm.dbg.value intrinsic
+ DBG_VALUE = 11
+ };
+} // end namespace TargetOpcode
+} // end namespace llvm
+
+#endif
diff --git a/include/llvm/Target/TargetOptions.h b/include/llvm/Target/TargetOptions.h
index b43450d2ffe1..b63c2bf0416a 100644
--- a/include/llvm/Target/TargetOptions.h
+++ b/include/llvm/Target/TargetOptions.h
@@ -116,10 +116,13 @@ namespace llvm {
/// be emitted for all functions.
extern bool UnwindTablesMandatory;
- /// PerformTailCallOpt - This flag is enabled when -tailcallopt is specified
- /// on the commandline. When the flag is on, the target will perform tail call
- /// optimization (pop the caller's stack) providing it supports it.
- extern bool PerformTailCallOpt;
+ /// GuaranteedTailCallOpt - This flag is enabled when -tailcallopt is
+ /// specified on the commandline. When the flag is on, participating targets
+ /// will perform tail call optimization on all calls which use the fastcc
+ /// calling convention and which satisfy certain target-independent
+ /// criteria (being at the end of a function, having the same return type
+ /// as their parent function, etc.), using an alternate ABI if necessary.
+ extern bool GuaranteedTailCallOpt;
/// StackAlignment - Override default stack alignment for target.
extern unsigned StackAlignment;
diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h
index f93eadb3690d..65b60f7a9366 100644
--- a/include/llvm/Target/TargetRegisterInfo.h
+++ b/include/llvm/Target/TargetRegisterInfo.h
@@ -169,7 +169,7 @@ public:
return I;
}
- /// hasSubClass - return true if the the specified TargetRegisterClass
+ /// hasSubClass - return true if the specified TargetRegisterClass
/// is a proper subset of this TargetRegisterClass.
bool hasSubClass(const TargetRegisterClass *cs) const {
for (int i = 0; SubClasses[i] != NULL; ++i)
@@ -696,12 +696,12 @@ public:
/// getFrameIndexOffset - Returns the displacement from the frame register to
/// the stack frame of the specified index.
- virtual int getFrameIndexOffset(MachineFunction &MF, int FI) const;
+ virtual int getFrameIndexOffset(const MachineFunction &MF, int FI) const;
/// getFrameIndexReference - This method should return the base register
/// and offset used to reference a frame index location. The offset is
/// returned directly, and the base register is returned via FrameReg.
- virtual int getFrameIndexReference(MachineFunction &MF, int FI,
+ virtual int getFrameIndexReference(const MachineFunction &MF, int FI,
unsigned &FrameReg) const {
// By default, assume all frame indices are referenced via whatever
// getFrameRegister() says. The target can override this if it's doing
diff --git a/include/llvm/Target/TargetRegistry.h b/include/llvm/Target/TargetRegistry.h
index d3aa867a2917..37380ab047c4 100644
--- a/include/llvm/Target/TargetRegistry.h
+++ b/include/llvm/Target/TargetRegistry.h
@@ -25,12 +25,14 @@
namespace llvm {
class AsmPrinter;
- class MCAsmParser;
- class MCCodeEmitter;
class Module;
class MCAsmInfo;
+ class MCAsmParser;
+ class MCCodeEmitter;
+ class MCContext;
class MCDisassembler;
class MCInstPrinter;
+ class MCStreamer;
class TargetAsmLexer;
class TargetAsmParser;
class TargetMachine;
@@ -58,8 +60,9 @@ namespace llvm {
const std::string &Features);
typedef AsmPrinter *(*AsmPrinterCtorTy)(formatted_raw_ostream &OS,
TargetMachine &TM,
- const MCAsmInfo *MAI,
- bool VerboseAsm);
+ MCContext &Ctx,
+ MCStreamer &Streamer,
+ const MCAsmInfo *MAI);
typedef TargetAsmLexer *(*AsmLexerCtorTy)(const Target &T,
const MCAsmInfo &MAI);
typedef TargetAsmParser *(*AsmParserCtorTy)(const Target &T,MCAsmParser &P);
@@ -69,7 +72,8 @@ namespace llvm {
const MCAsmInfo &MAI,
raw_ostream &O);
typedef MCCodeEmitter *(*CodeEmitterCtorTy)(const Target &T,
- TargetMachine &TM);
+ TargetMachine &TM,
+ MCContext &Ctx);
private:
/// Next - The next registered target in the linked list, maintained by the
@@ -189,12 +193,14 @@ namespace llvm {
return TargetMachineCtorFn(*this, Triple, Features);
}
- /// createAsmPrinter - Create a target specific assembly printer pass.
+ /// createAsmPrinter - Create a target specific assembly printer pass. This
+ /// takes ownership of the MCContext and MCStreamer objects but not the MAI.
AsmPrinter *createAsmPrinter(formatted_raw_ostream &OS, TargetMachine &TM,
- const MCAsmInfo *MAI, bool Verbose) const {
+ MCContext &Ctx, MCStreamer &Streamer,
+ const MCAsmInfo *MAI) const {
if (!AsmPrinterCtorFn)
return 0;
- return AsmPrinterCtorFn(OS, TM, MAI, Verbose);
+ return AsmPrinterCtorFn(OS, TM, Ctx, Streamer, MAI);
}
/// createAsmLexer - Create a target specific assembly lexer.
@@ -231,10 +237,10 @@ namespace llvm {
/// createCodeEmitter - Create a target specific code emitter.
- MCCodeEmitter *createCodeEmitter(TargetMachine &TM) const {
+ MCCodeEmitter *createCodeEmitter(TargetMachine &TM, MCContext &Ctx) const {
if (!CodeEmitterCtorFn)
return 0;
- return CodeEmitterCtorFn(*this, TM);
+ return CodeEmitterCtorFn(*this, TM, Ctx);
}
/// @}
@@ -547,8 +553,9 @@ namespace llvm {
private:
static AsmPrinter *Allocator(formatted_raw_ostream &OS, TargetMachine &TM,
- const MCAsmInfo *MAI, bool Verbose) {
- return new AsmPrinterImpl(OS, TM, MAI, Verbose);
+ MCContext &Ctx, MCStreamer &Streamer,
+ const MCAsmInfo *MAI) {
+ return new AsmPrinterImpl(OS, TM, Ctx, Streamer, MAI);
}
};
@@ -607,8 +614,9 @@ namespace llvm {
}
private:
- static MCCodeEmitter *Allocator(const Target &T, TargetMachine &TM) {
- return new CodeEmitterImpl(T, TM);
+ static MCCodeEmitter *Allocator(const Target &T, TargetMachine &TM,
+ MCContext &Ctx) {
+ return new CodeEmitterImpl(T, TM, Ctx);
}
};
generated by cgit v1.3 (git 2.53.0) at 2026-05-12 17:50:42 +0000