diff options
Diffstat (limited to 'lib/Basic/Targets.cpp')
-rw-r--r-- | lib/Basic/Targets.cpp | 33 |
1 files changed, 30 insertions, 3 deletions
diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp index 605f73802afb..a3b8330707b9 100644 --- a/lib/Basic/Targets.cpp +++ b/lib/Basic/Targets.cpp @@ -5385,6 +5385,10 @@ public: // ARM has atomics up to 8 bytes setAtomic(); + // Maximum alignment for ARM NEON data types should be 64-bits (AAPCS) + if (IsAAPCS && (Triple.getEnvironment() != llvm::Triple::Android)) + MaxVectorAlign = 64; + // Do force alignment of members that follow zero length bitfields. If // the alignment of the zero-length bitfield is greater than the member // that follows it, `bar', `bar' will be aligned as the type of the @@ -5438,7 +5442,24 @@ public: if (Feature[0] == '+') Features[Feature.drop_front(1)] = true; - return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec); + // Enable or disable thumb-mode explicitly per function to enable mixed + // ARM and Thumb code generation. + if (isThumb()) + Features["thumb-mode"] = true; + else + Features["thumb-mode"] = false; + + // Convert user-provided arm and thumb GNU target attributes to + // [-|+]thumb-mode target features respectively. + std::vector<std::string> UpdatedFeaturesVec(FeaturesVec); + for (auto &Feature : UpdatedFeaturesVec) { + if (Feature.compare("+arm") == 0) + Feature = "-thumb-mode"; + else if (Feature.compare("+thumb") == 0) + Feature = "+thumb-mode"; + } + + return TargetInfo::initFeatureMap(Features, Diags, CPU, UpdatedFeaturesVec); } bool handleTargetFeatures(std::vector<std::string> &Features, @@ -7716,6 +7737,7 @@ class MipsTargetInfo : public TargetInfo { NoDSP, DSP1, DSP2 } DspRev; bool HasMSA; + bool DisableMadd4; protected: bool HasFP64; @@ -7726,7 +7748,7 @@ public: : TargetInfo(Triple), IsMips16(false), IsMicromips(false), IsNan2008(false), IsSingleFloat(false), IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat), DspRev(NoDSP), - HasMSA(false), HasFP64(false) { + HasMSA(false), DisableMadd4(false), HasFP64(false) { TheCXXABI.set(TargetCXXABI::GenericMIPS); setABI((getTriple().getArch() == llvm::Triple::mips || @@ -7972,6 +7994,9 @@ public: if (HasMSA) Builder.defineMacro("__mips_msa", Twine(1)); + if (DisableMadd4) + Builder.defineMacro("__mips_no_madd4", Twine(1)); + Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0))); Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth())); Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth())); @@ -8134,6 +8159,8 @@ public: DspRev = std::max(DspRev, DSP2); else if (Feature == "+msa") HasMSA = true; + else if (Feature == "+nomadd4") + DisableMadd4 = true; else if (Feature == "+fp64") HasFP64 = true; else if (Feature == "-fp64") @@ -8466,7 +8493,7 @@ public: explicit WebAssembly32TargetInfo(const llvm::Triple &T, const TargetOptions &Opts) : WebAssemblyTargetInfo(T, Opts) { - MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32; + MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; resetDataLayout("e-m:e-p:32:32-i64:64-n32:64-S128"); } |