diff options
Diffstat (limited to 'lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp | 80 |
1 files changed, 71 insertions, 9 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp index dd30dc16378c..fa341e8b5fa5 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp @@ -20,7 +20,6 @@ #include "llvm/CodeGen/MachineBasicBlock.h" #include "llvm/CodeGen/MachineConstantPool.h" #include "llvm/CodeGen/MachineMemOperand.h" -#include "llvm/CodeGen/MachineValueType.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/CodeGen/SelectionDAGNodes.h" #include "llvm/CodeGen/TargetInstrInfo.h" @@ -28,18 +27,21 @@ #include "llvm/CodeGen/TargetRegisterInfo.h" #include "llvm/CodeGen/TargetSubtargetInfo.h" #include "llvm/CodeGen/ValueTypes.h" +#include "llvm/Config/llvm-config.h" #include "llvm/IR/BasicBlock.h" #include "llvm/IR/Constants.h" #include "llvm/IR/DebugInfoMetadata.h" #include "llvm/IR/DebugLoc.h" #include "llvm/IR/Function.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/ModuleSlotTracker.h" #include "llvm/IR/Value.h" #include "llvm/Support/Casting.h" #include "llvm/Support/CommandLine.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/MachineValueType.h" #include "llvm/Support/Printable.h" #include "llvm/Support/raw_ostream.h" #include "llvm/Target/TargetIntrinsicInfo.h" @@ -85,6 +87,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; + case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; @@ -176,20 +179,30 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::FMAXNAN: return "fmaxnan"; case ISD::FNEG: return "fneg"; case ISD::FSQRT: return "fsqrt"; + case ISD::STRICT_FSQRT: return "strict_fsqrt"; case ISD::FSIN: return "fsin"; + case ISD::STRICT_FSIN: return "strict_fsin"; case ISD::FCOS: return "fcos"; + case ISD::STRICT_FCOS: return "strict_fcos"; case ISD::FSINCOS: return "fsincos"; case ISD::FTRUNC: return "ftrunc"; case ISD::FFLOOR: return "ffloor"; case ISD::FCEIL: return "fceil"; case ISD::FRINT: return "frint"; + case ISD::STRICT_FRINT: return "strict_frint"; case ISD::FNEARBYINT: return "fnearbyint"; + case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; case ISD::FROUND: return "fround"; case ISD::FEXP: return "fexp"; + case ISD::STRICT_FEXP: return "strict_fexp"; case ISD::FEXP2: return "fexp2"; + case ISD::STRICT_FEXP2: return "strict_fexp2"; case ISD::FLOG: return "flog"; + case ISD::STRICT_FLOG: return "strict_flog"; case ISD::FLOG2: return "flog2"; + case ISD::STRICT_FLOG2: return "strict_flog2"; case ISD::FLOG10: return "flog10"; + case ISD::STRICT_FLOG10: return "strict_flog10"; // Binary operators case ISD::ADD: return "add"; @@ -214,24 +227,31 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::ROTL: return "rotl"; case ISD::ROTR: return "rotr"; case ISD::FADD: return "fadd"; + case ISD::STRICT_FADD: return "strict_fadd"; case ISD::FSUB: return "fsub"; + case ISD::STRICT_FSUB: return "strict_fsub"; case ISD::FMUL: return "fmul"; + case ISD::STRICT_FMUL: return "strict_fmul"; case ISD::FDIV: return "fdiv"; + case ISD::STRICT_FDIV: return "strict_fdiv"; case ISD::FMA: return "fma"; + case ISD::STRICT_FMA: return "strict_fma"; case ISD::FMAD: return "fmad"; case ISD::FREM: return "frem"; + case ISD::STRICT_FREM: return "strict_frem"; case ISD::FCOPYSIGN: return "fcopysign"; case ISD::FGETSIGN: return "fgetsign"; case ISD::FCANONICALIZE: return "fcanonicalize"; case ISD::FPOW: return "fpow"; + case ISD::STRICT_FPOW: return "strict_fpow"; case ISD::SMIN: return "smin"; case ISD::SMAX: return "smax"; case ISD::UMIN: return "umin"; case ISD::UMAX: return "umax"; case ISD::FPOWI: return "fpowi"; + case ISD::STRICT_FPOWI: return "strict_fpowi"; case ISD::SETCC: return "setcc"; - case ISD::SETCCE: return "setcce"; case ISD::SETCCCARRY: return "setcccarry"; case ISD::SELECT: return "select"; case ISD::VSELECT: return "vselect"; @@ -366,7 +386,9 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const { case ISD::SETFALSE2: return "setfalse2"; } case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; + case ISD::VECREDUCE_STRICT_FADD: return "vecreduce_strict_fadd"; case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; + case ISD::VECREDUCE_STRICT_FMUL: return "vecreduce_strict_fmul"; case ISD::VECREDUCE_ADD: return "vecreduce_add"; case ISD::VECREDUCE_MUL: return "vecreduce_mul"; case ISD::VECREDUCE_AND: return "vecreduce_and"; @@ -401,6 +423,32 @@ static Printable PrintNodeId(const SDNode &Node) { }); } +// Print the MMO with more information from the SelectionDAG. +static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, + const MachineFunction *MF, const Module *M, + const MachineFrameInfo *MFI, + const TargetInstrInfo *TII, LLVMContext &Ctx) { + ModuleSlotTracker MST(M); + if (MF) + MST.incorporateFunction(MF->getFunction()); + SmallVector<StringRef, 0> SSNs; + MMO.print(OS, MST, SSNs, Ctx, MFI, TII); +} + +static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, + const SelectionDAG *G) { + if (G) { + const MachineFunction *MF = &G->getMachineFunction(); + return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), + &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(), + *G->getContext()); + } else { + LLVMContext Ctx; + return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, + /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); + } +} + #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } @@ -430,9 +478,6 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { if (getFlags().hasExact()) OS << " exact"; - if (getFlags().hasUnsafeAlgebra()) - OS << " unsafe"; - if (getFlags().hasNoNaNs()) OS << " nnan"; @@ -448,6 +493,12 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { if (getFlags().hasAllowContract()) OS << " contract"; + if (getFlags().hasApproximateFuncs()) + OS << " afn"; + + if (getFlags().hasAllowReassociation()) + OS << " reassoc"; + if (getFlags().hasVectorReduction()) OS << " vector-reduction"; @@ -457,7 +508,7 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { OS << "Mem:"; for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), e = MN->memoperands_end(); i != e; ++i) { - OS << **i; + printMemOperand(OS, **i, G); if (std::next(i) != e) OS << " "; } @@ -549,7 +600,9 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { OS << ":" << N->getVT().getEVTString(); } else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { - OS << "<" << *LD->getMemOperand(); + OS << "<"; + + printMemOperand(OS, *LD->getMemOperand(), G); bool doExt = true; switch (LD->getExtensionType()) { @@ -567,7 +620,8 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { OS << ">"; } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { - OS << "<" << *ST->getMemOperand(); + OS << "<"; + printMemOperand(OS, *ST->getMemOperand(), G); if (ST->isTruncatingStore()) OS << ", trunc to " << ST->getMemoryVT().getEVTString(); @@ -578,7 +632,9 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { OS << ">"; } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { - OS << "<" << *M->getMemOperand() << ">"; + OS << "<"; + printMemOperand(OS, *M->getMemOperand(), G); + OS << ">"; } else if (const BlockAddressSDNode *BA = dyn_cast<BlockAddressSDNode>(this)) { int64_t offset = BA->getOffset(); @@ -608,6 +664,8 @@ void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { if (getNodeId() != -1) OS << " [ID=" << getNodeId() << ']'; + if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) + OS << "# D:" << isDivergent(); if (!G) return; @@ -779,4 +837,8 @@ void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { if (i) OS << ", "; else OS << " "; printOperand(OS, G, getOperand(i)); } + if (DebugLoc DL = getDebugLoc()) { + OS << ", "; + DL.print(OS); + } } |