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-rw-r--r--lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp354
1 files changed, 183 insertions, 171 deletions
diff --git a/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp b/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
index 9a391d06c9ea..20918233e447 100644
--- a/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
+++ b/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
@@ -14,46 +14,55 @@
#include "AMDGPU.h"
#include "AMDGPUSubtarget.h"
#include "SIInstrInfo.h"
+#include "llvm/ADT/ArrayRef.h"
+#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/PostOrderIterator.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallPtrSet.h"
#include "llvm/ADT/SmallVector.h"
-#include "llvm/Analysis/CFG.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegionInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/TargetOpcodes.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/IR/DebugLoc.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
-#include "llvm/Target/TargetInstrInfo.h"
-#include "llvm/Target/TargetLowering.h"
-#include "llvm/Target/TargetSubtargetInfo.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "llvm/Support/raw_ostream.h"
+#include <cassert>
#include <tuple>
+#include <utility>
+
using namespace llvm;
#define DEBUG_TYPE "amdgpucfgstructurizer"
namespace {
+
class PHILinearizeDestIterator;
class PHILinearize {
friend class PHILinearizeDestIterator;
public:
- typedef std::pair<unsigned, MachineBasicBlock *> PHISourceT;
+ using PHISourceT = std::pair<unsigned, MachineBasicBlock *>;
private:
- typedef DenseSet<PHISourceT> PHISourcesT;
- typedef struct {
+ using PHISourcesT = DenseSet<PHISourceT>;
+ using PHIInfoElementT = struct {
unsigned DestReg;
DebugLoc DL;
PHISourcesT Sources;
- } PHIInfoElementT;
- typedef SmallPtrSet<PHIInfoElementT *, 2> PHIInfoT;
+ };
+ using PHIInfoT = SmallPtrSet<PHIInfoElementT *, 2>;
PHIInfoT PHIInfo;
static unsigned phiInfoElementGetDest(PHIInfoElementT *Info);
@@ -85,8 +94,8 @@ public:
void dump(MachineRegisterInfo *MRI);
void clear();
- typedef PHISourcesT::iterator source_iterator;
- typedef PHILinearizeDestIterator dest_iterator;
+ using source_iterator = PHISourcesT::iterator;
+ using dest_iterator = PHILinearizeDestIterator;
dest_iterator dests_begin();
dest_iterator dests_end();
@@ -100,6 +109,8 @@ private:
PHILinearize::PHIInfoT::iterator Iter;
public:
+ PHILinearizeDestIterator(PHILinearize::PHIInfoT::iterator I) : Iter(I) {}
+
unsigned operator*() { return PHILinearize::phiInfoElementGetDest(*Iter); }
PHILinearizeDestIterator &operator++() {
++Iter;
@@ -111,10 +122,10 @@ public:
bool operator!=(const PHILinearizeDestIterator &I) const {
return I.Iter != Iter;
}
-
- PHILinearizeDestIterator(PHILinearize::PHIInfoT::iterator I) : Iter(I) {}
};
+} // end anonymous namespace
+
unsigned PHILinearize::phiInfoElementGetDest(PHIInfoElementT *Info) {
return Info->DestReg;
}
@@ -250,21 +261,23 @@ unsigned PHILinearize::getNumSources(unsigned DestReg) {
return phiInfoElementGetSources(findPHIInfoElement(DestReg)).size();
}
-void PHILinearize::dump(MachineRegisterInfo *MRI) {
+#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
+LLVM_DUMP_METHOD void PHILinearize::dump(MachineRegisterInfo *MRI) {
const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
dbgs() << "=PHIInfo Start=\n";
for (auto PII : this->PHIInfo) {
PHIInfoElementT &Element = *PII;
- dbgs() << "Dest: " << PrintReg(Element.DestReg, TRI)
+ dbgs() << "Dest: " << printReg(Element.DestReg, TRI)
<< " Sources: {";
for (auto &SI : Element.Sources) {
- dbgs() << PrintReg(SI.first, TRI) << "(BB#"
- << SI.second->getNumber() << "),";
+ dbgs() << printReg(SI.first, TRI) << '(' << printMBBReference(*SI.second)
+ << "),";
}
dbgs() << "}\n";
}
dbgs() << "=PHIInfo End=\n";
}
+#endif
void PHILinearize::clear() { PHIInfo = PHIInfoT(); }
@@ -280,14 +293,12 @@ PHILinearize::source_iterator PHILinearize::sources_begin(unsigned Reg) {
auto InfoElement = findPHIInfoElement(Reg);
return phiInfoElementGetSources(InfoElement).begin();
}
+
PHILinearize::source_iterator PHILinearize::sources_end(unsigned Reg) {
auto InfoElement = findPHIInfoElement(Reg);
return phiInfoElementGetSources(InfoElement).end();
}
-class RegionMRT;
-class MBBMRT;
-
static unsigned getPHINumInputs(MachineInstr &PHI) {
assert(PHI.isPHI());
return (PHI.getNumOperands() - 1) / 2;
@@ -313,6 +324,11 @@ static unsigned getPHIDestReg(MachineInstr &PHI) {
return PHI.getOperand(0).getReg();
}
+namespace {
+
+class RegionMRT;
+class MBBMRT;
+
class LinearizedRegion {
protected:
MachineBasicBlock *Entry;
@@ -347,6 +363,11 @@ protected:
RegionMRT *TopRegion = nullptr);
public:
+ LinearizedRegion();
+ LinearizedRegion(MachineBasicBlock *MBB, const MachineRegisterInfo *MRI,
+ const TargetRegisterInfo *TRI, PHILinearize &PHIInfo);
+ ~LinearizedRegion() = default;
+
void setRegionMRT(RegionMRT *Region) { RMRT = Region; }
RegionMRT *getRegionMRT() { return RMRT; }
@@ -411,13 +432,6 @@ public:
void initLiveOut(RegionMRT *Region, const MachineRegisterInfo *MRI,
const TargetRegisterInfo *TRI, PHILinearize &PHIInfo);
-
- LinearizedRegion(MachineBasicBlock *MBB, const MachineRegisterInfo *MRI,
- const TargetRegisterInfo *TRI, PHILinearize &PHIInfo);
-
- LinearizedRegion();
-
- ~LinearizedRegion();
};
class MRT {
@@ -427,6 +441,8 @@ protected:
unsigned BBSelectRegOut;
public:
+ virtual ~MRT() = default;
+
unsigned getBBSelectRegIn() { return BBSelectRegIn; }
unsigned getBBSelectRegOut() { return BBSelectRegOut; }
@@ -465,42 +481,55 @@ public:
dbgs() << " ";
}
}
-
- virtual ~MRT() {}
};
class MBBMRT : public MRT {
MachineBasicBlock *MBB;
public:
- virtual MBBMRT *getMBBMRT() { return this; }
+ MBBMRT(MachineBasicBlock *BB) : MBB(BB) {
+ setParent(nullptr);
+ setBBSelectRegOut(0);
+ setBBSelectRegIn(0);
+ }
+
+ MBBMRT *getMBBMRT() override { return this; }
MachineBasicBlock *getMBB() { return MBB; }
- virtual void dump(const TargetRegisterInfo *TRI, int depth = 0) {
+ void dump(const TargetRegisterInfo *TRI, int depth = 0) override {
dumpDepth(depth);
dbgs() << "MBB: " << getMBB()->getNumber();
- dbgs() << " In: " << PrintReg(getBBSelectRegIn(), TRI);
- dbgs() << ", Out: " << PrintReg(getBBSelectRegOut(), TRI) << "\n";
- }
-
- MBBMRT(MachineBasicBlock *BB) : MBB(BB) {
- setParent(nullptr);
- setBBSelectRegOut(0);
- setBBSelectRegIn(0);
+ dbgs() << " In: " << printReg(getBBSelectRegIn(), TRI);
+ dbgs() << ", Out: " << printReg(getBBSelectRegOut(), TRI) << "\n";
}
};
class RegionMRT : public MRT {
protected:
MachineRegion *Region;
- LinearizedRegion *LRegion;
- MachineBasicBlock *Succ;
-
+ LinearizedRegion *LRegion = nullptr;
+ MachineBasicBlock *Succ = nullptr;
SetVector<MRT *> Children;
public:
- virtual RegionMRT *getRegionMRT() { return this; }
+ RegionMRT(MachineRegion *MachineRegion) : Region(MachineRegion) {
+ setParent(nullptr);
+ setBBSelectRegOut(0);
+ setBBSelectRegIn(0);
+ }
+
+ ~RegionMRT() override {
+ if (LRegion) {
+ delete LRegion;
+ }
+
+ for (auto CI : Children) {
+ delete &(*CI);
+ }
+ }
+
+ RegionMRT *getRegionMRT() override { return this; }
void setLinearizedRegion(LinearizedRegion *LinearizeRegion) {
LRegion = LinearizeRegion;
@@ -518,11 +547,11 @@ public:
SetVector<MRT *> *getChildren() { return &Children; }
- virtual void dump(const TargetRegisterInfo *TRI, int depth = 0) {
+ void dump(const TargetRegisterInfo *TRI, int depth = 0) override {
dumpDepth(depth);
dbgs() << "Region: " << (void *)Region;
- dbgs() << " In: " << PrintReg(getBBSelectRegIn(), TRI);
- dbgs() << ", Out: " << PrintReg(getBBSelectRegOut(), TRI) << "\n";
+ dbgs() << " In: " << printReg(getBBSelectRegIn(), TRI);
+ dbgs() << ", Out: " << printReg(getBBSelectRegOut(), TRI) << "\n";
dumpDepth(depth);
if (getSucc())
@@ -581,25 +610,10 @@ public:
}
}
}
-
- RegionMRT(MachineRegion *MachineRegion)
- : Region(MachineRegion), LRegion(nullptr), Succ(nullptr) {
- setParent(nullptr);
- setBBSelectRegOut(0);
- setBBSelectRegIn(0);
- }
-
- virtual ~RegionMRT() {
- if (LRegion) {
- delete LRegion;
- }
-
- for (auto CI : Children) {
- delete &(*CI);
- }
- }
};
+} // end anonymous namespace
+
static unsigned createBBSelectReg(const SIInstrInfo *TII,
MachineRegisterInfo *MRI) {
return MRI->createVirtualRegister(TII->getPreferredSelectRegClass(32));
@@ -644,7 +658,7 @@ RegionMRT *MRT::buildMRT(MachineFunction &MF,
continue;
}
- DEBUG(dbgs() << "Visiting BB#" << MBB->getNumber() << "\n");
+ DEBUG(dbgs() << "Visiting " << printMBBReference(*MBB) << "\n");
MBBMRT *NewMBB = new MBBMRT(MBB);
MachineRegion *Region = RegionInfo->getRegionFor(MBB);
@@ -681,18 +695,18 @@ void LinearizedRegion::storeLiveOutReg(MachineBasicBlock *MBB, unsigned Reg,
const TargetRegisterInfo *TRI,
PHILinearize &PHIInfo) {
if (TRI->isVirtualRegister(Reg)) {
- DEBUG(dbgs() << "Considering Register: " << PrintReg(Reg, TRI) << "\n");
+ DEBUG(dbgs() << "Considering Register: " << printReg(Reg, TRI) << "\n");
// If this is a source register to a PHI we are chaining, it
// must be live out.
if (PHIInfo.isSource(Reg)) {
- DEBUG(dbgs() << "Add LiveOut (PHI): " << PrintReg(Reg, TRI) << "\n");
+ DEBUG(dbgs() << "Add LiveOut (PHI): " << printReg(Reg, TRI) << "\n");
addLiveOut(Reg);
} else {
// If this is live out of the MBB
for (auto &UI : MRI->use_operands(Reg)) {
if (UI.getParent()->getParent() != MBB) {
- DEBUG(dbgs() << "Add LiveOut (MBB BB#" << MBB->getNumber()
- << "): " << PrintReg(Reg, TRI) << "\n");
+ DEBUG(dbgs() << "Add LiveOut (MBB " << printMBBReference(*MBB)
+ << "): " << printReg(Reg, TRI) << "\n");
addLiveOut(Reg);
} else {
// If the use is in the same MBB we have to make sure
@@ -703,7 +717,7 @@ void LinearizedRegion::storeLiveOutReg(MachineBasicBlock *MBB, unsigned Reg,
MIE = UseInstr->getParent()->instr_end();
MII != MIE; ++MII) {
if ((&(*MII)) == DefInstr) {
- DEBUG(dbgs() << "Add LiveOut (Loop): " << PrintReg(Reg, TRI)
+ DEBUG(dbgs() << "Add LiveOut (Loop): " << printReg(Reg, TRI)
<< "\n");
addLiveOut(Reg);
}
@@ -720,11 +734,11 @@ void LinearizedRegion::storeLiveOutRegRegion(RegionMRT *Region, unsigned Reg,
const TargetRegisterInfo *TRI,
PHILinearize &PHIInfo) {
if (TRI->isVirtualRegister(Reg)) {
- DEBUG(dbgs() << "Considering Register: " << PrintReg(Reg, TRI) << "\n");
+ DEBUG(dbgs() << "Considering Register: " << printReg(Reg, TRI) << "\n");
for (auto &UI : MRI->use_operands(Reg)) {
if (!Region->contains(UI.getParent()->getParent())) {
DEBUG(dbgs() << "Add LiveOut (Region " << (void *)Region
- << "): " << PrintReg(Reg, TRI) << "\n");
+ << "): " << printReg(Reg, TRI) << "\n");
addLiveOut(Reg);
}
}
@@ -735,7 +749,8 @@ void LinearizedRegion::storeLiveOuts(MachineBasicBlock *MBB,
const MachineRegisterInfo *MRI,
const TargetRegisterInfo *TRI,
PHILinearize &PHIInfo) {
- DEBUG(dbgs() << "-Store Live Outs Begin (BB#" << MBB->getNumber() << ")-\n");
+ DEBUG(dbgs() << "-Store Live Outs Begin (" << printMBBReference(*MBB)
+ << ")-\n");
for (auto &II : *MBB) {
for (auto &RI : II.defs()) {
storeLiveOutReg(MBB, RI.getReg(), RI.getParent(), MRI, TRI, PHIInfo);
@@ -759,9 +774,9 @@ void LinearizedRegion::storeLiveOuts(MachineBasicBlock *MBB,
for (int i = 0; i < numPreds; ++i) {
if (getPHIPred(PHI, i) == MBB) {
unsigned PHIReg = getPHISourceReg(PHI, i);
- DEBUG(dbgs() << "Add LiveOut (PhiSource BB#" << MBB->getNumber()
- << " -> BB#" << (*SI)->getNumber()
- << "): " << PrintReg(PHIReg, TRI) << "\n");
+ DEBUG(dbgs() << "Add LiveOut (PhiSource " << printMBBReference(*MBB)
+ << " -> " << printMBBReference(*(*SI))
+ << "): " << printReg(PHIReg, TRI) << "\n");
addLiveOut(PHIReg);
}
}
@@ -830,7 +845,7 @@ void LinearizedRegion::storeLiveOuts(RegionMRT *Region,
if (Region->contains(getPHIPred(PHI, i))) {
unsigned PHIReg = getPHISourceReg(PHI, i);
DEBUG(dbgs() << "Add Region LiveOut (" << (void *)Region
- << "): " << PrintReg(PHIReg, TRI) << "\n");
+ << "): " << printReg(PHIReg, TRI) << "\n");
addLiveOut(PHIReg);
}
}
@@ -839,6 +854,7 @@ void LinearizedRegion::storeLiveOuts(RegionMRT *Region,
}
}
+#ifndef NDEBUG
void LinearizedRegion::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
OS << "Linearized Region {";
bool IsFirst = true;
@@ -852,13 +868,14 @@ void LinearizedRegion::print(raw_ostream &OS, const TargetRegisterInfo *TRI) {
}
OS << "} (" << Entry->getNumber() << ", "
<< (Exit == nullptr ? -1 : Exit->getNumber())
- << "): In:" << PrintReg(getBBSelectRegIn(), TRI)
- << " Out:" << PrintReg(getBBSelectRegOut(), TRI) << " {";
+ << "): In:" << printReg(getBBSelectRegIn(), TRI)
+ << " Out:" << printReg(getBBSelectRegOut(), TRI) << " {";
for (auto &LI : LiveOuts) {
- OS << PrintReg(LI, TRI) << " ";
+ OS << printReg(LI, TRI) << " ";
}
OS << "} \n";
}
+#endif
unsigned LinearizedRegion::getBBSelectRegIn() {
return getRegionMRT()->getBBSelectRegIn();
@@ -893,8 +910,8 @@ void LinearizedRegion::replaceRegister(unsigned Register, unsigned NewRegister,
assert(Register != NewRegister && "Cannot replace a reg with itself");
DEBUG(dbgs() << "Pepareing to replace register (region): "
- << PrintReg(Register, MRI->getTargetRegisterInfo()) << " with "
- << PrintReg(NewRegister, MRI->getTargetRegisterInfo()) << "\n");
+ << printReg(Register, MRI->getTargetRegisterInfo()) << " with "
+ << printReg(NewRegister, MRI->getTargetRegisterInfo()) << "\n");
// If we are replacing outside, we also need to update the LiveOuts
if (ReplaceOutside &&
@@ -930,14 +947,14 @@ void LinearizedRegion::replaceRegister(unsigned Register, unsigned NewRegister,
if (TargetRegisterInfo::isPhysicalRegister(NewRegister)) {
DEBUG(dbgs() << "Trying to substitute physical register: "
- << PrintReg(NewRegister, MRI->getTargetRegisterInfo())
+ << printReg(NewRegister, MRI->getTargetRegisterInfo())
<< "\n");
llvm_unreachable("Cannot substitute physical registers");
} else {
DEBUG(dbgs() << "Replacing register (region): "
- << PrintReg(Register, MRI->getTargetRegisterInfo())
+ << printReg(Register, MRI->getTargetRegisterInfo())
<< " with "
- << PrintReg(NewRegister, MRI->getTargetRegisterInfo())
+ << printReg(NewRegister, MRI->getTargetRegisterInfo())
<< "\n");
O.setReg(NewRegister);
}
@@ -1006,16 +1023,16 @@ void LinearizedRegion::removeFalseRegisterKills(MachineRegisterInfo *MRI) {
continue;
if (!MRI->hasOneDef(Reg)) {
DEBUG(this->getEntry()->getParent()->dump());
- DEBUG(dbgs() << PrintReg(Reg, TRI) << "\n");
+ DEBUG(dbgs() << printReg(Reg, TRI) << "\n");
}
if (MRI->def_begin(Reg) == MRI->def_end()) {
DEBUG(dbgs() << "Register "
- << PrintReg(Reg, MRI->getTargetRegisterInfo())
+ << printReg(Reg, MRI->getTargetRegisterInfo())
<< " has NO defs\n");
} else if (!MRI->hasOneDef(Reg)) {
DEBUG(dbgs() << "Register "
- << PrintReg(Reg, MRI->getTargetRegisterInfo())
+ << printReg(Reg, MRI->getTargetRegisterInfo())
<< " has multiple defs\n");
}
@@ -1025,7 +1042,7 @@ void LinearizedRegion::removeFalseRegisterKills(MachineRegisterInfo *MRI) {
bool UseIsOutsideDefMBB = Def->getParent()->getParent() != MBB;
if (UseIsOutsideDefMBB && UseOperand->isKill()) {
DEBUG(dbgs() << "Removing kill flag on register: "
- << PrintReg(Reg, TRI) << "\n");
+ << printReg(Reg, TRI) << "\n");
UseOperand->setIsKill(false);
}
}
@@ -1059,7 +1076,7 @@ LinearizedRegion::LinearizedRegion() {
Parent = nullptr;
}
-LinearizedRegion::~LinearizedRegion() {}
+namespace {
class AMDGPUMachineCFGStructurizer : public MachineFunctionPass {
private:
@@ -1070,6 +1087,7 @@ private:
unsigned BBSelectRegister;
PHILinearize PHIInfo;
DenseMap<MachineBasicBlock *, MachineBasicBlock *> FallthroughMap;
+ RegionMRT *RMRT;
void getPHIRegionIndices(RegionMRT *Region, MachineInstr &PHI,
SmallVector<unsigned, 2> &RegionIndices);
@@ -1193,15 +1211,15 @@ private:
public:
static char ID;
+ AMDGPUMachineCFGStructurizer() : MachineFunctionPass(ID) {
+ initializeAMDGPUMachineCFGStructurizerPass(*PassRegistry::getPassRegistry());
+ }
+
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<MachineRegionInfoPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
- AMDGPUMachineCFGStructurizer() : MachineFunctionPass(ID) {
- initializeAMDGPUMachineCFGStructurizerPass(*PassRegistry::getPassRegistry());
- }
-
void initFallthroughMap(MachineFunction &MF);
void createLinearizedRegion(RegionMRT *Region, unsigned SelectOut);
@@ -1210,14 +1228,14 @@ public:
MachineRegisterInfo *MRI,
const SIInstrInfo *TII);
- RegionMRT *RMRT;
void setRegionMRT(RegionMRT *RegionTree) { RMRT = RegionTree; }
RegionMRT *getRegionMRT() { return RMRT; }
bool runOnMachineFunction(MachineFunction &MF) override;
};
-}
+
+} // end anonymous namespace
char AMDGPUMachineCFGStructurizer::ID = 0;
@@ -1254,7 +1272,6 @@ void AMDGPUMachineCFGStructurizer::transformSimpleIfRegion(RegionMRT *Region) {
}
static void fixMBBTerminator(MachineBasicBlock *MBB) {
-
if (MBB->succ_size() == 1) {
auto *Succ = *(MBB->succ_begin());
for (auto &TI : MBB->terminators()) {
@@ -1433,8 +1450,7 @@ bool AMDGPUMachineCFGStructurizer::shrinkPHI(MachineInstr &PHI,
unsigned *ReplaceReg) {
DEBUG(dbgs() << "Shrink PHI: ");
DEBUG(PHI.dump());
- DEBUG(dbgs() << " to " << PrintReg(getPHIDestReg(PHI), TRI)
- << "<def> = PHI(");
+ DEBUG(dbgs() << " to " << printReg(getPHIDestReg(PHI), TRI) << " = PHI(");
bool Replaced = false;
unsigned NumInputs = getPHINumInputs(PHI);
@@ -1464,8 +1480,8 @@ bool AMDGPUMachineCFGStructurizer::shrinkPHI(MachineInstr &PHI,
if (SourceMBB) {
MIB.addReg(CombinedSourceReg);
MIB.addMBB(SourceMBB);
- DEBUG(dbgs() << PrintReg(CombinedSourceReg, TRI) << ", BB#"
- << SourceMBB->getNumber());
+ DEBUG(dbgs() << printReg(CombinedSourceReg, TRI) << ", "
+ << printMBBReference(*SourceMBB));
}
for (unsigned i = 0; i < NumInputs; ++i) {
@@ -1476,8 +1492,8 @@ bool AMDGPUMachineCFGStructurizer::shrinkPHI(MachineInstr &PHI,
MachineBasicBlock *SourcePred = getPHIPred(PHI, i);
MIB.addReg(SourceReg);
MIB.addMBB(SourcePred);
- DEBUG(dbgs() << PrintReg(SourceReg, TRI) << ", BB#"
- << SourcePred->getNumber());
+ DEBUG(dbgs() << printReg(SourceReg, TRI) << ", "
+ << printMBBReference(*SourcePred));
}
DEBUG(dbgs() << ")\n");
}
@@ -1490,8 +1506,7 @@ void AMDGPUMachineCFGStructurizer::replacePHI(
SmallVector<unsigned, 2> &PHIRegionIndices) {
DEBUG(dbgs() << "Replace PHI: ");
DEBUG(PHI.dump());
- DEBUG(dbgs() << " with " << PrintReg(getPHIDestReg(PHI), TRI)
- << "<def> = PHI(");
+ DEBUG(dbgs() << " with " << printReg(getPHIDestReg(PHI), TRI) << " = PHI(");
bool HasExternalEdge = false;
unsigned NumInputs = getPHINumInputs(PHI);
@@ -1508,8 +1523,8 @@ void AMDGPUMachineCFGStructurizer::replacePHI(
getPHIDestReg(PHI));
MIB.addReg(CombinedSourceReg);
MIB.addMBB(LastMerge);
- DEBUG(dbgs() << PrintReg(CombinedSourceReg, TRI) << ", BB#"
- << LastMerge->getNumber());
+ DEBUG(dbgs() << printReg(CombinedSourceReg, TRI) << ", "
+ << printMBBReference(*LastMerge));
for (unsigned i = 0; i < NumInputs; ++i) {
if (isPHIRegionIndex(PHIRegionIndices, i)) {
continue;
@@ -1518,8 +1533,8 @@ void AMDGPUMachineCFGStructurizer::replacePHI(
MachineBasicBlock *SourcePred = getPHIPred(PHI, i);
MIB.addReg(SourceReg);
MIB.addMBB(SourcePred);
- DEBUG(dbgs() << PrintReg(SourceReg, TRI) << ", BB#"
- << SourcePred->getNumber());
+ DEBUG(dbgs() << printReg(SourceReg, TRI) << ", "
+ << printMBBReference(*SourcePred));
}
DEBUG(dbgs() << ")\n");
} else {
@@ -1531,7 +1546,6 @@ void AMDGPUMachineCFGStructurizer::replacePHI(
void AMDGPUMachineCFGStructurizer::replaceEntryPHI(
MachineInstr &PHI, unsigned CombinedSourceReg, MachineBasicBlock *IfMBB,
SmallVector<unsigned, 2> &PHIRegionIndices) {
-
DEBUG(dbgs() << "Replace entry PHI: ");
DEBUG(PHI.dump());
DEBUG(dbgs() << " with ");
@@ -1547,18 +1561,18 @@ void AMDGPUMachineCFGStructurizer::replaceEntryPHI(
if (NumNonRegionInputs == 0) {
auto DestReg = getPHIDestReg(PHI);
replaceRegisterWith(DestReg, CombinedSourceReg);
- DEBUG(dbgs() << " register " << PrintReg(CombinedSourceReg, TRI) << "\n");
+ DEBUG(dbgs() << " register " << printReg(CombinedSourceReg, TRI) << "\n");
PHI.eraseFromParent();
} else {
- DEBUG(dbgs() << PrintReg(getPHIDestReg(PHI), TRI) << "<def> = PHI(");
+ DEBUG(dbgs() << printReg(getPHIDestReg(PHI), TRI) << " = PHI(");
MachineBasicBlock *MBB = PHI.getParent();
MachineInstrBuilder MIB =
BuildMI(*MBB, PHI, PHI.getDebugLoc(), TII->get(TargetOpcode::PHI),
getPHIDestReg(PHI));
MIB.addReg(CombinedSourceReg);
MIB.addMBB(IfMBB);
- DEBUG(dbgs() << PrintReg(CombinedSourceReg, TRI) << ", BB#"
- << IfMBB->getNumber());
+ DEBUG(dbgs() << printReg(CombinedSourceReg, TRI) << ", "
+ << printMBBReference(*IfMBB));
unsigned NumInputs = getPHINumInputs(PHI);
for (unsigned i = 0; i < NumInputs; ++i) {
if (isPHIRegionIndex(PHIRegionIndices, i)) {
@@ -1568,8 +1582,8 @@ void AMDGPUMachineCFGStructurizer::replaceEntryPHI(
MachineBasicBlock *SourcePred = getPHIPred(PHI, i);
MIB.addReg(SourceReg);
MIB.addMBB(SourcePred);
- DEBUG(dbgs() << PrintReg(SourceReg, TRI) << ", BB#"
- << SourcePred->getNumber());
+ DEBUG(dbgs() << printReg(SourceReg, TRI) << ", "
+ << printMBBReference(*SourcePred));
}
DEBUG(dbgs() << ")\n");
PHI.eraseFromParent();
@@ -1593,7 +1607,7 @@ void AMDGPUMachineCFGStructurizer::replaceLiveOutRegs(
}
}
- DEBUG(dbgs() << "Register " << PrintReg(Reg, TRI) << " is "
+ DEBUG(dbgs() << "Register " << printReg(Reg, TRI) << " is "
<< (IsDead ? "dead" : "alive") << " after PHI replace\n");
if (IsDead) {
LRegion->removeLiveOut(Reg);
@@ -1734,11 +1748,11 @@ void AMDGPUMachineCFGStructurizer::insertMergePHI(MachineBasicBlock *IfBB,
if (MergeBB->succ_begin() == MergeBB->succ_end()) {
return;
}
- DEBUG(dbgs() << "Merge PHI (BB#" << MergeBB->getNumber()
- << "): " << PrintReg(DestRegister, TRI) << "<def> = PHI("
- << PrintReg(IfSourceRegister, TRI) << ", BB#"
- << IfBB->getNumber() << PrintReg(CodeSourceRegister, TRI)
- << ", BB#" << CodeBB->getNumber() << ")\n");
+ DEBUG(dbgs() << "Merge PHI (" << printMBBReference(*MergeBB)
+ << "): " << printReg(DestRegister, TRI) << " = PHI("
+ << printReg(IfSourceRegister, TRI) << ", "
+ << printMBBReference(*IfBB) << printReg(CodeSourceRegister, TRI)
+ << ", " << printMBBReference(*CodeBB) << ")\n");
const DebugLoc &DL = MergeBB->findDebugLoc(MergeBB->begin());
MachineInstrBuilder MIB = BuildMI(*MergeBB, MergeBB->instr_begin(), DL,
TII->get(TargetOpcode::PHI), DestRegister);
@@ -1796,8 +1810,8 @@ static void removeExternalCFGEdges(MachineBasicBlock *StartMBB,
for (auto SI : Succs) {
std::pair<MachineBasicBlock *, MachineBasicBlock *> Edge = SI;
- DEBUG(dbgs() << "Removing edge: BB#" << Edge.first->getNumber() << " -> BB#"
- << Edge.second->getNumber() << "\n");
+ DEBUG(dbgs() << "Removing edge: " << printMBBReference(*Edge.first)
+ << " -> " << printMBBReference(*Edge.second) << "\n");
Edge.first->removeSuccessor(Edge.second);
}
}
@@ -1835,8 +1849,8 @@ MachineBasicBlock *AMDGPUMachineCFGStructurizer::createIfBlock(
if (!CodeBBEnd->isSuccessor(MergeBB))
CodeBBEnd->addSuccessor(MergeBB);
- DEBUG(dbgs() << "Moved MBB#" << CodeBBStart->getNumber() << " through MBB#"
- << CodeBBEnd->getNumber() << "\n");
+ DEBUG(dbgs() << "Moved " << printMBBReference(*CodeBBStart) << " through "
+ << printMBBReference(*CodeBBEnd) << "\n");
// If we have a single predecessor we can find a reasonable debug location
MachineBasicBlock *SinglePred =
@@ -1921,10 +1935,10 @@ void AMDGPUMachineCFGStructurizer::rewriteCodeBBTerminator(MachineBasicBlock *Co
MachineInstr *AMDGPUMachineCFGStructurizer::getDefInstr(unsigned Reg) {
if (MRI->def_begin(Reg) == MRI->def_end()) {
- DEBUG(dbgs() << "Register " << PrintReg(Reg, MRI->getTargetRegisterInfo())
+ DEBUG(dbgs() << "Register " << printReg(Reg, MRI->getTargetRegisterInfo())
<< " has NO defs\n");
} else if (!MRI->hasOneDef(Reg)) {
- DEBUG(dbgs() << "Register " << PrintReg(Reg, MRI->getTargetRegisterInfo())
+ DEBUG(dbgs() << "Register " << printReg(Reg, MRI->getTargetRegisterInfo())
<< " has multiple defs\n");
DEBUG(dbgs() << "DEFS BEGIN:\n");
for (auto DI = MRI->def_begin(Reg), DE = MRI->def_end(); DI != DE; ++DI) {
@@ -2008,7 +2022,7 @@ void AMDGPUMachineCFGStructurizer::rewriteLiveOutRegs(MachineBasicBlock *IfBB,
}
for (auto LI : OldLiveOuts) {
- DEBUG(dbgs() << "LiveOut: " << PrintReg(LI, TRI));
+ DEBUG(dbgs() << "LiveOut: " << printReg(LI, TRI));
if (!containsDef(CodeBB, InnerRegion, LI) ||
(!IsSingleBB && (getDefInstr(LI)->getParent() == LRegion->getExit()))) {
// If the register simly lives through the CodeBB, we don't have
@@ -2034,7 +2048,7 @@ void AMDGPUMachineCFGStructurizer::rewriteLiveOutRegs(MachineBasicBlock *IfBB,
unsigned IfSourceReg = MRI->createVirtualRegister(RegClass);
// Create initializer, this value is never used, but is needed
// to satisfy SSA.
- DEBUG(dbgs() << "Initializer for reg: " << PrintReg(Reg) << "\n");
+ DEBUG(dbgs() << "Initializer for reg: " << printReg(Reg) << "\n");
TII->materializeImmediate(*IfBB, IfBB->getFirstTerminator(), DebugLoc(),
IfSourceReg, 0);
@@ -2049,7 +2063,7 @@ void AMDGPUMachineCFGStructurizer::rewriteLiveOutRegs(MachineBasicBlock *IfBB,
// is a source block for a definition.
SmallVector<unsigned, 4> Sources;
if (PHIInfo.findSourcesFromMBB(CodeBB, Sources)) {
- DEBUG(dbgs() << "Inserting PHI Live Out from BB#" << CodeBB->getNumber()
+ DEBUG(dbgs() << "Inserting PHI Live Out from " << printMBBReference(*CodeBB)
<< "\n");
for (auto SI : Sources) {
unsigned DestReg;
@@ -2131,7 +2145,7 @@ void AMDGPUMachineCFGStructurizer::createEntryPHI(LinearizedRegion *CurrentRegio
const DebugLoc &DL = Entry->findDebugLoc(Entry->begin());
MachineInstrBuilder MIB = BuildMI(*Entry, Entry->instr_begin(), DL,
TII->get(TargetOpcode::PHI), DestReg);
- DEBUG(dbgs() << "Entry PHI " << PrintReg(DestReg, TRI) << "<def> = PHI(");
+ DEBUG(dbgs() << "Entry PHI " << printReg(DestReg, TRI) << " = PHI(");
unsigned CurrentBackedgeReg = 0;
@@ -2156,17 +2170,18 @@ void AMDGPUMachineCFGStructurizer::createEntryPHI(LinearizedRegion *CurrentRegio
BackedgePHI.addMBB((*SRI).second);
CurrentBackedgeReg = NewBackedgeReg;
DEBUG(dbgs() << "Inserting backedge PHI: "
- << PrintReg(NewBackedgeReg, TRI) << "<def> = PHI("
- << PrintReg(CurrentBackedgeReg, TRI) << ", BB#"
- << getPHIPred(*PHIDefInstr, 0)->getNumber() << ", "
- << PrintReg(getPHISourceReg(*PHIDefInstr, 1), TRI)
- << ", BB#" << (*SRI).second->getNumber());
+ << printReg(NewBackedgeReg, TRI) << " = PHI("
+ << printReg(CurrentBackedgeReg, TRI) << ", "
+ << printMBBReference(*getPHIPred(*PHIDefInstr, 0))
+ << ", "
+ << printReg(getPHISourceReg(*PHIDefInstr, 1), TRI)
+ << ", " << printMBBReference(*(*SRI).second));
}
} else {
MIB.addReg(SourceReg);
MIB.addMBB((*SRI).second);
- DEBUG(dbgs() << PrintReg(SourceReg, TRI) << ", BB#"
- << (*SRI).second->getNumber() << ", ");
+ DEBUG(dbgs() << printReg(SourceReg, TRI) << ", "
+ << printMBBReference(*(*SRI).second) << ", ");
}
}
@@ -2174,8 +2189,8 @@ void AMDGPUMachineCFGStructurizer::createEntryPHI(LinearizedRegion *CurrentRegio
if (CurrentBackedgeReg != 0) {
MIB.addReg(CurrentBackedgeReg);
MIB.addMBB(Exit);
- DEBUG(dbgs() << PrintReg(CurrentBackedgeReg, TRI) << ", BB#"
- << Exit->getNumber() << ")\n");
+ DEBUG(dbgs() << printReg(CurrentBackedgeReg, TRI) << ", "
+ << printMBBReference(*Exit) << ")\n");
} else {
DEBUG(dbgs() << ")\n");
}
@@ -2205,7 +2220,7 @@ void AMDGPUMachineCFGStructurizer::replaceRegisterWith(unsigned Register,
++I;
if (TargetRegisterInfo::isPhysicalRegister(NewRegister)) {
DEBUG(dbgs() << "Trying to substitute physical register: "
- << PrintReg(NewRegister, MRI->getTargetRegisterInfo())
+ << printReg(NewRegister, MRI->getTargetRegisterInfo())
<< "\n");
llvm_unreachable("Cannot substitute physical registers");
// We don't handle physical registers, but if we need to
@@ -2213,9 +2228,9 @@ void AMDGPUMachineCFGStructurizer::replaceRegisterWith(unsigned Register,
// O.substPhysReg(NewRegister, *TRI);
} else {
DEBUG(dbgs() << "Replacing register: "
- << PrintReg(Register, MRI->getTargetRegisterInfo())
+ << printReg(Register, MRI->getTargetRegisterInfo())
<< " with "
- << PrintReg(NewRegister, MRI->getTargetRegisterInfo())
+ << printReg(NewRegister, MRI->getTargetRegisterInfo())
<< "\n");
O.setReg(NewRegister);
}
@@ -2233,11 +2248,11 @@ void AMDGPUMachineCFGStructurizer::resolvePHIInfos(MachineBasicBlock *FunctionEn
for (auto DRI = PHIInfo.dests_begin(), DE = PHIInfo.dests_end(); DRI != DE;
++DRI) {
unsigned DestReg = *DRI;
- DEBUG(dbgs() << "DestReg: " << PrintReg(DestReg, TRI) << "\n");
+ DEBUG(dbgs() << "DestReg: " << printReg(DestReg, TRI) << "\n");
auto SRI = PHIInfo.sources_begin(DestReg);
unsigned SourceReg = (*SRI).first;
- DEBUG(dbgs() << "DestReg: " << PrintReg(DestReg, TRI)
- << " SourceReg: " << PrintReg(SourceReg, TRI) << "\n");
+ DEBUG(dbgs() << "DestReg: " << printReg(DestReg, TRI)
+ << " SourceReg: " << printReg(SourceReg, TRI) << "\n");
assert(PHIInfo.sources_end(DestReg) == ++SRI &&
"More than one phi source in entry node");
@@ -2424,15 +2439,15 @@ void AMDGPUMachineCFGStructurizer::splitLoopPHI(MachineInstr &PHI,
MachineInstrBuilder MIB =
BuildMI(*EntrySucc, EntrySucc->instr_begin(), PHI.getDebugLoc(),
TII->get(TargetOpcode::PHI), NewDestReg);
- DEBUG(dbgs() << "Split Entry PHI " << PrintReg(NewDestReg, TRI)
- << "<def> = PHI(");
+ DEBUG(dbgs() << "Split Entry PHI " << printReg(NewDestReg, TRI) << " = PHI(");
MIB.addReg(PHISource);
MIB.addMBB(Entry);
- DEBUG(dbgs() << PrintReg(PHISource, TRI) << ", BB#" << Entry->getNumber());
+ DEBUG(dbgs() << printReg(PHISource, TRI) << ", "
+ << printMBBReference(*Entry));
MIB.addReg(RegionSourceReg);
MIB.addMBB(RegionSourceMBB);
- DEBUG(dbgs() << " ," << PrintReg(RegionSourceReg, TRI) << ", BB#"
- << RegionSourceMBB->getNumber() << ")\n");
+ DEBUG(dbgs() << " ," << printReg(RegionSourceReg, TRI) << ", "
+ << printMBBReference(*RegionSourceMBB) << ")\n");
}
void AMDGPUMachineCFGStructurizer::splitLoopPHIs(MachineBasicBlock *Entry,
@@ -2487,7 +2502,6 @@ AMDGPUMachineCFGStructurizer::splitExit(LinearizedRegion *LRegion) {
return NewExit;
}
-
static MachineBasicBlock *split(MachineBasicBlock::iterator I) {
// Create the fall-through block.
MachineBasicBlock *MBB = (*I).getParent();
@@ -2514,9 +2528,9 @@ AMDGPUMachineCFGStructurizer::splitEntry(LinearizedRegion *LRegion) {
MachineBasicBlock *EntrySucc = split(Entry->getFirstNonPHI());
MachineBasicBlock *Exit = LRegion->getExit();
- DEBUG(dbgs() << "Split BB#" << Entry->getNumber() << " to BB#"
- << Entry->getNumber() << " -> BB#" << EntrySucc->getNumber()
- << "\n");
+ DEBUG(dbgs() << "Split " << printMBBReference(*Entry) << " to "
+ << printMBBReference(*Entry) << " -> "
+ << printMBBReference(*EntrySucc) << "\n");
LRegion->addMBB(EntrySucc);
// Make the backedge go to Entry Succ
@@ -2655,9 +2669,9 @@ bool AMDGPUMachineCFGStructurizer::structurizeComplexRegion(RegionMRT *Region) {
BBSelectRegOut = Child->getBBSelectRegOut();
BBSelectRegIn = Child->getBBSelectRegIn();
- DEBUG(dbgs() << "BBSelectRegIn: " << PrintReg(BBSelectRegIn, TRI)
+ DEBUG(dbgs() << "BBSelectRegIn: " << printReg(BBSelectRegIn, TRI)
<< "\n");
- DEBUG(dbgs() << "BBSelectRegOut: " << PrintReg(BBSelectRegOut, TRI)
+ DEBUG(dbgs() << "BBSelectRegOut: " << printReg(BBSelectRegOut, TRI)
<< "\n");
MachineBasicBlock *IfEnd = CurrentMerge;
@@ -2679,9 +2693,9 @@ bool AMDGPUMachineCFGStructurizer::structurizeComplexRegion(RegionMRT *Region) {
BBSelectRegOut = Child->getBBSelectRegOut();
BBSelectRegIn = Child->getBBSelectRegIn();
- DEBUG(dbgs() << "BBSelectRegIn: " << PrintReg(BBSelectRegIn, TRI)
+ DEBUG(dbgs() << "BBSelectRegIn: " << printReg(BBSelectRegIn, TRI)
<< "\n");
- DEBUG(dbgs() << "BBSelectRegOut: " << PrintReg(BBSelectRegOut, TRI)
+ DEBUG(dbgs() << "BBSelectRegOut: " << printReg(BBSelectRegOut, TRI)
<< "\n");
MachineBasicBlock *IfEnd = CurrentMerge;
@@ -2786,7 +2800,7 @@ void AMDGPUMachineCFGStructurizer::createLinearizedRegion(RegionMRT *Region,
LinearizedRegion *LRegion = new LinearizedRegion();
if (SelectOut) {
LRegion->addLiveOut(SelectOut);
- DEBUG(dbgs() << "Add LiveOut (BBSelect): " << PrintReg(SelectOut, TRI)
+ DEBUG(dbgs() << "Add LiveOut (BBSelect): " << printReg(SelectOut, TRI)
<< "\n");
}
LRegion->setRegionMRT(Region);
@@ -2841,16 +2855,6 @@ static void checkRegOnlyPHIInputs(MachineFunction &MF) {
}
}
-
-INITIALIZE_PASS_BEGIN(AMDGPUMachineCFGStructurizer, "amdgpu-machine-cfg-structurizer",
- "AMDGPU Machine CFG Structurizer", false, false)
-INITIALIZE_PASS_DEPENDENCY(MachineRegionInfoPass)
-INITIALIZE_PASS_END(AMDGPUMachineCFGStructurizer, "amdgpu-machine-cfg-structurizer",
- "AMDGPU Machine CFG Structurizer", false, false)
-
-char AMDGPUMachineCFGStructurizerID = AMDGPUMachineCFGStructurizer::ID;
-
-
bool AMDGPUMachineCFGStructurizer::runOnMachineFunction(MachineFunction &MF) {
const SISubtarget &ST = MF.getSubtarget<SISubtarget>();
const SIInstrInfo *TII = ST.getInstrInfo();
@@ -2876,6 +2880,14 @@ bool AMDGPUMachineCFGStructurizer::runOnMachineFunction(MachineFunction &MF) {
return result;
}
+char AMDGPUMachineCFGStructurizerID = AMDGPUMachineCFGStructurizer::ID;
+
+INITIALIZE_PASS_BEGIN(AMDGPUMachineCFGStructurizer, "amdgpu-machine-cfg-structurizer",
+ "AMDGPU Machine CFG Structurizer", false, false)
+INITIALIZE_PASS_DEPENDENCY(MachineRegionInfoPass)
+INITIALIZE_PASS_END(AMDGPUMachineCFGStructurizer, "amdgpu-machine-cfg-structurizer",
+ "AMDGPU Machine CFG Structurizer", false, false)
+
FunctionPass *llvm::createAMDGPUMachineCFGStructurizerPass() {
return new AMDGPUMachineCFGStructurizer();
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-04 18:04:20 +0000