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path: root/lib/Target/AVR/AVRExpandPseudoInsts.cpp
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Diffstat (limited to 'lib/Target/AVR/AVRExpandPseudoInsts.cpp')
-rw-r--r--lib/Target/AVR/AVRExpandPseudoInsts.cpp17
1 files changed, 7 insertions, 10 deletions
diff --git a/lib/Target/AVR/AVRExpandPseudoInsts.cpp b/lib/Target/AVR/AVRExpandPseudoInsts.cpp
index 1b2f2cec0bca..13080a5d72f0 100644
--- a/lib/Target/AVR/AVRExpandPseudoInsts.cpp
+++ b/lib/Target/AVR/AVRExpandPseudoInsts.cpp
@@ -509,8 +509,8 @@ bool AVRExpandPseudo::expand<AVR::LDIWRdK>(Block &MBB, BlockIt MBBI) {
const BlockAddress *BA = MI.getOperand(1).getBlockAddress();
unsigned TF = MI.getOperand(1).getTargetFlags();
- MIBLO.addOperand(MachineOperand::CreateBA(BA, TF | AVRII::MO_LO));
- MIBHI.addOperand(MachineOperand::CreateBA(BA, TF | AVRII::MO_HI));
+ MIBLO.add(MachineOperand::CreateBA(BA, TF | AVRII::MO_LO));
+ MIBHI.add(MachineOperand::CreateBA(BA, TF | AVRII::MO_HI));
break;
}
case MachineOperand::MO_Immediate: {
@@ -785,9 +785,8 @@ bool AVRExpandPseudo::expandAtomicBinaryOp(unsigned Opcode,
auto Op1 = MI.getOperand(0);
auto Op2 = MI.getOperand(1);
- MachineInstr &NewInst = *buildMI(MBB, MBBI, Opcode)
- .addOperand(Op1).addOperand(Op2)
- .getInstr();
+ MachineInstr &NewInst =
+ *buildMI(MBB, MBBI, Opcode).add(Op1).add(Op2).getInstr();
f(NewInst);
});
}
@@ -810,15 +809,13 @@ bool AVRExpandPseudo::expandAtomicArithmeticOp(unsigned Width,
unsigned StoreOpcode = (Width == 8) ? AVR::STPtrRr : AVR::STWPtrRr;
// Create the load
- buildMI(MBB, MBBI, LoadOpcode).addOperand(Op1).addOperand(Op2);
+ buildMI(MBB, MBBI, LoadOpcode).add(Op1).add(Op2);
// Create the arithmetic op
- buildMI(MBB, MBBI, ArithOpcode)
- .addOperand(Op1).addOperand(Op1)
- .addOperand(Op2);
+ buildMI(MBB, MBBI, ArithOpcode).add(Op1).add(Op1).add(Op2);
// Create the store
- buildMI(MBB, MBBI, StoreOpcode).addOperand(Op2).addOperand(Op1);
+ buildMI(MBB, MBBI, StoreOpcode).add(Op2).add(Op1);
});
}