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-rw-r--r--lib/Target/Hexagon/HexagonConstPropagation.cpp109
1 files changed, 63 insertions, 46 deletions
diff --git a/lib/Target/Hexagon/HexagonConstPropagation.cpp b/lib/Target/Hexagon/HexagonConstPropagation.cpp
index 49ddd6961f8a..8ac96f3a4bfa 100644
--- a/lib/Target/Hexagon/HexagonConstPropagation.cpp
+++ b/lib/Target/Hexagon/HexagonConstPropagation.cpp
@@ -1,4 +1,4 @@
-//===--- HexagonConstPropagation.cpp --------------------------------------===//
+//===- HexagonConstPropagation.cpp ----------------------------------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -25,14 +25,17 @@
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/TargetRegisterInfo.h"
+#include "llvm/CodeGen/TargetSubtargetInfo.h"
#include "llvm/IR/Constants.h"
+#include "llvm/IR/Type.h"
#include "llvm/Pass.h"
#include "llvm/Support/Casting.h"
+#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/raw_ostream.h"
-#include "llvm/Target/TargetRegisterInfo.h"
#include <cassert>
#include <cstdint>
#include <cstring>
@@ -85,7 +88,7 @@ namespace {
: Reg(MO.getReg()), SubReg(MO.getSubReg()) {}
void print(const TargetRegisterInfo *TRI = nullptr) const {
- dbgs() << PrintReg(Reg, TRI, SubReg);
+ dbgs() << printReg(Reg, TRI, SubReg);
}
bool operator== (const Register &R) const {
@@ -167,10 +170,12 @@ namespace {
bool convertToProperty();
};
+#ifndef NDEBUG
raw_ostream &operator<< (raw_ostream &os, const LatticeCell &L) {
L.print(os);
return os;
}
+#endif
class MachineConstEvaluator;
@@ -182,7 +187,7 @@ namespace {
// Mapping: vreg -> cell
// The keys are registers _without_ subregisters. This won't allow
- // definitions in the form of "vreg:subreg<def> = ...". Such definitions
+ // definitions in the form of "vreg:subreg = ...". Such definitions
// would be questionable from the point of view of SSA, since the "vreg"
// could not be initialized in its entirety (specifically, an instruction
// defining the "other part" of "vreg" would also count as a definition
@@ -224,7 +229,8 @@ namespace {
void print(raw_ostream &os, const TargetRegisterInfo &TRI) const;
private:
- typedef std::map<unsigned,LatticeCell> MapType;
+ using MapType = std::map<unsigned, LatticeCell>;
+
MapType Map;
// To avoid creating "top" entries, return a const reference to
// this cell in "get". Also, have a "Bottom" cell to return from
@@ -232,7 +238,8 @@ namespace {
LatticeCell Top, Bottom;
public:
- typedef MapType::const_iterator const_iterator;
+ using const_iterator = MapType::const_iterator;
+
const_iterator begin() const { return Map.begin(); }
const_iterator end() const { return Map.end(); }
};
@@ -254,10 +261,10 @@ namespace {
MachineRegisterInfo *MRI;
MachineConstEvaluator &MCE;
- typedef std::pair<unsigned,unsigned> CFGEdge;
- typedef std::set<CFGEdge> SetOfCFGEdge;
- typedef std::set<const MachineInstr*> SetOfInstr;
- typedef std::queue<CFGEdge> QueueOfCFGEdge;
+ using CFGEdge = std::pair<unsigned, unsigned>;
+ using SetOfCFGEdge = std::set<CFGEdge>;
+ using SetOfInstr = std::set<const MachineInstr *>;
+ using QueueOfCFGEdge = std::queue<CFGEdge>;
LatticeCell Bottom;
CellMap Cells;
@@ -273,7 +280,7 @@ namespace {
public:
MachineConstEvaluator(MachineFunction &Fn)
: TRI(*Fn.getSubtarget().getRegisterInfo()),
- MF(Fn), CX(Fn.getFunction()->getContext()) {}
+ MF(Fn), CX(Fn.getFunction().getContext()) {}
virtual ~MachineConstEvaluator() = default;
// The required interface:
@@ -291,7 +298,7 @@ namespace {
// - A function "rewrite", that given the cell map after propagation,
// could rewrite instruction MI in a more beneficial form. Return
// "true" if a change has been made, "false" otherwise.
- typedef MachineConstPropagator::CellMap CellMap;
+ using CellMap = MachineConstPropagator::CellMap;
virtual bool evaluate(const MachineInstr &MI, const CellMap &Inputs,
CellMap &Outputs) = 0;
virtual bool evaluate(const Register &R, const LatticeCell &SrcC,
@@ -458,6 +465,7 @@ bool LatticeCell::convertToProperty() {
return true;
}
+#ifndef NDEBUG
void LatticeCell::print(raw_ostream &os) const {
if (isProperty()) {
os << "{ ";
@@ -495,6 +503,7 @@ void LatticeCell::print(raw_ostream &os) const {
}
os << " }";
}
+#endif
// "Meet" operation on two cells. This is the key of the propagation
// algorithm.
@@ -597,16 +606,18 @@ uint32_t LatticeCell::properties() const {
return Ps;
}
+#ifndef NDEBUG
void MachineConstPropagator::CellMap::print(raw_ostream &os,
const TargetRegisterInfo &TRI) const {
for (auto &I : Map)
- dbgs() << " " << PrintReg(I.first, &TRI) << " -> " << I.second << '\n';
+ dbgs() << " " << printReg(I.first, &TRI) << " -> " << I.second << '\n';
}
+#endif
void MachineConstPropagator::visitPHI(const MachineInstr &PN) {
const MachineBasicBlock *MB = PN.getParent();
unsigned MBN = MB->getNumber();
- DEBUG(dbgs() << "Visiting FI(BB#" << MBN << "): " << PN);
+ DEBUG(dbgs() << "Visiting FI(" << printMBBReference(*MB) << "): " << PN);
const MachineOperand &MD = PN.getOperand(0);
Register DefR(MD);
@@ -631,8 +642,8 @@ Bottomize:
const MachineBasicBlock *PB = PN.getOperand(i+1).getMBB();
unsigned PBN = PB->getNumber();
if (!EdgeExec.count(CFGEdge(PBN, MBN))) {
- DEBUG(dbgs() << " edge BB#" << PBN << "->BB#" << MBN
- << " not executable\n");
+ DEBUG(dbgs() << " edge " << printMBBReference(*PB) << "->"
+ << printMBBReference(*MB) << " not executable\n");
continue;
}
const MachineOperand &SO = PN.getOperand(i);
@@ -647,9 +658,8 @@ Bottomize:
LatticeCell SrcC;
bool Eval = MCE.evaluate(UseR, Cells.get(UseR.Reg), SrcC);
- DEBUG(dbgs() << " edge from BB#" << PBN << ": "
- << PrintReg(UseR.Reg, &MCE.TRI, UseR.SubReg)
- << SrcC << '\n');
+ DEBUG(dbgs() << " edge from " << printMBBReference(*PB) << ": "
+ << printReg(UseR.Reg, &MCE.TRI, UseR.SubReg) << SrcC << '\n');
Changed |= Eval ? DefC.meet(SrcC)
: DefC.setBottom();
Cells.update(DefR.Reg, DefC);
@@ -661,7 +671,7 @@ Bottomize:
}
void MachineConstPropagator::visitNonBranch(const MachineInstr &MI) {
- DEBUG(dbgs() << "Visiting MI(BB#" << MI.getParent()->getNumber()
+ DEBUG(dbgs() << "Visiting MI(" << printMBBReference(*MI.getParent())
<< "): " << MI);
CellMap Outputs;
bool Eval = MCE.evaluate(MI, Cells, Outputs);
@@ -718,8 +728,8 @@ void MachineConstPropagator::visitBranchesFrom(const MachineInstr &BrI) {
while (It != End) {
const MachineInstr &MI = *It;
InstrExec.insert(&MI);
- DEBUG(dbgs() << "Visiting " << (EvalOk ? "BR" : "br") << "(BB#"
- << MBN << "): " << MI);
+ DEBUG(dbgs() << "Visiting " << (EvalOk ? "BR" : "br") << "("
+ << printMBBReference(B) << "): " << MI);
// Do not evaluate subsequent branches if the evaluation of any of the
// previous branches failed. Keep iterating over the branches only
// to mark them as executable.
@@ -761,13 +771,14 @@ void MachineConstPropagator::visitBranchesFrom(const MachineInstr &BrI) {
for (const MachineBasicBlock *TB : Targets) {
unsigned TBN = TB->getNumber();
- DEBUG(dbgs() << " pushing edge BB#" << MBN << " -> BB#" << TBN << "\n");
+ DEBUG(dbgs() << " pushing edge " << printMBBReference(B) << " -> "
+ << printMBBReference(*TB) << "\n");
FlowQ.push(CFGEdge(MBN, TBN));
}
}
void MachineConstPropagator::visitUsesOf(unsigned Reg) {
- DEBUG(dbgs() << "Visiting uses of " << PrintReg(Reg, &MCE.TRI)
+ DEBUG(dbgs() << "Visiting uses of " << printReg(Reg, &MCE.TRI)
<< Cells.get(Reg) << '\n');
for (MachineInstr &MI : MRI->use_nodbg_instructions(Reg)) {
// Do not process non-executable instructions. They can become exceutable
@@ -859,8 +870,10 @@ void MachineConstPropagator::propagate(MachineFunction &MF) {
CFGEdge Edge = FlowQ.front();
FlowQ.pop();
- DEBUG(dbgs() << "Picked edge BB#" << Edge.first << "->BB#"
- << Edge.second << '\n');
+ DEBUG(dbgs() << "Picked edge "
+ << printMBBReference(*MF.getBlockNumbered(Edge.first)) << "->"
+ << printMBBReference(*MF.getBlockNumbered(Edge.second))
+ << '\n');
if (Edge.first != EntryNum)
if (EdgeExec.count(Edge))
continue;
@@ -923,7 +936,8 @@ void MachineConstPropagator::propagate(MachineFunction &MF) {
for (const MachineBasicBlock *SB : B.successors()) {
unsigned SN = SB->getNumber();
if (!EdgeExec.count(CFGEdge(BN, SN)))
- dbgs() << " BB#" << BN << " -> BB#" << SN << '\n';
+ dbgs() << " " << printMBBReference(B) << " -> "
+ << printMBBReference(*SB) << '\n';
}
}
});
@@ -1028,7 +1042,7 @@ bool MachineConstPropagator::rewrite(MachineFunction &MF) {
// This is the constant propagation algorithm as described by Wegman-Zadeck.
// Most of the terminology comes from there.
bool MachineConstPropagator::run(MachineFunction &MF) {
- DEBUG(MF.print(dbgs() << "Starting MachineConstPropagator\n", 0));
+ DEBUG(MF.print(dbgs() << "Starting MachineConstPropagator\n", nullptr));
MRI = &MF.getRegInfo();
@@ -1043,7 +1057,7 @@ bool MachineConstPropagator::run(MachineFunction &MF) {
DEBUG({
dbgs() << "End of MachineConstPropagator (Changed=" << Changed << ")\n";
if (Changed)
- MF.print(dbgs(), 0);
+ MF.print(dbgs(), nullptr);
});
return Changed;
}
@@ -1278,7 +1292,8 @@ bool MachineConstEvaluator::evaluateCMPpi(uint32_t Cmp, uint32_t Props,
bool MachineConstEvaluator::evaluateCMPpp(uint32_t Cmp, uint32_t Props1,
uint32_t Props2, bool &Result) {
- typedef ConstantProperties P;
+ using P = ConstantProperties;
+
if ((Props1 & P::NaN) && (Props2 & P::NaN))
return false;
if (!(Props1 & P::Finite) || !(Props2 & P::Finite))
@@ -1875,10 +1890,8 @@ namespace {
}
bool runOnMachineFunction(MachineFunction &MF) override {
- const Function *F = MF.getFunction();
- if (!F)
- return false;
- if (skipFunction(*F))
+ const Function &F = MF.getFunction();
+ if (skipFunction(F))
return false;
HexagonConstEvaluator HCE(MF);
@@ -1886,10 +1899,10 @@ namespace {
}
};
- char HexagonConstPropagation::ID = 0;
-
} // end anonymous namespace
+char HexagonConstPropagation::ID = 0;
+
INITIALIZE_PASS(HexagonConstPropagation, "hcp", "Hexagon Constant Propagation",
false, false)
@@ -1928,7 +1941,7 @@ bool HexagonConstEvaluator::evaluate(const MachineInstr &MI,
if (MI.isRegSequence()) {
unsigned Sub1 = MI.getOperand(2).getImm();
unsigned Sub2 = MI.getOperand(4).getImm();
- const TargetRegisterClass *DefRC = MRI->getRegClass(DefR.Reg);
+ const TargetRegisterClass &DefRC = *MRI->getRegClass(DefR.Reg);
unsigned SubLo = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_lo);
unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi);
if (Sub1 != SubLo && Sub1 != SubHi)
@@ -1962,7 +1975,7 @@ bool HexagonConstEvaluator::evaluate(const MachineInstr &MI,
{
const MachineOperand &VO = MI.getOperand(1);
// The operand of CONST32 can be a blockaddress, e.g.
- // %vreg0<def> = CONST32 <blockaddress(@eat, %L)>
+ // %0 = CONST32 <blockaddress(@eat, %l)>
// Do this check for all instructions for safety.
if (!VO.isImm())
return false;
@@ -2192,7 +2205,8 @@ bool HexagonConstEvaluator::evaluate(const Register &R,
if (Input.isBottom())
return false;
- typedef ConstantProperties P;
+ using P = ConstantProperties;
+
if (Input.isProperty()) {
uint32_t Ps = Input.properties();
if (Ps & (P::Zero|P::NaN)) {
@@ -2775,7 +2789,7 @@ bool HexagonConstEvaluator::rewriteHexConstDefs(MachineInstr &MI,
HasUse = true;
// PHIs can legitimately have "top" cells after propagation.
if (!MI.isPHI() && !Inputs.has(R.Reg)) {
- dbgs() << "Top " << PrintReg(R.Reg, &HRI, R.SubReg)
+ dbgs() << "Top " << printReg(R.Reg, &HRI, R.SubReg)
<< " in MI: " << MI;
continue;
}
@@ -2791,7 +2805,7 @@ bool HexagonConstEvaluator::rewriteHexConstDefs(MachineInstr &MI,
if (!MO.isReg() || !MO.isUse() || MO.isImplicit())
continue;
unsigned R = MO.getReg();
- dbgs() << PrintReg(R, &TRI) << ": " << Inputs.get(R) << "\n";
+ dbgs() << printReg(R, &TRI) << ": " << Inputs.get(R) << "\n";
}
}
}
@@ -2837,7 +2851,8 @@ bool HexagonConstEvaluator::rewriteHexConstDefs(MachineInstr &MI,
if (!L.isSingle()) {
// If this a zero/non-zero cell, we can fold a definition
// of a predicate register.
- typedef ConstantProperties P;
+ using P = ConstantProperties;
+
uint64_t Ps = L.properties();
if (!(Ps & (P::Zero|P::NonZero)))
continue;
@@ -2908,7 +2923,7 @@ bool HexagonConstEvaluator::rewriteHexConstDefs(MachineInstr &MI,
DEBUG({
if (!NewInstrs.empty()) {
MachineFunction &MF = *MI.getParent()->getParent();
- dbgs() << "In function: " << MF.getFunction()->getName() << "\n";
+ dbgs() << "In function: " << MF.getName() << "\n";
dbgs() << "Rewrite: for " << MI << " created " << *NewInstrs[0];
for (unsigned i = 1; i < NewInstrs.size(); ++i)
dbgs() << " " << *NewInstrs[i];
@@ -3039,7 +3054,9 @@ bool HexagonConstEvaluator::rewriteHexConstUses(MachineInstr &MI,
assert(Inputs.has(R1.Reg) && Inputs.has(R2.Reg));
LatticeCell LS1, LS2;
unsigned CopyOf = 0;
- typedef ConstantProperties P;
+
+ using P = ConstantProperties;
+
if (getCell(R1, Inputs, LS1) && (LS1.properties() & P::Zero))
CopyOf = 2;
else if (getCell(R2, Inputs, LS2) && (LS2.properties() & P::Zero))
@@ -3110,7 +3127,7 @@ bool HexagonConstEvaluator::rewriteHexBranch(MachineInstr &BrI,
if (BrI.getOpcode() == Hexagon::J2_jump)
return false;
- DEBUG(dbgs() << "Rewrite(BB#" << B.getNumber() << "):" << BrI);
+ DEBUG(dbgs() << "Rewrite(" << printMBBReference(B) << "):" << BrI);
bool Rewritten = false;
if (NumTargets > 0) {
assert(!FallsThru && "This should have been checked before");
@@ -3128,7 +3145,7 @@ bool HexagonConstEvaluator::rewriteHexBranch(MachineInstr &BrI,
BrI.setDesc(JD);
while (BrI.getNumOperands() > 0)
BrI.RemoveOperand(0);
- // This ensures that all implicit operands (e.g. %R31<imp-def>, etc)
+ // This ensures that all implicit operands (e.g. implicit-def %r31, etc)
// are present in the rewritten branch.
for (auto &Op : NI->operands())
BrI.addOperand(Op);
generated by cgit v1.2.3 (git 2.25.1) at 2025-11-03 12:17:38 +0000