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path: root/lib/Target/Hexagon/HexagonGenInsert.cpp
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Diffstat (limited to 'lib/Target/Hexagon/HexagonGenInsert.cpp')
-rw-r--r--lib/Target/Hexagon/HexagonGenInsert.cpp27
1 files changed, 13 insertions, 14 deletions
diff --git a/lib/Target/Hexagon/HexagonGenInsert.cpp b/lib/Target/Hexagon/HexagonGenInsert.cpp
index 81025c1c5325..48881e02f4d3 100644
--- a/lib/Target/Hexagon/HexagonGenInsert.cpp
+++ b/lib/Target/Hexagon/HexagonGenInsert.cpp
@@ -163,11 +163,11 @@ namespace {
}
static inline unsigned v2x(unsigned v) {
- return TargetRegisterInfo::virtReg2Index(v);
+ return Register::virtReg2Index(v);
}
static inline unsigned x2v(unsigned x) {
- return TargetRegisterInfo::index2VirtReg(x);
+ return Register::index2VirtReg(x);
}
};
@@ -267,7 +267,7 @@ namespace {
CellMapShadow(const BitTracker &T) : BT(T) {}
const BitTracker::RegisterCell &lookup(unsigned VR) {
- unsigned RInd = TargetRegisterInfo::virtReg2Index(VR);
+ unsigned RInd = Register::virtReg2Index(VR);
// Grow the vector to at least 32 elements.
if (RInd >= CVect.size())
CVect.resize(std::max(RInd+16, 32U), nullptr);
@@ -606,9 +606,9 @@ void HexagonGenInsert::buildOrderingMF(RegisterOrdering &RO) const {
for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) {
const MachineOperand &MO = MI->getOperand(i);
if (MO.isReg() && MO.isDef()) {
- unsigned R = MO.getReg();
+ Register R = MO.getReg();
assert(MO.getSubReg() == 0 && "Unexpected subregister in definition");
- if (TargetRegisterInfo::isVirtualRegister(R))
+ if (Register::isVirtualRegister(R))
RO.insert(std::make_pair(R, Index++));
}
}
@@ -724,8 +724,8 @@ void HexagonGenInsert::getInstrDefs(const MachineInstr *MI,
const MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || !MO.isDef())
continue;
- unsigned R = MO.getReg();
- if (!TargetRegisterInfo::isVirtualRegister(R))
+ Register R = MO.getReg();
+ if (!Register::isVirtualRegister(R))
continue;
Defs.insert(R);
}
@@ -737,8 +737,8 @@ void HexagonGenInsert::getInstrUses(const MachineInstr *MI,
const MachineOperand &MO = MI->getOperand(i);
if (!MO.isReg() || !MO.isUse())
continue;
- unsigned R = MO.getReg();
- if (!TargetRegisterInfo::isVirtualRegister(R))
+ Register R = MO.getReg();
+ if (!Register::isVirtualRegister(R))
continue;
Uses.insert(R);
}
@@ -1399,7 +1399,7 @@ bool HexagonGenInsert::generateInserts() {
for (IFMapType::iterator I = IFMap.begin(), E = IFMap.end(); I != E; ++I) {
unsigned VR = I->first;
const TargetRegisterClass *RC = MRI->getRegClass(VR);
- unsigned NewVR = MRI->createVirtualRegister(RC);
+ Register NewVR = MRI->createVirtualRegister(RC);
RegMap[VR] = NewVR;
}
@@ -1477,9 +1477,8 @@ bool HexagonGenInsert::removeDeadCode(MachineDomTreeNode *N) {
for (const MachineOperand &MO : MI->operands()) {
if (!MO.isReg() || !MO.isDef())
continue;
- unsigned R = MO.getReg();
- if (!TargetRegisterInfo::isVirtualRegister(R) ||
- !MRI->use_nodbg_empty(R)) {
+ Register R = MO.getReg();
+ if (!Register::isVirtualRegister(R) || !MRI->use_nodbg_empty(R)) {
AllDead = false;
break;
}
@@ -1598,7 +1597,7 @@ bool HexagonGenInsert::runOnMachineFunction(MachineFunction &MF) {
IterListType Out;
for (IFMapType::iterator I = IFMap.begin(), E = IFMap.end(); I != E; ++I) {
- unsigned Idx = TargetRegisterInfo::virtReg2Index(I->first);
+ unsigned Idx = Register::virtReg2Index(I->first);
if (Idx >= Cutoff)
Out.push_back(I);
}