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-rw-r--r--lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp12
-rw-r--r--lib/Target/MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp4
-rw-r--r--lib/Target/MSP430/MSP430AsmPrinter.cpp8
-rw-r--r--lib/Target/MSP430/MSP430BranchSelector.cpp1
-rw-r--r--lib/Target/MSP430/MSP430FrameLowering.h3
-rw-r--r--lib/Target/MSP430/MSP430ISelLowering.cpp27
-rw-r--r--lib/Target/MSP430/MSP430ISelLowering.h2
-rw-r--r--lib/Target/MSP430/MSP430RegisterInfo.cpp2
-rw-r--r--lib/Target/MSP430/MSP430TargetMachine.cpp2
9 files changed, 35 insertions, 26 deletions
diff --git a/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp b/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
index a0ec14ae2381..85dcc0f152f9 100644
--- a/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
+++ b/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
@@ -191,33 +191,33 @@ public:
}
static std::unique_ptr<MSP430Operand> CreateToken(StringRef Str, SMLoc S) {
- return make_unique<MSP430Operand>(Str, S);
+ return std::make_unique<MSP430Operand>(Str, S);
}
static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S,
SMLoc E) {
- return make_unique<MSP430Operand>(k_Reg, RegNum, S, E);
+ return std::make_unique<MSP430Operand>(k_Reg, RegNum, S, E);
}
static std::unique_ptr<MSP430Operand> CreateImm(const MCExpr *Val, SMLoc S,
SMLoc E) {
- return make_unique<MSP430Operand>(Val, S, E);
+ return std::make_unique<MSP430Operand>(Val, S, E);
}
static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum,
const MCExpr *Val,
SMLoc S, SMLoc E) {
- return make_unique<MSP430Operand>(RegNum, Val, S, E);
+ return std::make_unique<MSP430Operand>(RegNum, Val, S, E);
}
static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S,
SMLoc E) {
- return make_unique<MSP430Operand>(k_IndReg, RegNum, S, E);
+ return std::make_unique<MSP430Operand>(k_IndReg, RegNum, S, E);
}
static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S,
SMLoc E) {
- return make_unique<MSP430Operand>(k_PostIndReg, RegNum, S, E);
+ return std::make_unique<MSP430Operand>(k_PostIndReg, RegNum, S, E);
}
SMLoc getStartLoc() const { return Start; }
diff --git a/lib/Target/MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp b/lib/Target/MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp
index 38b7da32c246..0cdd1f4f701f 100644
--- a/lib/Target/MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp
+++ b/lib/Target/MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp
@@ -31,7 +31,7 @@ protected:
unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
const MCFixup &Fixup, bool IsPCRel) const override {
// Translate fixup kind to ELF relocation type.
- switch ((unsigned)Fixup.getKind()) {
+ switch (Fixup.getTargetKind()) {
case FK_Data_1: return ELF::R_MSP430_8;
case FK_Data_2: return ELF::R_MSP430_16_BYTE;
case FK_Data_4: return ELF::R_MSP430_32;
@@ -54,5 +54,5 @@ protected:
std::unique_ptr<MCObjectTargetWriter>
llvm::createMSP430ELFObjectWriter(uint8_t OSABI) {
- return llvm::make_unique<MSP430ELFObjectWriter>(OSABI);
+ return std::make_unique<MSP430ELFObjectWriter>(OSABI);
}
diff --git a/lib/Target/MSP430/MSP430AsmPrinter.cpp b/lib/Target/MSP430/MSP430AsmPrinter.cpp
index 3a71a084d1af..a3b91acdc6d0 100644
--- a/lib/Target/MSP430/MSP430AsmPrinter.cpp
+++ b/lib/Target/MSP430/MSP430AsmPrinter.cpp
@@ -159,8 +159,9 @@ void MSP430AsmPrinter::EmitInstruction(const MachineInstr *MI) {
void MSP430AsmPrinter::EmitInterruptVectorSection(MachineFunction &ISR) {
MCSection *Cur = OutStreamer->getCurrentSectionOnly();
const auto *F = &ISR.getFunction();
- assert(F->hasFnAttribute("interrupt") &&
- "Functions with MSP430_INTR CC should have 'interrupt' attribute");
+ if (F->getCallingConv() != CallingConv::MSP430_INTR) {
+ report_fatal_error("Functions with 'interrupt' attribute must have msp430_intrcc CC");
+ }
StringRef IVIdx = F->getFnAttribute("interrupt").getValueAsString();
MCSection *IV = OutStreamer->getContext().getELFSection(
"__interrupt_vector_" + IVIdx,
@@ -174,8 +175,9 @@ void MSP430AsmPrinter::EmitInterruptVectorSection(MachineFunction &ISR) {
bool MSP430AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
// Emit separate section for an interrupt vector if ISR
- if (MF.getFunction().getCallingConv() == CallingConv::MSP430_INTR)
+ if (MF.getFunction().hasFnAttribute("interrupt")) {
EmitInterruptVectorSection(MF);
+ }
SetupMachineFunction(MF);
EmitFunctionBody();
diff --git a/lib/Target/MSP430/MSP430BranchSelector.cpp b/lib/Target/MSP430/MSP430BranchSelector.cpp
index 45e7c26e4d30..ce5affdc25b0 100644
--- a/lib/Target/MSP430/MSP430BranchSelector.cpp
+++ b/lib/Target/MSP430/MSP430BranchSelector.cpp
@@ -20,6 +20,7 @@
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/Support/Debug.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetMachine.h"
using namespace llvm;
diff --git a/lib/Target/MSP430/MSP430FrameLowering.h b/lib/Target/MSP430/MSP430FrameLowering.h
index 33ce3c70a2a3..70e284053021 100644
--- a/lib/Target/MSP430/MSP430FrameLowering.h
+++ b/lib/Target/MSP430/MSP430FrameLowering.h
@@ -22,7 +22,8 @@ protected:
public:
explicit MSP430FrameLowering()
- : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 2, -2, 2) {}
+ : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(2), -2,
+ Align(2)) {}
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.
diff --git a/lib/Target/MSP430/MSP430ISelLowering.cpp b/lib/Target/MSP430/MSP430ISelLowering.cpp
index fedfb857bd0f..64169d1f5eb1 100644
--- a/lib/Target/MSP430/MSP430ISelLowering.cpp
+++ b/lib/Target/MSP430/MSP430ISelLowering.cpp
@@ -327,8 +327,8 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM,
setLibcallCallingConv(RTLIB::OGT_F64, CallingConv::MSP430_BUILTIN);
// TODO: __mspabi_srall, __mspabi_srlll, __mspabi_sllll
- setMinFunctionAlignment(1);
- setPrefFunctionAlignment(1);
+ setMinFunctionAlignment(Align(2));
+ setPrefFunctionAlignment(Align(2));
}
SDValue MSP430TargetLowering::LowerOperation(SDValue Op,
@@ -353,6 +353,9 @@ SDValue MSP430TargetLowering::LowerOperation(SDValue Op,
}
}
+unsigned MSP430TargetLowering::getShiftAmountThreshold(EVT VT) const {
+ return 2;
+}
//===----------------------------------------------------------------------===//
// MSP430 Inline Assembly Support
//===----------------------------------------------------------------------===//
@@ -632,7 +635,7 @@ SDValue MSP430TargetLowering::LowerCCCArguments(
llvm_unreachable(nullptr);
}
case MVT::i16:
- unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
+ Register VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass);
RegInfo.addLiveIn(VA.getLocReg(), VReg);
SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
@@ -1446,8 +1449,8 @@ MSP430TargetLowering::EmitShiftInstr(MachineInstr &MI,
case MSP430::Rrcl16: {
BuildMI(*BB, MI, dl, TII.get(MSP430::BIC16rc), MSP430::SR)
.addReg(MSP430::SR).addImm(1);
- unsigned SrcReg = MI.getOperand(1).getReg();
- unsigned DstReg = MI.getOperand(0).getReg();
+ Register SrcReg = MI.getOperand(1).getReg();
+ Register DstReg = MI.getOperand(0).getReg();
unsigned RrcOpc = MI.getOpcode() == MSP430::Rrcl16
? MSP430::RRC16r : MSP430::RRC8r;
BuildMI(*BB, MI, dl, TII.get(RrcOpc), DstReg)
@@ -1479,13 +1482,13 @@ MSP430TargetLowering::EmitShiftInstr(MachineInstr &MI,
LoopBB->addSuccessor(RemBB);
LoopBB->addSuccessor(LoopBB);
- unsigned ShiftAmtReg = RI.createVirtualRegister(&MSP430::GR8RegClass);
- unsigned ShiftAmtReg2 = RI.createVirtualRegister(&MSP430::GR8RegClass);
- unsigned ShiftReg = RI.createVirtualRegister(RC);
- unsigned ShiftReg2 = RI.createVirtualRegister(RC);
- unsigned ShiftAmtSrcReg = MI.getOperand(2).getReg();
- unsigned SrcReg = MI.getOperand(1).getReg();
- unsigned DstReg = MI.getOperand(0).getReg();
+ Register ShiftAmtReg = RI.createVirtualRegister(&MSP430::GR8RegClass);
+ Register ShiftAmtReg2 = RI.createVirtualRegister(&MSP430::GR8RegClass);
+ Register ShiftReg = RI.createVirtualRegister(RC);
+ Register ShiftReg2 = RI.createVirtualRegister(RC);
+ Register ShiftAmtSrcReg = MI.getOperand(2).getReg();
+ Register SrcReg = MI.getOperand(1).getReg();
+ Register DstReg = MI.getOperand(0).getReg();
// BB:
// cmp 0, N
diff --git a/lib/Target/MSP430/MSP430ISelLowering.h b/lib/Target/MSP430/MSP430ISelLowering.h
index ee6b6316d7a9..9224e5e3d005 100644
--- a/lib/Target/MSP430/MSP430ISelLowering.h
+++ b/lib/Target/MSP430/MSP430ISelLowering.h
@@ -124,6 +124,8 @@ namespace llvm {
bool isZExtFree(EVT VT1, EVT VT2) const override;
bool isZExtFree(SDValue Val, EVT VT2) const override;
+ unsigned getShiftAmountThreshold(EVT VT) const override;
+
MachineBasicBlock *
EmitInstrWithCustomInserter(MachineInstr &MI,
MachineBasicBlock *BB) const override;
diff --git a/lib/Target/MSP430/MSP430RegisterInfo.cpp b/lib/Target/MSP430/MSP430RegisterInfo.cpp
index afbb2f213b45..bec357a1548d 100644
--- a/lib/Target/MSP430/MSP430RegisterInfo.cpp
+++ b/lib/Target/MSP430/MSP430RegisterInfo.cpp
@@ -139,7 +139,7 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
return;
// We need to materialize the offset via add instruction.
- unsigned DstReg = MI.getOperand(0).getReg();
+ Register DstReg = MI.getOperand(0).getReg();
if (Offset < 0)
BuildMI(MBB, std::next(II), dl, TII.get(MSP430::SUB16ri), DstReg)
.addReg(DstReg).addImm(-Offset);
diff --git a/lib/Target/MSP430/MSP430TargetMachine.cpp b/lib/Target/MSP430/MSP430TargetMachine.cpp
index 8c4ca982c966..e9aeba76de85 100644
--- a/lib/Target/MSP430/MSP430TargetMachine.cpp
+++ b/lib/Target/MSP430/MSP430TargetMachine.cpp
@@ -46,7 +46,7 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
Options, getEffectiveRelocModel(RM),
getEffectiveCodeModel(CM, CodeModel::Small), OL),
- TLOF(make_unique<TargetLoweringObjectFileELF>()),
+ TLOF(std::make_unique<TargetLoweringObjectFileELF>()),
Subtarget(TT, CPU, FS, *this) {
initAsmInfo();
}
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-29 20:50:42 +0000