diff options
Diffstat (limited to 'lib/Target/Mips/MipsSubtarget.h')
| -rw-r--r-- | lib/Target/Mips/MipsSubtarget.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index 0bfafc8b47a6..c8a2e4bd72c5 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -147,7 +147,7 @@ class MipsSubtarget : public MipsGenSubtargetInfo { public: /// This overrides the PostRAScheduler bit in the SchedModel for each CPU. - bool enablePostMachineScheduler() const override; + bool enablePostRAScheduler() const override; void getCriticalPathRCs(RegClassVector &CriticalPathRCs) const override; CodeGenOpt::Level getOptLevelToEnablePostRAScheduler() const override; @@ -161,9 +161,8 @@ public: /// This constructor initializes the data members to match that /// of the specified triple. - MipsSubtarget(const std::string &TT, const std::string &CPU, - const std::string &FS, bool little, - const MipsTargetMachine &TM); + MipsSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, + bool little, const MipsTargetMachine &TM); /// ParseSubtargetFeatures - Parses features string setting specified /// subtarget options. Definition of function is auto generated by tblgen. @@ -293,6 +292,6 @@ public: return &InstrItins; } }; -} // End llvm namespace +} // namespace llvm #endif |