diff options
Diffstat (limited to 'lib/Target/R600/AMDGPUSubtarget.cpp')
-rw-r--r-- | lib/Target/R600/AMDGPUSubtarget.cpp | 80 |
1 files changed, 53 insertions, 27 deletions
diff --git a/lib/Target/R600/AMDGPUSubtarget.cpp b/lib/Target/R600/AMDGPUSubtarget.cpp index e3c2a50ab828..597e558e6634 100644 --- a/lib/Target/R600/AMDGPUSubtarget.cpp +++ b/lib/Target/R600/AMDGPUSubtarget.cpp @@ -13,12 +13,13 @@ //===----------------------------------------------------------------------===// #include "AMDGPUSubtarget.h" +#include "R600ISelLowering.h" #include "R600InstrInfo.h" +#include "R600MachineScheduler.h" +#include "SIISelLowering.h" #include "SIInstrInfo.h" #include "llvm/ADT/SmallString.h" -#include "llvm/ADT/SmallString.h" - using namespace llvm; #define DEBUG_TYPE "amdgpu-subtarget" @@ -28,26 +29,23 @@ using namespace llvm; #define GET_SUBTARGETINFO_CTOR #include "AMDGPUGenSubtargetInfo.inc" -AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) : - AMDGPUGenSubtargetInfo(TT, GPU, FS), - DevName(GPU), - Is64bit(false), - DumpCode(false), - R600ALUInst(false), - HasVertexCache(false), - TexVTXClauseSize(0), - Gen(AMDGPUSubtarget::R600), - FP64(false), - FP64Denormals(false), - FP32Denormals(false), - CaymanISA(false), - EnableIRStructurizer(true), - EnablePromoteAlloca(false), - EnableIfCvt(true), - WavefrontSize(0), - CFALUBug(false), - LocalMemorySize(0), - InstrItins(getInstrItineraryForCPU(GPU)) { +static std::string computeDataLayout(const AMDGPUSubtarget &ST) { + std::string Ret = "e-p:32:32"; + + if (ST.is64bit()) { + // 32-bit private, local, and region pointers. 64-bit global and constant. + Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64"; + } + + Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256" + "-v512:512-v1024:1024-v2048:2048-n32:64"; + + return Ret; +} + +AMDGPUSubtarget & +AMDGPUSubtarget::initializeSubtargetDependencies(StringRef GPU, StringRef FS) { + // Determine default and user-specified characteristics // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be // enabled, but some instructions do not respect them and they run at the // double precision rate, so don't enable by default. @@ -61,16 +59,37 @@ AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS) : ParseSubtargetFeatures(GPU, FullFS); + // FIXME: I don't think think Evergreen has any useful support for + // denormals, but should be checked. Should we issue a warning somewhere + // if someone tries to enable these? if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { - InstrInfo.reset(new R600InstrInfo(*this)); - - // FIXME: I don't think think Evergreen has any useful support for - // denormals, but should be checked. Should we issue a warning somewhere if - // someone tries to enable these? FP32Denormals = false; FP64Denormals = false; + } + return *this; +} + +AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS, + TargetMachine &TM) + : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false), + DumpCode(false), R600ALUInst(false), HasVertexCache(false), + TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false), + FP64Denormals(false), FP32Denormals(false), CaymanISA(false), + FlatAddressSpace(false), EnableIRStructurizer(true), + EnablePromoteAlloca(false), EnableIfCvt(true), + EnableLoadStoreOpt(false), WavefrontSize(0), CFALUBug(false), LocalMemorySize(0), + DL(computeDataLayout(initializeSubtargetDependencies(GPU, FS))), + FrameLowering(TargetFrameLowering::StackGrowsUp, + 64 * 16, // Maximum stack alignment (long16) + 0), + InstrItins(getInstrItineraryForCPU(GPU)), + TargetTriple(TT) { + if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { + InstrInfo.reset(new R600InstrInfo(*this)); + TLInfo.reset(new R600TargetLowering(TM)); } else { InstrInfo.reset(new SIInstrInfo(*this)); + TLInfo.reset(new SITargetLowering(TM)); } } @@ -87,3 +106,10 @@ unsigned AMDGPUSubtarget::getStackEntrySize() const { llvm_unreachable("Illegal wavefront size."); } } + +unsigned AMDGPUSubtarget::getAmdKernelCodeChipID() const { + switch(getGeneration()) { + default: llvm_unreachable("ChipID unknown"); + case SEA_ISLANDS: return 12; + } +} |