diff options
Diffstat (limited to 'lib/Target/WebAssembly/WebAssemblyRegStackify.cpp')
| -rw-r--r-- | lib/Target/WebAssembly/WebAssemblyRegStackify.cpp | 45 |
1 files changed, 20 insertions, 25 deletions
diff --git a/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp b/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp index a4bb967f36f6..9f5d5bd87831 100644 --- a/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp +++ b/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp @@ -8,7 +8,7 @@ //===----------------------------------------------------------------------===// /// /// \file -/// \brief This file implements a register stacking pass. +/// This file implements a register stacking pass. /// /// This pass reorders instructions to put register uses and defs in an order /// such that they form single-use expression trees. Registers fitting this form @@ -67,6 +67,10 @@ public: } // end anonymous namespace char WebAssemblyRegStackify::ID = 0; +INITIALIZE_PASS(WebAssemblyRegStackify, DEBUG_TYPE, + "Reorder instructions to use the WebAssembly value stack", + false, false) + FunctionPass *llvm::createWebAssemblyRegStackify() { return new WebAssemblyRegStackify(); } @@ -156,10 +160,9 @@ static void QueryCallee(const MachineInstr &MI, unsigned CalleeOpNo, bool &Read, // and/or uses the stack pointer value. static void Query(const MachineInstr &MI, AliasAnalysis &AA, bool &Read, bool &Write, bool &Effects, bool &StackPointer) { - assert(!MI.isPosition()); assert(!MI.isTerminator()); - if (MI.isDebugValue()) + if (MI.isDebugInstr() || MI.isPosition()) return; // Check for loads. @@ -469,7 +472,7 @@ static MachineInstr *MoveForSingleUse(unsigned Reg, MachineOperand& Op, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI) { - DEBUG(dbgs() << "Move for single use: "; Def->dump()); + LLVM_DEBUG(dbgs() << "Move for single use: "; Def->dump()); MBB.splice(Insert, &MBB, Def); LIS.handleMove(*Def); @@ -496,7 +499,7 @@ static MachineInstr *MoveForSingleUse(unsigned Reg, MachineOperand& Op, MFI.stackifyVReg(NewReg); - DEBUG(dbgs() << " - Replaced register: "; Def->dump()); + LLVM_DEBUG(dbgs() << " - Replaced register: "; Def->dump()); } ImposeStackOrdering(Def); @@ -510,8 +513,8 @@ static MachineInstr *RematerializeCheapDef( MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII, const WebAssemblyRegisterInfo *TRI) { - DEBUG(dbgs() << "Rematerializing cheap def: "; Def.dump()); - DEBUG(dbgs() << " - for use in "; Op.getParent()->dump()); + LLVM_DEBUG(dbgs() << "Rematerializing cheap def: "; Def.dump()); + LLVM_DEBUG(dbgs() << " - for use in "; Op.getParent()->dump()); unsigned NewReg = MRI.createVirtualRegister(MRI.getRegClass(Reg)); TII->reMaterialize(MBB, Insert, NewReg, 0, Def, *TRI); @@ -522,7 +525,7 @@ static MachineInstr *RematerializeCheapDef( MFI.stackifyVReg(NewReg); ImposeStackOrdering(Clone); - DEBUG(dbgs() << " - Cloned to "; Clone->dump()); + LLVM_DEBUG(dbgs() << " - Cloned to "; Clone->dump()); // Shrink the interval. bool IsDead = MRI.use_empty(Reg); @@ -534,7 +537,7 @@ static MachineInstr *RematerializeCheapDef( // If that was the last use of the original, delete the original. if (IsDead) { - DEBUG(dbgs() << " - Deleting original\n"); + LLVM_DEBUG(dbgs() << " - Deleting original\n"); SlotIndex Idx = LIS.getInstructionIndex(Def).getRegSlot(); LIS.removePhysRegDefAt(WebAssembly::ARGUMENTS, Idx); LIS.removeInterval(Reg); @@ -569,7 +572,7 @@ static MachineInstr *MoveAndTeeForMultiUse( unsigned Reg, MachineOperand &Op, MachineInstr *Def, MachineBasicBlock &MBB, MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) { - DEBUG(dbgs() << "Move and tee for multi-use:"; Def->dump()); + LLVM_DEBUG(dbgs() << "Move and tee for multi-use:"; Def->dump()); // Move Def into place. MBB.splice(Insert, &MBB, Def); @@ -605,8 +608,8 @@ static MachineInstr *MoveAndTeeForMultiUse( ImposeStackOrdering(Def); ImposeStackOrdering(Tee); - DEBUG(dbgs() << " - Replaced register: "; Def->dump()); - DEBUG(dbgs() << " - Tee instruction: "; Tee->dump()); + LLVM_DEBUG(dbgs() << " - Replaced register: "; Def->dump()); + LLVM_DEBUG(dbgs() << " - Tee instruction: "; Tee->dump()); return Def; } @@ -733,9 +736,9 @@ public: } // end anonymous namespace bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { - DEBUG(dbgs() << "********** Register Stackifying **********\n" - "********** Function: " - << MF.getName() << '\n'); + LLVM_DEBUG(dbgs() << "********** Register Stackifying **********\n" + "********** Function: " + << MF.getName() << '\n'); bool Changed = false; MachineRegisterInfo &MRI = MF.getRegInfo(); @@ -746,14 +749,6 @@ bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { MachineDominatorTree &MDT = getAnalysis<MachineDominatorTree>(); LiveIntervals &LIS = getAnalysis<LiveIntervals>(); - // Disable the TEE optimization if we aren't doing direct wasm object - // emission, because lowering TEE to TEE_LOCAL is done in the ExplicitLocals - // pass, which is also disabled. - bool UseTee = true; - if (MF.getSubtarget<WebAssemblySubtarget>() - .getTargetTriple().isOSBinFormatELF()) - UseTee = false; - // Walk the instructions from the bottom up. Currently we don't look past // block boundaries, and the blocks aren't ordered so the block visitation // order isn't significant, but we may want to change this in the future. @@ -819,7 +814,7 @@ bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { Insert = RematerializeCheapDef(Reg, Op, *Def, MBB, Insert->getIterator(), LIS, MFI, MRI, TII, TRI); - } else if (UseTee && CanMove && + } else if (CanMove && OneUseDominatesOtherUses(Reg, Op, MBB, MRI, MDT, LIS, MFI)) { Insert = MoveAndTeeForMultiUse(Reg, Op, Def, MBB, Insert, LIS, MFI, MRI, TII); @@ -867,7 +862,7 @@ bool WebAssemblyRegStackify::runOnMachineFunction(MachineFunction &MF) { SmallVector<unsigned, 0> Stack; for (MachineBasicBlock &MBB : MF) { for (MachineInstr &MI : MBB) { - if (MI.isDebugValue()) + if (MI.isDebugInstr()) continue; for (MachineOperand &MO : reverse(MI.explicit_operands())) { if (!MO.isReg()) |