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path: root/lib/Target/X86/X86InstructionSelector.cpp
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Diffstat (limited to 'lib/Target/X86/X86InstructionSelector.cpp')
-rw-r--r--lib/Target/X86/X86InstructionSelector.cpp24
1 files changed, 15 insertions, 9 deletions
diff --git a/lib/Target/X86/X86InstructionSelector.cpp b/lib/Target/X86/X86InstructionSelector.cpp
index 5eb5ad52840a..61956f741820 100644
--- a/lib/Target/X86/X86InstructionSelector.cpp
+++ b/lib/Target/X86/X86InstructionSelector.cpp
@@ -449,24 +449,30 @@ bool X86InstructionSelector::selectTrunc(MachineInstr &I,
if (!SrcRC)
return false;
- if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||
- !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {
- DEBUG(dbgs() << "Failed to constrain G_TRUNC\n");
- return false;
- }
-
+ unsigned SubIdx;
if (DstRC == SrcRC) {
// Nothing to be done
+ SubIdx = X86::NoSubRegister;
} else if (DstRC == &X86::GR32RegClass) {
- I.getOperand(1).setSubReg(X86::sub_32bit);
+ SubIdx = X86::sub_32bit;
} else if (DstRC == &X86::GR16RegClass) {
- I.getOperand(1).setSubReg(X86::sub_16bit);
+ SubIdx = X86::sub_16bit;
} else if (DstRC == &X86::GR8RegClass) {
- I.getOperand(1).setSubReg(X86::sub_8bit);
+ SubIdx = X86::sub_8bit;
} else {
return false;
}
+ SrcRC = TRI.getSubClassWithSubReg(SrcRC, SubIdx);
+
+ if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||
+ !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {
+ DEBUG(dbgs() << "Failed to constrain G_TRUNC\n");
+ return false;
+ }
+
+ I.getOperand(1).setSubReg(SubIdx);
+
I.setDesc(TII.get(X86::COPY));
return true;
}