diff options
Diffstat (limited to 'lldb/source/Plugins/Instruction')
12 files changed, 72 insertions, 76 deletions
diff --git a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp index ff142e6f35ff..555912780df9 100644 --- a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp +++ b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.cpp @@ -1,4 +1,4 @@ -//===-- EmulateInstructionARM.cpp -------------------------------*- C++ -*-===// +//===-- EmulateInstructionARM.cpp -----------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -30,6 +30,8 @@ using namespace lldb; using namespace lldb_private; +LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM, InstructionARM) + // Convenient macro definitions. #define APSR_C Bit32(m_opcode_cpsr, CPSR_C_POS) #define APSR_V Bit32(m_opcode_cpsr, CPSR_V_POS) @@ -603,9 +605,6 @@ static uint32_t CountITSize(uint32_t ITMask) { // First count the trailing zeros of the IT mask. uint32_t TZ = llvm::countTrailingZeros(ITMask); if (TZ > 3) { -#ifdef LLDB_CONFIGURATION_DEBUG - printf("Encoding error: IT Mask '0000'\n"); -#endif return 0; } return (4 - TZ); @@ -620,15 +619,9 @@ bool ITSession::InitIT(uint32_t bits7_0) { // A8.6.50 IT unsigned short FirstCond = Bits32(bits7_0, 7, 4); if (FirstCond == 0xF) { -#ifdef LLDB_CONFIGURATION_DEBUG - printf("Encoding error: IT FirstCond '1111'\n"); -#endif return false; } if (FirstCond == 0xE && ITCounter != 1) { -#ifdef LLDB_CONFIGURATION_DEBUG - printf("Encoding error: IT FirstCond '1110' && Mask != '1000'\n"); -#endif return false; } @@ -7230,7 +7223,7 @@ bool EmulateInstructionARM::EmulateLDRHImmediate(const uint32_t opcode, return true; } -// LDRH (literal) caculates an address from the PC value and an immediate +// LDRH (literal) calculates an address from the PC value and an immediate // offset, loads a halfword from memory, // zero-extends it to form a 32-bit word, and writes it to a register. bool EmulateInstructionARM::EmulateLDRHLiteral(const uint32_t opcode, @@ -8516,7 +8509,7 @@ bool EmulateInstructionARM::EmulateSXTH(const uint32_t opcode, return true; } -// UXTB extracts an 8-bit value from a register, zero-extneds it to 32 bits, and +// UXTB extracts an 8-bit value from a register, zero-extends it to 32 bits, and // writes the result to the destination // register. You can specify a rotation by 0, 8, 16, or 24 bits before // extracting the 8-bit value. @@ -14368,7 +14361,7 @@ bool EmulateInstructionARM::EvaluateInstruction(uint32_t evaluate_options) { if (!success) return false; - if (auto_advance_pc && (after_pc_value == orig_pc_value)) { + if (after_pc_value == orig_pc_value) { after_pc_value += m_opcode.GetByteSize(); EmulateInstruction::Context context; diff --git a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h index 13d7fc061bea..d15d80c97e38 100644 --- a/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h +++ b/lldb/source/Plugins/Instruction/ARM/EmulateInstructionARM.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef lldb_EmulateInstructionARM_h_ -#define lldb_EmulateInstructionARM_h_ +#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM_EMULATEINSTRUCTIONARM_H +#define LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM_EMULATEINSTRUCTIONARM_H #include "Plugins/Process/Utility/ARMDefines.h" #include "lldb/Core/EmulateInstruction.h" @@ -783,4 +783,4 @@ protected: } // namespace lldb_private -#endif // lldb_EmulateInstructionARM_h_ +#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM_EMULATEINSTRUCTIONARM_H diff --git a/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.cpp b/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.cpp index 11c7677c201a..aef08baa8ae9 100644 --- a/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.cpp +++ b/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.cpp @@ -1,4 +1,4 @@ -//===-- EmulationStateARM.cpp -----------------------------------*- C++ -*-===// +//===-- EmulationStateARM.cpp ---------------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. diff --git a/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.h b/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.h index e5af37a21504..955c7c642058 100644 --- a/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.h +++ b/lldb/source/Plugins/Instruction/ARM/EmulationStateARM.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef lldb_EmulationStateARM_h_ -#define lldb_EmulationStateARM_h_ +#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM_EMULATIONSTATEARM_H +#define LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM_EMULATIONSTATEARM_H #include <map> @@ -73,7 +73,8 @@ private: // uint32_t to a data buffer heap // type. - DISALLOW_COPY_AND_ASSIGN(EmulationStateARM); + EmulationStateARM(const EmulationStateARM &) = delete; + const EmulationStateARM &operator=(const EmulationStateARM &) = delete; }; -#endif // lldb_EmulationStateARM_h_ +#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM_EMULATIONSTATEARM_H diff --git a/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp b/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp index 3e06fca2504c..9b0c06bcccab 100644 --- a/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp +++ b/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp @@ -1,4 +1,4 @@ -//===-- EmulateInstructionARM64.cpp ------------------------------*- C++-*-===// +//===-- EmulateInstructionARM64.cpp ---------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -8,8 +8,6 @@ #include "EmulateInstructionARM64.h" -#include <stdlib.h> - #include "lldb/Core/Address.h" #include "lldb/Core/PluginManager.h" #include "lldb/Symbol/UnwindPlan.h" @@ -18,10 +16,14 @@ #include "lldb/Utility/RegisterValue.h" #include "lldb/Utility/Stream.h" +#include "llvm/Support/CheckedArithmetic.h" + #include "Plugins/Process/Utility/ARMDefines.h" #include "Plugins/Process/Utility/ARMUtils.h" #include "Plugins/Process/Utility/lldb-arm64-register-enums.h" +#include <cstdlib> + #define GPR_OFFSET(idx) ((idx)*8) #define GPR_OFFSET_NAME(reg) 0 #define FPU_OFFSET(idx) ((idx)*16) @@ -47,6 +49,8 @@ using namespace lldb; using namespace lldb_private; +LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionARM64, InstructionARM64) + static bool LLDBTableGetRegisterInfo(uint32_t reg_num, RegisterInfo ®_info) { if (reg_num >= llvm::array_lengthof(g_register_infos_arm64_le)) return false; @@ -83,23 +87,6 @@ static inline uint64_t LSL(uint64_t x, integer shift) { return x << shift; } -// AddWithCarry() -// =============== -static inline uint64_t -AddWithCarry(uint32_t N, uint64_t x, uint64_t y, bit carry_in, - EmulateInstructionARM64::ProcState &proc_state) { - uint64_t unsigned_sum = UInt(x) + UInt(y) + UInt(carry_in); - int64_t signed_sum = SInt(x) + SInt(y) + UInt(carry_in); - uint64_t result = unsigned_sum; - if (N < 64) - result = Bits64(result, N - 1, 0); - proc_state.N = Bit64(result, N - 1); - proc_state.Z = IsZero(result); - proc_state.C = UInt(result) == unsigned_sum; - proc_state.V = SInt(result) == signed_sum; - return result; -} - // ConstrainUnpredictable() // ======================== @@ -415,20 +402,12 @@ bool EmulateInstructionARM64::EvaluateInstruction(uint32_t evaluate_options) { if (opcode_data == nullptr) return false; - // printf ("opcode template for 0x%8.8x: %s\n", opcode, opcode_data->name); const bool auto_advance_pc = evaluate_options & eEmulateInstructionOptionAutoAdvancePC; m_ignore_conditions = evaluate_options & eEmulateInstructionOptionIgnoreConditions; bool success = false; - // if (m_opcode_cpsr == 0 || m_ignore_conditions == false) - // { - // m_opcode_cpsr = ReadRegisterUnsigned (eRegisterKindLLDB, - // gpr_cpsr_arm64, - // 0, - // &success); - // } // Only return false if we are unable to read the CPSR if we care about // conditions @@ -454,7 +433,7 @@ bool EmulateInstructionARM64::EvaluateInstruction(uint32_t evaluate_options) { if (!success) return false; - if (auto_advance_pc && (new_pc_value == orig_pc_value)) { + if (new_pc_value == orig_pc_value) { EmulateInstruction::Context context; context.type = eContextAdvancePC; context.SetNoArgs(); @@ -588,6 +567,24 @@ bool EmulateInstructionARM64::ConditionHolds(const uint32_t cond) { return result; } +uint64_t EmulateInstructionARM64:: +AddWithCarry(uint32_t N, uint64_t x, uint64_t y, bit carry_in, + EmulateInstructionARM64::ProcState &proc_state) { + uint64_t unsigned_sum = UInt(x) + UInt(y) + UInt(carry_in); + llvm::Optional<int64_t> signed_sum = llvm::checkedAdd(SInt(x), SInt(y)); + bool overflow = !signed_sum; + if (!overflow) + overflow |= !llvm::checkedAdd(*signed_sum, SInt(carry_in)); + uint64_t result = unsigned_sum; + if (N < 64) + result = Bits64(result, N - 1, 0); + proc_state.N = Bit64(result, N - 1); + proc_state.Z = IsZero(result); + proc_state.C = UInt(result) != unsigned_sum; + proc_state.V = overflow; + return result; +} + bool EmulateInstructionARM64::EmulateADDSUBImm(const uint32_t opcode) { // integer d = UInt(Rd); // integer n = UInt(Rn); @@ -783,10 +780,6 @@ bool EmulateInstructionARM64::EmulateLDPSTP(const uint32_t opcode) { RegisterValue data_Rt; RegisterValue data_Rt2; - - // if (vector) - // CheckFPEnabled(false); - RegisterInfo reg_info_base; RegisterInfo reg_info_Rt; RegisterInfo reg_info_Rt2; diff --git a/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.h b/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.h index 03a57a2cf92b..11ad8a99b0fc 100644 --- a/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.h +++ b/lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef EmulateInstructionARM64_h_ -#define EmulateInstructionARM64_h_ +#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM64_EMULATEINSTRUCTIONARM64_H +#define LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM64_EMULATEINSTRUCTIONARM64_H #include "Plugins/Process/Utility/ARMDefines.h" #include "lldb/Core/EmulateInstruction.h" @@ -152,6 +152,9 @@ public: } ProcState; protected: + static uint64_t AddWithCarry(uint32_t N, uint64_t x, uint64_t y, bool carry_in, + EmulateInstructionARM64::ProcState &proc_state); + typedef struct { uint32_t mask; uint32_t value; @@ -189,4 +192,4 @@ protected: bool m_ignore_conditions; }; -#endif // EmulateInstructionARM64_h_ +#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_ARM64_EMULATEINSTRUCTIONARM64_H diff --git a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp index b55eeb0eaf46..d4cb726fc7e5 100644 --- a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp +++ b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp @@ -1,4 +1,4 @@ -//===-- EmulateInstructionMIPS.cpp -------------------------------*- C++-*-===// +//===-- EmulateInstructionMIPS.cpp ----------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -40,6 +40,8 @@ using namespace lldb; using namespace lldb_private; +LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionMIPS, InstructionMIPS) + #define UInt(x) ((uint64_t)x) #define integer int64_t @@ -157,8 +159,8 @@ EmulateInstructionMIPS::EmulateInstructionMIPS( target->createMCSubtargetInfo(triple.getTriple(), cpu, features)); assert(m_asm_info.get() && m_subtype_info.get()); - m_context.reset( - new llvm::MCContext(m_asm_info.get(), m_reg_info.get(), nullptr)); + m_context = std::make_unique<llvm::MCContext>(m_asm_info.get(), + m_reg_info.get(), nullptr); assert(m_context.get()); m_disasm.reset(target->createMCDisassembler(*m_subtype_info, *m_context)); diff --git a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h index cd447ae4975e..61291c729879 100644 --- a/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h +++ b/lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.h @@ -7,8 +7,8 @@ // //===----------------------------------------------------------------------===// -#ifndef EmulateInstructionMIPS_h_ -#define EmulateInstructionMIPS_h_ +#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H +#define LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H namespace llvm { class MCDisassembler; @@ -203,7 +203,7 @@ protected: bool nonvolatile_reg_p(uint32_t regnum); - const char *GetRegisterName(unsigned reg_num, bool altnernate_name); + const char *GetRegisterName(unsigned reg_num, bool alternate_name); private: std::unique_ptr<llvm::MCDisassembler> m_disasm; @@ -218,4 +218,4 @@ private: bool m_use_alt_disaasm; }; -#endif // EmulateInstructionMIPS_h_ +#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS_EMULATEINSTRUCTIONMIPS_H diff --git a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp index 3baf942bc17f..4ccaf0de0758 100644 --- a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp +++ b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp @@ -1,4 +1,4 @@ -//===-- EmulateInstructionMIPS64.cpp -----------------------------*- C++-*-===// +//===-- EmulateInstructionMIPS64.cpp --------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -40,6 +40,8 @@ using namespace lldb; using namespace lldb_private; +LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionMIPS64, InstructionMIPS64) + #define UInt(x) ((uint64_t)x) #define integer int64_t @@ -161,8 +163,8 @@ EmulateInstructionMIPS64::EmulateInstructionMIPS64( target->createMCSubtargetInfo(triple.getTriple(), cpu, features)); assert(m_asm_info.get() && m_subtype_info.get()); - m_context.reset( - new llvm::MCContext(m_asm_info.get(), m_reg_info.get(), nullptr)); + m_context = std::make_unique<llvm::MCContext>(m_asm_info.get(), + m_reg_info.get(), nullptr); assert(m_context.get()); m_disasm.reset(target->createMCDisassembler(*m_subtype_info, *m_context)); diff --git a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h index 953a0935bd06..c4ae2296c5dd 100644 --- a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h +++ b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef EmulateInstructionMIPS64_h_ -#define EmulateInstructionMIPS64_h_ +#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H +#define LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H #include "lldb/Core/EmulateInstruction.h" #include "lldb/Interpreter/OptionValue.h" @@ -168,7 +168,7 @@ protected: bool nonvolatile_reg_p(uint64_t regnum); - const char *GetRegisterName(unsigned reg_num, bool altnernate_name); + const char *GetRegisterName(unsigned reg_num, bool alternate_name); private: std::unique_ptr<llvm::MCDisassembler> m_disasm; @@ -179,4 +179,4 @@ private: std::unique_ptr<llvm::MCInstrInfo> m_insn_info; }; -#endif // EmulateInstructionMIPS64_h_ +#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_MIPS64_EMULATEINSTRUCTIONMIPS64_H diff --git a/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.cpp b/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.cpp index 4b8d8dd2228c..5d97513c0be7 100644 --- a/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.cpp +++ b/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.cpp @@ -1,4 +1,4 @@ -//===-- EmulateInstructionPPC64.cpp ------------------------------*- C++-*-===// +//===-- EmulateInstructionPPC64.cpp ---------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -25,6 +25,8 @@ using namespace lldb; using namespace lldb_private; +LLDB_PLUGIN_DEFINE_ADV(EmulateInstructionPPC64, InstructionPPC64) + EmulateInstructionPPC64::EmulateInstructionPPC64(const ArchSpec &arch) : EmulateInstruction(arch) {} @@ -196,7 +198,7 @@ bool EmulateInstructionPPC64::EvaluateInstruction(uint32_t evaluate_options) { if (!success) return false; - if (auto_advance_pc && (new_pc_value == orig_pc_value)) { + if (new_pc_value == orig_pc_value) { EmulateInstruction::Context context; context.type = eContextAdvancePC; context.SetNoArgs(); diff --git a/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.h b/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.h index bf239770b933..02d2bce8f05e 100644 --- a/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.h +++ b/lldb/source/Plugins/Instruction/PPC64/EmulateInstructionPPC64.h @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef EmulateInstructionPPC64_h_ -#define EmulateInstructionPPC64_h_ +#ifndef LLDB_SOURCE_PLUGINS_INSTRUCTION_PPC64_EMULATEINSTRUCTIONPPC64_H +#define LLDB_SOURCE_PLUGINS_INSTRUCTION_PPC64_EMULATEINSTRUCTIONPPC64_H #include "lldb/Core/EmulateInstruction.h" #include "lldb/Interpreter/OptionValue.h" @@ -89,4 +89,4 @@ private: } // namespace lldb_private -#endif // EmulateInstructionPPC64_h_ +#endif // LLDB_SOURCE_PLUGINS_INSTRUCTION_PPC64_EMULATEINSTRUCTIONPPC64_H |