diff options
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineOperand.cpp | 67 | 
1 files changed, 30 insertions, 37 deletions
| diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp index 8b19501ec3cf..7b8f01100929 100644 --- a/llvm/lib/CodeGen/MachineOperand.cpp +++ b/llvm/lib/CodeGen/MachineOperand.cpp @@ -14,6 +14,7 @@  #include "llvm/ADT/StringExtras.h"  #include "llvm/Analysis/Loads.h"  #include "llvm/Analysis/MemoryLocation.h" +#include "llvm/CodeGen/MIRFormatter.h"  #include "llvm/CodeGen/MIRPrinter.h"  #include "llvm/CodeGen/MachineFrameInfo.h"  #include "llvm/CodeGen/MachineJumpTableInfo.h" @@ -458,28 +459,6 @@ static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB,      OS << "<unknown>";  } -static void printIRValueReference(raw_ostream &OS, const Value &V, -                                  ModuleSlotTracker &MST) { -  if (isa<GlobalValue>(V)) { -    V.printAsOperand(OS, /*PrintType=*/false, MST); -    return; -  } -  if (isa<Constant>(V)) { -    // Machine memory operands can load/store to/from constant value pointers. -    OS << '`'; -    V.printAsOperand(OS, /*PrintType=*/true, MST); -    OS << '`'; -    return; -  } -  OS << "%ir."; -  if (V.hasName()) { -    printLLVMNameWithoutPrefix(OS, V.getName()); -    return; -  } -  int Slot = MST.getCurrentFunction() ? MST.getLocalSlot(&V) : -1; -  MachineOperand::printIRSlotNumber(OS, Slot); -} -  static void printSyncScope(raw_ostream &OS, const LLVMContext &Context,                             SyncScope::ID SSID,                             SmallVectorImpl<StringRef> &SSNs) { @@ -734,14 +713,15 @@ void MachineOperand::print(raw_ostream &OS, LLT TypeToPrint,                             const TargetIntrinsicInfo *IntrinsicInfo) const {    tryToGetTargetInfo(*this, TRI, IntrinsicInfo);    ModuleSlotTracker DummyMST(nullptr); -  print(OS, DummyMST, TypeToPrint, /*PrintDef=*/false, /*IsStandalone=*/true, +  print(OS, DummyMST, TypeToPrint, None, /*PrintDef=*/false, +        /*IsStandalone=*/true,          /*ShouldPrintRegisterTies=*/true,          /*TiedOperandIdx=*/0, TRI, IntrinsicInfo);  }  void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST, -                           LLT TypeToPrint, bool PrintDef, bool IsStandalone, -                           bool ShouldPrintRegisterTies, +                           LLT TypeToPrint, Optional<unsigned> OpIdx, bool PrintDef, +                           bool IsStandalone, bool ShouldPrintRegisterTies,                             unsigned TiedOperandIdx,                             const TargetRegisterInfo *TRI,                             const TargetIntrinsicInfo *IntrinsicInfo) const { @@ -802,9 +782,19 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,        OS << '(' << TypeToPrint << ')';      break;    } -  case MachineOperand::MO_Immediate: -    OS << getImm(); +  case MachineOperand::MO_Immediate: { +    const MIRFormatter *Formatter = nullptr; +    if (const MachineFunction *MF = getMFIfAvailable(*this)) { +      const auto *TII = MF->getSubtarget().getInstrInfo(); +      assert(TII && "expected instruction info"); +      Formatter = TII->getMIRFormatter(); +    } +    if (Formatter) +      Formatter->printImm(OS, *getParent(), OpIdx, getImm()); +    else +      OS << getImm();      break; +  }    case MachineOperand::MO_CImmediate:      getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);      break; @@ -940,13 +930,13 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,    }    case MachineOperand::MO_ShuffleMask:      OS << "shufflemask("; -    const Constant* C = getShuffleMask(); -    const int NumElts = C->getType()->getVectorNumElements(); - +    ArrayRef<int> Mask = getShuffleMask();      StringRef Separator; -    for (int I = 0; I != NumElts; ++I) { -      OS << Separator; -      C->getAggregateElement(I)->printAsOperand(OS, false, MST); +    for (int Elt : Mask) { +      if (Elt == -1) +        OS << Separator << "undef"; +      else +        OS << Separator << Elt;        Separator = ", ";      } @@ -1111,7 +1101,7 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,    if (const Value *Val = getValue()) {      OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into "); -    printIRValueReference(OS, *Val, MST); +    MIRFormatter::printIRValue(OS, *Val, MST);    } else if (const PseudoSourceValue *PVal = getPseudoValue()) {      OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");      assert(PVal && "Expected a pseudo source value"); @@ -1144,15 +1134,18 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,        printLLVMNameWithoutPrefix(            OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());        break; -    default: +    default: { +      const MIRFormatter *Formatter = TII->getMIRFormatter();        // FIXME: This is not necessarily the correct MIR serialization format for        // a custom pseudo source value, but at least it allows        // -print-machineinstrs to work on a target with custom pseudo source        // values. -      OS << "custom "; -      PVal->printCustom(OS); +      OS << "custom \""; +      Formatter->printCustomPseudoSourceValue(OS, MST, *PVal); +      OS << '\"';        break;      } +    }    }    MachineOperand::printOperandOffset(OS, getOffset());    if (getBaseAlignment() != getSize()) | 
