diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp index 98678873e37c..10e2c3a263f1 100644 --- a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp +++ b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp @@ -104,6 +104,9 @@ public: AU.setPreservesCFG(); MachineFunctionPass::getAnalysisUsage(AU); } + +private: + int getDPPOp(unsigned Op) const; }; } // end anonymous namespace @@ -118,13 +121,13 @@ FunctionPass *llvm::createGCNDPPCombinePass() { return new GCNDPPCombine(); } -static int getDPPOp(unsigned Op) { +int GCNDPPCombine::getDPPOp(unsigned Op) const { auto DPP32 = AMDGPU::getDPPOp32(Op); - if (DPP32 != -1) - return DPP32; - - auto E32 = AMDGPU::getVOPe32(Op); - return E32 != -1 ? AMDGPU::getDPPOp32(E32) : -1; + if (DPP32 == -1) { + auto E32 = AMDGPU::getVOPe32(Op); + DPP32 = (E32 == -1)? -1 : AMDGPU::getDPPOp32(E32); + } + return (DPP32 == -1 || TII->pseudoToMCOpcode(DPP32) == -1) ? -1 : DPP32; } // tracks the register operand definition and returns: @@ -235,7 +238,8 @@ MachineInstr *GCNDPPCombine::createDPPInst(MachineInstr &OrigMI, } if (auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2)) { - if (!TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src2)) { + if (!TII->getNamedOperand(*DPPInst.getInstr(), AMDGPU::OpName::src2) || + !TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src2)) { LLVM_DEBUG(dbgs() << " failed: src2 is illegal\n"); Fail = true; break; |