diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMFrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMFrameLowering.cpp | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index 01ae93086dcb..cb98b2b34efd 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -2128,10 +2128,16 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF, AFI->setLRIsSpilledForFarJump(true); } AFI->setLRIsSpilled(SavedRegs.test(ARM::LR)); +} + +void ARMFrameLowering::getCalleeSaves(const MachineFunction &MF, + BitVector &SavedRegs) const { + TargetFrameLowering::getCalleeSaves(MF, SavedRegs); // If we have the "returned" parameter attribute which guarantees that we // return the value which was passed in r0 unmodified (e.g. C++ 'structors), // record that fact for IPRA. + const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); if (AFI->getPreservesR0()) SavedRegs.set(ARM::R0); } @@ -2418,7 +2424,8 @@ void ARMFrameLowering::adjustForSegmentedStacks( } else { // Get TLS base address from the coprocessor // mrc p15, #0, SR0, c13, c0, #3 - BuildMI(McrMBB, DL, TII.get(ARM::MRC), ScratchReg0) + BuildMI(McrMBB, DL, TII.get(Thumb ? ARM::t2MRC : ARM::MRC), + ScratchReg0) .addImm(15) .addImm(0) .addImm(13) @@ -2432,7 +2439,8 @@ void ARMFrameLowering::adjustForSegmentedStacks( // Get the stack limit from the right offset // ldr SR0, [sr0, #4 * TlsOffset] - BuildMI(GetMBB, DL, TII.get(ARM::LDRi12), ScratchReg0) + BuildMI(GetMBB, DL, TII.get(Thumb ? ARM::t2LDRi12 : ARM::LDRi12), + ScratchReg0) .addReg(ScratchReg0) .addImm(4 * TlsOffset) .add(predOps(ARMCC::AL)); |