diff options
Diffstat (limited to 'llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp | 96 |
1 files changed, 50 insertions, 46 deletions
diff --git a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp index 39ace5594b7f..0d5e7af92523 100644 --- a/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp +++ b/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp @@ -87,6 +87,52 @@ SystemZRegisterInfo::getRegAllocationHints(unsigned VirtReg, bool BaseImplRetVal = TargetRegisterInfo::getRegAllocationHints( VirtReg, Order, Hints, MF, VRM, Matrix); + if (VRM != nullptr) { + // Add any two address hints after any copy hints. + SmallSet<unsigned, 4> TwoAddrHints; + for (auto &Use : MRI->reg_nodbg_instructions(VirtReg)) + if (SystemZ::getTwoOperandOpcode(Use.getOpcode()) != -1) { + const MachineOperand *VRRegMO = nullptr; + const MachineOperand *OtherMO = nullptr; + const MachineOperand *CommuMO = nullptr; + if (VirtReg == Use.getOperand(0).getReg()) { + VRRegMO = &Use.getOperand(0); + OtherMO = &Use.getOperand(1); + if (Use.isCommutable()) + CommuMO = &Use.getOperand(2); + } else if (VirtReg == Use.getOperand(1).getReg()) { + VRRegMO = &Use.getOperand(1); + OtherMO = &Use.getOperand(0); + } else if (VirtReg == Use.getOperand(2).getReg() && + Use.isCommutable()) { + VRRegMO = &Use.getOperand(2); + OtherMO = &Use.getOperand(0); + } else + continue; + + auto tryAddHint = [&](const MachineOperand *MO) -> void { + Register Reg = MO->getReg(); + Register PhysReg = + Register::isPhysicalRegister(Reg) ? Reg : VRM->getPhys(Reg); + if (PhysReg) { + if (MO->getSubReg()) + PhysReg = getSubReg(PhysReg, MO->getSubReg()); + if (VRRegMO->getSubReg()) + PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), + MRI->getRegClass(VirtReg)); + if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) + TwoAddrHints.insert(PhysReg); + } + }; + tryAddHint(OtherMO); + if (CommuMO) + tryAddHint(CommuMO); + } + for (MCPhysReg OrderReg : Order) + if (TwoAddrHints.count(OrderReg)) + Hints.push_back(OrderReg); + } + if (MRI->getRegClass(VirtReg) == &SystemZ::GRX32BitRegClass) { SmallVector<unsigned, 8> Worklist; SmallSet<unsigned, 4> DoneRegs; @@ -143,58 +189,14 @@ SystemZRegisterInfo::getRegAllocationHints(unsigned VirtReg, } } - if (VRM == nullptr) - return BaseImplRetVal; - - // Add any two address hints after any copy hints. - SmallSet<unsigned, 4> TwoAddrHints; - for (auto &Use : MRI->reg_nodbg_instructions(VirtReg)) - if (SystemZ::getTwoOperandOpcode(Use.getOpcode()) != -1) { - const MachineOperand *VRRegMO = nullptr; - const MachineOperand *OtherMO = nullptr; - const MachineOperand *CommuMO = nullptr; - if (VirtReg == Use.getOperand(0).getReg()) { - VRRegMO = &Use.getOperand(0); - OtherMO = &Use.getOperand(1); - if (Use.isCommutable()) - CommuMO = &Use.getOperand(2); - } else if (VirtReg == Use.getOperand(1).getReg()) { - VRRegMO = &Use.getOperand(1); - OtherMO = &Use.getOperand(0); - } else if (VirtReg == Use.getOperand(2).getReg() && Use.isCommutable()) { - VRRegMO = &Use.getOperand(2); - OtherMO = &Use.getOperand(0); - } else - continue; - - auto tryAddHint = [&](const MachineOperand *MO) -> void { - Register Reg = MO->getReg(); - Register PhysReg = - Register::isPhysicalRegister(Reg) ? Reg : VRM->getPhys(Reg); - if (PhysReg) { - if (MO->getSubReg()) - PhysReg = getSubReg(PhysReg, MO->getSubReg()); - if (VRRegMO->getSubReg()) - PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), - MRI->getRegClass(VirtReg)); - if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) - TwoAddrHints.insert(PhysReg); - } - }; - tryAddHint(OtherMO); - if (CommuMO) - tryAddHint(CommuMO); - } - for (MCPhysReg OrderReg : Order) - if (TwoAddrHints.count(OrderReg)) - Hints.push_back(OrderReg); - return BaseImplRetVal; } const MCPhysReg * SystemZRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { const SystemZSubtarget &Subtarget = MF->getSubtarget<SystemZSubtarget>(); + if (MF->getFunction().getCallingConv() == CallingConv::GHC) + return CSR_SystemZ_NoRegs_SaveList; if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) return Subtarget.hasVector()? CSR_SystemZ_AllRegs_Vector_SaveList : CSR_SystemZ_AllRegs_SaveList; @@ -209,6 +211,8 @@ const uint32_t * SystemZRegisterInfo::getCallPreservedMask(const MachineFunction &MF, CallingConv::ID CC) const { const SystemZSubtarget &Subtarget = MF.getSubtarget<SystemZSubtarget>(); + if (CC == CallingConv::GHC) + return CSR_SystemZ_NoRegs_RegMask; if (CC == CallingConv::AnyReg) return Subtarget.hasVector()? CSR_SystemZ_AllRegs_Vector_RegMask : CSR_SystemZ_AllRegs_RegMask; |
