diff options
Diffstat (limited to 'llvm/lib/Target/WebAssembly')
29 files changed, 231 insertions, 63 deletions
diff --git a/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp b/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp index 53a96fd6a97d..ea99cee3eb3b 100644 --- a/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp +++ b/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp @@ -712,6 +712,42 @@ public: return expect(AsmToken::EndOfStatement, "EOL"); } + if (DirectiveID.getString() == ".export_name") { + auto SymName = expectIdent(); + if (SymName.empty()) + return true; + if (expect(AsmToken::Comma, ",")) + return true; + auto ExportName = expectIdent(); + auto WasmSym = cast<MCSymbolWasm>(Ctx.getOrCreateSymbol(SymName)); + WasmSym->setExportName(ExportName); + TOut.emitExportName(WasmSym, ExportName); + } + + if (DirectiveID.getString() == ".import_module") { + auto SymName = expectIdent(); + if (SymName.empty()) + return true; + if (expect(AsmToken::Comma, ",")) + return true; + auto ImportModule = expectIdent(); + auto WasmSym = cast<MCSymbolWasm>(Ctx.getOrCreateSymbol(SymName)); + WasmSym->setImportModule(ImportModule); + TOut.emitImportModule(WasmSym, ImportModule); + } + + if (DirectiveID.getString() == ".import_name") { + auto SymName = expectIdent(); + if (SymName.empty()) + return true; + if (expect(AsmToken::Comma, ",")) + return true; + auto ImportName = expectIdent(); + auto WasmSym = cast<MCSymbolWasm>(Ctx.getOrCreateSymbol(SymName)); + WasmSym->setImportName(ImportName); + TOut.emitImportName(WasmSym, ImportName); + } + if (DirectiveID.getString() == ".eventtype") { auto SymName = expectIdent(); if (SymName.empty()) @@ -863,7 +899,7 @@ public: } // end anonymous namespace // Force static initialization. -extern "C" void LLVMInitializeWebAssemblyAsmParser() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmParser() { RegisterMCAsmParser<WebAssemblyAsmParser> X(getTheWebAssemblyTarget32()); RegisterMCAsmParser<WebAssemblyAsmParser> Y(getTheWebAssemblyTarget64()); } diff --git a/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp b/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp index 9a9c31cff2d5..a8cb5d18537c 100644 --- a/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp +++ b/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp @@ -45,11 +45,9 @@ class WebAssemblyDisassembler final : public MCDisassembler { DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, - raw_ostream &VStream, raw_ostream &CStream) const override; DecodeStatus onSymbolStart(StringRef Name, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, - raw_ostream &VStream, raw_ostream &CStream) const override; public: @@ -66,7 +64,8 @@ static MCDisassembler *createWebAssemblyDisassembler(const Target &T, return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII)); } -extern "C" void LLVMInitializeWebAssemblyDisassembler() { +extern "C" LLVM_EXTERNAL_VISIBILITY void +LLVMInitializeWebAssemblyDisassembler() { // Register the disassembler for each target. TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(), createWebAssemblyDisassembler); @@ -123,7 +122,7 @@ bool parseImmediate(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes) { MCDisassembler::DecodeStatus WebAssemblyDisassembler::onSymbolStart( StringRef Name, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t Address, - raw_ostream &VStream, raw_ostream &CStream) const { + raw_ostream &CStream) const { Size = 0; if (Address == 0) { // Start of a code section: we're parsing only the function count. @@ -158,7 +157,7 @@ MCDisassembler::DecodeStatus WebAssemblyDisassembler::onSymbolStart( MCDisassembler::DecodeStatus WebAssemblyDisassembler::getInstruction( MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t /*Address*/, - raw_ostream & /*OS*/, raw_ostream &CS) const { + raw_ostream &CS) const { CommentStream = &CS; Size = 0; int Opc = nextByte(Bytes, Size); diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp index 221ac17b8336..b262e06e55e7 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp @@ -44,11 +44,12 @@ void WebAssemblyInstPrinter::printRegName(raw_ostream &OS, OS << "$" << RegNo; } -void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, +void WebAssemblyInstPrinter::printInst(const MCInst *MI, uint64_t Address, StringRef Annot, - const MCSubtargetInfo &STI) { + const MCSubtargetInfo &STI, + raw_ostream &OS) { // Print the instruction (this uses the AsmStrings from the .td files). - printInstruction(MI, OS); + printInstruction(MI, Address, OS); // Print any additional variadic operands. const MCInstrDesc &Desc = MII.get(MI->getOpcode()); diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h index cf37778099a0..bee85507f044 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h @@ -37,8 +37,8 @@ public: const MCRegisterInfo &MRI); void printRegName(raw_ostream &OS, unsigned RegNo) const override; - void printInst(const MCInst *MI, raw_ostream &OS, StringRef Annot, - const MCSubtargetInfo &STI) override; + void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, + const MCSubtargetInfo &STI, raw_ostream &OS) override; // Used by tblegen code. void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); @@ -49,7 +49,7 @@ public: raw_ostream &O); // Autogenerated by tblgen. - void printInstruction(const MCInst *MI, raw_ostream &O); + void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O); static const char *getRegisterName(unsigned RegNo); }; diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp index 8f6531563e1b..c3d259e6ff20 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.cpp @@ -21,7 +21,8 @@ using namespace llvm; WebAssemblyMCAsmInfo::~WebAssemblyMCAsmInfo() = default; // anchor. -WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T) { +WebAssemblyMCAsmInfo::WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions &Options) { CodePointerSize = CalleeSaveStackSlotSize = T.isArch64Bit() ? 8 : 4; // TODO: What should MaxInstLength be? diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h index 9efbbf881f59..5ba4dcf8c4b3 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCAsmInfo.h @@ -22,7 +22,8 @@ class Triple; class WebAssemblyMCAsmInfo final : public MCAsmInfoWasm { public: - explicit WebAssemblyMCAsmInfo(const Triple &T); + explicit WebAssemblyMCAsmInfo(const Triple &T, + const MCTargetOptions &Options); ~WebAssemblyMCAsmInfo() override; }; diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp index 9c8ca1f13b18..027e5408c633 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.cpp @@ -35,8 +35,9 @@ using namespace llvm; #include "WebAssemblyGenRegisterInfo.inc" static MCAsmInfo *createMCAsmInfo(const MCRegisterInfo & /*MRI*/, - const Triple &TT) { - return new WebAssemblyMCAsmInfo(TT); + const Triple &TT, + const MCTargetOptions &Options) { + return new WebAssemblyMCAsmInfo(TT, Options); } static MCInstrInfo *createMCInstrInfo() { @@ -95,7 +96,7 @@ static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) { } // Force static initialization. -extern "C" void LLVMInitializeWebAssemblyTargetMC() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetMC() { for (Target *T : {&getTheWebAssemblyTarget32(), &getTheWebAssemblyTarget64()}) { // Register the MC asm info. diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp index 40926201931a..7c21ed5f974e 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.cpp @@ -94,6 +94,12 @@ void WebAssemblyTargetAsmStreamer::emitImportName(const MCSymbolWasm *Sym, << ImportName << '\n'; } +void WebAssemblyTargetAsmStreamer::emitExportName(const MCSymbolWasm *Sym, + StringRef ExportName) { + OS << "\t.export_name\t" << Sym->getName() << ", " + << ExportName << '\n'; +} + void WebAssemblyTargetAsmStreamer::emitIndIdx(const MCExpr *Value) { OS << "\t.indidx \t" << *Value << '\n'; } diff --git a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h index 0164f8e572ef..9aee1a06c956 100644 --- a/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h +++ b/llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyTargetStreamer.h @@ -48,6 +48,9 @@ public: /// .import_name virtual void emitImportName(const MCSymbolWasm *Sym, StringRef ImportName) = 0; + /// .export_name + virtual void emitExportName(const MCSymbolWasm *Sym, + StringRef ExportName) = 0; protected: void emitValueType(wasm::ValType Type); @@ -68,6 +71,7 @@ public: void emitEventType(const MCSymbolWasm *Sym) override; void emitImportModule(const MCSymbolWasm *Sym, StringRef ImportModule) override; void emitImportName(const MCSymbolWasm *Sym, StringRef ImportName) override; + void emitExportName(const MCSymbolWasm *Sym, StringRef ExportName) override; }; /// This part is for Wasm object output @@ -85,6 +89,8 @@ public: StringRef ImportModule) override {} void emitImportName(const MCSymbolWasm *Sym, StringRef ImportName) override {} + void emitExportName(const MCSymbolWasm *Sym, + StringRef ExportName) override {} }; /// This part is for null output @@ -101,6 +107,7 @@ public: void emitEventType(const MCSymbolWasm *) override {} void emitImportModule(const MCSymbolWasm *, StringRef) override {} void emitImportName(const MCSymbolWasm *, StringRef) override {} + void emitExportName(const MCSymbolWasm *, StringRef) override {} }; } // end namespace llvm diff --git a/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp b/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp index e4afe2bb2830..87317f8a7f1e 100644 --- a/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp +++ b/llvm/lib/Target/WebAssembly/TargetInfo/WebAssemblyTargetInfo.cpp @@ -26,7 +26,7 @@ Target &llvm::getTheWebAssemblyTarget64() { return TheWebAssemblyTarget64; } -extern "C" void LLVMInitializeWebAssemblyTargetInfo() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTargetInfo() { RegisterTarget<Triple::wasm32> X(getTheWebAssemblyTarget32(), "wasm32", "WebAssembly 32-bit", "WebAssembly"); RegisterTarget<Triple::wasm64> Y(getTheWebAssemblyTarget64(), "wasm64", diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.h b/llvm/lib/Target/WebAssembly/WebAssembly.h index fcbd0a5082ff..fcd48e0096b6 100644 --- a/llvm/lib/Target/WebAssembly/WebAssembly.h +++ b/llvm/lib/Target/WebAssembly/WebAssembly.h @@ -79,6 +79,10 @@ void initializeWebAssemblyRegNumberingPass(PassRegistry &); void initializeWebAssemblyPeepholePass(PassRegistry &); void initializeWebAssemblyCallIndirectFixupPass(PassRegistry &); +namespace WebAssembly { +enum TargetIndex { TI_LOCAL_START, TI_GLOBAL_START, TI_OPERAND_STACK_START }; +} // end namespace WebAssembly + } // end namespace llvm #endif diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp index 5d8b873ce23b..adcb24b4be53 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp @@ -96,8 +96,11 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { } for (const auto &F : M) { + if (F.isIntrinsic()) + continue; + // Emit function type info for all undefined functions - if (F.isDeclarationForLinker() && !F.isIntrinsic()) { + if (F.isDeclarationForLinker()) { SmallVector<MVT, 4> Results; SmallVector<MVT, 4> Params; computeSignatureVTs(F.getFunctionType(), F, TM, Params, Results); @@ -130,6 +133,13 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) { getTargetStreamer()->emitImportName(Sym, Name); } } + + if (F.hasFnAttribute("wasm-export-name")) { + auto *Sym = cast<MCSymbolWasm>(getSymbol(&F)); + StringRef Name = F.getFnAttribute("wasm-export-name").getValueAsString(); + Sym->setExportName(Name); + getTargetStreamer()->emitExportName(Sym, Name); + } } for (const auto &G : M.globals()) { @@ -415,7 +425,7 @@ bool WebAssemblyAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, } // Force static initialization. -extern "C" void LLVMInitializeWebAssemblyAsmPrinter() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyAsmPrinter() { RegisterAsmPrinter<WebAssemblyAsmPrinter> X(getTheWebAssemblyTarget32()); RegisterAsmPrinter<WebAssemblyAsmPrinter> Y(getTheWebAssemblyTarget64()); } diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp index 579377c9a5d7..114a50a3055d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp @@ -12,6 +12,7 @@ //===----------------------------------------------------------------------===// #include "WebAssemblyDebugValueManager.h" +#include "WebAssembly.h" #include "WebAssemblyMachineFunctionInfo.h" #include "llvm/CodeGen/MachineInstr.h" @@ -43,3 +44,10 @@ void WebAssemblyDebugValueManager::clone(MachineInstr *Insert, MBB->insert(Insert, Clone); } } + +void WebAssemblyDebugValueManager::replaceWithLocal(unsigned LocalId) { + for (auto *DBI : DbgValues) { + MachineOperand &Op = DBI->getOperand(0); + Op.ChangeToTargetIndex(llvm::WebAssembly::TI_LOCAL_START, LocalId); + } +} diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.h b/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.h index 06e8805b5ad0..7eae3cb5febd 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.h @@ -30,6 +30,7 @@ public: void move(MachineInstr *Insert); void updateReg(unsigned Reg); void clone(MachineInstr *Insert, unsigned NewReg); + void replaceWithLocal(unsigned LocalId); }; } // end namespace llvm diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp index 0387957b14c2..a511b320b56b 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyExceptionInfo.cpp @@ -17,6 +17,7 @@ #include "llvm/ADT/PostOrderIterator.h" #include "llvm/CodeGen/MachineDominanceFrontier.h" #include "llvm/CodeGen/MachineDominators.h" +#include "llvm/InitializePasses.h" using namespace llvm; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp index ef75bb215317..acbd4c9921b0 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp @@ -17,6 +17,7 @@ #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" #include "WebAssembly.h" +#include "WebAssemblyDebugValueManager.h" #include "WebAssemblyMachineFunctionInfo.h" #include "WebAssemblySubtarget.h" #include "WebAssemblyUtilities.h" @@ -261,6 +262,8 @@ bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) { .addImm(LocalId) .addReg(MI.getOperand(2).getReg()); + WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId); + MI.eraseFromParent(); Changed = true; continue; @@ -290,6 +293,9 @@ bool WebAssemblyExplicitLocals::runOnMachineFunction(MachineFunction &MF) { } else { unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg); unsigned Opc = getLocalSetOpcode(RC); + + WebAssemblyDebugValueManager(&MI).replaceWithLocal(LocalId); + BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc)) .addImm(LocalId) .addReg(NewReg); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISD.def b/llvm/lib/Target/WebAssembly/WebAssemblyISD.def index 13f0476eb4a5..ba04fd4eb9dd 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISD.def +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISD.def @@ -30,9 +30,9 @@ HANDLE_NODETYPE(SWIZZLE) HANDLE_NODETYPE(VEC_SHL) HANDLE_NODETYPE(VEC_SHR_S) HANDLE_NODETYPE(VEC_SHR_U) -HANDLE_NODETYPE(LOAD_SPLAT) HANDLE_NODETYPE(THROW) HANDLE_NODETYPE(MEMORY_COPY) HANDLE_NODETYPE(MEMORY_FILL) -// add memory opcodes starting at ISD::FIRST_TARGET_MEMORY_OPCODE here... +// Memory intrinsics +HANDLE_MEM_NODETYPE(LOAD_SPLAT) diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp index f83a8a984ae0..531a07b829c8 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp @@ -17,6 +17,7 @@ #include "llvm/CodeGen/SelectionDAGISel.h" #include "llvm/IR/DiagnosticInfo.h" #include "llvm/IR/Function.h" // To access function attributes. +#include "llvm/IR/IntrinsicsWebAssembly.h" #include "llvm/Support/Debug.h" #include "llvm/Support/KnownBits.h" #include "llvm/Support/MathExtras.h" @@ -35,12 +36,10 @@ class WebAssemblyDAGToDAGISel final : public SelectionDAGISel { /// right decision when generating code for different targets. const WebAssemblySubtarget *Subtarget; - bool ForCodeSize; - public: WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM, CodeGenOpt::Level OptLevel) - : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr), ForCodeSize(false) { + : SelectionDAGISel(TM, OptLevel), Subtarget(nullptr) { } StringRef getPassName() const override { @@ -52,7 +51,6 @@ public: "********** Function: " << MF.getName() << '\n'); - ForCodeSize = MF.getFunction().hasOptSize(); Subtarget = &MF.getSubtarget<WebAssemblySubtarget>(); // Wasm64 is not fully supported right now (and is not specified) @@ -220,7 +218,6 @@ void WebAssemblyDAGToDAGISel::Select(SDNode *Node) { bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand( const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) { switch (ConstraintID) { - case InlineAsm::Constraint_i: case InlineAsm::Constraint_m: // We just support simple memory operands that just have a single address // operand and need no special handling. diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp index f06afdbcea9e..5b177c0c5d9d 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp @@ -28,6 +28,7 @@ #include "llvm/IR/DiagnosticPrinter.h" #include "llvm/IR/Function.h" #include "llvm/IR/Intrinsics.h" +#include "llvm/IR/IntrinsicsWebAssembly.h" #include "llvm/Support/Debug.h" #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/raw_ostream.h" @@ -180,6 +181,13 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setOperationAction(Op, MVT::v2i64, Expand); } + // But we do have integer min and max operations + if (Subtarget->hasUnimplementedSIMD128()) { + for (auto Op : {ISD::SMIN, ISD::SMAX, ISD::UMIN, ISD::UMAX}) + for (auto T : {MVT::v16i8, MVT::v8i16, MVT::v4i32}) + setOperationAction(Op, T, Legal); + } + // Expand float operations supported for scalars but not SIMD for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, ISD::FCOPYSIGN, ISD::FLOG, ISD::FLOG2, ISD::FLOG10, @@ -189,6 +197,11 @@ WebAssemblyTargetLowering::WebAssemblyTargetLowering( setOperationAction(Op, MVT::v2f64, Expand); } + // Expand operations not supported for i64x2 vectors + if (Subtarget->hasUnimplementedSIMD128()) + for (unsigned CC = 0; CC < ISD::SETCC_INVALID; ++CC) + setCondCodeAction(static_cast<ISD::CondCode>(CC), MVT::v2i64, Custom); + // Expand additional SIMD ops that V8 hasn't implemented yet if (!Subtarget->hasUnimplementedSIMD128()) { setOperationAction(ISD::FSQRT, MVT::v4f32, Expand); @@ -461,11 +474,14 @@ const char * WebAssemblyTargetLowering::getTargetNodeName(unsigned Opcode) const { switch (static_cast<WebAssemblyISD::NodeType>(Opcode)) { case WebAssemblyISD::FIRST_NUMBER: + case WebAssemblyISD::FIRST_MEM_OPCODE: break; #define HANDLE_NODETYPE(NODE) \ case WebAssemblyISD::NODE: \ return "WebAssemblyISD::" #NODE; +#define HANDLE_MEM_NODETYPE(NODE) HANDLE_NODETYPE(NODE) #include "WebAssemblyISD.def" +#undef HANDLE_MEM_NODETYPE #undef HANDLE_NODETYPE } return nullptr; @@ -1011,6 +1027,8 @@ SDValue WebAssemblyTargetLowering::LowerOperation(SDValue Op, return LowerBUILD_VECTOR(Op, DAG); case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG); + case ISD::SETCC: + return LowerSETCC(Op, DAG); case ISD::SHL: case ISD::SRA: case ISD::SRL: @@ -1425,7 +1443,11 @@ SDValue WebAssemblyTargetLowering::LowerBUILD_VECTOR(SDValue Op, if (Subtarget->hasUnimplementedSIMD128() && (SplattedLoad = dyn_cast<LoadSDNode>(SplatValue)) && SplattedLoad->getMemoryVT() == VecT.getVectorElementType()) { - Result = DAG.getNode(WebAssemblyISD::LOAD_SPLAT, DL, VecT, SplatValue); + Result = DAG.getMemIntrinsicNode( + WebAssemblyISD::LOAD_SPLAT, DL, DAG.getVTList(VecT), + {SplattedLoad->getChain(), SplattedLoad->getBasePtr(), + SplattedLoad->getOffset()}, + SplattedLoad->getMemoryVT(), SplattedLoad->getMemOperand()); } else { Result = DAG.getSplatBuildVector(VecT, DL, SplatValue); } @@ -1472,6 +1494,29 @@ WebAssemblyTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, return DAG.getNode(WebAssemblyISD::SHUFFLE, DL, Op.getValueType(), Ops); } +SDValue WebAssemblyTargetLowering::LowerSETCC(SDValue Op, + SelectionDAG &DAG) const { + SDLoc DL(Op); + // The legalizer does not know how to expand the comparison modes of i64x2 + // vectors because no comparison modes are supported. We could solve this by + // expanding all i64x2 SETCC nodes, but that seems to expand f64x2 SETCC nodes + // (which return i64x2 results) as well. So instead we manually unroll i64x2 + // comparisons here. + assert(Subtarget->hasUnimplementedSIMD128()); + assert(Op->getOperand(0)->getSimpleValueType(0) == MVT::v2i64); + SmallVector<SDValue, 2> LHS, RHS; + DAG.ExtractVectorElements(Op->getOperand(0), LHS); + DAG.ExtractVectorElements(Op->getOperand(1), RHS); + const SDValue &CC = Op->getOperand(2); + auto MakeLane = [&](unsigned I) { + return DAG.getNode(ISD::SELECT_CC, DL, MVT::i64, LHS[I], RHS[I], + DAG.getConstant(uint64_t(-1), DL, MVT::i64), + DAG.getConstant(uint64_t(0), DL, MVT::i64), CC); + }; + return DAG.getBuildVector(Op->getValueType(0), DL, + {MakeLane(0), MakeLane(1)}); +} + SDValue WebAssemblyTargetLowering::LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const { diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h index a53e24a05542..58e088a0ba50 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.h @@ -24,8 +24,16 @@ namespace WebAssemblyISD { enum NodeType : unsigned { FIRST_NUMBER = ISD::BUILTIN_OP_END, #define HANDLE_NODETYPE(NODE) NODE, +#define HANDLE_MEM_NODETYPE(NODE) #include "WebAssemblyISD.def" + FIRST_MEM_OPCODE = ISD::FIRST_TARGET_MEMORY_OPCODE, #undef HANDLE_NODETYPE +#undef HANDLE_MEM_NODETYPE +#define HANDLE_NODETYPE(NODE) +#define HANDLE_MEM_NODETYPE(NODE) NODE, +#include "WebAssemblyISD.def" +#undef HANDLE_NODETYPE +#undef HANDLE_MEM_NODETYPE }; } // end namespace WebAssemblyISD @@ -108,6 +116,7 @@ private: SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const; SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const; SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const; + SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const; SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const; SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const; }; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td index 5c9b34f44734..104f5f7d2e68 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td @@ -121,10 +121,3 @@ def : Pat<(select (i32 (seteq I32:$cond, 0)), F32:$lhs, F32:$rhs), (SELECT_F32 F32:$rhs, F32:$lhs, I32:$cond)>; def : Pat<(select (i32 (seteq I32:$cond, 0)), F64:$lhs, F64:$rhs), (SELECT_F64 F64:$rhs, F64:$lhs, I32:$cond)>; - -// The legalizer inserts an unnecessary `and 1` to make input conform -// to getBooleanContents, which we can lower away. -def : Pat<(select (i32 (and I32:$cond, 1)), F32:$lhs, F32:$rhs), - (SELECT_F32 F32:$lhs, F32:$rhs, I32:$cond)>; -def : Pat<(select (i32 (and I32:$cond, 1)), F64:$lhs, F64:$rhs), - (SELECT_F64 F64:$lhs, F64:$rhs, I32:$cond)>; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp index 8e8126c90e72..221dacaf821b 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp @@ -14,6 +14,7 @@ #include "WebAssemblyInstrInfo.h" #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" +#include "WebAssembly.h" #include "WebAssemblyMachineFunctionInfo.h" #include "WebAssemblySubtarget.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -54,8 +55,8 @@ bool WebAssemblyInstrInfo::isReallyTriviallyReMaterializable( void WebAssemblyInstrInfo::copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, - const DebugLoc &DL, unsigned DestReg, - unsigned SrcReg, bool KillSrc) const { + const DebugLoc &DL, MCRegister DestReg, + MCRegister SrcReg, bool KillSrc) const { // This method is called by post-RA expansion, which expects only pregs to // exist. However we need to handle both here. auto &MRI = MBB.getParent()->getRegInfo(); @@ -230,3 +231,12 @@ bool WebAssemblyInstrInfo::reverseBranchCondition( Cond.front() = MachineOperand::CreateImm(!Cond.front().getImm()); return false; } + +ArrayRef<std::pair<int, const char *>> +WebAssemblyInstrInfo::getSerializableTargetIndices() const { + static const std::pair<int, const char *> TargetIndices[] = { + {WebAssembly::TI_LOCAL_START, "wasm-local-start"}, + {WebAssembly::TI_GLOBAL_START, "wasm-global-start"}, + {WebAssembly::TI_OPERAND_STACK_START, "wasm-operator-stack-start"}}; + return makeArrayRef(TargetIndices); +} diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h index fe6211663c31..5762fd964c2a 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h @@ -16,6 +16,7 @@ #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H #include "WebAssemblyRegisterInfo.h" +#include "llvm/ADT/ArrayRef.h" #include "llvm/CodeGen/TargetInstrInfo.h" #define GET_INSTRINFO_HEADER @@ -46,7 +47,7 @@ public: AAResults *AA) const override; void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const DebugLoc &DL, unsigned DestReg, unsigned SrcReg, + const DebugLoc &DL, MCRegister DestReg, MCRegister SrcReg, bool KillSrc) const override; MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI, unsigned OpIdx1, @@ -64,6 +65,9 @@ public: int *BytesAdded = nullptr) const override; bool reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; + + ArrayRef<std::pair<int, const char *>> + getSerializableTargetIndices() const override; }; } // end namespace llvm diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td index fc5d73dac52e..64033c993e3f 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td @@ -72,35 +72,30 @@ defm "" : SIMDLoadSplat<"v16x8", 195>; defm "" : SIMDLoadSplat<"v32x4", 196>; defm "" : SIMDLoadSplat<"v64x2", 197>; -def wasm_load_splat_t : SDTypeProfile<1, 1, []>; -def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t>; - -foreach args = [["v16i8", "i32", "extloadi8"], ["v8i16", "i32", "extloadi16"], - ["v4i32", "i32", "load"], ["v2i64", "i64", "load"], - ["v4f32", "f32", "load"], ["v2f64", "f64", "load"]] in -def load_splat_#args[0] : - PatFrag<(ops node:$addr), (wasm_load_splat - (!cast<ValueType>(args[1]) (!cast<PatFrag>(args[2]) node:$addr)))>; +def wasm_load_splat_t : SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>; +def wasm_load_splat : SDNode<"WebAssemblyISD::LOAD_SPLAT", wasm_load_splat_t, + [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; +def load_splat : PatFrag<(ops node:$addr), (wasm_load_splat node:$addr)>; let Predicates = [HasUnimplementedSIMD128] in foreach args = [["v16i8", "v8x16"], ["v8i16", "v16x8"], ["v4i32", "v32x4"], ["v2i64", "v64x2"], ["v4f32", "v32x4"], ["v2f64", "v64x2"]] in { def : LoadPatNoOffset<!cast<ValueType>(args[0]), - !cast<PatFrag>("load_splat_"#args[0]), + load_splat, !cast<NI>("LOAD_SPLAT_"#args[1])>; def : LoadPatImmOff<!cast<ValueType>(args[0]), - !cast<PatFrag>("load_splat_"#args[0]), + load_splat, regPlusImm, !cast<NI>("LOAD_SPLAT_"#args[1])>; def : LoadPatImmOff<!cast<ValueType>(args[0]), - !cast<PatFrag>("load_splat_"#args[0]), + load_splat, or_is_add, !cast<NI>("LOAD_SPLAT_"#args[1])>; def : LoadPatOffsetOnly<!cast<ValueType>(args[0]), - !cast<PatFrag>("load_splat_"#args[0]), + load_splat, !cast<NI>("LOAD_SPLAT_"#args[1])>; def : LoadPatGlobalAddrOffOnly<!cast<ValueType>(args[0]), - !cast<PatFrag>("load_splat_"#args[0]), + load_splat, !cast<NI>("LOAD_SPLAT_"#args[1])>; } @@ -732,8 +727,44 @@ defm SUB_SAT_U : SIMDBinaryIntSmall<int_wasm_sub_saturate_unsigned, "sub_saturate_u", 92>; // Integer multiplication: mul +let isCommutable = 1 in defm MUL : SIMDBinaryIntNoI64x2<mul, "mul", 93>; +// Integer min_s / min_u / max_s / max_u +let isCommutable = 1 in { +defm MIN_S : SIMDBinaryIntNoI64x2<smin, "min_s", 94>; +defm MIN_U : SIMDBinaryIntNoI64x2<umin, "min_u", 95>; +defm MAX_S : SIMDBinaryIntNoI64x2<smax, "max_s", 96>; +defm MAX_U : SIMDBinaryIntNoI64x2<umax, "max_u", 97>; +} // isCommutable = 1 + +// Integer unsigned rounding average: avgr_u +let isCommutable = 1, Predicates = [HasUnimplementedSIMD128] in { +defm AVGR_U : SIMDBinary<v16i8, "i8x16", int_wasm_avgr_unsigned, "avgr_u", 217>; +defm AVGR_U : SIMDBinary<v8i16, "i16x8", int_wasm_avgr_unsigned, "avgr_u", 218>; +} + +def add_nuw : PatFrag<(ops node:$lhs, node:$rhs), + (add node:$lhs, node:$rhs), + "return N->getFlags().hasNoUnsignedWrap();">; + +foreach nodes = [[v16i8, splat16], [v8i16, splat8]] in +def : Pat<(srl + (add_nuw + (add_nuw (nodes[0] V128:$lhs), (nodes[0] V128:$rhs)), + (nodes[1] (i32 1)) + ), + (nodes[0] (nodes[1] (i32 1))) + ), + (!cast<NI>("AVGR_U_"#nodes[0]) V128:$lhs, V128:$rhs)>; + +// Widening dot product: i32x4.dot_i16x8_s +let isCommutable = 1 in +defm DOT : SIMD_I<(outs V128:$dst), (ins V128:$lhs, V128:$rhs), (outs), (ins), + [(set V128:$dst, (int_wasm_dot V128:$lhs, V128:$rhs))], + "i32x4.dot_i16x8_s\t$dst, $lhs, $rhs", "i32x4.dot_i16x8_s", + 219>; + //===----------------------------------------------------------------------===// // Floating-point unary arithmetic //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp index 1cf397dd060b..d1f3acbd221e 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp @@ -211,6 +211,7 @@ #include "llvm/IR/CallSite.h" #include "llvm/IR/Dominators.h" #include "llvm/IR/IRBuilder.h" +#include "llvm/Support/CommandLine.h" #include "llvm/Transforms/Utils/BasicBlockUtils.h" #include "llvm/Transforms/Utils/SSAUpdater.h" @@ -452,7 +453,7 @@ Function *WebAssemblyLowerEmscriptenEHSjLj::getInvokeWrapper(CallOrInvoke *CI) { CalleeFTy = F->getFunctionType(); else { auto *CalleeTy = cast<PointerType>(Callee->getType())->getElementType(); - CalleeFTy = dyn_cast<FunctionType>(CalleeTy); + CalleeFTy = cast<FunctionType>(CalleeTy); } std::string Sig = getSignature(CalleeFTy); @@ -750,7 +751,6 @@ bool WebAssemblyLowerEmscriptenEHSjLj::runEHOnFunction(Function &F) { auto *II = dyn_cast<InvokeInst>(BB.getTerminator()); if (!II) continue; - Changed = true; LandingPads.insert(II->getLandingPadInst()); IRB.SetInsertPoint(II); @@ -830,6 +830,7 @@ bool WebAssemblyLowerEmscriptenEHSjLj::runEHOnFunction(Function &F) { if (auto *LPI = dyn_cast<LandingPadInst>(I)) LandingPads.insert(LPI); } + Changed = !LandingPads.empty(); // Handle all the landingpad for this function together, as multiple invokes // may share a single lp diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp index 7b9ae90326f0..c6cf7b6bc551 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyRuntimeLibcallSignatures.cpp @@ -316,12 +316,6 @@ struct RuntimeLibcallSignatureTable { Table[RTLIB::UO_F32] = i32_func_f32_f32; Table[RTLIB::UO_F64] = i32_func_f64_f64; Table[RTLIB::UO_F128] = i32_func_i64_i64_i64_i64; - // O_FXX has the weird property that it uses the same libcall name as UO_FXX - // This breaks our name-based lookup. Fortunately only the UO family of - // libcalls appears to be actually used. - Table[RTLIB::O_F32] = unsupported; - Table[RTLIB::O_F64] = unsupported; - Table[RTLIB::O_F128] = unsupported; // Memory Table[RTLIB::MEMCPY] = iPTR_func_iPTR_iPTR_iPTR; diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index bdf5fe2620a4..4291b48c16be 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -45,7 +45,7 @@ static cl::opt<bool> EnableEmSjLj( cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"), cl::init(false)); -extern "C" void LLVMInitializeWebAssemblyTarget() { +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() { // Register the target. RegisterTargetMachine<WebAssemblyTargetMachine> X( getTheWebAssemblyTarget32()); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp index 1c53e90daea7..ac8ad927d334 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp @@ -46,7 +46,8 @@ unsigned WebAssemblyTTIImpl::getRegisterBitWidth(bool Vector) const { unsigned WebAssemblyTTIImpl::getArithmeticInstrCost( unsigned Opcode, Type *Ty, TTI::OperandValueKind Opd1Info, TTI::OperandValueKind Opd2Info, TTI::OperandValueProperties Opd1PropInfo, - TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value *> Args) { + TTI::OperandValueProperties Opd2PropInfo, ArrayRef<const Value *> Args, + const Instruction *CxtI) { unsigned Cost = BasicTTIImplBase<WebAssemblyTTIImpl>::getArithmeticInstrCost( Opcode, Ty, Opd1Info, Opd2Info, Opd1PropInfo, Opd2PropInfo); diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h index f0ecc73e91de..2731dda10bec 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h @@ -61,7 +61,8 @@ public: TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue, TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None, TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None, - ArrayRef<const Value *> Args = ArrayRef<const Value *>()); + ArrayRef<const Value *> Args = ArrayRef<const Value *>(), + const Instruction *CxtI = nullptr); unsigned getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index); /// @} |