summaryrefslogtreecommitdiff
path: root/src/arm/r8a7794.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'src/arm/r8a7794.dtsi')
-rw-r--r--src/arm/r8a7794.dtsi27
1 files changed, 17 insertions, 10 deletions
diff --git a/src/arm/r8a7794.dtsi b/src/arm/r8a7794.dtsi
index 5643976c1356..106b4e1649ff 100644
--- a/src/arm/r8a7794.dtsi
+++ b/src/arm/r8a7794.dtsi
@@ -37,6 +37,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
+ enable-method = "renesas,apmu";
cpu0: cpu@0 {
device_type = "cpu";
@@ -66,6 +67,12 @@
};
};
+ apmu@e6151000 {
+ compatible = "renesas,r8a7794-apmu", "renesas,apmu";
+ reg = <0 0xe6151000 0 0x188>;
+ cpus = <&cpu0 &cpu1>;
+ };
+
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
@@ -181,7 +188,7 @@
};
cmt0: timer@ffca0000 {
- compatible = "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
@@ -190,13 +197,11 @@
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 124>;
- renesas,channels-mask = <0x60>;
-
status = "disabled";
};
cmt1: timer@e6130000 {
- compatible = "renesas,cmt-48-gen2";
+ compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
@@ -211,8 +216,6 @@
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 329>;
- renesas,channels-mask = <0xff>;
-
status = "disabled";
};
@@ -640,7 +643,8 @@
};
ether: ethernet@ee700000 {
- compatible = "renesas,ether-r8a7794";
+ compatible = "renesas,ether-r8a7794",
+ "renesas,rcar-gen2-ether";
reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
@@ -791,7 +795,8 @@
};
sdhi0: sd@ee100000 {
- compatible = "renesas,sdhi-r8a7794";
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
@@ -805,7 +810,8 @@
};
sdhi1: sd@ee140000 {
- compatible = "renesas,sdhi-r8a7794";
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
@@ -819,7 +825,8 @@
};
sdhi2: sd@ee160000 {
- compatible = "renesas,sdhi-r8a7794";
+ compatible = "renesas,sdhi-r8a7794",
+ "renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;