diff options
Diffstat (limited to 'sys/contrib/dev/acpica/actbl1.h')
| -rw-r--r-- | sys/contrib/dev/acpica/actbl1.h | 57 |
1 files changed, 32 insertions, 25 deletions
diff --git a/sys/contrib/dev/acpica/actbl1.h b/sys/contrib/dev/acpica/actbl1.h index bbb317038cc5..51ea92aaa183 100644 --- a/sys/contrib/dev/acpica/actbl1.h +++ b/sys/contrib/dev/acpica/actbl1.h @@ -1,7 +1,7 @@ /****************************************************************************** * * Name: actbl1.h - ACPI 1.0 tables - * $Revision: 28 $ + * $Revision: 1.32 $ * *****************************************************************************/ @@ -9,7 +9,7 @@ * * 1. Copyright Notice * - * Some or all of this work - Copyright (c) 1999 - 2004, Intel Corp. + * Some or all of this work - Copyright (c) 1999 - 2005, Intel Corp. * All rights reserved. * * 2. License @@ -125,8 +125,8 @@ typedef struct rsdt_descriptor_rev1 { ACPI_TABLE_HEADER_DEF /* ACPI common table header */ - UINT32 TableOffsetEntry [1]; /* Array of pointers to other */ - /* ACPI tables */ + UINT32 TableOffsetEntry[1]; /* Array of pointers to ACPI tables */ + } RSDT_DESCRIPTOR_REV1; @@ -135,14 +135,19 @@ typedef struct rsdt_descriptor_rev1 */ typedef struct facs_descriptor_rev1 { - char Signature[4]; /* ACPI Signature */ - UINT32 Length; /* Length of structure, in bytes */ + char Signature[4]; /* ASCII table signature */ + UINT32 Length; /* Length of structure in bytes */ UINT32 HardwareSignature; /* Hardware configuration signature */ UINT32 FirmwareWakingVector; /* ACPI OS waking vector */ UINT32 GlobalLock; /* Global Lock */ - UINT32_BIT S4Bios_f : 1; /* Indicates if S4BIOS support is present */ - UINT32_BIT Reserved1 : 31; /* Must be 0 */ - UINT8 Resverved3 [40]; /* Reserved - must be zero */ + + /* Flags (32 bits) */ + + UINT8_BIT S4Bios_f : 1; /* 00: S4BIOS support is present */ + UINT8_BIT : 7; /* 01-07: Reserved, must be zero */ + UINT8 Reserved1[3]; /* 08-31: Reserved, must be zero */ + + UINT8 Reserved2[40]; /* Reserved, must be zero */ } FACS_DESCRIPTOR_REV1; @@ -156,13 +161,13 @@ typedef struct fadt_descriptor_rev1 UINT32 FirmwareCtrl; /* Physical address of FACS */ UINT32 Dsdt; /* Physical address of DSDT */ UINT8 Model; /* System Interrupt Model */ - UINT8 Reserved1; /* Reserved */ + UINT8 Reserved1; /* Reserved, must be zero */ UINT16 SciInt; /* System vector of SCI interrupt */ UINT32 SmiCmd; /* Port address of SMI command port */ UINT8 AcpiEnable; /* Value to write to smi_cmd to enable ACPI */ UINT8 AcpiDisable; /* Value to write to smi_cmd to disable ACPI */ UINT8 S4BiosReq; /* Value to write to SMI CMD to enter S4BIOS state */ - UINT8 Reserved2; /* Reserved - must be zero */ + UINT8 Reserved2; /* Reserved, must be zero */ UINT32 Pm1aEvtBlk; /* Port address of Power Mgt 1a AcpiEvent Reg Blk */ UINT32 Pm1bEvtBlk; /* Port address of Power Mgt 1b AcpiEvent Reg Blk */ UINT32 Pm1aCntBlk; /* Port address of Power Mgt 1a Control Reg Blk */ @@ -178,7 +183,7 @@ typedef struct fadt_descriptor_rev1 UINT8 Gpe0BlkLen; /* Byte Length of ports at gpe0_blk */ UINT8 Gpe1BlkLen; /* Byte Length of ports at gpe1_blk */ UINT8 Gpe1Base; /* Offset in gpe model where gpe1 events start */ - UINT8 Reserved3; /* Reserved */ + UINT8 Reserved3; /* Reserved, must be zero */ UINT16 Plvl2Lat; /* Worst case HW latency to enter/exit C2 state */ UINT16 Plvl3Lat; /* Worst case HW latency to enter/exit C3 state */ UINT16 FlushSize; /* Size of area read to flush caches */ @@ -188,19 +193,21 @@ typedef struct fadt_descriptor_rev1 UINT8 DayAlrm; /* Index to day-of-month alarm in RTC CMOS RAM */ UINT8 MonAlrm; /* Index to month-of-year alarm in RTC CMOS RAM */ UINT8 Century; /* Index to century in RTC CMOS RAM */ - UINT8 Reserved4; /* Reserved */ - UINT8 Reserved4a; /* Reserved */ - UINT8 Reserved4b; /* Reserved */ - UINT32_BIT WbInvd : 1; /* The wbinvd instruction works properly */ - UINT32_BIT WbInvdFlush : 1; /* The wbinvd flushes but does not invalidate */ - UINT32_BIT ProcC1 : 1; /* All processors support C1 state */ - UINT32_BIT Plvl2Up : 1; /* C2 state works on MP system */ - UINT32_BIT PwrButton : 1; /* Power button is handled as a generic feature */ - UINT32_BIT SleepButton : 1; /* Sleep button is handled as a generic feature, or not present */ - UINT32_BIT FixedRTC : 1; /* RTC wakeup stat not in fixed register space */ - UINT32_BIT Rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ - UINT32_BIT TmrValExt : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */ - UINT32_BIT Reserved5 : 23; /* Reserved - must be zero */ + UINT8 Reserved4[3]; /* Reserved, must be zero */ + + /* Flags (32 bits) */ + + UINT8_BIT WbInvd : 1; /* 00: The wbinvd instruction works properly */ + UINT8_BIT WbInvdFlush : 1; /* 01: The wbinvd flushes but does not invalidate */ + UINT8_BIT ProcC1 : 1; /* 02: All processors support C1 state */ + UINT8_BIT Plvl2Up : 1; /* 03: C2 state works on MP system */ + UINT8_BIT PwrButton : 1; /* 04: Power button is handled as a generic feature */ + UINT8_BIT SleepButton : 1; /* 05: Sleep button is handled as a generic feature, or not present */ + UINT8_BIT FixedRTC : 1; /* 06: RTC wakeup stat not in fixed register space */ + UINT8_BIT Rtcs4 : 1; /* 07: RTC wakeup stat not possible from S4 */ + UINT8_BIT TmrValExt : 1; /* 08: tmr_val width is 32 bits (0 = 24 bits) */ + UINT8_BIT : 7; /* 09-15: Reserved, must be zero */ + UINT8 Reserved5[2]; /* 16-31: Reserved, must be zero */ } FADT_DESCRIPTOR_REV1; |