diff options
Diffstat (limited to 'sys/contrib/octeon-sdk/cvmx-smi-defs.h')
| -rw-r--r-- | sys/contrib/octeon-sdk/cvmx-smi-defs.h | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/sys/contrib/octeon-sdk/cvmx-smi-defs.h b/sys/contrib/octeon-sdk/cvmx-smi-defs.h index c77802fde620..2dbeb54dfbb7 100644 --- a/sys/contrib/octeon-sdk/cvmx-smi-defs.h +++ b/sys/contrib/octeon-sdk/cvmx-smi-defs.h @@ -1,5 +1,5 @@ /***********************license start*************** - * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights + * Copyright (c) 2003-2012 Cavium Inc. (support@cavium.com). All rights * reserved. * * @@ -15,7 +15,7 @@ * disclaimer in the documentation and/or other materials provided * with the distribution. - * * Neither the name of Cavium Networks nor the names of + * * Neither the name of Cavium Inc. nor the names of * its contributors may be used to endorse or promote products * derived from this software without specific prior written * permission. @@ -26,7 +26,7 @@ * countries. * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" - * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR + * AND WITH ALL FAULTS AND CAVIUM INC. MAKES NO PROMISES, REPRESENTATIONS OR * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM @@ -49,14 +49,14 @@ * <hr>$Revision$<hr> * */ -#ifndef __CVMX_SMI_TYPEDEFS_H__ -#define __CVMX_SMI_TYPEDEFS_H__ +#ifndef __CVMX_SMI_DEFS_H__ +#define __CVMX_SMI_DEFS_H__ #if CVMX_ENABLE_CSR_ADDRESS_CHECKING #define CVMX_SMI_DRV_CTL CVMX_SMI_DRV_CTL_FUNC() static inline uint64_t CVMX_SMI_DRV_CTL_FUNC(void) { - if (!(OCTEON_IS_MODEL(OCTEON_CN63XX))) + if (!(OCTEON_IS_MODEL(OCTEON_CN61XX) || OCTEON_IS_MODEL(OCTEON_CN63XX) || OCTEON_IS_MODEL(OCTEON_CN66XX) || OCTEON_IS_MODEL(OCTEON_CN68XX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))) cvmx_warn("CVMX_SMI_DRV_CTL not supported on this chip\n"); return CVMX_ADD_IO_SEG(0x0001180000001828ull); } @@ -70,12 +70,10 @@ static inline uint64_t CVMX_SMI_DRV_CTL_FUNC(void) * SMI_DRV_CTL = SMI Drive Strength Control * */ -union cvmx_smi_drv_ctl -{ +union cvmx_smi_drv_ctl { uint64_t u64; - struct cvmx_smi_drv_ctl_s - { -#if __BYTE_ORDER == __BIG_ENDIAN + struct cvmx_smi_drv_ctl_s { +#ifdef __BIG_ENDIAN_BITFIELD uint64_t reserved_14_63 : 50; uint64_t pctl : 6; /**< PCTL Drive strength control bits Assuming a 50ohm termination @@ -93,8 +91,13 @@ union cvmx_smi_drv_ctl uint64_t reserved_14_63 : 50; #endif } s; + struct cvmx_smi_drv_ctl_s cn61xx; struct cvmx_smi_drv_ctl_s cn63xx; struct cvmx_smi_drv_ctl_s cn63xxp1; + struct cvmx_smi_drv_ctl_s cn66xx; + struct cvmx_smi_drv_ctl_s cn68xx; + struct cvmx_smi_drv_ctl_s cn68xxp1; + struct cvmx_smi_drv_ctl_s cnf71xx; }; typedef union cvmx_smi_drv_ctl cvmx_smi_drv_ctl_t; |