diff options
Diffstat (limited to 'sys/dev/ichiic/ig4_reg.h')
| -rw-r--r-- | sys/dev/ichiic/ig4_reg.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/dev/ichiic/ig4_reg.h b/sys/dev/ichiic/ig4_reg.h index c87d1d1e9fd2..33976c0daf43 100644 --- a/sys/dev/ichiic/ig4_reg.h +++ b/sys/dev/ichiic/ig4_reg.h @@ -185,7 +185,7 @@ * RESTART - RW This bit controls whether a forced RESTART is * issued before the byte is sent or received. * - * 0 If not set a RESTART is only issued if the tranfer + * 0 If not set a RESTART is only issued if the transfer * direction is changing from the previous command. * * 1 A RESTART is issued before the byte is sent or @@ -271,7 +271,7 @@ * cleared by HW when the buffer level goes above * the threshold. * - * TX_OVER Indicates that the processer attempted to write + * TX_OVER Indicates that the processor attempted to write * to the TX FIFO while the TX FIFO was full. Cleared * by reading CLR_TX_OVER. * |