diff options
Diffstat (limited to 'sys/dev')
| -rw-r--r-- | sys/dev/aac/aac_tables.h | 117 | ||||
| -rw-r--r-- | sys/dev/awi/README | 60 | ||||
| -rw-r--r-- | sys/dev/awi/am79c930.c | 450 | ||||
| -rw-r--r-- | sys/dev/awi/am79c930reg.h | 126 | ||||
| -rw-r--r-- | sys/dev/awi/am79c930var.h | 79 | ||||
| -rw-r--r-- | sys/dev/awi/awi_wep.c | 528 | ||||
| -rw-r--r-- | sys/dev/awi/awi_wicfg.c | 625 | ||||
| -rw-r--r-- | sys/dev/awi/awireg.h | 460 | ||||
| -rw-r--r-- | sys/dev/awi/awivar.h | 222 | ||||
| -rw-r--r-- | sys/dev/awi/if_awi_pccard.c | 250 | ||||
| -rw-r--r-- | sys/dev/cs/if_csreg.h | 544 | ||||
| -rw-r--r-- | sys/dev/ex/if_ex_isa.c | 312 | ||||
| -rw-r--r-- | sys/dev/ex/if_ex_pccard.c | 162 | ||||
| -rw-r--r-- | sys/dev/ic/hd64570.h | 372 | ||||
| -rw-r--r-- | sys/dev/mii/tdkphyreg.h | 82 | ||||
| -rw-r--r-- | sys/dev/ray/if_raydbg.h | 146 | ||||
| -rw-r--r-- | sys/dev/ray/if_raymib.h | 1100 | ||||
| -rw-r--r-- | sys/dev/ray/if_rayreg.h | 480 | ||||
| -rw-r--r-- | sys/dev/ray/if_rayvar.h | 310 | ||||
| -rw-r--r-- | sys/dev/rp/rpreg.h | 1015 | ||||
| -rw-r--r-- | sys/dev/usb/rio500_usb.h | 58 |
21 files changed, 0 insertions, 7498 deletions
diff --git a/sys/dev/aac/aac_tables.h b/sys/dev/aac/aac_tables.h deleted file mode 100644 index d994ae622181..000000000000 --- a/sys/dev/aac/aac_tables.h +++ /dev/null @@ -1,117 +0,0 @@ -/*- - * Copyright (c) 2000 Michael Smith - * Copyright (c) 2000 BSDi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Status codes for block read/write commands, etc. - * - * XXX many of these would not normally be returned, as they are - * relevant only to FSA operations. - */ -static struct aac_code_lookup aac_command_status_table[] = { - {"OK", 0}, - {"operation not permitted", 1}, - {"not found", 2}, - {"I/O error", 5}, - {"device not configured", 6}, - {"too big", 7}, - {"permission denoed", 13}, - {"file exists", 17}, - {"cross-device link", 18}, - {"operation not supported by device", 19}, - {"not a directory", 20}, - {"is a directory", 21}, - {"invalid argument", 22}, - {"file too large", 27}, - {"no space on device", 28}, - {"readonly filesystem", 30}, - {"too many links", 31}, - {"operation would block", 35}, - {"file name too long", 63}, - {"directory not empty", 66}, - {"quota exceeded", 69}, - {"stale file handle", 70}, - {"too many levels of remote in path", 71}, - {"bad file handle", 10001}, - {"not sync", 10002}, - {"bad cookie", 10003}, - {"operation not supported", 10004}, - {"too small", 10005}, - {"server fault", 10006}, - {"bad type", 10007}, - {"jukebox", 10008}, - {"not mounted", 10009}, - {"in maintenace mode", 10010}, - {"stale ACL", 10011}, - {NULL, 0}, - {"unknown command status", 0} -}; - -#define AAC_COMMAND_STATUS(x) aac_describe_code(aac_command_status_table, x) - -static struct aac_code_lookup aac_cpu_variant[] = { - {"i960JX", CPUI960_JX}, - {"i960CX", CPUI960_CX}, - {"i960HX", CPUI960_HX}, - {"i960RX", CPUI960_RX}, - {"StrongARM SA110", CPUARM_SA110}, - {"PowerPC 603e", CPUPPC_603e}, - {"Unknown StrongARM", CPUARM_xxx}, - {"Unknown PowerPC", CPUPPC_xxx}, - {NULL, 0}, - {"Unknown processor", 0} -}; - -static struct aac_code_lookup aac_battery_platform[] = { - {"required battery present", PLATFORM_BAT_REQ_PRESENT}, - {"REQUIRED BATTERY NOT PRESENT", PLATFORM_BAT_REQ_NOTPRESENT}, - {"optional battery present", PLATFORM_BAT_OPT_PRESENT}, - {"optional battery not installed", PLATFORM_BAT_OPT_NOTPRESENT}, - {"no battery support", PLATFORM_BAT_NOT_SUPPORTED}, - {NULL, 0}, - {"unknown battery platform", 0} -}; - -static struct aac_code_lookup aac_container_types[] = { - {"Volume", CT_VOLUME}, - {"RAID 1 (Mirror)", CT_MIRROR}, - {"RAID 0 (Stripe)", CT_STRIPE}, - {"RAID 5", CT_RAID5}, - {"SSRW", CT_SSRW}, - {"SSRO", CT_SSRO}, - {"Morph", CT_MORPH}, - {"Passthrough", CT_PASSTHRU}, - {"RAID 4", CT_RAID4}, - {"RAID 10", CT_RAID10}, - {"RAID 00", CT_RAID00}, - {"Volume of Mirrors", CT_VOLUME_OF_MIRRORS}, - {"Pseudo RAID 3", CT_PSEUDO_RAID3}, - {NULL, 0}, - {"unknown", 0} -}; - diff --git a/sys/dev/awi/README b/sys/dev/awi/README deleted file mode 100644 index 38aaec59de92..000000000000 --- a/sys/dev/awi/README +++ /dev/null @@ -1,60 +0,0 @@ -# $Id: README,v 1.19 2000/03/24 08:13:24 onoe Exp $ -# $FreeBSD$ - -===== Configuration - ifconfig awi0 link0 - changes to encapsulation from 802.2 LLC/SNAP (default) to - ether encapsulation. MELCO access point and PAO's ux driver - use this. - -===== Supported Cards - Any IEEE 802.11 cards use AMD Am79C930 and Harris (Intersil) Chipset - with PCnetMobile firmware by AMD. - BayStack 650 1Mbps Frequency Hopping PCCARD adapter - BayStack 660 2Mbps Direct Sequence PCCARD adapter - Icom SL-200 2Mbps Direct Sequence PCCARD adapter - Melco WLI-PCM 2Mbps Direct Sequence PCCARD adapter - NEL SSMagic 2Mbps Direct Sequence PCCARD adapter - Netwave AirSurfer Plus - 1Mbps Frequency Hopping PCCARD adapter - Netwave AirSurfer Pro - 2Mbps Direct Sequence PCCARD adapter - -===== Known Problems - WEP is not supported. - Does not create IBSS itself. - - Cannot configure at all on FreeBSD: - selection of infrastructure/adhoc mode - ESSID - ... - -===== How to add - -*** NetBSD current - already merged into current source tree. - - pcmcia: update the awi driver, which now supports AMD 79c930-based - 802.11DS cards as well as 802.11FH cards, and can operate - in infrastructure mode, adhoc mode, and wi(4) compatible - adhoc mode. [onoe 20000322] - -*** FreeBSD-current - make directory /sys/dev/awi and put all files there. - move if_ieee80211.h to /sys/net - add following lines to /sys/conf/files - dev/awi/am79c930.c optional awi - dev/awi/awi.c optional awi - dev/awi/if_awi_pccard.c optional awi card - add following line to config file - device awi0 - config and make kernel - - add description of your card to /etc/pccard.conf - ex. - card "AMD" "Am79C930" - config 0x1 "awi0" ? - card "Icom" "SL-200" - config 0x1 "awi0" ? - card "Bay Networks" "BayStack 650 Wireless LAN" - config 0x1 "awi0" ? diff --git a/sys/dev/awi/am79c930.c b/sys/dev/awi/am79c930.c deleted file mode 100644 index aa9c97f5a538..000000000000 --- a/sys/dev/awi/am79c930.c +++ /dev/null @@ -1,450 +0,0 @@ -/* $NetBSD: am79c930.c,v 1.5 2000/03/23 13:57:58 onoe Exp $ */ -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Bill Sommerfeld - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Am79c930 chip driver. - * - * This is used by the awi driver to use the shared - * memory attached to the 79c930 to communicate with the firmware running - * in the 930's on-board 80188 core. - * - * The 79c930 can be mapped into just I/O space, or also have a - * memory mapping; the mapping must be set up by the bus front-end - * before am79c930_init is called. - */ - -/* - * operations: - * - * read_8, read_16, read_32, read_64, read_bytes - * write_8, write_16, write_32, write_64, write_bytes - * (two versions, depending on whether memory-space or i/o space is in use). - * - * interrupt E.C. - * start isr - * end isr - */ - -#include <sys/param.h> -#include <sys/systm.h> -#ifndef __FreeBSD__ -#include <sys/device.h> -#endif - -#include <machine/cpu.h> -#ifdef __FreeBSD__ -#include <machine/bus_pio.h> -#include <machine/bus_memio.h> -#endif -#include <machine/bus.h> -#ifdef __NetBSD__ -#include <machine/intr.h> -#endif - -#ifdef __NetBSD__ -#include <dev/ic/am79c930reg.h> -#include <dev/ic/am79c930var.h> -#endif -#ifdef __FreeBSD__ -#include <dev/awi/am79c930reg.h> -#include <dev/awi/am79c930var.h> -#endif - -#define AM930_DELAY(x) /*nothing*/ - -void am79c930_regdump __P((struct am79c930_softc *sc)); - -static void io_write_1 __P((struct am79c930_softc *, u_int32_t, u_int8_t)); -static void io_write_2 __P((struct am79c930_softc *, u_int32_t, u_int16_t)); -static void io_write_4 __P((struct am79c930_softc *, u_int32_t, u_int32_t)); -static void io_write_bytes __P((struct am79c930_softc *, u_int32_t, u_int8_t *, size_t)); - -static u_int8_t io_read_1 __P((struct am79c930_softc *, u_int32_t)); -static u_int16_t io_read_2 __P((struct am79c930_softc *, u_int32_t)); -static u_int32_t io_read_4 __P((struct am79c930_softc *, u_int32_t)); -static void io_read_bytes __P((struct am79c930_softc *, u_int32_t, u_int8_t *, size_t)); - -static void mem_write_1 __P((struct am79c930_softc *, u_int32_t, u_int8_t)); -static void mem_write_2 __P((struct am79c930_softc *, u_int32_t, u_int16_t)); -static void mem_write_4 __P((struct am79c930_softc *, u_int32_t, u_int32_t)); -static void mem_write_bytes __P((struct am79c930_softc *, u_int32_t, u_int8_t *, size_t)); - -static u_int8_t mem_read_1 __P((struct am79c930_softc *, u_int32_t)); -static u_int16_t mem_read_2 __P((struct am79c930_softc *, u_int32_t)); -static u_int32_t mem_read_4 __P((struct am79c930_softc *, u_int32_t)); -static void mem_read_bytes __P((struct am79c930_softc *, u_int32_t, u_int8_t *, size_t)); - -static struct am79c930_ops iospace_ops = { - io_write_1, - io_write_2, - io_write_4, - io_write_bytes, - io_read_1, - io_read_2, - io_read_4, - io_read_bytes -}; - -struct am79c930_ops memspace_ops = { - mem_write_1, - mem_write_2, - mem_write_4, - mem_write_bytes, - mem_read_1, - mem_read_2, - mem_read_4, - mem_read_bytes -}; - -static void io_write_1 (sc, off, val) - struct am79c930_softc *sc; - u_int32_t off; - u_int8_t val; -{ - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA, val); - AM930_DELAY(1); -} - -static void io_write_2 (sc, off, val) - struct am79c930_softc *sc; - u_int32_t off; - u_int16_t val; -{ - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, val & 0xff); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA, (val>>8)&0xff); - AM930_DELAY(1); -} - -static void io_write_4 (sc, off, val) - struct am79c930_softc *sc; - u_int32_t off; - u_int32_t val; -{ - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,val & 0xff); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>8)&0xff); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>16)&0xff); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,(val>>24)&0xff); - AM930_DELAY(1); -} - -static void io_write_bytes (sc, off, ptr, len) - struct am79c930_softc *sc; - u_int32_t off; - u_int8_t *ptr; - size_t len; -{ - int i; - - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - for (i=0; i<len; i++) - bus_space_write_1(sc->sc_iot,sc->sc_ioh,AM79C930_IODPA,ptr[i]); -} - -static u_int8_t io_read_1 (sc, off) - struct am79c930_softc *sc; - u_int32_t off; -{ - u_int8_t val; - - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA); - AM930_DELAY(1); - return val; -} - -static u_int16_t io_read_2 (sc, off) - struct am79c930_softc *sc; - u_int32_t off; -{ - u_int16_t val; - - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA); - AM930_DELAY(1); - val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8; - AM930_DELAY(1); - return val; -} - -static u_int32_t io_read_4 (sc, off) - struct am79c930_softc *sc; - u_int32_t off; -{ - u_int32_t val; - - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - val = bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA); - AM930_DELAY(1); - val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 8; - AM930_DELAY(1); - val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 16; - AM930_DELAY(1); - val |= bus_space_read_1(sc->sc_iot, sc->sc_ioh, AM79C930_IODPA) << 24; - AM930_DELAY(1); - return val; -} - -static void io_read_bytes (sc, off, ptr, len) - struct am79c930_softc *sc; - u_int32_t off; - u_int8_t *ptr; - size_t len; -{ - int i; - - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_HI, - ((off>>8)& 0x7f)); - AM930_DELAY(1); - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_LMA_LO, (off&0xff)); - AM930_DELAY(1); - for (i=0; i<len; i++) - ptr[i] = bus_space_read_1(sc->sc_iot, sc->sc_ioh, - AM79C930_IODPA); -} - -static void mem_write_1 (sc, off, val) - struct am79c930_softc *sc; - u_int32_t off; - u_int8_t val; -{ - bus_space_write_1(sc->sc_memt, sc->sc_memh, off, val); -} - -static void mem_write_2 (sc, off, val) - struct am79c930_softc *sc; - u_int32_t off; - u_int16_t val; -{ - bus_space_tag_t t = sc->sc_memt; - bus_space_handle_t h = sc->sc_memh; - - /* could be unaligned */ - if ((off & 0x1) == 0) - bus_space_write_2(t, h, off, val); - else { - bus_space_write_1(t, h, off, val & 0xff); - bus_space_write_1(t, h, off+1, (val >> 8) & 0xff); - } -} - -static void mem_write_4 (sc, off, val) - struct am79c930_softc *sc; - u_int32_t off; - u_int32_t val; -{ - bus_space_tag_t t = sc->sc_memt; - bus_space_handle_t h = sc->sc_memh; - - /* could be unaligned */ - if ((off & 0x3) == 0) - bus_space_write_4(t, h, off, val); - else { - bus_space_write_1(t, h, off, val & 0xff); - bus_space_write_1(t, h, off+1, (val >> 8) & 0xff); - bus_space_write_1(t, h, off+2, (val >> 16) & 0xff); - bus_space_write_1(t, h, off+3, (val >> 24) & 0xff); - } -} - -static void mem_write_bytes (sc, off, ptr, len) - struct am79c930_softc *sc; - u_int32_t off; - u_int8_t *ptr; - size_t len; -{ - bus_space_write_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len); -} - - -static u_int8_t mem_read_1 (sc, off) - struct am79c930_softc *sc; - u_int32_t off; -{ - return bus_space_read_1(sc->sc_memt, sc->sc_memh, off); -} - -static u_int16_t mem_read_2 (sc, off) - struct am79c930_softc *sc; - u_int32_t off; -{ - /* could be unaligned */ - if ((off & 0x1) == 0) - return bus_space_read_2(sc->sc_memt, sc->sc_memh, off); - else - return - bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) | - (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8); -} - -static u_int32_t mem_read_4 (sc, off) - struct am79c930_softc *sc; - u_int32_t off; -{ - /* could be unaligned */ - if ((off & 0x3) == 0) - return bus_space_read_4(sc->sc_memt, sc->sc_memh, off); - else - return - bus_space_read_1(sc->sc_memt, sc->sc_memh, off ) | - (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+1) << 8) | - (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+2) <<16) | - (bus_space_read_1(sc->sc_memt, sc->sc_memh, off+3) <<24); -} - - - -static void mem_read_bytes (sc, off, ptr, len) - struct am79c930_softc *sc; - u_int32_t off; - u_int8_t *ptr; - size_t len; -{ - bus_space_read_region_1 (sc->sc_memt, sc->sc_memh, off, ptr, len); -} - - - - -/* - * Set bits in GCR. - */ - -void am79c930_gcr_setbits (sc, bits) - struct am79c930_softc *sc; - u_int8_t bits; -{ - u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR); - - gcr |= bits; - - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr); -} - -/* - * Clear bits in GCR. - */ - -void am79c930_gcr_clearbits (sc, bits) - struct am79c930_softc *sc; - u_int8_t bits; -{ - u_int8_t gcr = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR); - - gcr &= ~bits; - - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_GCR, gcr); -} - -u_int8_t am79c930_gcr_read (sc) - struct am79c930_softc *sc; -{ - return bus_space_read_1 (sc->sc_iot, sc->sc_ioh, AM79C930_GCR); -} - -#if 0 -void am79c930_regdump (sc) - struct am79c930_softc *sc; -{ - u_int8_t buf[8]; - int i; - - AM930_DELAY(5); - for (i=0; i<8; i++) { - buf[i] = bus_space_read_1 (sc->sc_iot, sc->sc_ioh, i); - AM930_DELAY(5); - } - printf("am79c930: regdump:"); - for (i=0; i<8; i++) { - printf(" %02x", buf[i]); - } - printf("\n"); -} -#endif - -void am79c930_chip_init (sc, how) - struct am79c930_softc *sc; -{ - /* zero the bank select register, and leave it that way.. */ - bus_space_write_1(sc->sc_iot, sc->sc_ioh, AM79C930_BSS, 0); - if (how) - sc->sc_ops = &memspace_ops; - else - sc->sc_ops = &iospace_ops; -} - - diff --git a/sys/dev/awi/am79c930reg.h b/sys/dev/awi/am79c930reg.h deleted file mode 100644 index 64b3e239fab1..000000000000 --- a/sys/dev/awi/am79c930reg.h +++ /dev/null @@ -1,126 +0,0 @@ -/* $NetBSD: am79c930reg.h,v 1.3 2000/03/22 11:22:22 onoe Exp $ */ -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Bill Sommerfeld - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * Device register definitions gleaned from from the AMD "Am79C930 - * PCnet(tm)-Mobile Single Chip Wireless LAN Media Access Controller" - * data sheet, AMD Pub #20183, Rev B, amendment/0, issue date August 1997. - * - * As of 1999/10/23, this was available from AMD's web site in PDF - * form. - */ - - -/* - * The 79c930 contains a bus interface unit, a media access - * controller, and a tranceiver attachment interface. - * The MAC contains an 80188 CPU core. - * typical devices built around this chip typically add 32k or 64k of - * memory for buffers. - * - * The 80188 runs firmware which handles most of the 802.11 gorp, and - * communicates with the host using shared data structures in this - * memory; the specifics of the shared memory layout are not covered - * in this source file; see <dev/ic/am80211fw.h> for details of that layer. - */ - -/* - * Device Registers - */ - -#define AM79C930_IO_BASE 0 -#define AM79C930_IO_SIZE 16 -#define AM79C930_IO_SIZE_BIG 40 -#define AM79C930_IO_ALIGN 0x40 /* am79c930 decodes lower 6bits */ - - -#define AM79C930_GCR 0 /* General Config Register */ - -#define AM79C930_GCR_SWRESET 0x80 /* software reset */ -#define AM79C930_GCR_CORESET 0x40 /* core reset */ -#define AM79C930_GCR_DISPWDN 0x20 /* disable powerdown */ -#define AM79C930_GCR_ECWAIT 0x10 /* embedded controller wait */ -#define AM79C930_GCR_ECINT 0x08 /* interrupt from embedded ctrlr */ -#define AM79C930_GCR_INT2EC 0x04 /* interrupt to embedded ctrlr */ -#define AM79C930_GCR_ENECINT 0x02 /* enable interrupts from e.c. */ -#define AM79C930_GCR_DAM 0x01 /* direct access mode (read only) */ - -#define AM79C930_GCR_BITS "\020\1DAM\2ENECINT\3INT2EC\4ECINT\5ECWAIT\6DISPWDN\7CORESET\010SWRESET" - -#define AM79C930_BSS 1 /* Bank Switching Select register */ - -#define AM79C930_BSS_ECATR 0x80 /* E.C. ALE test read */ -#define AM79C930_BSS_FS 0x20 /* Flash Select */ -#define AM79C930_BSS_MBS 0x18 /* Memory Bank Select */ -#define AM79C930_BSS_EIOW 0x04 /* Expand I/O Window */ -#define AM79C930_BSS_TBS 0x03 /* TAI Bank Select */ - -#define AM79C930_LMA_LO 2 /* Local Memory Address register (low byte) */ - -#define AM79C930_LMA_HI 3 /* Local Memory Address register (high byte) */ - - /* set this bit to turn off ISAPnP version */ -#define AM79C930_LMA_HI_ISAPWRDWN 0x80 - -/* - * mmm, inconsistancy in chip documentation: - * According to page 79--80, all four of the following are equivalent - * and address the single byte pointed at by BSS_{FS,MBS} | LMA_{HI,LO} - * According to tables on p63 and p67, they're the LSB through MSB - * of a 32-bit word. - */ - -#define AM79C930_IODPA 4 /* I/O Data port A */ -#define AM79C930_IODPB 5 /* I/O Data port B */ -#define AM79C930_IODPC 6 /* I/O Data port C */ -#define AM79C930_IODPD 7 /* I/O Data port D */ - - -/* - * Tranceiver Attachment Interface Registers (TIR space) - * (omitted for now, since host access to them is for diagnostic - * purposes only). - */ - -/* - * memory space goo. - */ - -#define AM79C930_MEM_SIZE 0x8000 /* 32k */ -#define AM79C930_MEM_BASE 0x0 /* starting at 0 */ diff --git a/sys/dev/awi/am79c930var.h b/sys/dev/awi/am79c930var.h deleted file mode 100644 index 1e45c6817a9d..000000000000 --- a/sys/dev/awi/am79c930var.h +++ /dev/null @@ -1,79 +0,0 @@ -/* $NetBSD$ */ -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Bill Sommerfeld - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#define AM79C930_BUS_PCMCIA 1 -#define AM79C930_BUS_ISAPNP 2 /* not implemented */ - -struct am79c930_softc -{ - bus_space_tag_t sc_iot; - bus_space_handle_t sc_ioh; - - bus_space_tag_t sc_memt; - bus_space_handle_t sc_memh; - - struct am79c930_ops *sc_ops; - - int sc_bustype; -}; - -struct am79c930_ops -{ - void (*write_1) __P((struct am79c930_softc *, u_int32_t, u_int8_t)); - void (*write_2) __P((struct am79c930_softc *, u_int32_t, u_int16_t)); - void (*write_4) __P((struct am79c930_softc *, u_int32_t, u_int32_t)); - void (*write_bytes) __P((struct am79c930_softc *, u_int32_t, u_int8_t *, size_t)); - - u_int8_t (*read_1) __P((struct am79c930_softc *, u_int32_t)); - u_int16_t (*read_2) __P((struct am79c930_softc *, u_int32_t)); - u_int32_t (*read_4) __P((struct am79c930_softc *, u_int32_t)); - void (*read_bytes) __P((struct am79c930_softc *, u_int32_t, u_int8_t *, size_t)); -}; - -void am79c930_chip_init __P((struct am79c930_softc *sc, int)); - -void am79c930_gcr_setbits __P((struct am79c930_softc *sc, u_int8_t bits)); -void am79c930_gcr_clearbits __P((struct am79c930_softc *sc, u_int8_t bits)); - -u_int8_t am79c930_gcr_read __P((struct am79c930_softc *sc)); - -#define am79c930_hard_reset(sc) am79c930_gcr_setbits(sc, AM79C930_GCR_CORESET) -#define am79c930_hard_reset_off(sc) am79c930_gcr_clearbits(sc, AM79C930_GCR_CORESET) - - diff --git a/sys/dev/awi/awi_wep.c b/sys/dev/awi/awi_wep.c deleted file mode 100644 index a8f76ec793e0..000000000000 --- a/sys/dev/awi/awi_wep.c +++ /dev/null @@ -1,528 +0,0 @@ -/* $NetBSD: awi_wep.c,v 1.4 2000/08/14 11:28:03 onoe Exp $ */ -/* $FreeBSD$ */ - -/* - * Copyright (c) 2000 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Atsushi Onoe. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * WEP support framework for the awi driver. - * - * No actual encryption capability is provided here, but any can be added - * to awi_wep_algo table below. - * - * Note that IEEE802.11 specification states WEP uses RC4 with 40bit key, - * which is a proprietary encryption algorithm available under license - * from RSA Data Security Inc. Using another algorithm, includes null - * encryption provided here, the awi driver cannot be able to communicate - * with other stations. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/socket.h> -#include <sys/errno.h> -#include <sys/sockio.h> -#if defined(__FreeBSD__) && __FreeBSD__ >= 4 -#include <sys/bus.h> -#else -#include <sys/device.h> -#endif - -#include <net/if.h> -#include <net/if_dl.h> -#ifdef __FreeBSD__ -#include <net/ethernet.h> -#include <net/if_arp.h> -#else -#include <net/if_ether.h> -#endif -#include <net/if_media.h> -#include <net/if_ieee80211.h> - -#include <machine/cpu.h> -#include <machine/bus.h> -#ifdef __FreeBSD__ -#endif - -#ifdef __NetBSD__ -#include <dev/ic/am79c930reg.h> -#include <dev/ic/am79c930var.h> -#include <dev/ic/awireg.h> -#include <dev/ic/awivar.h> - -#include <crypto/arc4/arc4.h> -#endif - -#ifdef __FreeBSD__ -#include <dev/awi/am79c930reg.h> -#include <dev/awi/am79c930var.h> -#include <dev/awi/awireg.h> -#include <dev/awi/awivar.h> - -#include <crypto/rc4/rc4.h> -static __inline int -arc4_ctxlen(void) -{ - return sizeof(struct rc4_state); -} - -static __inline void -arc4_setkey(void *ctx, u_int8_t *key, int keylen) -{ - rc4_init(ctx, key, keylen); -} - -static __inline void -arc4_encrypt(void *ctx, u_int8_t *dst, u_int8_t *src, int len) -{ - rc4_crypt(ctx, src, dst, len); -} -#endif - -static void awi_crc_init __P((void)); -static u_int32_t awi_crc_update __P((u_int32_t crc, u_int8_t *buf, int len)); - -static int awi_null_ctxlen __P((void)); -static void awi_null_setkey __P((void *ctx, u_int8_t *key, int keylen)); -static void awi_null_copy __P((void *ctx, u_int8_t *dst, u_int8_t *src, int len)); - -/* XXX: the order should be known to wiconfig/user */ - -static struct awi_wep_algo awi_wep_algo[] = { -/* 0: no wep */ - { "no" }, /* dummy for no wep */ - -/* 1: normal wep (arc4) */ - { "arc4", arc4_ctxlen, arc4_setkey, - arc4_encrypt, arc4_encrypt }, - -/* 2: debug wep (null) */ - { "null", awi_null_ctxlen, awi_null_setkey, - awi_null_copy, awi_null_copy }, - /* dummy for wep without encryption */ -}; - -int -awi_wep_setnwkey(sc, nwkey) - struct awi_softc *sc; - struct ieee80211_nwkey *nwkey; -{ - int i, len, error; - u_int8_t keybuf[AWI_MAX_KEYLEN]; - - if (nwkey->i_defkid <= 0 || - nwkey->i_defkid > IEEE80211_WEP_NKID) - return EINVAL; - error = 0; - for (i = 0; i < IEEE80211_WEP_NKID; i++) { - if (nwkey->i_key[i].i_keydat == NULL) - continue; - len = nwkey->i_key[i].i_keylen; - if (len > sizeof(keybuf)) { - error = EINVAL; - break; - } - error = copyin(nwkey->i_key[i].i_keydat, keybuf, len); - if (error) - break; - error = awi_wep_setkey(sc, i, keybuf, len); - if (error) - break; - } - if (error == 0) { - sc->sc_wep_defkid = nwkey->i_defkid - 1; - error = awi_wep_setalgo(sc, nwkey->i_wepon); - if (error == 0 && sc->sc_enabled) { - awi_stop(sc); - error = awi_init(sc); - } - } - return error; -} - -int -awi_wep_getnwkey(sc, nwkey) - struct awi_softc *sc; - struct ieee80211_nwkey *nwkey; -{ - int i, len, error, suerr; - u_int8_t keybuf[AWI_MAX_KEYLEN]; - - nwkey->i_wepon = awi_wep_getalgo(sc); - nwkey->i_defkid = sc->sc_wep_defkid + 1; - /* do not show any keys to non-root user */ -#ifdef __FreeBSD__ - suerr = suser(curproc); -#else - suerr = suser(curproc->p_ucred, &curproc->p_acflag); -#endif - error = 0; - for (i = 0; i < IEEE80211_WEP_NKID; i++) { - if (nwkey->i_key[i].i_keydat == NULL) - continue; - if (suerr) { - error = suerr; - break; - } - len = sizeof(keybuf); - error = awi_wep_getkey(sc, i, keybuf, &len); - if (error) - break; - if (nwkey->i_key[i].i_keylen < len) { - error = ENOSPC; - break; - } - nwkey->i_key[i].i_keylen = len; - error = copyout(keybuf, nwkey->i_key[i].i_keydat, len); - if (error) - break; - } - return error; -} - -int -awi_wep_getalgo(sc) - struct awi_softc *sc; -{ - - if (sc->sc_wep_algo == NULL) - return 0; - return sc->sc_wep_algo - awi_wep_algo; -} - -int -awi_wep_setalgo(sc, algo) - struct awi_softc *sc; - int algo; -{ - struct awi_wep_algo *awa; - int ctxlen; - - awi_crc_init(); /* XXX: not belongs here */ - if (algo < 0 || algo > sizeof(awi_wep_algo)/sizeof(awi_wep_algo[0])) - return EINVAL; - awa = &awi_wep_algo[algo]; - if (awa->awa_name == NULL) - return EINVAL; - if (awa->awa_ctxlen == NULL) { - awa = NULL; - ctxlen = 0; - } else - ctxlen = awa->awa_ctxlen(); - if (sc->sc_wep_ctx != NULL) { - free(sc->sc_wep_ctx, M_DEVBUF); - sc->sc_wep_ctx = NULL; - } - if (ctxlen) { - sc->sc_wep_ctx = malloc(ctxlen, M_DEVBUF, M_NOWAIT); - if (sc->sc_wep_ctx == NULL) - return ENOMEM; - } - sc->sc_wep_algo = awa; - return 0; -} - -int -awi_wep_setkey(sc, kid, key, keylen) - struct awi_softc *sc; - int kid; - unsigned char *key; - int keylen; -{ - - if (kid < 0 || kid >= IEEE80211_WEP_NKID) - return EINVAL; - if (keylen < 0 || keylen + IEEE80211_WEP_IVLEN > AWI_MAX_KEYLEN) - return EINVAL; - sc->sc_wep_keylen[kid] = keylen; - if (keylen > 0) - memcpy(sc->sc_wep_key[kid] + IEEE80211_WEP_IVLEN, key, keylen); - return 0; -} - -int -awi_wep_getkey(sc, kid, key, keylen) - struct awi_softc *sc; - int kid; - unsigned char *key; - int *keylen; -{ - - if (kid < 0 || kid >= IEEE80211_WEP_NKID) - return EINVAL; - if (*keylen < sc->sc_wep_keylen[kid]) - return ENOSPC; - *keylen = sc->sc_wep_keylen[kid]; - if (*keylen > 0) - memcpy(key, sc->sc_wep_key[kid] + IEEE80211_WEP_IVLEN, *keylen); - return 0; -} - -struct mbuf * -awi_wep_encrypt(sc, m0, txflag) - struct awi_softc *sc; - struct mbuf *m0; - int txflag; -{ - struct mbuf *m, *n, *n0; - struct ieee80211_frame *wh; - struct awi_wep_algo *awa; - int left, len, moff, noff, keylen, kid; - u_int32_t iv, crc; - u_int8_t *key, *ivp; - void *ctx; - u_int8_t crcbuf[IEEE80211_WEP_CRCLEN]; - - n0 = NULL; - awa = sc->sc_wep_algo; - if (awa == NULL) - goto fail; - ctx = sc->sc_wep_ctx; - m = m0; - left = m->m_pkthdr.len; - MGET(n, M_DONTWAIT, m->m_type); - n0 = n; - if (n == NULL) - goto fail; - M_COPY_PKTHDR(n, m); - len = IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN + IEEE80211_WEP_CRCLEN; - if (txflag) { - n->m_pkthdr.len += len; - } else { - n->m_pkthdr.len -= len; - left -= len; - } - n->m_len = MHLEN; - if (n->m_pkthdr.len >= MINCLSIZE) { - MCLGET(n, M_DONTWAIT); - if (n->m_flags & M_EXT) - n->m_len = n->m_ext.ext_size; - } - len = sizeof(struct ieee80211_frame); - memcpy(mtod(n, caddr_t), mtod(m, caddr_t), len); - left -= len; - moff = len; - noff = len; - if (txflag) { - kid = sc->sc_wep_defkid; - wh = mtod(n, struct ieee80211_frame *); - wh->i_fc[1] |= IEEE80211_FC1_WEP; - iv = random(); - /* - * store IV, byte order is not the matter since it's random. - * assuming IEEE80211_WEP_IVLEN is 3 - */ - ivp = mtod(n, u_int8_t *) + noff; - ivp[0] = (iv >> 16) & 0xff; - ivp[1] = (iv >> 8) & 0xff; - ivp[2] = iv & 0xff; - ivp[3] = kid & 0x03; /* clear pad and keyid */ - noff += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; - } else { - ivp = mtod(m, u_int8_t *) + moff; - moff += IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN; - kid = ivp[IEEE80211_WEP_IVLEN] & 0x03; - } - key = sc->sc_wep_key[kid]; - keylen = sc->sc_wep_keylen[kid]; - /* assuming IEEE80211_WEP_IVLEN is 3 */ - key[0] = ivp[0]; - key[1] = ivp[1]; - key[2] = ivp[2]; - awa->awa_setkey(ctx, key, IEEE80211_WEP_IVLEN + keylen); - - /* encrypt with calculating CRC */ - crc = ~0; - while (left > 0) { - len = m->m_len - moff; - if (len == 0) { - m = m->m_next; - moff = 0; - continue; - } - if (len > n->m_len - noff) { - len = n->m_len - noff; - if (len == 0) { - MGET(n->m_next, M_DONTWAIT, n->m_type); - if (n->m_next == NULL) - goto fail; - n = n->m_next; - n->m_len = MLEN; - if (left >= MINCLSIZE) { - MCLGET(n, M_DONTWAIT); - if (n->m_flags & M_EXT) - n->m_len = n->m_ext.ext_size; - } - noff = 0; - continue; - } - } - if (len > left) - len = left; - if (txflag) { - awa->awa_encrypt(ctx, mtod(n, caddr_t) + noff, - mtod(m, caddr_t) + moff, len); - crc = awi_crc_update(crc, mtod(m, caddr_t) + moff, len); - } else { - awa->awa_decrypt(ctx, mtod(n, caddr_t) + noff, - mtod(m, caddr_t) + moff, len); - crc = awi_crc_update(crc, mtod(n, caddr_t) + noff, len); - } - left -= len; - moff += len; - noff += len; - } - crc = ~crc; - if (txflag) { - LE_WRITE_4(crcbuf, crc); - if (n->m_len >= noff + sizeof(crcbuf)) - n->m_len = noff + sizeof(crcbuf); - else { - n->m_len = noff; - MGET(n->m_next, M_DONTWAIT, n->m_type); - if (n->m_next == NULL) - goto fail; - n = n->m_next; - n->m_len = sizeof(crcbuf); - noff = 0; - } - awa->awa_encrypt(ctx, mtod(n, caddr_t) + noff, crcbuf, - sizeof(crcbuf)); - } else { - n->m_len = noff; - for (noff = 0; noff < sizeof(crcbuf); noff += len) { - len = sizeof(crcbuf) - noff; - if (len > m->m_len - moff) - len = m->m_len - moff; - if (len > 0) - awa->awa_decrypt(ctx, crcbuf + noff, - mtod(m, caddr_t) + moff, len); - m = m->m_next; - moff = 0; - } - if (crc != LE_READ_4(crcbuf)) - goto fail; - } - m_freem(m0); - return n0; - - fail: - m_freem(m0); - m_freem(n0); - return NULL; -} - -/* - * CRC 32 -- routine from RFC 2083 - */ - -/* Table of CRCs of all 8-bit messages */ -static u_int32_t awi_crc_table[256]; -static int awi_crc_table_computed = 0; - -/* Make the table for a fast CRC. */ -static void -awi_crc_init() -{ - u_int32_t c; - int n, k; - - if (awi_crc_table_computed) - return; - for (n = 0; n < 256; n++) { - c = (u_int32_t)n; - for (k = 0; k < 8; k++) { - if (c & 1) - c = 0xedb88320UL ^ (c >> 1); - else - c = c >> 1; - } - awi_crc_table[n] = c; - } - awi_crc_table_computed = 1; -} - -/* - * Update a running CRC with the bytes buf[0..len-1]--the CRC - * should be initialized to all 1's, and the transmitted value - * is the 1's complement of the final running CRC - */ - -static u_int32_t -awi_crc_update(crc, buf, len) - u_int32_t crc; - u_int8_t *buf; - int len; -{ - u_int8_t *endbuf; - - for (endbuf = buf + len; buf < endbuf; buf++) - crc = awi_crc_table[(crc ^ *buf) & 0xff] ^ (crc >> 8); - return crc; -} - -/* - * Null -- do nothing but copy. - */ - -static int -awi_null_ctxlen() -{ - - return 0; -} - -static void -awi_null_setkey(ctx, key, keylen) - void *ctx; - u_char *key; - int keylen; -{ -} - -static void -awi_null_copy(ctx, dst, src, len) - void *ctx; - u_char *dst; - u_char *src; - int len; -{ - - memcpy(dst, src, len); -} diff --git a/sys/dev/awi/awi_wicfg.c b/sys/dev/awi/awi_wicfg.c deleted file mode 100644 index 80882ba3035a..000000000000 --- a/sys/dev/awi/awi_wicfg.c +++ /dev/null @@ -1,625 +0,0 @@ -/* $NetBSD: awi_wicfg.c,v 1.3 2000/07/06 17:22:25 onoe Exp $ */ -/* $FreeBSD$ */ - -/* - * Copyright (c) 2000 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Atsushi Onoe. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * WaveLAN compatible configuration support routines for the awi driver. - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/mbuf.h> -#include <sys/malloc.h> -#include <sys/socket.h> -#include <sys/errno.h> -#include <sys/sockio.h> -#if defined(__FreeBSD__) && __FreeBSD__ >= 4 -#include <sys/bus.h> -#else -#include <sys/device.h> -#endif - -#include <net/if.h> -#include <net/if_dl.h> -#ifdef __FreeBSD__ -#include <net/ethernet.h> -#include <net/if_arp.h> -#else -#include <net/if_ether.h> -#endif -#include <net/if_media.h> -#include <net/if_ieee80211.h> - -#include <machine/cpu.h> -#include <machine/bus.h> -#ifdef __FreeBSD__ -#endif - -#ifdef __NetBSD__ -#include <dev/ic/am79c930reg.h> -#include <dev/ic/am79c930var.h> -#include <dev/ic/awireg.h> -#include <dev/ic/awivar.h> - -#include <dev/pcmcia/if_wi_ieee.h> /* XXX */ -#endif -#ifdef __FreeBSD__ -#include <dev/awi/am79c930reg.h> -#include <dev/awi/am79c930var.h> - -#undef _KERNEL /* XXX */ -#include <i386/include/if_wavelan_ieee.h> /* XXX */ -#define _KERNEL /* XXX */ -#include <dev/awi/awireg.h> -#include <dev/awi/awivar.h> -#endif - -static int awi_cfgget __P((struct ifnet *ifp, u_long cmd, caddr_t data)); -static int awi_cfgset __P((struct ifnet *ifp, u_long cmd, caddr_t data)); - -int -awi_wicfg(ifp, cmd, data) - struct ifnet *ifp; - u_long cmd; - caddr_t data; -{ - int error; - - switch (cmd) { - case SIOCGWAVELAN: - error = awi_cfgget(ifp, cmd, data); - break; - case SIOCSWAVELAN: -#ifdef __FreeBSD__ - error = suser(curproc); -#else - error = suser(curproc->p_ucred, &curproc->p_acflag); -#endif - if (error) - break; - error = awi_cfgset(ifp, cmd, data); - break; - default: - error = EINVAL; - break; - } - return error; -} - -static int -awi_cfgget(ifp, cmd, data) - struct ifnet *ifp; - u_long cmd; - caddr_t data; -{ - int i, error, keylen; - char *p; - struct awi_softc *sc = (struct awi_softc *)ifp->if_softc; - struct ifreq *ifr = (struct ifreq *)data; - struct wi_ltv_keys *keys; - struct wi_key *k; - struct wi_req wreq; -#ifdef WICACHE - struct wi_sigcache wsc; - struct awi_bss *bp; -#endif /* WICACHE */ - - error = copyin(ifr->ifr_data, &wreq, sizeof(wreq)); - if (error) - return error; - switch (wreq.wi_type) { - case WI_RID_SERIALNO: - memcpy(wreq.wi_val, sc->sc_banner, AWI_BANNER_LEN); - wreq.wi_len = (AWI_BANNER_LEN + 1) / 2; - break; - case WI_RID_NODENAME: - strcpy((char *)&wreq.wi_val[1], hostname); - wreq.wi_val[0] = strlen(hostname); - wreq.wi_len = (1 + wreq.wi_val[0] + 1) / 2; - break; - case WI_RID_OWN_SSID: - p = sc->sc_ownssid; - wreq.wi_val[0] = p[1]; - memcpy(&wreq.wi_val[1], p + 2, p[1]); - wreq.wi_len = (1 + wreq.wi_val[0] + 1) / 2; - break; - case WI_RID_CURRENT_SSID: - if (ifp->if_flags & IFF_RUNNING) { - p = sc->sc_bss.essid; - wreq.wi_val[0] = p[1]; - memcpy(&wreq.wi_val[1], p + 2, p[1]); - } else { - wreq.wi_val[0] = 0; - wreq.wi_val[1] = '\0'; - } - wreq.wi_len = (1 + wreq.wi_val[0] + 1) / 2; - break; - case WI_RID_DESIRED_SSID: - p = sc->sc_mib_mac.aDesired_ESS_ID; - wreq.wi_val[0] = p[1]; - memcpy(&wreq.wi_val[1], p + 2, p[1]); - wreq.wi_len = (1 + wreq.wi_val[0] + 1) / 2; - break; - case WI_RID_CURRENT_BSSID: - if (ifp->if_flags & IFF_RUNNING) - memcpy(wreq.wi_val, sc->sc_bss.bssid, ETHER_ADDR_LEN); - else - memset(wreq.wi_val, 0, ETHER_ADDR_LEN); - wreq.wi_len = ETHER_ADDR_LEN / 2; - break; - case WI_RID_CHANNEL_LIST: - if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) { - wreq.wi_val[0] = sc->sc_scan_min; - wreq.wi_val[1] = sc->sc_scan_max; - wreq.wi_len = 2; - } else { - wreq.wi_val[0] = 0; - for (i = sc->sc_scan_min; i <= sc->sc_scan_max; i++) - wreq.wi_val[0] |= 1 << (i - 1); - wreq.wi_len = 1; - } - break; - case WI_RID_OWN_CHNL: - wreq.wi_val[0] = sc->sc_ownch; - wreq.wi_len = 1; - break; - case WI_RID_CURRENT_CHAN: - if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) - wreq.wi_val[0] = sc->sc_bss.pattern; - else - wreq.wi_val[0] = sc->sc_bss.chanset; - wreq.wi_len = 1; - break; - case WI_RID_COMMS_QUALITY: - wreq.wi_val[0] = 0; /* quality */ - wreq.wi_val[1] = sc->sc_bss.rssi; /* signal */ - wreq.wi_val[2] = 0; /* noise */ - wreq.wi_len = 3; - break; - case WI_RID_PROMISC: - wreq.wi_val[0] = sc->sc_mib_mac.aPromiscuous_Enable; - wreq.wi_len = 1; - break; - case WI_RID_PORTTYPE: - if (sc->sc_mib_local.Network_Mode) - wreq.wi_val[0] = 1; - else if (!sc->sc_no_bssid) - wreq.wi_val[0] = 2; - else - wreq.wi_val[0] = 3; - wreq.wi_len = 1; - break; - case WI_RID_MAC_NODE: - memcpy(wreq.wi_val, sc->sc_mib_addr.aMAC_Address, - ETHER_ADDR_LEN); - wreq.wi_len = ETHER_ADDR_LEN / 2; - break; - case WI_RID_TX_RATE: - case WI_RID_CUR_TX_RATE: - wreq.wi_val[0] = sc->sc_tx_rate / 10; - wreq.wi_len = 1; - break; - case WI_RID_RTS_THRESH: - wreq.wi_val[0] = LE_READ_2(&sc->sc_mib_mac.aRTS_Threshold); - wreq.wi_len = 1; - break; - case WI_RID_CREATE_IBSS: - wreq.wi_val[0] = sc->sc_start_bss; - wreq.wi_len = 1; - break; - case WI_RID_SYSTEM_SCALE: - wreq.wi_val[0] = 1; /* low density ... not supported */ - wreq.wi_len = 1; - break; - case WI_RID_PM_ENABLED: - wreq.wi_val[0] = sc->sc_mib_local.Power_Saving_Mode_Dis ? 0 : 1; - wreq.wi_len = 1; - break; - case WI_RID_MAX_SLEEP: - wreq.wi_val[0] = 0; /* not implemented */ - wreq.wi_len = 1; - break; - case WI_RID_WEP_AVAIL: - wreq.wi_val[0] = 1; - wreq.wi_len = 1; - break; - case WI_RID_ENCRYPTION: - wreq.wi_val[0] = awi_wep_getalgo(sc); - wreq.wi_len = 1; - break; - case WI_RID_TX_CRYPT_KEY: - wreq.wi_val[0] = sc->sc_wep_defkid; - wreq.wi_len = 1; - break; - case WI_RID_DEFLT_CRYPT_KEYS: - keys = (struct wi_ltv_keys *)&wreq; - /* do not show keys to non-root user */ -#ifdef __FreeBSD__ - error = suser(curproc); -#else - error = suser(curproc->p_ucred, &curproc->p_acflag); -#endif - if (error) { - memset(keys, 0, sizeof(*keys)); - error = 0; - break; - } - for (i = 0; i < IEEE80211_WEP_NKID; i++) { - k = &keys->wi_keys[i]; - keylen = sizeof(k->wi_keydat); - error = awi_wep_getkey(sc, i, k->wi_keydat, &keylen); - if (error) - break; - k->wi_keylen = keylen; - } - wreq.wi_len = sizeof(*keys) / 2; - break; - case WI_RID_MAX_DATALEN: - wreq.wi_val[0] = LE_READ_2(&sc->sc_mib_mac.aMax_Frame_Length); - wreq.wi_len = 1; - break; - case WI_RID_IFACE_STATS: - /* not implemented yet */ - wreq.wi_len = 0; - break; -#ifdef WICACHE - case WI_RID_READ_CACHE: - for (bp = TAILQ_FIRST(&sc->sc_scan), i = 0; - bp != NULL && i < MAXWICACHE; - bp = TAILQ_NEXT(bp, list), i++) { - memcpy(wsc.macsrc, bp->esrc, ETHER_ADDR_LEN); - /*XXX*/ - memcpy(&wsc.ipsrc, bp->bssid, sizeof(wsc.ipsrc)); - wsc.signal = bp->rssi; - wsc.noise = 0; - wsc.quality = 0; - memcpy((caddr_t)wreq.wi_val + sizeof(wsc) * i, - &wsc, sizeof(wsc)); - } - wreq.wi_len = sizeof(wsc) * i / 2; - break; -#endif /* WICACHE */ - default: - error = EINVAL; - break; - } - if (error == 0) { - wreq.wi_len++; - error = copyout(&wreq, ifr->ifr_data, sizeof(wreq)); - } - return error; -} - -static int -awi_cfgset(ifp, cmd, data) - struct ifnet *ifp; - u_long cmd; - caddr_t data; -{ - int i, error, rate, oregion; - u_int8_t *phy_rates; - struct awi_softc *sc = (struct awi_softc *)ifp->if_softc; - struct ifreq *ifr = (struct ifreq *)data; - struct wi_ltv_keys *keys; - struct wi_key *k; - struct wi_req wreq; - - error = copyin(ifr->ifr_data, &wreq, sizeof(wreq)); - if (error) - return error; - if (wreq.wi_len-- < 1) - return EINVAL; - switch (wreq.wi_type) { - case WI_RID_SERIALNO: - case WI_RID_NODENAME: - error = EPERM; - break; - case WI_RID_OWN_SSID: - if (wreq.wi_len < (1 + wreq.wi_val[0] + 1) / 2) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] > IEEE80211_NWID_LEN) { - error = EINVAL; - break; - } - memset(sc->sc_ownssid, 0, AWI_ESS_ID_SIZE); - sc->sc_ownssid[0] = IEEE80211_ELEMID_SSID; - sc->sc_ownssid[1] = wreq.wi_val[0]; - memcpy(&sc->sc_ownssid[2], &wreq.wi_val[1], wreq.wi_val[0]); - if (!sc->sc_mib_local.Network_Mode && - !sc->sc_no_bssid && sc->sc_start_bss) - error = ENETRESET; - break; - case WI_RID_CURRENT_SSID: - error = EPERM; - break; - case WI_RID_DESIRED_SSID: - if (wreq.wi_len < (1 + wreq.wi_val[0] + 1) / 2) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] > IEEE80211_NWID_LEN) { - error = EINVAL; - break; - } - memset(sc->sc_mib_mac.aDesired_ESS_ID, 0, AWI_ESS_ID_SIZE); - sc->sc_mib_mac.aDesired_ESS_ID[0] = IEEE80211_ELEMID_SSID; - sc->sc_mib_mac.aDesired_ESS_ID[1] = wreq.wi_val[0]; - memcpy(&sc->sc_mib_mac.aDesired_ESS_ID[2], &wreq.wi_val[1], - wreq.wi_val[0]); - if (sc->sc_mib_local.Network_Mode || !sc->sc_no_bssid) - error = ENETRESET; - break; - case WI_RID_CURRENT_BSSID: - error = EPERM; - break; - case WI_RID_CHANNEL_LIST: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - oregion = sc->sc_mib_phy.aCurrent_Reg_Domain; - if (wreq.wi_val[0] == oregion) - break; - sc->sc_mib_phy.aCurrent_Reg_Domain = wreq.wi_val[0]; - error = awi_init_region(sc); - if (error) { - sc->sc_mib_phy.aCurrent_Reg_Domain = oregion; - break; - } - error = ENETRESET; - break; - case WI_RID_OWN_CHNL: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] < sc->sc_scan_min || - wreq.wi_val[0] > sc->sc_scan_max) { - error = EINVAL; - break; - } - sc->sc_ownch = wreq.wi_val[0]; - if (!sc->sc_mib_local.Network_Mode) - error = ENETRESET; - break; - case WI_RID_CURRENT_CHAN: - error = EPERM; - break; - case WI_RID_COMMS_QUALITY: - error = EPERM; - break; - case WI_RID_PROMISC: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - if (ifp->if_flags & IFF_PROMISC) { - if (wreq.wi_val[0] == 0) { - ifp->if_flags &= ~IFF_PROMISC; - error = ENETRESET; - } - } else { - if (wreq.wi_val[0] != 0) { - ifp->if_flags |= IFF_PROMISC; - error = ENETRESET; - } - } - break; - case WI_RID_PORTTYPE: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - switch (wreq.wi_val[0]) { - case 1: - sc->sc_mib_local.Network_Mode = 1; - sc->sc_no_bssid = 0; - error = ENETRESET; - break; - case 2: - sc->sc_mib_local.Network_Mode = 0; - sc->sc_no_bssid = 0; - error = ENETRESET; - break; - case 3: - if (sc->sc_mib_phy.IEEE_PHY_Type == AWI_PHY_TYPE_FH) { - error = EINVAL; - break; - } - sc->sc_mib_local.Network_Mode = 0; - sc->sc_no_bssid = 1; - error = ENETRESET; - break; - default: - error = EINVAL; - break; - } - break; - case WI_RID_MAC_NODE: - /* XXX: should be implemented? */ - error = EPERM; - break; - case WI_RID_TX_RATE: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - phy_rates = sc->sc_mib_phy.aSuprt_Data_Rates; - switch (wreq.wi_val[0]) { - case 1: - case 2: - case 5: - case 11: - rate = wreq.wi_val[0] * 10; - if (rate == 50) - rate += 5; /*XXX*/ - break; - case 3: - case 6: - case 7: - /* auto rate */ - phy_rates = sc->sc_mib_phy.aSuprt_Data_Rates; - rate = AWI_RATE_1MBIT; - for (i = 0; i < phy_rates[1]; i++) { - if (AWI_80211_RATE(phy_rates[2 + i]) > rate) - rate = AWI_80211_RATE(phy_rates[2 + i]); - } - break; - default: - rate = 0; - error = EINVAL; - break; - } - if (error) - break; - for (i = 0; i < phy_rates[1]; i++) { - if (rate == AWI_80211_RATE(phy_rates[2 + i])) - break; - } - if (i == phy_rates[1]) { - error = EINVAL; - break; - } - sc->sc_tx_rate = rate; - break; - case WI_RID_CUR_TX_RATE: - error = EPERM; - break; - case WI_RID_RTS_THRESH: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - LE_WRITE_2(&sc->sc_mib_mac.aRTS_Threshold, wreq.wi_val[0]); - error = ENETRESET; - break; - case WI_RID_CREATE_IBSS: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - sc->sc_start_bss = wreq.wi_val[0] ? 1 : 0; - error = ENETRESET; - break; - case WI_RID_SYSTEM_SCALE: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] != 1) - error = EINVAL; /* not supported */ - break; - case WI_RID_PM_ENABLED: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] != 0) - error = EINVAL; /* not implemented */ - break; - case WI_RID_MAX_SLEEP: - error = EINVAL; /* not implemented */ - break; - case WI_RID_WEP_AVAIL: - error = EPERM; - break; - case WI_RID_ENCRYPTION: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - error = awi_wep_setalgo(sc, wreq.wi_val[0]); - if (error) - break; - error = ENETRESET; - break; - case WI_RID_TX_CRYPT_KEY: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] >= IEEE80211_WEP_NKID) { - error = EINVAL; - break; - } - sc->sc_wep_defkid = wreq.wi_val[1]; - break; - case WI_RID_DEFLT_CRYPT_KEYS: - if (wreq.wi_len != sizeof(*keys) / 2) { - error = EINVAL; - break; - } - keys = (struct wi_ltv_keys *)&wreq; - for (i = 0; i < IEEE80211_WEP_NKID; i++) { - k = &keys->wi_keys[i]; - error = awi_wep_setkey(sc, i, k->wi_keydat, - k->wi_keylen); - if (error) - break; - } - break; - case WI_RID_MAX_DATALEN: - if (wreq.wi_len != 1) { - error = EINVAL; - break; - } - if (wreq.wi_val[0] < 350 || wreq.wi_val[0] > 2304) { - error = EINVAL; - break; - } - LE_WRITE_2(&sc->sc_mib_mac.aMax_Frame_Length, wreq.wi_val[0]); - break; - case WI_RID_IFACE_STATS: - error = EPERM; - break; - default: - error = EINVAL; - break; - } - if (error == ENETRESET) { - if (sc->sc_enabled) { - awi_stop(sc); - error = awi_init(sc); - } else - error = 0; - } - return error; -} diff --git a/sys/dev/awi/awireg.h b/sys/dev/awi/awireg.h deleted file mode 100644 index dc936eb730ec..000000000000 --- a/sys/dev/awi/awireg.h +++ /dev/null @@ -1,460 +0,0 @@ -/* $NetBSD: awireg.h,v 1.3 2000/03/22 11:22:22 onoe Exp $ */ -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Bill Sommerfeld - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* - * The firmware typically loaded onto Am79C930-based 802.11 interfaces - * uses a 32k or larger shared memory buffer to communicate with the - * host. - * - * Depending on the exact configuration of the device, this buffer may - * either be mapped into PCMCIA memory space, or accessible a byte at - * a type through PCMCIA I/O space. - * - * This header defines offsets into this shared memory. - */ - - -/* - * LAST_TXD block. 5 32-bit words. - * - * There are five different output queues; this defines pointers to - * the last completed descriptor for each one. - */ -#define AWI_LAST_TXD 0x3ec /* last completed Tx Descr */ - -#define AWI_LAST_BCAST_TXD AWI_LAST_TXD+0 -#define AWI_LAST_MGT_TXD AWI_LAST_TXD+4 -#define AWI_LAST_DATA_TXD AWI_LAST_TXD+8 -#define AWI_LAST_PS_POLL_TXD AWI_LAST_TXD+12 -#define AWI_LAST_CF_POLL_TXD AWI_LAST_TXD+16 - -/* - * Banner block; null-terminated string. - * - * The doc says it contains - * "PCnetMobile:v2.00 mmddyy APIx.x\0" - */ - -#define AWI_BANNER 0x480 /* Version string */ -#define AWI_BANNER_LEN 0x20 - -/* - * Command block protocol: - * write command byte to a zero value. - * write command status to a zero value. - * write arguments to AWI_COMMAND_PARAMS - * write command byte to a non-zero value. - * wait for command status to be non-zero. - * write command byte to a zero value. - * write command status to a zero value. - */ - -#define AWI_CMD 0x4a0 /* Command opcode byte */ - -#define AWI_CMD_IDLE 0x0 -#define AWI_CMD_NOP 0x1 - -#define AWI_CMD_SET_MIB 0x2 -#define AWI_CMD_GET_MIB 0x9 - -#define AWI_CA_MIB_TYPE 0x0 -#define AWI_CA_MIB_SIZE 0x1 -#define AWI_CA_MIB_INDEX 0x2 -#define AWI_CA_MIB_DATA 0x4 - -#define AWI_MIB_LOCAL 0x0 -#define AWI_MIB_ADDR 0x2 -#define AWI_MIB_MAC 0x3 -#define AWI_MIB_STAT 0x4 -#define AWI_MIB_MGT 0x5 -#define AWI_MIB_DRVR 0x6 -#define AWI_MIB_PHY 0x7 - - -#define AWI_CMD_INIT_TX 0x3 - -#define AWI_CA_TX_LEN 0x14 -#define AWI_CA_TX_DATA 0x0 -#define AWI_CA_TX_MGT 0x4 -#define AWI_CA_TX_BCAST 0x8 -#define AWI_CA_TX_PS 0xc -#define AWI_CA_TX_CF 0x10 - -#define AWI_CMD_FLUSH_TX 0x4 - -#define AWI_CA_FTX_LEN 0x5 -#define AWI_CA_FTX_DATA 0x0 -#define AWI_CA_FTX_MGT 0x1 -#define AWI_CA_FTX_BCAST 0x2 -#define AWI_CA_FTX_PS 0x3 -#define AWI_CA_FTX_CF 0x4 - -#define AWI_CMD_INIT_RX 0x5 -#define AWI_CA_IRX_LEN 0x8 -#define AWI_CA_IRX_DATA_DESC 0x0 /* return */ -#define AWI_CA_IRX_PS_DESC 0x4 /* return */ - -#define AWI_CMD_KILL_RX 0x6 - -#define AWI_CMD_SLEEP 0x7 -#define AWI_CA_SLEEP_LEN 0x8 -#define AWI_CA_WAKEUP 0x0 /* uint64 */ - -#define AWI_CMD_WAKE 0x8 - -#define AWI_CMD_SCAN 0xa -#define AWI_CA_SCAN_LEN 0x6 -#define AWI_CA_SCAN_DURATION 0x0 -#define AWI_CA_SCAN_SET 0x2 -#define AWI_CA_SCAN_PATTERN 0x3 -#define AWI_CA_SCAN_IDX 0x4 -#define AWI_CA_SCAN_SUSP 0x5 - -#define AWI_CMD_SYNC 0xb -#define AWI_CA_SYNC_LEN 0x14 -#define AWI_CA_SYNC_SET 0x0 -#define AWI_CA_SYNC_PATTERN 0x1 -#define AWI_CA_SYNC_IDX 0x2 -#define AWI_CA_SYNC_STARTBSS 0x3 -#define AWI_CA_SYNC_DWELL 0x4 -#define AWI_CA_SYNC_MBZ 0x6 -#define AWI_CA_SYNC_TIMESTAMP 0x8 -#define AWI_CA_SYNC_REFTIME 0x10 - -#define AWI_CMD_RESUME 0xc - -#define AWI_CMD_STATUS 0x4a1 /* Command status */ - -#define AWI_STAT_IDLE 0x0 -#define AWI_STAT_OK 0x1 -#define AWI_STAT_BADCMD 0x2 -#define AWI_STAT_BADPARM 0x3 -#define AWI_STAT_NOTIMP 0x4 -#define AWI_STAT_BADRES 0x5 -#define AWI_STAT_BADMODE 0x6 - -#define AWI_ERROR_OFFSET 0x4a2 /* Offset to erroneous parameter */ -#define AWI_CMD_PARAMS 0x4a4 /* Command parameters */ - -#define AWI_CSB 0x4f0 /* Control/Status block */ - -#define AWI_SELFTEST 0x4f0 - -#define AWI_SELFTEST_INIT 0x00 /* initial */ -#define AWI_SELFTEST_FIRMCKSUM 0x01 /* firmware cksum running */ -#define AWI_SELFTEST_HARDWARE 0x02 /* hardware tests running */ -#define AWI_SELFTEST_MIB 0x03 /* mib initializing */ - -#define AWI_SELFTEST_MIB_FAIL 0xfa -#define AWI_SELFTEST_RADIO_FAIL 0xfb -#define AWI_SELFTEST_MAC_FAIL 0xfc -#define AWI_SELFTEST_FLASH_FAIL 0xfd -#define AWI_SELFTEST_RAM_FAIL 0xfe -#define AWI_SELFTEST_PASSED 0xff - -#define AWI_STA_STATE 0x4f1 - -#define AWI_STA_AP 0x20 /* acting as AP */ -#define AWI_STA_NOPSP 0x10 /* Power Saving disabled */ -#define AWI_STA_DOZE 0x08 /* about to go to sleep */ -#define AWI_STA_PSP 0x04 /* enable PSP */ -#define AWI_STA_RXEN 0x02 /* enable RX */ -#define AWI_STA_TXEN 0x01 /* enable TX */ - -#define AWI_INTSTAT 0x4f3 -#define AWI_INTMASK 0x4f4 - -/* Bits in AWI_INTSTAT/AWI_INTMASK */ - -#define AWI_INT_GROGGY 0x80 /* about to wake up */ -#define AWI_INT_CFP_ENDING 0x40 /* cont. free period ending */ -#define AWI_INT_DTIM 0x20 /* beacon outgoing */ -#define AWI_INT_CFP_START 0x10 /* cont. free period starting */ -#define AWI_INT_SCAN_CMPLT 0x08 /* scan complete */ -#define AWI_INT_TX 0x04 /* tx done */ -#define AWI_INT_RX 0x02 /* rx done */ -#define AWI_INT_CMD 0x01 /* cmd done */ - -/* - * The following are used to implement a locking protocol between host - * and MAC to protect the interrupt status and mask fields. - * - * driver: read lockout_host byte; if zero, set lockout_mac to non-zero, - * then reread lockout_host byte; if still zero, host has lock. - * if non-zero, clear lockout_mac, loop. - */ - -#define AWI_LOCKOUT_MAC 0x4f5 -#define AWI_LOCKOUT_HOST 0x4f6 - - -#define AWI_INTSTAT2 0x4f7 -#define AWI_INTMASK2 0x4fd - -/* Bits in AWI_INTSTAT2/INTMASK2 */ -#define AWI_INT2_RXMGT 0x80 /* mgt/ps recieved */ -#define AWI_INT2_RXDATA 0x40 /* data received */ -#define AWI_INT2_TXMGT 0x10 /* mgt tx done */ -#define AWI_INT2_TXCF 0x08 /* CF tx done */ -#define AWI_INT2_TXPS 0x04 /* PS tx done */ -#define AWI_INT2_TXBCAST 0x02 /* Broadcast tx done */ -#define AWI_INT2_TXDATA 0x01 /* data tx done */ - -#define AWI_DIS_PWRDN 0x4fc /* disable powerdown if set */ - -#define AWI_DRIVERSTATE 0x4fe /* driver state */ - -#define AWI_DRV_STATEMASK 0x0f - -#define AWI_DRV_RESET 0x0 -#define AWI_DRV_INFSY 0x1 /* inf synced */ -#define AWI_DRV_ADHSC 0x2 /* adhoc scan */ -#define AWI_DRV_ADHSY 0x3 /* adhoc synced */ -#define AWI_DRV_INFSC 0x4 /* inf scanning */ -#define AWI_DRV_INFAUTH 0x5 /* inf authed */ -#define AWI_DRV_INFASSOC 0x6 /* inf associated */ -#define AWI_DRV_INFTOSS 0x7 /* inf handoff */ -#define AWI_DRV_APNONE 0x8 /* AP activity: no assoc */ -#define AWI_DRV_APQUIET 0xc /* AP: >=one assoc, no traffic */ -#define AWI_DRV_APLO 0xd /* AP: >=one assoc, light tfc */ -#define AWI_DRV_APMED 0xe /* AP: >=one assoc, mod tfc */ -#define AWI_DRV_APHIGH 0xf /* AP: >=one assoc, heavy tfc */ - -#define AWI_DRV_AUTORXLED 0x10 -#define AWI_DRV_AUTOTXLED 0x20 -#define AWI_DRV_RXLED 0x40 -#define AWI_DRV_TXLED 0x80 - -#define AWI_VBM 0x500 /* Virtual Bit Map */ - -#define AWI_BUFFERS 0x600 /* Buffers */ -#define AWI_BUFFERS_END 0x6000 - -/* - * Receive descriptors; there are a linked list of these chained - * through the "NEXT" fields, starting from XXX - */ - -#define AWI_RXD_SIZE 0x18 - -#define AWI_RXD_NEXT 0x4 -#define AWI_RXD_NEXT_LAST 0x80000000 - - -#define AWI_RXD_HOST_DESC_STATE 0x9 - -#define AWI_RXD_ST_OWN 0x80 /* host owns this */ -#define AWI_RXD_ST_CONSUMED 0x40 /* host is done */ -#define AWI_RXD_ST_LF 0x20 /* last frag */ -#define AWI_RXD_ST_CRC 0x08 /* CRC error */ -#define AWI_RXD_ST_OFLO 0x02 /* possible buffer overrun */ -#define AWI_RXD_ST_RXERROR 0x01 /* this frame is borked; discard me */ - -#define AWI_RXD_RSSI 0xa /* 1 byte: radio strength indicator */ -#define AWI_RXD_INDEX 0xb /* 1 byte: FH hop index or DS channel */ -#define AWI_RXD_LOCALTIME 0xc /* 4 bytes: local time of RX */ -#define AWI_RXD_START_FRAME 0x10 /* 4 bytes: ptr to first received byte */ -#define AWI_RXD_LEN 0x14 /* 2 bytes: rx len in bytes */ -#define AWI_RXD_RATE 0x16 /* 1 byte: rx rate in 1e5 bps */ - -/* - * Transmit descriptors. - */ - -#define AWI_TXD_SIZE 0x18 - -#define AWI_TXD_START 0x00 /* pointer to start of frame */ -#define AWI_TXD_NEXT 0x04 /* pointer to next TXD */ -#define AWI_TXD_LENGTH 0x08 /* length of frame */ -#define AWI_TXD_STATE 0x0a /* state */ - -#define AWI_TXD_ST_OWN 0x80 /* MAC owns this */ -#define AWI_TXD_ST_DONE 0x40 /* MAC is done */ -#define AWI_TXD_ST_REJ 0x20 /* MAC doesn't like */ -#define AWI_TXD_ST_MSDU 0x10 /* MSDU timeout */ -#define AWI_TXD_ST_ABRT 0x08 /* TX aborted */ -#define AWI_TXD_ST_RETURNED 0x04 /* TX returned */ -#define AWI_TXD_ST_RETRY 0x02 /* TX retries exceeded */ -#define AWI_TXD_ST_ERROR 0x01 /* TX error */ - -#define AWI_TXD_RATE 0x0b /* rate */ - -#define AWI_RATE_1MBIT 10 -#define AWI_RATE_2MBIT 20 - -#define AWI_TXD_NDA 0x0c /* num DIFS attempts */ -#define AWI_TXD_NDF 0x0d /* num DIFS failures */ -#define AWI_TXD_NSA 0x0e /* num SIFS attempts */ -#define AWI_TXD_NSF 0x0f /* num SIFS failures */ - -#define AWI_TXD_NRA 0x14 /* num RTS attempts */ -#define AWI_TXD_NDTA 0x15 /* num data attempts */ -#define AWI_TXD_CTL 0x16 /* control */ - -#define AWI_TXD_CTL_PSN 0x80 /* preserve sequence in MAC frame */ -#define AWI_TXD_CTL_BURST 0x02 /* host is doing 802.11 fragmt. */ -#define AWI_TXD_CTL_FRAGS 0x01 /* override normal fragmentation */ - -/* - * MIB structures. - */ - -#define AWI_ESS_ID_SIZE (IEEE80211_NWID_LEN+2) -struct awi_mib_local { - u_int8_t Fragmentation_Dis; - u_int8_t Add_PLCP_Dis; - u_int8_t MAC_Hdr_Prsv; - u_int8_t Rx_Mgmt_Que_En; - u_int8_t Re_Assembly_Dis; - u_int8_t Strip_PLCP_Dis; - u_int8_t Rx_Error_Dis; - u_int8_t Power_Saving_Mode_Dis; - u_int8_t Accept_All_Multicast_Dis; - u_int8_t Check_Seq_Cntl_Dis; - u_int8_t Flush_CFP_Queue_On_CF_End; - u_int8_t Network_Mode; - u_int8_t PWD_Lvl; - u_int8_t CFP_Mode; - u_int8_t Tx_Buffer_Offset[4]; - u_int8_t Tx_Buffer_Size[4]; - u_int8_t Rx_Buffer_Offset[4]; - u_int8_t Rx_Buffer_Size[4]; - u_int8_t Acting_as_AP; - u_int8_t Fill_CFP; -}; - -struct awi_mib_mac { - u_int8_t _Reserved1[2]; - u_int8_t _Reserved2[2]; - u_int8_t aRTS_Threshold[2]; - u_int8_t aCW_max[2]; - u_int8_t aCW_min[2]; - u_int8_t aPromiscuous_Enable; - u_int8_t _Reserved3; - u_int8_t _Reserved4[4]; - u_int8_t aShort_Retry_Limit; - u_int8_t aLong_Retry_Limit; - u_int8_t aMax_Frame_Length[2]; - u_int8_t aFragmentation_Threshold[2]; - u_int8_t aProbe_Delay[2]; - u_int8_t aMin_Probe_Response_Time[2]; - u_int8_t aMax_Probe_Response_Time[2]; - u_int8_t aMax_Transmit_MSDU_Lifetime[4]; - u_int8_t aMax_Receive_MSDU_Lifetime[4]; - u_int8_t aStation_Basic_Rate[2]; - u_int8_t aDesired_ESS_ID[AWI_ESS_ID_SIZE]; -}; - -struct awi_mib_stat { - u_int8_t aTransmitted_MPDU_Count[4]; - u_int8_t aTransmitted_MSDU_Count[4]; - u_int8_t aOctets_Transmitted_Cnt[4]; - u_int8_t aMulticast_Transmitted_Frame_Count[2]; - u_int8_t aBroadcast_Transmitted_Frame_Count[2]; - u_int8_t aFailed_Count[4]; - u_int8_t aRetry_Count[4]; - u_int8_t aMultiple_Retry_Count[4]; - u_int8_t aFrame_Duplicate_Count[4]; - u_int8_t aRTS_Success_Count[4]; - u_int8_t aRTS_Failure_Count[4]; - u_int8_t aACK_Failure_Count[4]; - u_int8_t aReceived_Frame_Count [4]; - u_int8_t aOctets_Received_Count[4]; - u_int8_t aMulticast_Received_Count[2]; - u_int8_t aBroadcast_Received_Count[2]; - u_int8_t aFCS_Error_Count[4]; - u_int8_t aError_Count[4]; - u_int8_t aWEP_Undecryptable_Count[4]; -}; - -struct awi_mib_mgt { - u_int8_t aPower_Mgt_Mode; - u_int8_t aScan_Mode; -#define AWI_SCAN_PASSIVE 0x00 -#define AWI_SCAN_ACTIVE 0x01 -#define AWI_SCAN_BACKGROUND 0x02 - u_int8_t aScan_State; - u_int8_t aDTIM_Period; - u_int8_t aATIM_Window[2]; - u_int8_t Wep_Required; - u_int8_t _Reserved1; - u_int8_t aBeacon_Period[2]; - u_int8_t aPassive_Scan_Duration[2]; - u_int8_t aListen_Interval[2]; - u_int8_t aMedium_Occupancy_Limit[2]; - u_int8_t aMax_MPDU_Time[2]; - u_int8_t aCFP_Max_Duration[2]; - u_int8_t aCFP_Rate; - u_int8_t Do_Not_Receive_DTIMs; - u_int8_t aStation_ID[2]; - u_int8_t aCurrent_BSS_ID[ETHER_ADDR_LEN]; - u_int8_t aCurrent_ESS_ID[AWI_ESS_ID_SIZE]; -}; - -#define AWI_GROUP_ADDR_SIZE 4 -struct awi_mib_addr { - u_int8_t aMAC_Address[ETHER_ADDR_LEN]; - u_int8_t aGroup_Addresses[AWI_GROUP_ADDR_SIZE][ETHER_ADDR_LEN]; - u_int8_t aTransmit_Enable_Status; - u_int8_t _Reserved1; -}; - -#define AWI_PWR_LEVEL_SIZE 4 -struct awi_mib_phy { - u_int8_t aSlot_Time[2]; - u_int8_t aSIFS[2]; - u_int8_t aMPDU_Maximum[2]; - u_int8_t aHop_Time[2]; - u_int8_t aSuprt_Data_Rates[4]; - u_int8_t aCurrent_Reg_Domain; -#define AWI_REG_DOMAIN_US 0x10 -#define AWI_REG_DOMAIN_CA 0x20 -#define AWI_REG_DOMAIN_EU 0x30 -#define AWI_REG_DOMAIN_ES 0x31 -#define AWI_REG_DOMAIN_FR 0x32 -#define AWI_REG_DOMAIN_JP 0x40 - u_int8_t aPreamble_Lngth; - u_int8_t aPLCP_Hdr_Lngth; - u_int8_t Pwr_Up_Time[AWI_PWR_LEVEL_SIZE][2]; - u_int8_t IEEE_PHY_Type; -#define AWI_PHY_TYPE_FH 1 -#define AWI_PHY_TYPE_DS 2 -#define AWI_PHY_TYPE_IR 3 - u_int8_t RCR_33A_Bits[8]; -}; diff --git a/sys/dev/awi/awivar.h b/sys/dev/awi/awivar.h deleted file mode 100644 index 8e86f841a006..000000000000 --- a/sys/dev/awi/awivar.h +++ /dev/null @@ -1,222 +0,0 @@ -/* $NetBSD: awivar.h,v 1.12 2000/07/21 04:48:56 onoe Exp $ */ -/* $FreeBSD$ */ - -/*- - * Copyright (c) 1999 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Bill Sommerfeld - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by the NetBSD - * Foundation, Inc. and its contributors. - * 4. Neither the name of The NetBSD Foundation nor the names of its - * contributors may be used to endorse or promote products derived - * from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/* timer values in msec */ -#define AWI_SELFTEST_TIMEOUT 5000 -#define AWI_CMD_TIMEOUT 2000 -#define AWI_LOCKOUT_TIMEOUT 50 -#define AWI_ASCAN_DURATION 100 -#define AWI_ASCAN_WAIT 3000 -#define AWI_PSCAN_DURATION 200 -#define AWI_PSCAN_WAIT 5000 -#define AWI_TRANS_TIMEOUT 2000 - -#define AWI_NTXBUFS 4 -#define AWI_MAX_KEYLEN 16 - -enum awi_status { - AWI_ST_INIT, - AWI_ST_SCAN, - AWI_ST_SETSS, - AWI_ST_SYNC, - AWI_ST_AUTH, - AWI_ST_ASSOC, - AWI_ST_RUNNING -}; - -struct awi_bss -{ - TAILQ_ENTRY(awi_bss) list; - u_int8_t esrc[ETHER_ADDR_LEN]; - u_int8_t chanset; /* channel set to use */ - u_int8_t pattern; /* hop pattern to use */ - u_int8_t index; /* index to use */ - u_int8_t rssi; /* strength of this beacon */ - u_int16_t dwell_time; /* dwell time */ - u_int8_t timestamp[8]; /* timestamp of this bss */ - u_int8_t bssid[ETHER_ADDR_LEN]; - u_int16_t capinfo; - u_int32_t rxtime; /* unit's local time */ - u_int16_t interval; /* beacon interval */ - u_int8_t txrate; - u_int8_t fails; - u_int8_t essid[IEEE80211_NWID_LEN + 2]; -}; - -struct awi_wep_algo { - char *awa_name; - int (*awa_ctxlen) __P((void)); - void (*awa_setkey) __P((void *, u_char *, int)); - void (*awa_encrypt) __P((void *, u_char *, u_char *, int)); - void (*awa_decrypt) __P((void *, u_char *, u_char *, int)); -}; - -struct awi_softc -{ -#ifdef __NetBSD__ - struct device sc_dev; - struct ethercom sc_ec; - void *sc_ih; /* interrupt handler */ -#endif -#ifdef __FreeBSD__ -#if __FreeBSD__ >= 4 - struct { - char dv_xname[64]; /*XXX*/ - } sc_dev; -#else - struct device sc_dev; -#endif - struct arpcom sc_ec; -#endif - struct am79c930_softc sc_chip; - struct ifnet *sc_ifp; - int (*sc_enable) __P((struct awi_softc *)); - void (*sc_disable) __P((struct awi_softc *)); - - struct ifmedia sc_media; - enum awi_status sc_status; - unsigned int sc_enabled:1, - sc_busy:1, - sc_cansleep:1, - sc_invalid:1, - sc_enab_intr:1, - sc_format_llc:1, - sc_start_bss:1, - sc_rawbpf:1, - sc_no_bssid:1, - sc_active_scan:1, - sc_attached:1; /* attach has succeeded */ - u_int8_t sc_cmd_inprog; - int sc_sleep_cnt; - - int sc_mgt_timer; - - TAILQ_HEAD(, awi_bss) sc_scan; - u_int8_t sc_scan_cur; - u_int8_t sc_scan_min; - u_int8_t sc_scan_max; - u_int8_t sc_scan_set; - struct awi_bss sc_bss; - u_int8_t sc_ownssid[IEEE80211_NWID_LEN + 2]; - u_int8_t sc_ownch; - - int sc_rx_timer; - u_int32_t sc_rxdoff; - u_int32_t sc_rxmoff; - struct mbuf *sc_rxpend; - - int sc_tx_timer; - u_int8_t sc_tx_rate; - struct ifqueue sc_mgtq; - u_int32_t sc_txbase; - u_int32_t sc_txend; - u_int32_t sc_txnext; - u_int32_t sc_txdone; - - int sc_wep_keylen[IEEE80211_WEP_NKID]; /* keylen */ - u_int8_t sc_wep_key[IEEE80211_WEP_NKID][AWI_MAX_KEYLEN]; - int sc_wep_defkid; - void *sc_wep_ctx; /* work area */ - struct awi_wep_algo *sc_wep_algo; - - u_char sc_banner[AWI_BANNER_LEN]; - struct awi_mib_local sc_mib_local; - struct awi_mib_addr sc_mib_addr; - struct awi_mib_mac sc_mib_mac; - struct awi_mib_stat sc_mib_stat; - struct awi_mib_mgt sc_mib_mgt; - struct awi_mib_phy sc_mib_phy; -}; - -#define awi_read_1(sc, off) ((sc)->sc_chip.sc_ops->read_1)(&sc->sc_chip, off) -#define awi_read_2(sc, off) ((sc)->sc_chip.sc_ops->read_2)(&sc->sc_chip, off) -#define awi_read_4(sc, off) ((sc)->sc_chip.sc_ops->read_4)(&sc->sc_chip, off) -#define awi_read_bytes(sc, off, ptr, len) ((sc)->sc_chip.sc_ops->read_bytes)(&sc->sc_chip, off, ptr, len) - -#define awi_write_1(sc, off, val) \ - ((sc)->sc_chip.sc_ops->write_1)(&sc->sc_chip, off, val) -#define awi_write_2(sc, off, val) \ - ((sc)->sc_chip.sc_ops->write_2)(&sc->sc_chip, off, val) -#define awi_write_4(sc, off, val) \ - ((sc)->sc_chip.sc_ops->write_4)(&sc->sc_chip, off, val) -#define awi_write_bytes(sc, off, ptr, len) \ - ((sc)->sc_chip.sc_ops->write_bytes)(&sc->sc_chip, off, ptr, len) - -#define awi_drvstate(sc, state) \ - awi_write_1(sc, AWI_DRIVERSTATE, \ - ((state) | AWI_DRV_AUTORXLED|AWI_DRV_AUTOTXLED)) - -/* unalligned little endian access */ -#define LE_READ_2(p) \ - (((u_int8_t *)(p))[0] | (((u_int8_t *)(p))[1] << 8)) -#define LE_READ_4(p) \ - (((u_int8_t *)(p))[0] | (((u_int8_t *)(p))[1] << 8) | \ - (((u_int8_t *)(p))[2] << 16) | (((u_int8_t *)(p))[3] << 24)) -#define LE_WRITE_2(p, v) \ - ((((u_int8_t *)(p))[0] = ((u_int32_t)(v) & 0xff)), \ - (((u_int8_t *)(p))[1] = (((u_int32_t)(v) >> 8) & 0xff))) -#define LE_WRITE_4(p, v) \ - ((((u_int8_t *)(p))[0] = ((u_int32_t)(v) & 0xff)), \ - (((u_int8_t *)(p))[1] = (((u_int32_t)(v) >> 8) & 0xff)), \ - (((u_int8_t *)(p))[2] = (((u_int32_t)(v) >> 16) & 0xff)), \ - (((u_int8_t *)(p))[3] = (((u_int32_t)(v) >> 24) & 0xff))) - -#define AWI_80211_RATE(rate) (((rate) & 0x7f) * 5) - -int awi_attach __P((struct awi_softc *)); -int awi_intr __P((void *)); -void awi_reset __P((struct awi_softc *)); -#ifdef __NetBSD__ -int awi_activate __P((struct device *, enum devact)); -int awi_detach __P((struct awi_softc *)); -void awi_power __P((struct awi_softc *, int)); -#endif - -void awi_stop __P((struct awi_softc *sc)); -int awi_init __P((struct awi_softc *sc)); -int awi_init_region __P((struct awi_softc *)); -int awi_wicfg __P((struct ifnet *, u_long, caddr_t)); - -int awi_wep_setnwkey __P((struct awi_softc *, struct ieee80211_nwkey *)); -int awi_wep_getnwkey __P((struct awi_softc *, struct ieee80211_nwkey *)); -int awi_wep_getalgo __P((struct awi_softc *)); -int awi_wep_setalgo __P((struct awi_softc *, int)); -int awi_wep_setkey __P((struct awi_softc *, int, unsigned char *, int)); -int awi_wep_getkey __P((struct awi_softc *, int, unsigned char *, int *)); -struct mbuf *awi_wep_encrypt __P((struct awi_softc *, struct mbuf *, int)); diff --git a/sys/dev/awi/if_awi_pccard.c b/sys/dev/awi/if_awi_pccard.c deleted file mode 100644 index be55de57cccf..000000000000 --- a/sys/dev/awi/if_awi_pccard.c +++ /dev/null @@ -1,250 +0,0 @@ -/* - * Copyright (c) 2000 Atsushi Onoe <onoe@sm.sony.co.jp> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/socket.h> - -#include <sys/module.h> -#include <sys/bus.h> - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/if_media.h> -#include <net/ethernet.h> -#include <net/if_ieee80211.h> - - -#include <dev/awi/am79c930reg.h> -#include <dev/awi/am79c930var.h> -#include <dev/awi/awireg.h> -#include <dev/awi/awivar.h> - -struct awi_pccard_softc { - struct awi_softc sc_awi; - - u_int8_t sc_version[AWI_BANNER_LEN]; - int sc_intr_mask; - void *sc_intrhand; - struct resource *sc_irq_res; - int sc_irq_rid; - struct resource *sc_port_res; - int sc_port_rid; - struct resource *sc_mem_res; - int sc_mem_rid; -}; - -/* - * Initialize the device - called from Slot manager. - */ -static int -awi_pccard_probe(device_t dev) -{ - struct awi_pccard_softc *psc = device_get_softc(dev); - struct awi_softc *sc = &psc->sc_awi; - int error = 0; - - psc->sc_port_rid = 0; - psc->sc_port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, - &psc->sc_port_rid, 0, ~0, 16, RF_ACTIVE); - if (!psc->sc_port_res) - return ENOMEM; - - sc->sc_chip.sc_iot = rman_get_bustag(psc->sc_port_res); - sc->sc_chip.sc_ioh = rman_get_bushandle(psc->sc_port_res); - am79c930_chip_init(&sc->sc_chip, 0); - DELAY(1000); - - awi_read_bytes(sc, AWI_BANNER, psc->sc_version, AWI_BANNER_LEN); - if (memcmp(psc->sc_version, "PCnetMobile:", 12) != 0) { - device_printf(dev, "awi_pccard_probe: bad banner: %12D\n", - psc->sc_version, " "); - error = ENXIO; - } else - device_set_desc(dev, psc->sc_version); - bus_release_resource(dev, SYS_RES_IOPORT, psc->sc_port_rid, - psc->sc_port_res); - - return error; -} - -static int -awi_pccard_attach(device_t dev) -{ - struct awi_pccard_softc *psc = device_get_softc(dev); - struct awi_softc *sc = &psc->sc_awi; - struct ifnet *ifp = &sc->sc_ec.ac_if; - int error = 0; - - psc->sc_port_res = 0; - psc->sc_irq_res = 0; - psc->sc_mem_res = 0; - psc->sc_intrhand = 0; - - ifp->if_name = device_get_name(dev); - ifp->if_unit = device_get_unit(dev); - if (ifp->if_name == NULL) { - printf("awi%d: awi_pccard_attach: cannot get device name\n", - device_get_unit(dev)); - goto fail; - } - snprintf(sc->sc_dev.dv_xname, sizeof(sc->sc_dev.dv_xname), - "%s%d", ifp->if_name, ifp->if_unit); - - psc->sc_port_rid = 0; - psc->sc_port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, - &psc->sc_port_rid, 0, ~0, 16, RF_ACTIVE); - if (!psc->sc_port_res) { - device_printf(dev, "awi_pccard_attach: port alloc failed\n"); - goto fail; - } - sc->sc_chip.sc_iot = rman_get_bustag(psc->sc_port_res); - sc->sc_chip.sc_ioh = rman_get_bushandle(psc->sc_port_res); - - psc->sc_irq_rid = 0; - psc->sc_irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, - &psc->sc_irq_rid, 0, ~0, 1, RF_ACTIVE); - if (!psc->sc_irq_res) { - device_printf(dev, "awi_pccard_attach: irq alloc failed\n"); - goto fail; - } - - psc->sc_mem_rid = 0; -#if 1 - /* - * XXX: awi needs to access memory with 8bit, - * but pccardd apparently maps memory with MDF_16BITS flag. - * So memory mapped access is disabled and use IO port instead. - */ - psc->sc_mem_res = 0; -#else - psc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, - &psc->sc_mem_rid, 0, ~0, 0x8000, RF_ACTIVE); -#endif - if (psc->sc_mem_res) { - sc->sc_chip.sc_memt = rman_get_bustag(psc->sc_mem_res); - sc->sc_chip.sc_memh = rman_get_bushandle(psc->sc_mem_res); - am79c930_chip_init(&sc->sc_chip, 1); - } else - am79c930_chip_init(&sc->sc_chip, 0); - - error = bus_setup_intr(dev, psc->sc_irq_res, INTR_TYPE_NET, - (void (*)(void *))awi_intr, sc, &psc->sc_intrhand); - if (error) { - device_printf(dev, "awi_pccard_attach: intr setup failed\n"); - goto fail; - } - - sc->sc_cansleep = 1; - sc->sc_enabled = 1; - sc->sc_ifp = &sc->sc_ec.ac_if; - - error = awi_attach(sc); - sc->sc_enabled = 0; /*XXX*/ - if (error == 0) - return 0; - device_printf(dev, "awi_pccard_attach: awi_attach failed\n"); - - fail: - if (psc->sc_intrhand) { - bus_teardown_intr(dev, psc->sc_irq_res, psc->sc_intrhand); - psc->sc_intrhand = 0; - } - if (psc->sc_port_res) { - bus_release_resource(dev, SYS_RES_IOPORT, psc->sc_port_rid, - psc->sc_port_res); - psc->sc_port_res = 0; - } - if (psc->sc_irq_res) { - bus_release_resource(dev, SYS_RES_IRQ, psc->sc_irq_rid, - psc->sc_irq_res); - psc->sc_irq_res = 0; - } - if (psc->sc_mem_res) { - bus_release_resource(dev, SYS_RES_MEMORY, psc->sc_mem_rid, - psc->sc_mem_res); - psc->sc_mem_res = 0; - } - if (error == 0) - error = ENXIO; - return error; -} - -static int -awi_pccard_detach(device_t dev) -{ - struct awi_pccard_softc *psc = device_get_softc(dev); - struct awi_softc *sc = &psc->sc_awi; - struct ifnet *ifp = &sc->sc_ec.ac_if; - - ether_ifdetach(ifp, ETHER_BPF_SUPPORTED); - ifp->if_flags &= ~IFF_RUNNING; - if (psc->sc_intrhand) { - bus_teardown_intr(dev, psc->sc_irq_res, psc->sc_intrhand); - psc->sc_intrhand = 0; - } - if (psc->sc_port_res) { - bus_release_resource(dev, SYS_RES_IOPORT, psc->sc_port_rid, - psc->sc_port_res); - psc->sc_port_res = 0; - } - if (psc->sc_irq_res) { - bus_release_resource(dev, SYS_RES_IRQ, psc->sc_irq_rid, - psc->sc_irq_res); - psc->sc_irq_res = 0; - } - if (psc->sc_mem_res) { - bus_release_resource(dev, SYS_RES_MEMORY, psc->sc_mem_rid, - psc->sc_mem_res); - psc->sc_mem_res = 0; - } - return 0; -} - -static device_method_t awi_pccard_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, awi_pccard_probe), - DEVMETHOD(device_attach, awi_pccard_attach), - DEVMETHOD(device_detach, awi_pccard_detach), - - { 0, 0 } -}; - -static driver_t awi_pccard_driver = { - "awi", - awi_pccard_methods, - sizeof(struct awi_pccard_softc), -}; - -extern devclass_t awi_devclass; - -DRIVER_MODULE(awi, pccard, awi_pccard_driver, awi_devclass, 0, 0); diff --git a/sys/dev/cs/if_csreg.h b/sys/dev/cs/if_csreg.h deleted file mode 100644 index e771156fe1f3..000000000000 --- a/sys/dev/cs/if_csreg.h +++ /dev/null @@ -1,544 +0,0 @@ -/* - * Copyright (c) 1997,1998 Maxim Bolotin and Oleg Sharoiko. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice unmodified, this list of conditions, and the following - * disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -/* - * $FreeBSD$ - */ - -#define CS_89x0_IO_PORTS 0x0020 - -#define PP_ChipID 0x0000 /* offset 0h -> Corp -ID */ - /* offset 2h -> Model/Product Number */ - /* offset 3h -> Chip Revision Number */ - -#define PP_ISAIOB 0x0020 /* IO base address */ -#define PP_CS8900_ISAINT 0x0022 /* ISA interrupt select */ -#define PP_CS8900_ISADMA 0x0024 /* ISA Rec DMA channel */ -#define PP_CS8920_ISAINT 0x0370 /* ISA interrupt select */ -#define PP_CS8920_ISADMA 0x0374 /* ISA Rec DMA channel */ -#define PP_ISASOF 0x0026 /* ISA DMA offset */ -#define PP_DmaFrameCnt 0x0028 /* ISA DMA Frame count */ -#define PP_DmaByteCnt 0x002A /* ISA DMA Byte count */ -#define PP_CS8920_ISAMemB 0x0348 /* Memory base */ - -/* EEPROM data and command registers */ -#define PP_EECMD 0x0040 /* NVR Interface Command register */ -#define PP_EEData 0x0042 /* NVR Interface Data Register */ -#define PP_DebugReg 0x0044 /* Debug Register */ - -#define PP_RxCFG 0x0102 /* Rx Bus config */ -#define PP_RxCTL 0x0104 /* Receive Control Register */ -#define PP_TxCFG 0x0106 /* Transmit Config Register */ -#define PP_TxCMD 0x0108 /* Transmit Command Register */ -#define PP_BufCFG 0x010A /* Bus configuration Register */ -#define PP_LineCTL 0x0112 /* Line Config Register */ -#define PP_SelfCTL 0x0114 /* Self Command Register */ -#define PP_BusCTL 0x0116 /* ISA bus control Register */ -#define PP_TestCTL 0x0118 /* Test Register */ -#define PP_AutoNegCTL 0x011C /* Auto Negotiation Ctrl */ - -#define PP_ISQ 0x0120 /* Interrupt Status */ -#define PP_RxEvent 0x0124 /* Rx Event Register */ -#define PP_TxEvent 0x0128 /* Tx Event Register */ -#define PP_BufEvent 0x012C /* Bus Event Register */ -#define PP_RxMiss 0x0130 /* Receive Miss Count */ -#define PP_TxCol 0x0132 /* Transmit Collision Count */ -#define PP_LineST 0x0134 /* Line State Register */ -#define PP_SelfST 0x0136 /* Self State register */ -#define PP_BusST 0x0138 /* Bus Status */ -#define PP_TDR 0x013C /* Time Domain Reflectometry */ -#define PP_AutoNegST 0x013E /* Auto Neg Status */ -#define PP_TxCommand 0x0144 /* Tx Command */ -#define PP_TxLength 0x0146 /* Tx Length */ -#define PP_LAF 0x0150 /* Hash Table */ -#define PP_IA 0x0158 /* Physical Address Register */ - -#define PP_RxStatus 0x0400 /* Receive start of frame */ -#define PP_RxLength 0x0402 /* Receive Length of frame */ -#define PP_RxFrame 0x0404 /* Receive frame pointer */ -#define PP_TxFrame 0x0A00 /* Transmit frame pointer */ - -/* - * Primary I/O Base Address. If no I/O base is supplied by the user, then this - * can be used as the default I/O base to access the PacketPage Area. - */ -#define DEFAULTIOBASE 0x0300 -#define FIRST_IO 0x020C /* First I/O port to check */ -#define LAST_IO 0x037C /* Last I/O port to check (+10h) */ -#define ADD_MASK 0x3000 /* Mask it use of the ADD_PORT register */ -#define ADD_SIG 0x3000 /* Expected ID signature */ - -#define CHIP_EISA_ID_SIG 0x630E /* Product ID Code for Crystal Chip (CS8900 spec 4.3) */ - -#define PRODUCT_ID_ADD 0x0002 /* Address of product ID */ - -/* Mask to find out the types of registers */ -#define REG_TYPE_MASK 0x001F - -/* Eeprom Commands */ -#define ERSE_WR_ENBL 0x00F0 -#define ERSE_WR_DISABLE 0x0000 - -/* Defines Control/Config register quintuplet numbers */ -#define RX_BUF_CFG 0x0003 -#define RX_CONTROL 0x0005 -#define TX_CFG 0x0007 -#define TX_COMMAND 0x0009 -#define BUF_CFG 0x000B -#define LINE_CONTROL 0x0013 -#define SELF_CONTROL 0x0015 -#define BUS_CONTROL 0x0017 -#define TEST_CONTROL 0x0019 - -/* Defines Status/Count registers quintuplet numbers */ -#define RX_EVENT 0x0004 -#define TX_EVENT 0x0008 -#define BUF_EVENT 0x000C -#define RX_MISS_COUNT 0x0010 -#define TX_COL_COUNT 0x0012 -#define LINE_STATUS 0x0014 -#define SELF_STATUS 0x0016 -#define BUS_STATUS 0x0018 -#define TDR 0x001C - -/* - * PP_RxCFG - Receive Configuration and Interrupt Mask - * bit definition - Read/write - */ -#define SKIP_1 0x0040 -#define RX_STREAM_ENBL 0x0080 -#define RX_OK_ENBL 0x0100 -#define RX_DMA_ONLY 0x0200 -#define AUTO_RX_DMA 0x0400 -#define BUFFER_CRC 0x0800 -#define RX_CRC_ERROR_ENBL 0x1000 -#define RX_RUNT_ENBL 0x2000 -#define RX_EXTRA_DATA_ENBL 0x4000 - -/* PP_RxCTL - Receive Control bit definition - Read/write */ -#define RX_IA_HASH_ACCEPT 0x0040 -#define RX_PROM_ACCEPT 0x0080 -#define RX_OK_ACCEPT 0x0100 -#define RX_MULTCAST_ACCEPT 0x0200 -#define RX_IA_ACCEPT 0x0400 -#define RX_BROADCAST_ACCEPT 0x0800 -#define RX_BAD_CRC_ACCEPT 0x1000 -#define RX_RUNT_ACCEPT 0x2000 -#define RX_EXTRA_DATA_ACCEPT 0x4000 -#define RX_ALL_ACCEPT (RX_PROM_ACCEPT | RX_BAD_CRC_ACCEPT | \ - RX_RUNT_ACCEPT | RX_EXTRA_DATA_ACCEPT) -/* - * Default receive mode - individually addressed, broadcast, and error free - */ -#define RX_DEF_ACCEPT (RX_IA_ACCEPT | RX_BROADCAST_ACCEPT | RX_OK_ACCEPT) - -/* - * PP_TxCFG - Transmit Configuration Interrupt Mask - * bit definition - Read/write - */ -#define TX_LOST_CRS_ENBL 0x0040 -#define TX_SQE_ERROR_ENBL 0x0080 -#define TX_OK_ENBL 0x0100 -#define TX_LATE_COL_ENBL 0x0200 -#define TX_JBR_ENBL 0x0400 -#define TX_ANY_COL_ENBL 0x0800 -#define TX_16_COL_ENBL 0x8000 - -/* - * PP_TxCMD - Transmit Command bit definition - Read-only - */ -#define TX_START_4_BYTES 0x0000 -#define TX_START_64_BYTES 0x0040 -#define TX_START_128_BYTES 0x0080 -#define TX_START_ALL_BYTES 0x00C0 -#define TX_FORCE 0x0100 -#define TX_ONE_COL 0x0200 -#define TX_TWO_PART_DEFF_DISABLE 0x0400 -#define TX_NO_CRC 0x1000 -#define TX_RUNT 0x2000 - -/* - * PP_BufCFG - Buffer Configuration Interrupt Mask - * bit definition - Read/write - */ -#define GENERATE_SW_INTERRUPT 0x0040 -#define RX_DMA_ENBL 0x0080 -#define READY_FOR_TX_ENBL 0x0100 -#define TX_UNDERRUN_ENBL 0x0200 -#define RX_MISS_ENBL 0x0400 -#define RX_128_BYTE_ENBL 0x0800 -#define TX_COL_COUNT_OVRFLOW_ENBL 0x1000 -#define RX_MISS_COUNT_OVRFLOW_ENBL 0x2000 -#define RX_DEST_MATCH_ENBL 0x8000 - -/* - * PP_LineCTL - Line Control bit definition - Read/write - */ -#define SERIAL_RX_ON 0x0040 -#define SERIAL_TX_ON 0x0080 -#define AUI_ONLY 0x0100 -#define AUTO_AUI_10BASET 0x0200 -#define MODIFIED_BACKOFF 0x0800 -#define NO_AUTO_POLARITY 0x1000 -#define TWO_PART_DEFDIS 0x2000 -#define LOW_RX_SQUELCH 0x4000 - -/* - * PP_SelfCTL - Software Self Control bit definition - Read/write - */ -#define POWER_ON_RESET 0x0040 -#define SW_STOP 0x0100 -#define SLEEP_ON 0x0200 -#define AUTO_WAKEUP 0x0400 -#define HCB0_ENBL 0x1000 -#define HCB1_ENBL 0x2000 -#define HCB0 0x4000 -#define HCB1 0x8000 - -/* - * PP_BusCTL - ISA Bus Control bit definition - Read/write - */ -#define RESET_RX_DMA 0x0040 -#define MEMORY_ON 0x0400 -#define DMA_BURST_MODE 0x0800 -#define IO_CHANNEL_READY_ON 0x1000 -#define RX_DMA_SIZE_64Ks 0x2000 -#define ENABLE_IRQ 0x8000 - -/* - * PP_TestCTL - Test Control bit definition - Read/write - */ -#define LINK_OFF 0x0080 -#define ENDEC_LOOPBACK 0x0200 -#define AUI_LOOPBACK 0x0400 -#define BACKOFF_OFF 0x0800 -#define FAST_TEST 0x8000 - -/* - * PP_RxEvent - Receive Event Bit definition - Read-only - */ -#define RX_IA_HASHED 0x0040 -#define RX_DRIBBLE 0x0080 -#define RX_OK 0x0100 -#define RX_HASHED 0x0200 -#define RX_IA 0x0400 -#define RX_BROADCAST 0x0800 -#define RX_CRC_ERROR 0x1000 -#define RX_RUNT 0x2000 -#define RX_EXTRA_DATA 0x4000 - -#define HASH_INDEX_MASK 0x0FC00 - -/* - * PP_TxEvent - Transmit Event Bit definition - Read-only - */ -#define TX_LOST_CRS 0x0040 -#define TX_SQE_ERROR 0x0080 -#define TX_OK 0x0100 -#define TX_LATE_COL 0x0200 -#define TX_JBR 0x0400 -#define TX_16_COL 0x8000 -#define TX_SEND_OK_BITS (TX_OK | TX_LOST_CRS) -#define TX_COL_COUNT_MASK 0x7800 - -/* - * PP_BufEvent - Buffer Event Bit definition - Read-only - */ -#define SW_INTERRUPT 0x0040 -#define RX_DMA 0x0080 -#define READY_FOR_TX 0x0100 -#define TX_UNDERRUN 0x0200 -#define RX_MISS 0x0400 -#define RX_128_BYTE 0x0800 -#define TX_COL_OVRFLW 0x1000 -#define RX_MISS_OVRFLW 0x2000 -#define RX_DEST_MATCH 0x8000 - -/* - * PP_LineST - Ethernet Line Status bit definition - Read-only - */ -#define LINK_OK 0x0080 -#define AUI_ON 0x0100 -#define TENBASET_ON 0x0200 -#define POLARITY_OK 0x1000 -#define CRS_OK 0x4000 - -/* - * PP_SelfST - Chip Software Status bit definition - */ -#define ACTIVE_33V 0x0040 -#define INIT_DONE 0x0080 -#define SI_BUSY 0x0100 -#define EEPROM_PRESENT 0x0200 -#define EEPROM_OK 0x0400 -#define EL_PRESENT 0x0800 -#define EE_SIZE_64 0x1000 - -/* - * PP_BusST - ISA Bus Status bit definition - */ -#define TX_BID_ERROR 0x0080 -#define READY_FOR_TX_NOW 0x0100 - -/* - * PP_AutoNegCTL - Auto Negotiation Control bit definition - */ -#define RE_NEG_NOW 0x0040 -#define ALLOW_FDX 0x0080 -#define AUTO_NEG_ENABLE 0x0100 -#define NLP_ENABLE 0x0200 -#define FORCE_FDX 0x8000 -#define AUTO_NEG_BITS (FORCE_FDX | NLP_ENABLE | AUTO_NEG_ENABLE) -#define AUTO_NEG_MASK (FORCE_FDX | NLP_ENABLE | AUTO_NEG_ENABLE | \ - ALLOW_FDX | RE_NEG_NOW) - -/* - * PP_AutoNegST - Auto Negotiation Status bit definition - */ -#define AUTO_NEG_BUSY 0x0080 -#define FLP_LINK 0x0100 -#define FLP_LINK_GOOD 0x0800 -#define LINK_FAULT 0x1000 -#define HDX_ACTIVE 0x4000 -#define FDX_ACTIVE 0x8000 - -/* - * The following block defines the ISQ event types - */ -#define ISQ_RECEIVER_EVENT 0x04 -#define ISQ_TRANSMITTER_EVENT 0x08 -#define ISQ_BUFFER_EVENT 0x0c -#define ISQ_RX_MISS_EVENT 0x10 -#define ISQ_TX_COL_EVENT 0x12 - -#define ISQ_EVENT_MASK 0x003F /* ISQ mask to find out type of event */ -#define ISQ_HIST 16 /* small history buffer */ -#define AUTOINCREMENT 0x8000 /* Bit mask to set bit-15 for autoincrement */ - -#define TXRXBUFSIZE 0x0600 -#define RXDMABUFSIZE 0x8000 -#define RXDMASIZE 0x4000 -#define TXRX_LENGTH_MASK 0x07FF - -/* rx options bits */ -#define RCV_WITH_RXON 1 /* Set SerRx ON */ -#define RCV_COUNTS 2 /* Use Framecnt1 */ -#define RCV_PONG 4 /* Pong respondent */ -#define RCV_DONG 8 /* Dong operation */ -#define RCV_POLLING 0x10 /* Poll RxEvent */ -#define RCV_ISQ 0x20 /* Use ISQ, int */ -#define RCV_AUTO_DMA 0x100 /* Set AutoRxDMAE */ -#define RCV_DMA 0x200 /* Set RxDMA only */ -#define RCV_DMA_ALL 0x400 /* Copy all DMA'ed */ -#define RCV_FIXED_DATA 0x800 /* Every frame same */ -#define RCV_IO 0x1000 /* Use ISA IO only */ -#define RCV_MEMORY 0x2000 /* Use ISA Memory */ - -#define RAM_SIZE 0x1000 /* The card has 4k bytes or RAM */ -#define PKT_START PP_TxFrame /* Start of packet RAM */ - -#define RX_FRAME_PORT 0x0000 -#define TX_FRAME_PORT RX_FRAME_PORT -#define TX_CMD_PORT 0x0004 -#define TX_CS8900_NOW 0x0000 /* Tx packet after 5 bytes copied */ -#define TX_CS8900_AFTER_381 0x0020 /* Tx packet after 381 bytes copied */ -#define TX_CS8900_AFTER_ALL 0x0060 /* Tx packet after all bytes copied */ -#define TX_CS8920_NOW 0x0000 /* Tx packet after 5 bytes copied */ -#define TX_CS8920_AFTER_381 0x0040 /* Tx packet after 381 bytes copied */ -#define TX_CS8920_AFTER_1021 0x0080 /* Tx packet after1021 bytes copied */ -#define TX_CS8920_AFTER_ALL 0x00C0 /* Tx packet after all bytes copied */ -#define TX_LEN_PORT 0x0006 -#define ISQ_PORT 0x0008 -#define ADD_PORT 0x000A -#define DATA_PORT 0x000C - -#define EEPROM_WRITE_EN 0x00F0 -#define EEPROM_WRITE_DIS 0x0000 -#define EEPROM_WRITE_CMD 0x0100 -#define EEPROM_READ_CMD 0x0200 - -/* Receive Header - * Description of header of each packet in receive area of memory - */ -#define RBUF_EVENT_LOW 0 /* Low byte of RxEvent - status of received frame */ -#define RBUF_EVENT_HIGH 1 /* High byte of RxEvent - status of received frame */ -#define RBUF_LEN_LOW 2 /* Length of received data - low byte */ -#define RBUF_LEN_HI 3 /* Length of received data - high byte */ -#define RBUF_HEAD_LEN 4 /* Length of this header */ - -#define CHIP_READ 0x1 /* Used to mark state of the repins code (chip or dma) */ -#define DMA_READ 0x2 /* Used to mark state of the repins code (chip or dma) */ - -/* for bios scan */ -/* */ -#ifdef CSDEBUG -/* use these values for debugging bios scan */ -#define BIOS_START_SEG 0x00000 -#define BIOS_OFFSET_INC 0x0010 -#else -#define BIOS_START_SEG 0x0c000 -#define BIOS_OFFSET_INC 0x0200 -#endif - -#define BIOS_LAST_OFFSET 0x0fc00 - -/* - * Byte offsets into the EEPROM configuration buffer - */ -#define ISA_CNF_OFFSET 0x6 -#define TX_CTL_OFFSET (ISA_CNF_OFFSET + 8) /* 8900 eeprom */ -#define AUTO_NEG_CNF_OFFSET (ISA_CNF_OFFSET + 8) /* 8920 eeprom */ - -/* - * the assumption here is that the bits in the eeprom are generally - * in the same position as those in the autonegctl register. - * Of course the IMM bit is not in that register so it must be - * masked out - */ -#define EE_FORCE_FDX 0x8000 -#define EE_NLP_ENABLE 0x0200 -#define EE_AUTO_NEG_ENABLE 0x0100 -#define EE_ALLOW_FDX 0x0080 -#define EE_AUTO_NEG_CNF_MASK (EE_FORCE_FDX | EE_NLP_ENABLE | \ - EE_AUTO_NEG_ENABLE | EE_ALLOW_FDX) - -#define IMM_BIT 0x0040 /* ignore missing media */ - -#define ADAPTER_CNF_OFFSET (AUTO_NEG_CNF_OFFSET + 2) -#define A_CNF_MEDIA 0x0007 -#define A_CNF_10B_T 0x0001 -#define A_CNF_AUI 0x0002 -#define A_CNF_10B_2 0x0004 -#define A_CNF_MEDIA_TYPE 0x0060 -#define A_CNF_MEDIA_AUTO 0x0000 -#define A_CNF_MEDIA_10B_T 0x0020 -#define A_CNF_MEDIA_AUI 0x0040 -#define A_CNF_MEDIA_10B_2 0x0060 -#define A_CNF_DC_DC_POLARITY 0x0080 -#define A_CNF_NO_AUTO_POLARITY 0x2000 -#define A_CNF_LOW_RX_SQUELCH 0x4000 -#define A_CNF_EXTND_10B_2 0x8000 - -#define PACKET_PAGE_OFFSET 0x8 - -/* - * Bit definitions for the ISA configuration word from the EEPROM - */ -#define INT_NO_MASK 0x000F -#define DMA_NO_MASK 0x0070 -#define ISA_DMA_SIZE 0x0200 -#define ISA_AUTO_RxDMA 0x0400 -#define ISA_RxDMA 0x0800 -#define DMA_BURST 0x1000 -#define STREAM_TRANSFER 0x2000 -#define ANY_ISA_DMA (ISA_AUTO_RxDMA | ISA_RxDMA) - -/* DMA controller registers */ -#define DMA_BASE 0x00 /* DMA controller base */ -#define DMA_BASE_2 0x0C0 /* DMA controller base */ - -#define DMA_STAT 0x0D0 /* DMA controller status register */ -#define DMA_MASK 0x0D4 /* DMA controller mask register */ -#define DMA_MODE 0x0D6 /* DMA controller mode register */ -#define DMA_RESETFF 0x0D8 /* DMA controller first/last flip flop */ - -/* DMA data */ -#define DMA_DISABLE 0x04 /* Disable channel n */ -#define DMA_ENABLE 0x00 /* Enable channel n */ -/* Demand transfers, incr. address, auto init, writes, ch. n */ -#define DMA_RX_MODE 0x14 -/* Demand transfers, incr. address, auto init, reads, ch. n */ -#define DMA_TX_MODE 0x18 - -#define DMA_SIZE (16*1024) /* Size of dma buffer - 16k */ - -#define CS8900 0x0000 -#define CS8920 0x4000 -#define CS8920M 0x6000 -#define REVISON_BITS 0x1F00 -#define EEVER_NUMBER 0x12 -#define CHKSUM_LEN 0x14 -#define CHKSUM_VAL 0x0000 -#define START_EEPROM_DATA 0x001c /* Offset into eeprom for start of data */ -#define IRQ_MAP_EEPROM_DATA 0x0046 /* Offset into eeprom for the IRQ map */ -#define IRQ_MAP_LEN 0x0004 /* No of bytes to read for the IRQ map */ -#define PNP_IRQ_FRMT 0x0022 /* PNP small item IRQ format */ -#define CS8900_IRQ_MAP 0x1c20 /* This IRQ map is fixed */ - -#define CS8920_NO_INTS 0x0F /* Max CS8920 interrupt select # */ - -#define PNP_ADD_PORT 0x0279 -#define PNP_WRITE_PORT 0x0A79 - -#define GET_PNP_ISA_STRUCT 0x40 -#define PNP_ISA_STRUCT_LEN 0x06 -#define PNP_CSN_CNT_OFF 0x01 -#define PNP_RD_PORT_OFF 0x02 -#define PNP_FUNCTION_OK 0x00 -#define PNP_WAKE 0x03 -#define PNP_RSRC_DATA 0x04 -#define PNP_RSRC_READY 0x01 -#define PNP_STATUS 0x05 -#define PNP_ACTIVATE 0x30 -#define PNP_CNF_IO_H 0x60 -#define PNP_CNF_IO_L 0x61 -#define PNP_CNF_INT 0x70 -#define PNP_CNF_DMA 0x74 -#define PNP_CNF_MEM 0x48 - -#define BIT0 1 -#define BIT15 0x8000 - -#define CS_DUPLEX_AUTO 0 -#define CS_DUPLEX_FULL 1 -#define CS_DUPLEX_HALF 2 - -/* Device name */ -#define CS_NAME "cs" - -#define cs_readreg(iobase, portno) \ - (outw((iobase) + ADD_PORT, (portno)), \ - inw((iobase) + DATA_PORT)) -#define cs_writereg(iobase, portno, value) \ - (outw((iobase) + ADD_PORT, (portno)), \ - outw((iobase) + DATA_PORT, (value))) -#define cs_readword(iobase, portno) \ - (inw((iobase) + (portno))) -#define cs_writeword(iobase, portno, value) \ - (outw((iobase) + (portno), (value))) - -#define reset_chip(nic_addr) \ - cs_writereg(nic_addr, PP_SelfCTL, cs_readreg(ioaddr, PP_SelfCTL) | POWER_ON_RESET), \ - DELAY(30000) - -#define cs_duplex_full(sc) \ - (cs_writereg(sc->nic_addr, PP_AutoNegCTL, FORCE_FDX)) - -#define cs_duplex_half(sc) \ - (cs_writereg(sc->nic_addr, PP_AutoNegCTL, NLP_ENABLE)) - diff --git a/sys/dev/ex/if_ex_isa.c b/sys/dev/ex/if_ex_isa.c deleted file mode 100644 index 993e4eafc29d..000000000000 --- a/sys/dev/ex/if_ex_isa.c +++ /dev/null @@ -1,312 +0,0 @@ -/*- - * Copyright (c) 2000 Matthew N. Dodd - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/socket.h> - -#include <sys/module.h> -#include <sys/bus.h> - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/if_media.h> - - -#include <isa/isavar.h> -#include <isa/pnpvar.h> - -#include <dev/ex/if_exreg.h> -#include <dev/ex/if_exvar.h> - -/* Bus Front End Functions */ -static void ex_isa_identify __P((driver_t *, device_t)); -static int ex_isa_probe __P((device_t)); -static int ex_isa_attach __P((device_t)); - -#if 0 -static void ex_pnp_wakeup (void *); - -SYSINIT(ex_pnpwakeup, SI_SUB_CPU, SI_ORDER_ANY, ex_pnp_wakeup, NULL); -#endif - -static device_method_t ex_methods[] = { - /* Device interface */ - DEVMETHOD(device_identify, ex_isa_identify), - DEVMETHOD(device_probe, ex_isa_probe), - DEVMETHOD(device_attach, ex_isa_attach), - - { 0, 0 } -}; - -static driver_t ex_driver = { - "ex", - ex_methods, - sizeof(struct ex_softc), -}; - -devclass_t ex_devclass; - -DRIVER_MODULE(ex, isa, ex_driver, ex_devclass, 0, 0); - -static struct isa_pnp_id ex_ids[] = { - { 0x3110d425, NULL }, /* INT1031 */ - { 0x3010d425, NULL }, /* INT1030 */ - { 0, NULL }, -}; - -#if 0 -#define EX_PNP_WAKE 0x279 - -static u_int8_t ex_pnp_wake_seq[] = - { 0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE, - 0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61, - 0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1, - 0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x43 }; - -static void -ex_pnp_wakeup (void * dummy) -{ - int tmp; - - if (bootverbose) - printf("ex_pnp_wakeup()\n"); - - outb(EX_PNP_WAKE, 0); - outb(EX_PNP_WAKE, 0); - for (tmp = 0; tmp < 32; tmp++) { - outb(EX_PNP_WAKE, ex_pnp_wake_seq[tmp]); - } -} -#endif - -/* - * Non-destructive identify. - */ -static void -ex_isa_identify (driver_t *driver, device_t parent) -{ - device_t child; - u_int32_t ioport; - u_char enaddr[6]; - u_int irq; - int tmp; - const char * desc; - - if (bootverbose) - printf("ex_isa_identify()\n"); - - for (ioport = 0x200; ioport < 0x3a0; ioport += 0x10) { - - /* No board found at address */ - if (!look_for_card(ioport)) { - continue; - } - - if (bootverbose) - printf("ex: Found card at 0x%03x!\n", ioport); - - /* Board in PnP mode */ - if (eeprom_read(ioport, EE_W0) & EE_W0_PNP) { - /* Reset the card. */ - outb(ioport + CMD_REG, Reset_CMD); - DELAY(500); - if (bootverbose) - printf("ex: card at 0x%03x in PnP mode!\n", ioport); - continue; - } - - bzero(enaddr, sizeof(enaddr)); - - /* Reset the card. */ - outb(ioport + CMD_REG, Reset_CMD); - DELAY(400); - - ex_get_address(ioport, enaddr); - tmp = eeprom_read(ioport, EE_W1) & EE_W1_INT_SEL; - - /* work out which set of irq <-> internal tables to use */ - if (ex_card_type(enaddr) == CARD_TYPE_EX_10_PLUS) { - irq = plus_ee2irqmap[tmp]; - desc = "Intel Pro/10+"; - } else { - irq = ee2irqmap[tmp]; - desc = "Intel Pro/10"; - } - - child = BUS_ADD_CHILD(parent, ISA_ORDER_SPECULATIVE, "ex", -1); - device_set_desc_copy(child, desc); - device_set_driver(child, driver); - bus_set_resource(child, SYS_RES_IRQ, 0, irq, 1); - bus_set_resource(child, SYS_RES_IOPORT, 0, ioport, EX_IOSIZE); - - if (bootverbose) - printf("ex: Adding board at 0x%03x, irq %d\n", ioport, irq); - } - - return; -} - -static int -ex_isa_probe(device_t dev) -{ - u_int iobase; - u_int irq; - char * irq2ee; - u_char * ee2irq; - u_char enaddr[6]; - int tmp; - int error; - - /* Check isapnp ids */ - error = ISA_PNP_PROBE(device_get_parent(dev), dev, ex_ids); - - /* If the card had a PnP ID that didn't match any we know about */ - if (error == ENXIO) { - return(error); - } - - /* If we had some other problem. */ - if (!(error == 0 || error == ENOENT)) { - return(error); - } - - iobase = bus_get_resource_start(dev, SYS_RES_IOPORT, 0); - if (!iobase) { - printf("ex: no iobase?\n"); - return(ENXIO); - } - - if (!look_for_card(iobase)) { - printf("ex: no card found at 0x%03x\n", iobase); - return(ENXIO); - } - - if (bootverbose) - printf("ex: ex_isa_probe() found card at 0x%03x\n", iobase); - - /* - * Reset the card. - */ - outb(iobase + CMD_REG, Reset_CMD); - DELAY(800); - - ex_get_address(iobase, enaddr); - - /* work out which set of irq <-> internal tables to use */ - if (ex_card_type(enaddr) == CARD_TYPE_EX_10_PLUS) { - irq2ee = plus_irq2eemap; - ee2irq = plus_ee2irqmap; - } else { - irq2ee = irq2eemap; - ee2irq = ee2irqmap; - } - - tmp = eeprom_read(iobase, EE_W1) & EE_W1_INT_SEL; - irq = bus_get_resource_start(dev, SYS_RES_IRQ, 0); - - if (irq > 0) { - /* This will happen if board is in PnP mode. */ - if (ee2irq[tmp] != irq) { - printf("ex: WARNING: board's EEPROM is configured" - " for IRQ %d, using %d\n", - ee2irq[tmp], irq); - } - } else { - irq = ee2irq[tmp]; - bus_set_resource(dev, SYS_RES_IRQ, 0, irq, 1); - } - - if (irq == 0) { - printf("ex: invalid IRQ.\n"); - return(ENXIO); - } - - return(0); -} - -static int -ex_isa_attach(device_t dev) -{ - struct ex_softc * sc = device_get_softc(dev); - int error = 0; - u_int16_t temp; - - sc->dev = dev; - sc->ioport_rid = 0; - sc->irq_rid = 0; - - if ((error = ex_alloc_resources(dev)) != 0) { - device_printf(dev, "ex_alloc_resources() failed!\n"); - goto bad; - } - - /* - * Fill in several fields of the softc structure: - * - I/O base address. - * - Hardware Ethernet address. - * - IRQ number (if not supplied in config file, read it from EEPROM). - * - Connector type. - */ - sc->iobase = rman_get_start(sc->ioport); - sc->irq_no = rman_get_start(sc->irq); - - ex_get_address(sc->iobase, sc->arpcom.ac_enaddr); - - temp = eeprom_read(sc->iobase, EE_W0); - device_printf(sc->dev, "%s config, %s bus, ", - (temp & EE_W0_PNP) ? "PnP" : "Manual", - (temp & EE_W0_BUS16) ? "16-bit" : "8-bit"); - - temp = eeprom_read(sc->iobase, EE_W6); - printf("board id 0x%03x, stepping 0x%01x\n", - (temp & EE_W6_BOARD_MASK) >> EE_W6_BOARD_SHIFT, - temp & EE_W6_STEP_MASK); - - if ((error = ex_attach(dev)) != 0) { - device_printf(dev, "ex_attach() failed!\n"); - goto bad; - } - - error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET, - ex_intr, (void *)sc, &sc->ih); - if (error) { - device_printf(dev, "bus_setup_intr() failed!\n"); - goto bad; - } - - return(0); -bad: - ex_release_resources(dev); - return (error); -} diff --git a/sys/dev/ex/if_ex_pccard.c b/sys/dev/ex/if_ex_pccard.c deleted file mode 100644 index 5b7f6ff318e5..000000000000 --- a/sys/dev/ex/if_ex_pccard.c +++ /dev/null @@ -1,162 +0,0 @@ -/*- - * Copyright (c) 2000 Mitsuru IWASAKI - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -#include <sys/param.h> -#include <sys/systm.h> -#include <sys/kernel.h> -#include <sys/socket.h> - -#include <sys/module.h> -#include <sys/bus.h> - -#include <machine/bus.h> -#include <machine/resource.h> -#include <sys/rman.h> - -#include <net/if.h> -#include <net/if_arp.h> -#include <net/if_media.h> - - -#include <dev/ex/if_exreg.h> -#include <dev/ex/if_exvar.h> - -#include <dev/pccard/pccardvar.h> - -/* Bus Front End Functions */ -static int ex_pccard_probe __P((device_t)); -static int ex_pccard_attach __P((device_t)); -static int ex_pccard_detach __P((device_t)); - -static device_method_t ex_pccard_methods[] = { - /* Device interface */ - DEVMETHOD(device_probe, ex_pccard_probe), - DEVMETHOD(device_attach, ex_pccard_attach), - DEVMETHOD(device_detach, ex_pccard_detach), - - { 0, 0 } -}; - -static driver_t ex_pccard_driver = { - "ex", - ex_pccard_methods, - sizeof(struct ex_softc), -}; - -extern devclass_t ex_devclass; - -DRIVER_MODULE(ex, pccard, ex_pccard_driver, ex_devclass, 0, 0); - -static int -ex_pccard_probe(device_t dev) -{ - u_int iobase; - u_int irq; - - iobase = bus_get_resource_start(dev, SYS_RES_IOPORT, 0); - if (!iobase) { - printf("ex: no iobase?\n"); - return(ENXIO); - } - - if (bootverbose) - printf("ex: ex_pccard_probe() found card at 0x%03x\n", iobase); - - irq = bus_get_resource_start(dev, SYS_RES_IRQ, 0); - - if (irq == 0) { - printf("ex: invalid IRQ.\n"); - return(ENXIO); - } - - return(0); -} - -static int -ex_pccard_attach(device_t dev) -{ - struct ex_softc * sc = device_get_softc(dev); - int error = 0; - int i; - u_char sum; - u_char ether_addr[ETHER_ADDR_LEN]; - - sc->dev = dev; - sc->ioport_rid = 0; - sc->irq_rid = 0; - - if ((error = ex_alloc_resources(dev)) != 0) { - device_printf(dev, "ex_alloc_resources() failed!\n"); - goto bad; - } - - /* - * Fill in several fields of the softc structure: - * - I/O base address. - * - Hardware Ethernet address. - * - IRQ number. - */ - sc->iobase = rman_get_start(sc->ioport); - sc->irq_no = rman_get_start(sc->irq); - - pccard_get_ether(dev, ether_addr); - for (i = 0, sum = 0; i < ETHER_ADDR_LEN; i++) - sum |= ether_addr[i]; - if (sum) - bcopy(ether_addr, sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); - - if ((error = ex_attach(dev)) != 0) { - device_printf(dev, "ex_attach() failed!\n"); - goto bad; - } - - error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET, - ex_intr, (void *)sc, &sc->ih); - if (error) { - device_printf(dev, "bus_setup_intr() failed!\n"); - goto bad; - } - - return(0); -bad: - ex_release_resources(dev); - return (error); -} - -static int -ex_pccard_detach(device_t dev) -{ - struct ex_softc *sc = device_get_softc(dev); - struct ifnet *ifp = &sc->arpcom.ac_if; - - ex_stop(sc); - ifp->if_flags &= ~IFF_RUNNING; - if_detach(ifp); - ex_release_resources(dev); - return (0); -} diff --git a/sys/dev/ic/hd64570.h b/sys/dev/ic/hd64570.h deleted file mode 100644 index b676e25a9cd5..000000000000 --- a/sys/dev/ic/hd64570.h +++ /dev/null @@ -1,372 +0,0 @@ -/* - * Copyright (c) 1995 John Hay. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by [your name] - * and [any other names deserving credit ] - * 4. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY [your name] AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ -#ifndef _HD64570_H_ -#define _HD64570_H_ - -typedef struct msci_channel - { - union - { - unsigned short us_trb; /* rw */ - struct - { - unsigned char uc_trbl; - unsigned char uc_trbh; - }uc_trb; - }u_trb; - unsigned char st0; /* ro */ - unsigned char st1; /* rw */ - unsigned char st2; /* rw */ - unsigned char st3; /* ro */ - unsigned char fst; /* rw */ - unsigned char unused0; - unsigned char ie0; /* rw */ - unsigned char ie1; /* rw */ - unsigned char ie2; /* rw */ - unsigned char fie; /* rw */ - unsigned char cmd; /* wo */ - unsigned char unused1; - unsigned char md0; /* rw */ - unsigned char md1; /* rw */ - unsigned char md2; /* rw */ - unsigned char ctl; /* rw */ - unsigned char sa0; /* rw */ - unsigned char sa1; /* rw */ - unsigned char idl; /* rw */ - unsigned char tmc; /* rw */ - unsigned char rxs; /* rw */ - unsigned char txs; /* rw */ - unsigned char trc0; /* rw */ - unsigned char trc1; /* rw */ - unsigned char rrc; /* rw */ - unsigned char unused2; - unsigned char cst0; /* rw */ - unsigned char cst1; /* rw */ - unsigned char unused3[2]; - }msci_channel; - -#define trb u_trb.us_trb -#define trbl u_trb.uc_trb.uc_trbl -#define trbh u_trb.uc_trb.uc_trbh - -typedef struct timer_channel - { - unsigned short tcnt; /* rw */ - unsigned short tconr; /* wo */ - unsigned char tcsr; /* rw */ - unsigned char tepr; /* rw */ - unsigned char unused[2]; - }timer_channel; - -typedef struct dmac_channel - { - unsigned short dar; /* rw */ - unsigned char darb; /* rw */ - unsigned char unused0; - unsigned short sar; /* rw On odd numbered dmacs (tx) only */ - unsigned char sarb; /* rw */ -#define cpb sarb - unsigned char unused1; - unsigned short cda; /* rw */ - unsigned short eda; /* rw */ - unsigned short bfl; /* rw On even numbered dmacs (rx) only */ - unsigned short bcr; /* rw */ - unsigned char dsr; /* rw */ - unsigned char dmr; /* rw */ - unsigned char unused2; - unsigned char fct; /* rw */ - unsigned char dir; /* rw */ - unsigned char dcr; /* rw */ - unsigned char unused3[10]; - }dmac_channel; - -/* x is the channel number. rx channels are even numbered and tx, odd. */ -#define DMAC_RXCH(x) ((x*2) + 0) -#define DMAC_TXCH(x) ((x*2) + 1) - -typedef struct sca_regs - { - unsigned char lpr; /* rw */ - unsigned char unused0; /* -- */ - /* Wait system */ - unsigned char pabr0; /* rw */ - unsigned char pabr1; /* rw */ - unsigned char wcrl; /* rw */ - unsigned char wcrm; /* rw */ - unsigned char wcrh; /* rw */ - unsigned char unused1; - /* DMAC */ - unsigned char pcr; /* rw */ - unsigned char dmer; /* rw */ - unsigned char unused2[6]; - /* Interrupt */ - unsigned char isr0; /* ro */ - unsigned char isr1; /* ro */ - unsigned char isr2; /* ro */ - unsigned char unused3; - unsigned char ier0; /* rw */ - unsigned char ier1; /* rw */ - unsigned char ier2; /* rw */ - unsigned char unused4; - unsigned char itcr; /* rw */ - unsigned char unused5; - unsigned char ivr; /* rw */ - unsigned char unused6; - unsigned char imvr; /* rw */ - unsigned char unused7[3]; - /* MSCI Channel 0 */ - msci_channel msci[2]; - timer_channel timer[4]; - dmac_channel dmac[4]; - }sca_regs; - -#define SCA_CMD_TXRESET 0x01 -#define SCA_CMD_TXENABLE 0x02 -#define SCA_CMD_TXDISABLE 0x03 -#define SCA_CMD_TXCRCINIT 0x04 -#define SCA_CMD_TXCRCEXCL 0x05 -#define SCA_CMS_TXEOM 0x06 -#define SCA_CMD_TXABORT 0x07 -#define SCA_CMD_MPON 0x08 -#define SCA_CMD_TXBCLEAR 0x09 - -#define SCA_CMD_RXRESET 0x11 -#define SCA_CMD_RXENABLE 0x12 -#define SCA_CMD_RXDISABLE 0x13 -#define SCA_CMD_RXCRCINIT 0x14 -#define SCA_CMD_RXMSGREJ 0x15 -#define SCA_CMD_MPSEARCH 0x16 -#define SCA_CMD_RXCRCEXCL 0x17 -#define SCA_CMD_RXCRCCALC 0x18 - -#define SCA_CMD_NOP 0x00 -#define SCA_CMD_RESET 0x21 -#define SCA_CMD_SEARCH 0x31 - -#define SCA_MD0_CRC_1 0x01 -#define SCA_MD0_CRC_CCITT 0x02 -#define SCA_MD0_CRC_ENABLE 0x04 -#define SCA_MD0_AUTO_ENABLE 0x10 -#define SCA_MD0_MODE_ASYNC 0x00 -#define SCA_MD0_MODE_BYTESYNC1 0x20 -#define SCA_MD0_MODE_BISYNC 0x40 -#define SCA_MD0_MODE_BYTESYNC2 0x60 -#define SCA_MD0_MODE_HDLC 0x80 - -#define SCA_MD1_NOADDRCHK 0x00 -#define SCA_MD1_SNGLADDR1 0x40 -#define SCA_MD1_SNGLADDR2 0x80 -#define SCA_MD1_DUALADDR 0xC0 - -#define SCA_MD2_DUPLEX 0x00 -#define SCA_MD2_ECHO 0x01 -#define SCA_MD2_LOOPBACK 0x03 -#define SCA_MD2_ADPLLx8 0x00 -#define SCA_MD2_ADPLLx16 0x08 -#define SCA_MD2_ADPLLx32 0x10 -#define SCA_MD2_NRZ 0x00 -#define SCA_MD2_NRZI 0x20 -#define SCA_MD2_MANCHESTER 0x80 -#define SCA_MD2_FM0 0xC0 -#define SCA_MD2_FM1 0xA0 - -#define SCA_CTL_RTS 0x01 -#define SCA_CTL_IDLPAT 0x10 -#define SCA_CTL_UDRNC 0x20 - -#define SCA_RXS_DIV_MASK 0x0F -#define SCA_RXS_DIV1 0x00 -#define SCA_RXS_DIV2 0x01 -#define SCA_RXS_DIV4 0x02 -#define SCA_RXS_DIV8 0x03 -#define SCA_RXS_DIV16 0x04 -#define SCA_RXS_DIV32 0x05 -#define SCA_RXS_DIV64 0x06 -#define SCA_RXS_DIV128 0x07 -#define SCA_RXS_DIV256 0x08 -#define SCA_RXS_DIV512 0x09 -#define SCA_RXS_CLK_RXC0 0x00 -#define SCA_RXS_CLK_RXC1 0x20 -#define SCA_RXS_CLK_INT 0x40 -#define SCA_RXS_CLK_ADPLL_OUT 0x60 -#define SCA_RXS_CLK_ADPLL_IN 0x70 - -#define SCA_TXS_DIV_MASK 0x0F -#define SCA_TXS_DIV1 0x00 -#define SCA_TXS_DIV2 0x01 -#define SCA_TXS_DIV4 0x02 -#define SCA_TXS_DIV8 0x03 -#define SCA_TXS_DIV16 0x04 -#define SCA_TXS_DIV32 0x05 -#define SCA_TXS_DIV64 0x06 -#define SCA_TXS_DIV128 0x07 -#define SCA_TXS_DIV256 0x08 -#define SCA_TXS_DIV512 0x09 -#define SCA_TXS_CLK_TXC 0x00 -#define SCA_TXS_CLK_INT 0x40 -#define SCA_TXS_CLK_RX 0x60 - -#define SCA_ST0_RXRDY 0x01 -#define SCA_ST0_TXRDY 0x02 -#define SCA_ST0_RXINT 0x40 -#define SCA_ST0_TXINT 0x80 - -#define SCA_ST1_IDLST 0x01 -#define SCA_ST1_ABTST 0x02 -#define SCA_ST1_DCDCHG 0x04 -#define SCA_ST1_CTSCHG 0x08 -#define SCA_ST1_FLAG 0x10 -#define SCA_ST1_TXIDL 0x40 -#define SCA_ST1_UDRN 0x80 - -/* ST2 and FST look the same */ -#define SCA_FST_CRCERR 0x04 -#define SCA_FST_OVRN 0x08 -#define SCA_FST_RESFRM 0x10 -#define SCA_FST_ABRT 0x20 -#define SCA_FST_SHRT 0x40 -#define SCA_FST_EOM 0x80 - -#define SCA_ST3_RXENA 0x01 -#define SCA_ST3_TXENA 0x02 -#define SCA_ST3_DCD 0x04 -#define SCA_ST3_CTS 0x08 -#define SCA_ST3_ADPLLSRCH 0x10 -#define SCA_ST3_TXDATA 0x20 - -#define SCA_FIE_EOMFE 0x80 - -#define SCA_IE0_RXRDY 0x01 -#define SCA_IE0_TXRDY 0x02 -#define SCA_IE0_RXINT 0x40 -#define SCA_IE0_TXINT 0x80 - -#define SCA_IE1_IDLDE 0x01 -#define SCA_IE1_ABTDE 0x02 -#define SCA_IE1_DCD 0x04 -#define SCA_IE1_CTS 0x08 -#define SCA_IE1_FLAG 0x10 -#define SCA_IE1_IDL 0x40 -#define SCA_IE1_UDRN 0x80 - -#define SCA_IE2_CRCERR 0x04 -#define SCA_IE2_OVRN 0x08 -#define SCA_IE2_RESFRM 0x10 -#define SCA_IE2_ABRT 0x20 -#define SCA_IE2_SHRT 0x40 -#define SCA_IE2_EOM 0x80 - -/* This is for RRC, TRC0 and TRC1. */ -#define SCA_RCR_MASK 0x1F - -#define SCA_IE1_ - -#define SCA_IV_CHAN0 0x00 -#define SCA_IV_CHAN1 0x20 - -#define SCA_IV_RXRDY 0x04 -#define SCA_IV_TXRDY 0x06 -#define SCA_IV_RXINT 0x08 -#define SCA_IV_TXINT 0x0A - -#define SCA_IV_DMACH0 0x00 -#define SCA_IV_DMACH1 0x08 -#define SCA_IV_DMACH2 0x20 -#define SCA_IV_DMACH3 0x28 - -#define SCA_IV_DMIA 0x14 -#define SCA_IV_DMIB 0x16 - -#define SCA_IV_TIMER0 0x1C -#define SCA_IV_TIMER1 0x1E -#define SCA_IV_TIMER2 0x3C -#define SCA_IV_TIMER3 0x3E - -/* - * DMA registers - */ -#define SCA_DSR_EOT 0x80 -#define SCA_DSR_EOM 0x40 -#define SCA_DSR_BOF 0x20 -#define SCA_DSR_COF 0x10 -#define SCA_DSR_DE 0x02 -#define SCA_DSR_DWE 0x01 - -#define SCA_DMR_TMOD 0x10 -#define SCA_DMR_NF 0x04 -#define SCA_DMR_CNTE 0x02 - -#define SCA_DMER_EN 0x80 - -#define SCA_DCR_ABRT 0x01 -#define SCA_DCR_FCCLR 0x02 /* Clear frame end intr counter */ - -#define SCA_DIR_EOT 0x80 -#define SCA_DIR_EOM 0x40 -#define SCA_DIR_BOF 0x20 -#define SCA_DIR_COF 0x10 - -#define SCA_PCR_BRC 0x10 -#define SCA_PCR_CCC 0x08 -#define SCA_PCR_PR2 0x04 -#define SCA_PCR_PR1 0x02 -#define SCA_PCR_PR0 0x01 - -typedef struct sca_descriptor - { - unsigned short cp; - unsigned short bp; - unsigned char bpb; - unsigned char unused0; - unsigned short len; - unsigned char stat; - unsigned char unused1; - }sca_descriptor; - -#define SCA_DESC_EOT 0x01 -#define SCA_DESC_CRC 0x04 -#define SCA_DESC_OVRN 0x08 -#define SCA_DESC_RESD 0x10 -#define SCA_DESC_ABORT 0x20 -#define SCA_DESC_SHRTFRM 0x40 -#define SCA_DESC_EOM 0x80 -#define SCA_DESC_ERRORS 0x7C - -/* -*************************************************************************** -** END -*************************************************************************** -**/ -#endif /* _HD64570_H_ */ - diff --git a/sys/dev/mii/tdkphyreg.h b/sys/dev/mii/tdkphyreg.h deleted file mode 100644 index 1f106251b607..000000000000 --- a/sys/dev/mii/tdkphyreg.h +++ /dev/null @@ -1,82 +0,0 @@ -/* - * Copyright (c) 2000,2001 Jonathan Chen. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification, immediately at the beginning of the file. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in - * the documentation and/or other materials provided with the - * distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Register definitions for TDK 78Q2120 - */ - -#ifndef _DEV_MII_TDKPHYREG_H_ -#define _DEV_MII_TDKPHYREG_H_ - -#define MII_VENDOR 16 -#define VENDOR_RXCC 0x0001 -#define VENDOR_PCSBP 0x0002 -#define VENDOR_RVSPOL 0x0010 -#define VENDOR_NOAPOL 0x0020 -#define VENDOR_GPIO0DIR 0x0040 -#define VENDOR_GPIO0DAT 0x0080 -#define VENDOR_GPIO1DIR 0x0100 -#define VENDOR_GPIO1DAT 0x0200 -#define VENDOR_10BTLOOP 0x0400 -#define VENDOR_NOSQE 0x0800 -#define VENDOR_TXHIM 0x1000 -#define VENDOR_INTLVL 0x4000 -#define VENDOR_RPTR 0x8000 - -#define MII_INT 17 -#define INT_STAT_MASK 0x00ff -#define INT_STAT_ACOMP 0x0001 -#define INT_STAT_RFAULT 0x0002 -#define INT_STAT_LSCHG 0x0004 -#define INT_STAT_LPACK 0x0008 -#define INT_STAT_PDF 0x0010 -#define INT_STAT_PRX 0x0020 -#define INT_STAT_RXERR 0x0040 -#define INT_STAT_JABBER 0x0080 -#define INT_CTRL_MASK 0xff00 -#define INT_CTRL_ACOMP 0x0100 -#define INT_CTRL_RFAULT 0x0200 -#define INT_CTRL_LSCHG 0x0400 -#define INT_CTRL_LPACK 0x0800 -#define INT_CTRL_PDF 0x1000 -#define INT_CTRL_PRX 0x2000 -#define INT_CTRL_RXERR 0x4000 -#define INT_CTRL_JABBER 0x8000 - - -#define MII_DIAG 18 -#define DIAG_RLOCK 0x0100 -#define DIAG_RPASS 0x0200 -#define DIAG_RATE_100 0x0400 -#define DIAG_DUPLEX 0x0800 -#define DIAG_NEGFAIL 0x1000 - - -#endif diff --git a/sys/dev/ray/if_raydbg.h b/sys/dev/ray/if_raydbg.h deleted file mode 100644 index 7dc255d49604..000000000000 --- a/sys/dev/ray/if_raydbg.h +++ /dev/null @@ -1,146 +0,0 @@ -/* - * Copyright (C) 2000 - * Dr. Duncan McLennan Barclay, dmlb@ragnet.demon.co.uk. - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY DUNCAN BARCLAY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL DUNCAN BARCLAY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - * - */ - -/* - * Debugging odds and odds - */ - -/* - * RAY_DEBUG settings - * - * RECERR Recoverable error's, deprecated use RAY_RECERR macro - * SUBR Subroutine entry - * BOOTPARAM Startup CM dump - * STARTJOIN State transitions for start/join - * CCS CCS info - * IOCTL IOCTL calls - * MBUF MBUFs dumped - needs one of TX, RX, MGT, or CTL - * RX packet types reported - * CM common memory re-mapping - * COM new command sleep/wakeup - * STOP driver detaching - * CTL CTL packets - * MGT MGT packets - * TX TX routine info - * DCOM dump comq entries - */ -#define RAY_DBG_RECERR 0x0001 -#define RAY_DBG_SUBR 0x0002 -#define RAY_DBG_BOOTPARAM 0x0004 -#define RAY_DBG_STARTJOIN 0x0008 -#define RAY_DBG_CCS 0x0010 -#define RAY_DBG_IOCTL 0x0020 -#define RAY_DBG_MBUF 0x0080 -#define RAY_DBG_RX 0x0100 -#define RAY_DBG_CM 0x0200 -#define RAY_DBG_COM 0x0400 -#define RAY_DBG_STOP 0x0800 -#define RAY_DBG_CTL 0x1000 -#define RAY_DBG_MGT 0x2000 -#define RAY_DBG_TX 0x4000 -#define RAY_DBG_DCOM 0x8000 -/* Cut and paste this into a kernel configuration file */ -#if 0 -#define RAY_DEBUG ( \ - /* RAY_DBG_SUBR | */ \ - /* RAY_DBG_BOOTPARAM | */ \ - /* RAY_DBG_STARTJOIN | */ \ - /* RAY_DBG_CCS | */ \ - /* RAY_DBG_IOCTL | */ \ - /* RAY_DBG_MBUF | */ \ - /* RAY_DBG_RX | */ \ - /* RAY_DBG_CM | */ \ - /* RAY_DBG_COM | */ \ - /* RAY_DBG_STOP | */ \ - /* RAY_DBG_CTL | */ \ - /* RAY_DBG_MGT | */ \ - /* RAY_DBG_TX | */ \ - /* RAY_DBG_DCOM | */ \ - 0 \ - ) -#endif - -#if RAY_DEBUG - -#define RAY_DPRINTF(sc, mask, fmt, args...) do {if (RAY_DEBUG & (mask)) {\ - device_printf((sc)->dev, "%s(%d) " fmt "\n", \ - __FUNCTION__ , __LINE__ , ##args); \ -} } while (0) - -/* This macro assumes that common memory is mapped into kernel space */ -#define RAY_DHEX8(sc, mask, off, len, s) do { if (RAY_DEBUG & (mask)) { \ - int i, j; \ - device_printf((sc)->dev, "%s(%d) %s\n", \ - __FUNCTION__ , __LINE__ , (s)); \ - for (i = (off); i < (off)+(len); i += 8) { \ - printf(". 0x%04x ", i); \ - for (j = 0; j < 8; j++) \ - printf("%02x ", SRAM_READ_1((sc), i+j)); \ - printf("\n"); \ - } \ -} } while (0) - -#define RAY_DCOM(sc, mask, com, s) do { if (RAY_DEBUG & (mask)) { \ - device_printf((sc)->dev, "%s(%d) %s com entry 0x%p\n", \ - __FUNCTION__ , __LINE__ , (s) , (com)); \ - printf(". c_mesg %s\n", (com)->c_mesg); \ - printf(". c_flags 0x%b\n", (com)->c_flags, RAY_COM_FLAGS_PRINTFB); \ - printf(". c_retval 0x%x\n", (com)->c_retval); \ - printf(". c_ccs 0x%0x index 0x%02x\n", \ - (com)->c_ccs, RAY_CCS_INDEX((com)->c_ccs)); \ -} } while (0) - -#else -#define RAY_DPRINTF(sc, mask, fmt, args...) -#define RAY_DHEX8(sc, mask, off, len, s) -#define RAY_DCOM(sc, mask, com, s) -#endif /* RAY_DEBUG > 0 */ - -/* - * These override macros defined in if_ray.c to turn them into - * debugging ones. - */ -#if RAY_DEBUG & RAY_DBG_COM - -#define RAY_COM_CHECK(sc, com) do { if (RAY_DEBUG & RAY_DBG_COM) { \ - ray_com_ecf_check((sc), (com), __FUNCTION__ ); \ -} } while (0) - -#endif /* RAY_DEBUG & RAY_DBG_COM */ - -#if RAY_DEBUG & RAY_DBG_MBUF -#define RAY_MBUF_DUMP(sc, mask, m, s) do { if (RAY_DEBUG & (mask)) { \ - ray_dump_mbuf((sc), (m), (s)); \ -} } while (0) -#endif /* RAY_DEBUG & RAY_DBG_MBUF */ diff --git a/sys/dev/ray/if_raymib.h b/sys/dev/ray/if_raymib.h deleted file mode 100644 index 77297869b9e2..000000000000 --- a/sys/dev/ray/if_raymib.h +++ /dev/null @@ -1,1100 +0,0 @@ -/* - * Copyright (C) 2000 - * Dr. Duncan McLennan Barclay, dmlb@ragnet.demon.co.uk. - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY DUNCAN BARCLAY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL DUNCAN BARCLAY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - * - */ - -/* - * Bit mask definitions for firmware versioning - */ -#define RAY_V4 0x1 -#define RAY_V5 0x2 - -/* - * MIB stuctures - */ -struct ray_mib_common_head { /*Offset*/ /*Size*/ - u_int8_t mib_net_type; /*00*/ - u_int8_t mib_ap_status; /*01*/ - u_int8_t mib_ssid[IEEE80211_NWID_LEN]; /*02*/ /*20*/ - u_int8_t mib_scan_mode; /*22*/ - u_int8_t mib_apm_mode; /*23*/ - u_int8_t mib_mac_addr[ETHER_ADDR_LEN]; /*24*/ /*06*/ - u_int8_t mib_frag_thresh[2]; /*2a*/ /*02*/ - u_int8_t mib_dwell_time[2]; /*2c*/ /*02*/ - u_int8_t mib_beacon_period[2]; /*2e*/ /*02*/ - u_int8_t mib_dtim_interval; /*30*/ - u_int8_t mib_max_retry; /*31*/ - u_int8_t mib_ack_timo; /*32*/ - u_int8_t mib_sifs; /*33*/ - u_int8_t mib_difs; /*34*/ - u_int8_t mib_pifs; /*35*/ - u_int8_t mib_rts_thresh[2]; /*36*/ /*02*/ - u_int8_t mib_scan_dwell[2]; /*38*/ /*02*/ - u_int8_t mib_scan_max_dwell[2]; /*3a*/ /*02*/ - u_int8_t mib_assoc_timo; /*3c*/ - u_int8_t mib_adhoc_scan_cycle; /*3d*/ - u_int8_t mib_infra_scan_cycle; /*3e*/ - u_int8_t mib_infra_super_scan_cycle; /*3f*/ - u_int8_t mib_promisc; /*40*/ - u_int8_t mib_uniq_word[2]; /*41*/ /*02*/ - u_int8_t mib_slot_time; /*43*/ - u_int8_t mib_roam_low_snr_thresh; /*44*/ - u_int8_t mib_low_snr_count; /*45*/ - u_int8_t mib_infra_missed_beacon_count; /*46*/ - u_int8_t mib_adhoc_missed_beacon_count; /*47*/ - u_int8_t mib_country_code; /*48*/ - u_int8_t mib_hop_seq; /*49*/ - u_int8_t mib_hop_seq_len; /*4a*/ -} __attribute__((__packed__)); - -struct ray_mib_common_tail { - u_int8_t mib_noise_filter_gain; /*00*/ - u_int8_t mib_noise_limit_offset; /*01*/ - u_int8_t mib_rssi_thresh_offset; /*02*/ - u_int8_t mib_busy_thresh_offset; /*03*/ - u_int8_t mib_sync_thresh; /*04*/ - u_int8_t mib_test_mode; /*05*/ - u_int8_t mib_test_min_chan; /*06*/ - u_int8_t mib_test_max_chan; /*07*/ -} __attribute__((__packed__)); - -struct ray_mib_4 { - struct ray_mib_common_head mib_head; /*00*/ - u_int8_t mib_cw_max; /*4b*/ - u_int8_t mib_cw_min; /*4c*/ - struct ray_mib_common_tail mib_tail; /*4d*/ -} __attribute__((__packed__)); - -struct ray_mib_5 { - struct ray_mib_common_head mib_head; /*00*/ - u_int8_t mib_cw_max[2]; /*4b*/ /*02*/ - u_int8_t mib_cw_min[2]; /*4d*/ /*02*/ - struct ray_mib_common_tail mib_tail; /*4f*/ - u_int8_t mib_allow_probe_resp; /*57*/ - u_int8_t mib_privacy_must_start; /*58*/ - u_int8_t mib_privacy_can_join; /*59*/ - u_int8_t mib_basic_rate_set[8]; /*5a*/ /*08*/ -} __attribute__((__packed__)); - -#define mib_net_type mib_head.mib_net_type -#define mib_ap_status mib_head.mib_ap_status -#define mib_ssid mib_head.mib_ssid -#define mib_scan_mode mib_head.mib_scan_mode -#define mib_apm_mode mib_head.mib_apm_mode -#define mib_mac_addr mib_head.mib_mac_addr -#define mib_frag_thresh mib_head.mib_frag_thresh -#define mib_dwell_time mib_head.mib_dwell_time -#define mib_beacon_period mib_head.mib_beacon_period -#define mib_dtim_interval mib_head.mib_dtim_interval -#define mib_max_retry mib_head.mib_max_retry -#define mib_ack_timo mib_head.mib_ack_timo -#define mib_sifs mib_head.mib_sifs -#define mib_difs mib_head.mib_difs -#define mib_pifs mib_head.mib_pifs -#define mib_rts_thresh mib_head.mib_rts_thresh -#define mib_scan_dwell mib_head.mib_scan_dwell -#define mib_scan_max_dwell mib_head.mib_scan_max_dwell -#define mib_assoc_timo mib_head.mib_assoc_timo -#define mib_adhoc_scan_cycle mib_head.mib_adhoc_scan_cycle -#define mib_infra_scan_cycle mib_head.mib_infra_scan_cycle -#define mib_infra_super_scan_cycle \ - mib_head.mib_infra_super_scan_cycle -#define mib_promisc mib_head.mib_promisc -#define mib_uniq_word mib_head.mib_uniq_word -#define mib_slot_time mib_head.mib_slot_time -#define mib_roam_low_snr_thresh mib_head.mib_roam_low_snr_thresh -#define mib_low_snr_count mib_head.mib_low_snr_count -#define mib_infra_missed_beacon_count \ - mib_head.mib_infra_missed_beacon_count -#define mib_adhoc_missed_beacon_count \ - mib_head.mib_adhoc_missed_beacon_count -#define mib_country_code mib_head.mib_country_code -#define mib_hop_seq mib_head.mib_hop_seq -#define mib_hop_seq_len mib_head.mib_hop_seq_len - -#define mib_noise_filter_gain mib_tail.mib_noise_filter_gain -#define mib_noise_limit_offset mib_tail.mib_noise_limit_offset -#define mib_rssi_thresh_offset mib_tail.mib_rssi_thresh_offset -#define mib_busy_thresh_offset mib_tail.mib_busy_thresh_offset -#define mib_sync_thresh mib_tail.mib_sync_thresh -#define mib_test_mode mib_tail.mib_test_mode -#define mib_test_min_chan mib_tail.mib_test_min_chan -#define mib_test_max_chan mib_tail.mib_test_max_chan - -/* - * MIB IDs for the update/report param commands - */ -#define RAY_MIB_NET_TYPE 0 -#define RAY_MIB_AP_STATUS 1 -#define RAY_MIB_SSID 2 -#define RAY_MIB_SCAN_MODE 3 -#define RAY_MIB_APM_MODE 4 -#define RAY_MIB_MAC_ADDR 5 -#define RAY_MIB_FRAG_THRESH 6 -#define RAY_MIB_DWELL_TIME 7 -#define RAY_MIB_BEACON_PERIOD 8 -#define RAY_MIB_DTIM_INTERVAL 9 -#define RAY_MIB_MAX_RETRY 10 -#define RAY_MIB_ACK_TIMO 11 -#define RAY_MIB_SIFS 12 -#define RAY_MIB_DIFS 13 -#define RAY_MIB_PIFS 14 -#define RAY_MIB_RTS_THRESH 15 -#define RAY_MIB_SCAN_DWELL 16 -#define RAY_MIB_SCAN_MAX_DWELL 17 -#define RAY_MIB_ASSOC_TIMO 18 -#define RAY_MIB_ADHOC_SCAN_CYCLE 19 -#define RAY_MIB_INFRA_SCAN_CYCLE 20 -#define RAY_MIB_INFRA_SUPER_SCAN_CYCLE 21 -#define RAY_MIB_PROMISC 22 -#define RAY_MIB_UNIQ_WORD 23 -#define RAY_MIB_SLOT_TIME 24 -#define RAY_MIB_ROAM_LOW_SNR_THRESH 25 -#define RAY_MIB_LOW_SNR_COUNT 26 -#define RAY_MIB_INFRA_MISSED_BEACON_COUNT 27 -#define RAY_MIB_ADHOC_MISSED_BEACON_COUNT 28 -#define RAY_MIB_COUNTRY_CODE 29 -#define RAY_MIB_HOP_SEQ 30 -#define RAY_MIB_HOP_SEQ_LEN 31 -#define RAY_MIB_CW_MAX 32 -#define RAY_MIB_CW_MIN 33 -#define RAY_MIB_NOISE_FILTER_GAIN 34 -#define RAY_MIB_NOISE_LIMIT_OFFSET 35 -#define RAY_MIB_RSSI_THRESH_OFFSET 36 -#define RAY_MIB_BUSY_THRESH_OFFSET 37 -#define RAY_MIB_SYNC_THRESH 38 -#define RAY_MIB_TEST_MODE 39 -#define RAY_MIB_TEST_MIN_CHAN 40 -#define RAY_MIB_TEST_MAX_CHAN 41 -#define RAY_MIB_ALLOW_PROBE_RESP 42 -#define RAY_MIB_PRIVACY_MUST_START 43 -#define RAY_MIB_PRIVACY_CAN_JOIN 44 -#define RAY_MIB_BASIC_RATE_SET 45 -#define RAY_MIB_VERSION 46 -#define RAY_MIB_CUR_BSSID 47 -#define RAY_MIB_CUR_INITED 48 -#define RAY_MIB_CUR_DEF_TXRATE 49 -#define RAY_MIB_CUR_ENCRYPT 50 -#define RAY_MIB_CUR_NET_TYPE 51 -#define RAY_MIB_CUR_SSID 52 -#define RAY_MIB_CUR_PRIV_START 53 -#define RAY_MIB_CUR_PRIV_JOIN 54 -#define RAY_MIB_DES_BSSID 55 -#define RAY_MIB_DES_INITED 56 -#define RAY_MIB_DES_DEF_TXRATE 57 -#define RAY_MIB_DES_ENCRYPT 58 -#define RAY_MIB_DES_NET_TYPE 59 -#define RAY_MIB_DES_SSID 60 -#define RAY_MIB_DES_PRIV_START 61 -#define RAY_MIB_DES_PRIV_JOIN 62 -#define RAY_MIB_CUR_AP_STATUS 63 -#define RAY_MIB_CUR_PROMISC 64 -#define RAY_MIB_DES_AP_STATUS 65 -#define RAY_MIB_DES_PROMISC 66 - -#define RAY_MIB_LASTUSER 45 -#define RAY_MIB_MAX 66 - -/* - * Strings for the MIB - */ -#define RAY_MIB_STRINGS { \ - "Network type", \ - "AP status", \ - "SSID", \ - "Scan mode", \ - "APM mode", \ - "MAC address", \ - "Fragmentation threshold", \ - "Dwell time", \ - "Beacon period", \ - "DTIM_INTERVAL", \ - "MAX_RETRY", \ - "ACK_TIMO", \ - "SIFS", \ - "DIFS", \ - "PIFS", \ - "RTS_THRESH", \ - "SCAN_DWELL", \ - "SCAN_MAX_DWELL", \ - "ASSOC_TIMO", \ - "ADHOC_SCAN_CYCLE", \ - "INFRA_SCAN_CYCLE", \ - "INFRA_SUPER_SCAN_CYCLE", \ - "PROMISC", \ - "UNIQ_WORD", \ - "SLOT_TIME", \ - "ROAM_LOW_SNR_THRESH", \ - "LOW_SNR_COUNT", \ - "INFRA_MISSED_BEACON_COUNT", \ - "ADHOC_MISSED_BEACON_COUNT", \ - "COUNTRY_CODE", \ - "HOP_SEQ", \ - "HOP_SEQ_LEN", \ - "CW_MAX", \ - "CW_MIN", \ - "NOISE_FILTER_GAIN", \ - "NOISE_LIMIT_OFFSET", \ - "RSSI_THRESH_OFFSET", \ - "BUSY_THRESH_OFFSET", \ - "SYNC_THRESH", \ - "TEST_MODE", \ - "TEST_MIN_CHAN", \ - "TEST_MAX_CHAN", \ - "ALLOW_PROBE_RESP", \ - "PRIVACY_MUST_START", \ - "PRIVACY_CAN_JOIN", \ - "BASIC_RATE_SET", \ - "Firmware version", \ - "Current BSS Id", \ - "Current INITED", \ - "Current DEF_TXRATE", \ - "Current ENCRYPT", \ - "Current NET_TYPE", \ - "Current SSID", \ - "Current PRIV_START", \ - "Current PRIV_JOIN", \ - "Desired BSSID", \ - "Desired INITED", \ - "Desired DEF_TXRATE", \ - "Desired ENCRYPT", \ - "Desired NET_TYPE", \ - "Desired SSID", \ - "Desired PRIV_START", \ - "Desired PRIV_JOIN", \ - "Current AP_STATUS", \ - "Current PROMISC", \ - "Desired AP_STATUS", \ - "Desired PROMISC" \ -} - -#define RAY_MIB_HELP_STRINGS { \ - "0 Ad hoc, 1 Infrastructure", \ - "0 Station, 1 Access Point", \ - "", \ - "0 Passive, 1 Active", \ - "0 Off, 1 On", \ - "", \ - "Bytes", \ - "DWELL_TIME", \ - "BEACON_PERIOD", \ - "DTIM_INTERVAL", \ - "MAX_RETRY", \ - "ACK_TIMO", \ - "SIFS", \ - "DIFS", \ - "PIFS", \ - "RTS_THRESH", \ - "SCAN_DWELL", \ - "SCAN_MAX_DWELL", \ - "ASSOC_TIMO", \ - "ADHOC_SCAN_CYCLE", \ - "INFRA_SCAN_CYCLE", \ - "INFRA_SUPER_SCAN_CYCLE", \ - "PROMISC", \ - "UNIQ_WORD", \ - "SLOT_TIME", \ - "ROAM_LOW_SNR_THRESH", \ - "LOW_SNR_COUNT", \ - "INFRA_MISSED_BEACON_COUNT", \ - "ADHOC_MISSED_BEACON_COUNT", \ - "COUNTRY_CODE", \ - "HOP_SEQ", \ - "HOP_SEQ_LEN", \ - "CW_MAX", \ - "CW_MIN", \ - "NOISE_FILTER_GAIN", \ - "NOISE_LIMIT_OFFSET", \ - "RSSI_THRESH_OFFSET", \ - "BUSY_THRESH_OFFSET", \ - "SYNC_THRESH", \ - "TEST_MODE", \ - "TEST_MIN_CHAN", \ - "TEST_MAX_CHAN", \ - "ALLOW_PROBE_RESP", \ - "PRIVACY_MUST_START", \ - "PRIVACY_CAN_JOIN", \ - "BASIC_RATE_SET", \ - "", \ - "", \ - "0 Joined a net, 1 Created a net", \ - "Current DEF_TXRATE", \ - "Current ENCRYPT", \ - "Current NET_TYPE", \ - "", \ - "Current PRIV_START", \ - "Current PRIV_JOIN", \ - "", \ - "N/A", \ - "Desired DEF_TXRATE", \ - "Desired ENCRYPT", \ - "Desired NET_TYPE", \ - "", \ - "Desired PRIV_START", \ - "Desired PRIV_JOIN", \ - "Current AP_STATUS", \ - "Current PROMISC", \ - "Desired AP_STATUS", \ - "Desired PROMISC" \ -} - -/* - * Applicable versions and work size for each MIB element - */ -#define RAY_MIB_INFO_SIZ4 1 -#define RAY_MIB_INFO_SIZ5 2 -#define RAY_MIB_SIZE(info, mib, version) \ - info[(mib)][(version & RAY_V4)?RAY_MIB_INFO_SIZ4:RAY_MIB_INFO_SIZ5] -#define RAY_MIB_INFO { \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_NET_TYPE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_AP_STATUS */ \ -{RAY_V4|RAY_V5, IEEE80211_NWID_LEN, \ - IEEE80211_NWID_LEN},/* RAY_MIB_SSID */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SCAN_MODE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_APM_MODE */ \ -{RAY_V4|RAY_V5, ETHER_ADDR_LEN, \ - ETHER_ADDR_LEN},/* RAY_MIB_MAC_ADDR */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_FRAG_THRESH */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_DWELL_TIME */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_BEACON_PERIOD */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DTIM_INTERVAL */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_MAX_RETRY */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ACK_TIMO */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SIFS */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DIFS */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_PIFS */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_RTS_THRESH */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_SCAN_DWELL */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_SCAN_MAX_DWELL */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ASSOC_TIMO */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ADHOC_SCAN_CYCLE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_INFRA_SCAN_CYCLE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_INFRA_SUPER_SCAN_CYCLE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_PROMISC */ \ -{RAY_V4|RAY_V5, 2, 2}, /* RAY_MIB_UNIQ_WORD */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SLOT_TIME */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ROAM_LOW_SNR_THRESH */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_LOW_SNR_COUNT */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_INFRA_MISSED_BEACON_COUNT */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_ADHOC_MISSED_BEACON_COUNT */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_COUNTRY_CODE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_HOP_SEQ */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_HOP_SEQ_LEN */ \ -{RAY_V4|RAY_V5, 1, 2}, /* RAY_MIB_CW_MAX */ \ -{RAY_V4|RAY_V5, 1, 2}, /* RAY_MIB_CW_MIN */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_NOISE_FILTER_GAIN */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_NOISE_LIMIT_OFFSET */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_RSSI_THRESH_OFFSET */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_BUSY_THRESH_OFFSET */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_SYNC_THRESH */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_TEST_MODE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_TEST_MIN_CHAN */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_TEST_MAX_CHAN */ \ -{ RAY_V5, 0, 1}, /* RAY_MIB_ALLOW_PROBE_RESP */ \ -{ RAY_V5, 0, 1}, /* RAY_MIB_PRIVACY_MUST_START */ \ -{ RAY_V5, 0, 1}, /* RAY_MIB_PRIVACY_CAN_JOIN */ \ -{ RAY_V5, 0, 8}, /* RAY_MIB_BASIC_RATE_SET */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_VERSION */ \ -{RAY_V4|RAY_V5, ETHER_ADDR_LEN, \ - ETHER_ADDR_LEN},/* RAY_MIB_CUR_BSSID */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_INITED */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_DEF_TXRATE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_ENCRYPT */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_NET_TYPE */ \ -{RAY_V4|RAY_V5, IEEE80211_NWID_LEN, \ - IEEE80211_NWID_LEN}, /* RAY_MIB_CUR_SSID */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_PRIV_START */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_PRIV_JOIN */ \ -{RAY_V4|RAY_V5, ETHER_ADDR_LEN, \ - ETHER_ADDR_LEN},/* RAY_MIB_DES_BSSID */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_INITED */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_DEF_TXRATE */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_ENCRYPT */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_NET_TYPE */ \ -{RAY_V4|RAY_V5, IEEE80211_NWID_LEN, \ - IEEE80211_NWID_LEN}, /* RAY_MIB_DES_SSID */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_PRIV_START */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_PRIV_JOIN */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_AP_STATUS */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_CUR_PROMISC */ \ -{RAY_V4|RAY_V5, 1, 1}, /* RAY_MIB_DES_AP_STATUS */ \ -{RAY_V4|RAY_V5, 1, 1} /* RAY_MIB_DES_PROMISC */ \ -} - -/* - * MIB values - * - * I've included comments as to where the numbers have originated - * from. - * - * Linux refers to ray_cs.c and rayctl.h from version 167 of the - * Linux Raylink driver. - * - * NetBSD refers to if_ray.c from version 1.12 of the NetBSD Raylink - * driver. - * - * Symb refers to numbers cleaned from the 802.11 specification, - * discussion with 802.11 knowledgable people at Symbionics or - * stuff needed by me (i.e. me, * aps, ifo, hjl). - * - * V4 and V5 refer to settings for version 4 and version 5 of - * the firmware. - * - * DOC refers to the - * Combined Interface Requirements Specification - * and Interface Design Document (IRS/IDD) - * for the - * WLAN System Interfaces Between the - * HOST COMPUTER and the - * PCMCIA WLAN INTERFACE CARD - * Revision ECF 5.00 - * 17 June, 1998 - */ - -/* XXX Obtained by raycontrol _before_ downloading - * # /sys/dev/ray/raycontrol/raycontrol -i ray0 - * Firmware version 4 - * Network type 0x01 0 Ad hoc, 1 Infrastructure - * AP status 0x00 0 Station, 1 Access Point - * SSID - * Scan mode 0x01 0 Passive, 1 Active - * APM mode 0x00 0 Off, 1 On - * MAC address 00:00:8f:48:e4:44 - * Fragmentation threshold 0x0200 FRAG_THRESH - * Dwell tIME 0x01 DWELL_TIME - * Beacon period 0x01 BEACON_PERIOD - * DTIM_INTERVAL 0x05 DTIM_INTERVAL - * MAX_RETRY 0x03 MAX_RETRY - * ACK_TIMO 0x8c ACK_TIMO - * SIFS 0x1e SIFS - * DIFS 0x82 DIFS - * PIFS 0xce PIFS - * RTS_THRESH 0x0100 RTS_THRESH - * SCAN_DWELL 0xfc18 SCAN_DWELL - * SCAN_MAX_DWELL 0xc180 SCAN_MAX_DWELL - * ASSOC_TIMO 0x05 ASSOC_TIMO - * ADHOC_SCAN_CYCLE 0x04 ADHOC_SCAN_CYCLE - * INFRA_SCAN_CYCLE 0x02 INFRA_SCAN_CYCLE - * INFRA_SUPER_SCAN_CYCLE 0x04 INFRA_SUPER_SCAN_CYCLE - * PROMISC 0x00 PROMISC - * UNIQ_WORD 0x0cbd UNIQ_WORD - * SLOT_TIME 0x4e SLOT_TIME - * ROAM_LOW_SNR_THRESH 0x20 ROAM_LOW_SNR_THRESH - * LOW_SNR_COUNT 0x04 LOW_SNR_COUNT - * INFRA_MISSED_BEACON_COUNT 0x04 INFRA_MISSED_BEACON_COUNT - * ADHOC_MISSED_BEACON_COUNT 0x04 ADHOC_MISSED_BEACON_COUNT - * COUNTRY_CODE 0x01 COUNTRY_CODE - * HOP_SEQ 0x07 HOP_SEQ - * HOP_SEQ_LEN 0x4e HOP_SEQ_LEN - * CW_MAX 0x3f CW_MAX - * CW_MIN 0x0f CW_MIN - * NOISE_FILTER_GAIN 0x00 NOISE_FILTER_GAIN - * NOISE_LIMIT_OFFSET 0x00 NOISE_LIMIT_OFFSET - * RSSI_THRESH_OFFSET 0x70 RSSI_THRESH_OFFSET - * BUSY_THRESH_OFFSET 0x70 BUSY_THRESH_OFFSET - * SYNC_THRESH 0x07 SYNC_THRESH - * TEST_MODE 0x00 TEST_MODE - * TEST_MIN_CHAN 0x02 TEST_MIN_CHAN - * TEST_MAX_CHAN 0x02 TEST_MAX_CHAN -*/ - -/* - * mib_net_type - * - * DOC 0x01 - Defines network type for Start and Join - * - Network commands. - * - * Symb 0x00 - Adhoc is safer and I ain't got an AP - */ -#define RAY_MIB_NET_TYPE_ADHOC 0x00 -#define RAY_MIB_NET_TYPE_INFRA 0x01 -#define RAY_MIB_NET_TYPE_DEFAULT RAY_MIB_NET_TYPE_ADHOC - -/* - * mib_ap_status - * - * DOC 0x00 - Applicable only when Network Type is - * - Infrastructure. - */ -#define RAY_MIB_AP_STATUS_TERMINAL 0x00 -#define RAY_MIB_AP_STATUS_AP 0x01 -#define RAY_MIB_AP_STATUS_DEFAULT RAY_MIB_AP_STATUS_TERMINAL - -/* - * mib_ssid - * - * DOC ESSID1 - Service Set ID. Can be any ASCII string - * - up to 32 bytes in length. If the string is - * - less than 32 bytes long, it must be - * - followed by a byte of 00h. - * - * Symb - windows setting comes from the Aviator software v1.1 - */ -#define RAY_MIB_SSID_WINDOWS "NETWORK_NAME" -#define RAY_MIB_SSID_NOT_WINDOWS "WIRELESS_NETWORK" -#define RAY_MIB_SSID_DEFAULT RAY_MIB_SSID_WINDOWS - -/* - * mib_scan_mode - * - * DOC 0x01 - Defines acquisition approach for - * - terminals operating in either Ad Hoc or - * - Infrastructure Networks. N/A for APs. - */ -#define RAY_MIB_SCAN_MODE_PASSIVE 0x00 -#define RAY_MIB_SCAN_MODE_ACTIVE 0x01 -#define RAY_MIB_SCAN_MODE_DEFAULT RAY_MIB_SCAN_MODE_ACTIVE - -/* - * mib_apm_mode - * - * DOC 0x00 - Defines power management mode for - * - stations operating in either Ad Hoc or - * - Infrastructure Networks. Must always - * - be 0 for APs. - */ -#define RAY_MIB_APM_MODE_NONE 0x00 -#define RAY_MIB_APM_MODE_POWERSAVE 0x01 -#define RAY_MIB_APM_MODE_DEFAULT RAY_MIB_APM_MODE_NONE - -/* - * mib_mac_addr - * - * DOC - MAC Address to be used by WIC (For - * - format see Figure 3.2.4.1.2-1, MAC - * - Address Format). Host may echo card - * - supplied address or use locally - * - administered address. - */ - -/* - * mib_frag_thresh - * - * DOC 0x7fff - Maximum over-the-air packet size (in - * - bytes) - * - * Symb 0xXXXX - you really should fragment when in low signal - * - conditions but getting it wrong - * crucifies the performance - */ -#define RAY_MIB_FRAG_THRESH_MINIMUM 0 -#define RAY_MIB_FRAG_THRESH_MAXIMUM 2346 -#define RAY_MIB_FRAG_THRESH_DISABLE 0x7fff -#define RAY_MIB_FRAG_THRESH_DEFAULT RAY_MIB_FRAG_THRESH_DISABLE - -/* - * mib_dwell_time - * - * DOC 0x0080 - Defines hop dwell time in Kusec. - * - Required only of stations which intend - * - to issue a Start Network command. - * - Forward Compatible Firmware (Build - * - 5) requires that the dwell time be one of - * - the set 16, 32, 64, 128, and 256. - * - * Linux.h - 16k * 2**n, n=0-4 in Kus - * Linux.c-V4 0x0200 - * Linux.c-V5 0x0080 - 128 Kus - * NetBSD-V4 0x0200 - from Linux - * NetBSD-V4 0x0400 - "divined" - * NetBSD-V5 0x0080 - * Symb-V4 0xXXXX - 802.11 dwell time is XXX Kus - * Symb-V5 0xXXXX - 802.11 dwell time is XXX Kus - * - * XXX confirm that 1024Kus is okay for windows driver - how? and see - * XXX how it is over the maximum - */ -#define RAY_MIB_DWELL_TIME_MINIMUM 1 -#define RAY_MIB_DWELL_TIME_MAXIMUM 390 -#define RAY_MIB_DWELL_TIME_V4 0x0400 -#define RAY_MIB_DWELL_TIME_V5 0x0080 - -/* - * mib_beacon_period - * - * DOC 0x0100 - Defines time between target beacon - * - transmit times (TBTT) in Kusec. - * - Forward Compatible Firmware (Build - * - 5) requires that the Beacon Period be an - * - integral multiple of the Dwell Time (not - * - exceeding 255 hops). - * - Required only of stations which intend - * - to issue a Start Network command. - * - * Linux.h - n * a_hop_time in Kus - * Linux.c-V4 0x0001 - * Linux.c-V5 0x0100 - 256 Kus - * NetBSD-V4 0x0001 - from Linux - * NetBSD-V4 0x0000 - "divined" - * NetBSD-V5 0x0100 - * Symb-V4 0x0001 - best performance is one beacon each dwell XXX - * Symb-V5 0x0080 - best performance is one beacon each dwell XXX - * - * XXX V4 should probably set this to dwell_time - */ -#define RAY_MIB_BEACON_PERIOD_MINIMUM 1 -#define RAY_MIB_BEACON_PERIOD_MAXIMUM 0xffff -#define RAY_MIB_BEACON_PERIOD_V4 0x0001 -#define RAY_MIB_BEACON_PERIOD_V5 RAY_MIB_DWELL_TIME_V5 - -/* - * mib_dtim_interval - * - * DOC 0x01 - Number of beacons per DTIM period. - * - Only APs will use this parameter, to set - * - the DTIM period. - * - * Linux.h - in beacons - * Linux.c 0x01 - * NetBSD 0x01 - * Symb 0xXX - need to find out what DTIM is - */ -#define RAY_MIB_DTIM_INTERVAL_MINIMUM 1 -#define RAY_MIB_DTIM_INTERVAL_MAXIMUM 255 -#define RAY_MIB_DTIM_INTERVAL_DEFAULT 0x01 - -/* - * mib_max_retry - * - * DOC 31 - Number of times WIC will attempt to - * - retransmit a failed packet. - * - * Linux.c 0x07 - * NetBSD 0x01 - "documented default for 5/6" - * NetBSD 0x07 - from Linux - * NetBSD 0x03 - "divined" - * Symb 0xXX - 7 retries seems okay but check with APS - */ -#define RAY_MIB_MAX_RETRY_MINIMUM 0 -#define RAY_MIB_MAX_RETRY_MAXIMUM 255 -#define RAY_MIB_MAX_RETRY_DEFAULT 0x07 - -/* - * mib_ack_timo - * - * DOC 0x86 - Time WIC will wait after completion of - * - a transmit before timing out anticipated - * - ACK (2 usec steps). Should equal - * - SIFS + constant. - * - * Linux.c 0xa3 - * NetBSD 0x86 - documented default for 5/6 - * NetBSD 0xa3 - from Linux - * NetBSD 0xa3 - "divined" - * Symb 0xXX - this must be a 802.11 defined setting? - */ -#define RAY_MIB_ACK_TIMO_MINIMUM 0 -#define RAY_MIB_ACK_TIMO_MAXIMUM 255 -#define RAY_MIB_ACK_TIMO_DEFAULT 0xa3 - -/* - * mib_sifs - * - * DOC 0x1c - SIFS time in usec. - * - * Linux.c 0x1d - * NetBSD 0x1c - documented default for 5/6 - * NetBSD 0x1d - from Linux - * NetBSD 0x1d - "divined" - * Symb 0xXX - default SIFS for 802.11 - */ -#define RAY_MIB_SIFS_MINIMUM 28 -#define RAY_MIB_SIFS_MAXIMUM 62 -#define RAY_MIB_SIFS_DEFAULT 0x1d - -/* - * mib_difs - * - * DOC 0x82 - DIFS time in usec. - */ -#define RAY_MIB_DIFS_MINIMUM 130 -#define RAY_MIB_DIFS_MAXIMUM 255 -#define RAY_MIB_DIFS_DEFAULT 0x82 - -/* - * mib_pifs - * - * DOC 78 - PIFS time in usec. (Not currently - * - implemented. - */ -#define RAY_MIB_PIFS_MINIMUM 78 -#define RAY_MIB_PIFS_MAXIMUM 255 -#define RAY_MIB_PIFS_V4 0xce -#define RAY_MIB_PIFS_V5 0x4e - -/* - * mib_rts_thresh - * - * DOC 0x7ffff - Threshold size in bytes below which - * - messages will not require use of RTS - * - Protocol. - * - * Linux.c 0x7fff - * NetBSD 0x7fff - disabled - * Symb 0xXXXX - need to set this realistically to get CTS/RTS mode - * working right - */ -#define RAY_MIB_RTS_THRESH_MINIMUM 0 -#define RAY_MIB_RTS_THRESH_MAXIMUM 2346 -#define RAY_MIB_RTS_THRESH_DISABLE 0x7fff -#define RAY_MIB_RTS_THRESH_DEFAULT RAY_MIB_RTS_THRESH_DISABLE - -/* - * mib_scan_dwell - * - * DOC 0x04e2 - Time channel remains clear after probe - * - transmission prior to hopping to next - * - channel. (in 2 msec steps). - * - * Linux.c-V4 0xfb1e - 128572us - * Linix.c-V5 0x04e2 - 2500us - * NetBSD-V4 0xfb1e - * NetBSD-V5 0x04e2 - * Symb 0xXXXX - Check that v4 h/w can do 2.5ms and default it - */ -#define RAY_MIB_SCAN_DWELL_MINIMUM 1 -#define RAY_MIB_SCAN_DWELL_MAXIMUM 65535 -#define RAY_MIB_SCAN_DWELL_V4 0xfb1e -#define RAY_MIB_SCAN_DWELL_V5 0x04e2 - -/* - * mib_scan_max_dwell - * - * DOC 0x38a4 - Time to remain on a frequency channel - * - if CCA is detected after probe - * - transmission. (in 2 usec steps). - * - * Linux.c-V4 0xc75c - 102072us - * Linix.c-V5 0x38a4 - 29000us - * NetBSD-V4 0xc75c - * NetBSD-V5 0x38a4 - * Symb 0xXXXX - see above - this may be total time before giving up - */ -#define RAY_MIB_SCAN_MAX_DWELL_MINIMUM 1 -#define RAY_MIB_SCAN_MAX_DWELL_MAXIMUM 65535 -#define RAY_MIB_SCAN_MAX_DWELL_V4 0xc75c -#define RAY_MIB_SCAN_MAX_DWELL_V5 0x38a4 - -/* - * mib_assoc_timo - * - * DOC 0x05 - Time (in hops) a station waits after - * - transmitting an Association Request - * - Message before association attempt is - * - considered failed. N/A for Ad Hoc - * - Networks and for APs in Infrastructure - */ -#define RAY_MIB_ASSOC_TIMO_MINIMUM 0 -#define RAY_MIB_ASSOC_TIMO_MAXIMUM 255 -#define RAY_MIB_ASSOC_TIMO_DEFAULT 0x05 - -/* - * mib_adhoc_scan_cycle - * - * DOC 0x08 - Maximum number of times to cycle - * - through frequency hopping pattern as - * - part of scanning during Ad Hoc - * - Acquisition. - */ -#define RAY_MIB_ADHOC_SCAN_CYCLE_MINIMUM 1 -#define RAY_MIB_ADHOC_SCAN_CYCLE_MAXIMUM 255 -#define RAY_MIB_ADHOC_SCAN_CYCLE_DEFAULT 0x08 - -/* - * mib_infra_scan_cycle - * - * DOC 0x02 - Number of times to cycle through - * - frequency hopping pattern as part of - * - scanning during Infrastructure Network - * - Acquisition. - */ -#define RAY_MIB_INFRA_SCAN_CYCLE_MINIMUM 1 -#define RAY_MIB_INFRA_SCAN_CYCLE_MAXIMUM 255 -#define RAY_MIB_INFRA_SCAN_CYCLE_DEFAULT 0x02 - -/* - * mib_infra_super_scan_cycle - * - * DOC 0x08 - Number of times to repeat an - * - Infrastructure scan cycle if no APs are - * - found before indicating a failure. - */ -#define RAY_MIB_INFRA_SUPER_SCAN_CYCLE_MINIMUM 1 -#define RAY_MIB_INFRA_SUPER_SCAN_CYCLE_MAXIMUM 255 -#define RAY_MIB_INFRA_SUPER_SCAN_CYCLE_DEFAULT 0x08 - -/* - * mib_promisc - * - * DOC 0x00 - Controls operation of WIC in - * - promiscuous mode. - */ -#define RAY_MIB_PROMISC_DISABLED 0 -#define RAY_MIB_PROMISC_ENABLED 1 -#define RAY_MIB_PROMISC_DEFAULT 0x00 - -/* - * mib_uniq_word - * - * DOC 0x0cdb - Unique word pattern (Transmitted as - * - 0CBDh per 802.11) - */ -#define RAY_MIB_UNIQ_WORD_MINIMUM 0 -#define RAY_MIB_UNIQ_WORD_MAXIMUM 0xffff -#define RAY_MIB_UNIQ_WORD_DEFAULT 0x0cbd - -/* - * mib_slot_time - * - * DOC 0x32 - Slot time in usec - * - * Linux.c-V4 0x4e - * Linix.c-V5 0x32 - * NetBSD-V4 0x4e - Linux - * NetBSD-V4 0x18 - "divined" - * NetBSD-V5 0x32 - mentions spec. is 50us i.e. 0x32 - * Symb 0xXX - wtf 0x4e = 78 - */ -#define RAY_MIB_SLOT_TIME_MINIMUM 1 -#define RAY_MIB_SLOT_TIME_MAXIMUM 128 -#define RAY_MIB_SLOT_TIME_V4 0x4e -#define RAY_MIB_SLOT_TIME_V5 0x32 - -/* - * mib_roam_low_snr_thresh - * - * DOC 0xff - SNR Threshold for use by roaming - * - algorithm. [Low power count is - * - incremented when Beacon is received at - * - SNR lower than Roaming Low SNR - * - Threshold.] To disable, set to FFh. - * - * Linux.c 0xff - * NetBSD-V4 0xff - Linux - * NetBSD-V4 0x30 - "divined" - * NetBSD-V5 0xff - disabled - * NetBSD.h - if below this inc count - * Symb 0xXX - hmm is 0xff really disabled? need this to work - */ -#define RAY_MIB_ROAM_LOW_SNR_THRESH_MINIMUM 0 -#define RAY_MIB_ROAM_LOW_SNR_THRESH_MAXIMUM 255 -#define RAY_MIB_ROAM_LOW_SNR_THRESH_DISABLED 0xff -#define RAY_MIB_ROAM_LOW_SNR_THRESH_DEFAULT RAY_MIB_ROAM_LOW_SNR_THRESH_DISABLED - -/* - * mib_low_snr_count - * - * DOC 0xff - Threshold that number of consecutive - * - beacons received at SNR < Roaming - * - Low SNR Threshold must exceed - * - before roaming processing begins. To - * - disable, set to FFh. - * - * Linux.c 0xff - * NetBSD 0x07 - "divined - check" and marked as disabled - * NetBSD 0xff - disabled - * NetBSD.h - roam after cnt below thrsh - * Symb 0xXX - hmm is 0xff really disabled? need - * - this to work in infrastructure mode with mutliple APs - */ -#define RAY_MIB_LOW_SNR_COUNT_MINIMUM 0 -#define RAY_MIB_LOW_SNR_COUNT_MAXIMUM 255 -#define RAY_MIB_LOW_SNR_COUNT_DISABLED 0xff -#define RAY_MIB_LOW_SNR_COUNT_DEFAULT RAY_MIB_LOW_SNR_COUNT_DISABLED - -/* - * mib_infra_missed_beacon_count - * - * DOC 0x02 - Threshold that number of consecutive - * - beacons not received must exceed - * - before roaming processing begins in an - * - infrastructure network. To disable, set - * - to FFh. - * Linux.c 0x05 - * NetBSD 0x02 - documented default for 5/6 - * NetBSD 0x05 - Linux - * NetBSD 0x07 - "divined - check, looks fishy" - * Symb 0xXX - 5 missed beacons is probably okay - */ -#define RAY_MIB_INFRA_MISSED_BEACON_COUNT_MINIMUM 0 -#define RAY_MIB_INFRA_MISSED_BEACON_COUNT_MAXIMUM 255 -#define RAY_MIB_INFRA_MISSED_BEACON_COUNT_DEFAULT 0x05 - -/* - * mib_adhoc_missed_beacon_count - * - * DOC 0xff - Threshold that number of consecutive - * - beacons transmitted by a terminal must - * - exceed before reacquisition processing - * - begins in Ad Hoc Network. - */ -#define RAY_MIB_ADHOC_MISSED_BEACON_COUNT_MINIMUM 0 -#define RAY_MIB_ADHOC_MISSED_BEACON_COUNT_MAXIMUM 255 -#define RAY_MIB_ADHOC_MISSED_BEACON_COUNT_DISABLED 0xff -#define RAY_MIB_ADHOC_MISSED_BEACON_COUNT_DEFAULT RAY_MIB_ADHOC_MISSED_BEACON_COUNT_DISABLED - -/* - * mib_country_code - * - * DOC 0x01 - Country set of hopping patterns - * - (element value in beacon) - * - Note: Japan Test is for a special test - * - mode required by the Japanese - * - regulatory authorities. - */ -#define RAY_MIB_COUNTRY_CODE_MIMIMUM 0x01 -#define RAY_MIB_COUNTRY_CODE_MAXIMUM 0x09 -#define RAY_MIB_COUNTRY_CODE_USA 0x01 -#define RAY_MIB_COUNTRY_CODE_EUROPE 0x02 -#define RAY_MIB_COUNTRY_CODE_JAPAN 0x03 -#define RAY_MIB_COUNTRY_CODE_KOREA 0x04 -#define RAY_MIB_COUNTRY_CODE_SPAIN 0x05 -#define RAY_MIB_COUNTRY_CODE_FRANCE 0x06 -#define RAY_MIB_COUNTRY_CODE_ISRAEL 0x07 -#define RAY_MIB_COUNTRY_CODE_AUSTRALIA 0x08 -#define RAY_MIB_COUNTRY_CODE_JAPAN_TEST 0x09 -#define RAY_MIB_COUNTRY_CODE_DEFAULT RAY_MIB_COUNTRY_CODE_USA - -/* - * mib_hop_seq - * - * DOC 0x0b - Hop Pattern to use. (Currently 66 - * - US/Europe plus 12 Japanese). - * - * NetBSD.h - no longer supported - */ -#define RAY_MIB_HOP_SEQ_MINIMUM 6 -#define RAY_MIB_HOP_SEQ_MAXIMUM 72 -#define RAY_MIB_HOP_SEQ_DEFAULT 0x0b - -/* - * mib_hop_seq_len - * - * DOC 0x4f - Number of frequency channels in - * - hopping pattern is now set to the value - * - defined in IEEE802.11 for the selected - * - Current Country Code. - */ -#define RAY_MIB_HOP_SEQ_LEN_MINIMUM 1 -#define RAY_MIB_HOP_SEQ_LEN_MAXIMUM 79 -#define RAY_MIB_HOP_SEQ_LEN_V4 0x4e -#define RAY_MIB_HOP_SEQ_LEN_V5 0x4f - -/* XXX need to update these to the spec. XXX */ - -/* - * All from here down are the same in Linux/NetBSD and seem to be sane. - */ -#define RAY_MIB_CW_MAX_V4 0x3f -#define RAY_MIB_CW_MAX_V5 0x003f - -#define RAY_MIB_CW_MIN_V4 0x0f -#define RAY_MIB_CW_MIN_V5 0x000f - -/* - * Symb 0xXX - these parameters will affect the clear channel - * assesment false triggering - * - */ -#define RAY_MIB_NOISE_FILTER_GAIN_DEFAULT 0x04 -#define RAY_MIB_NOISE_LIMIT_OFFSET_DEFAULT 0x08 -#define RAY_MIB_RSSI_THRESH_OFFSET_DEFAULT 0x28 -#define RAY_MIB_BUSY_THRESH_OFFSET_DEFAULT 0x28 -#define RAY_MIB_SYNC_THRESH_DEFAULT 0x07 - -#define RAY_MIB_TEST_MODE_NORMAL 0x0 -#define RAY_MIB_TEST_MODE_ANT_1 0x1 -#define RAY_MIB_TEST_MODE_ATN_2 0x2 -#define RAY_MIB_TEST_MODE_ATN_BOTH 0x3 -#define RAY_MIB_TEST_MODE_DEFAULT RAY_MIB_TEST_MODE_NORMAL - -#define RAY_MIB_TEST_MIN_CHAN_DEFAULT 0x02 -#define RAY_MIB_TEST_MAX_CHAN_DEFAULT 0x02 - -#define RAY_MIB_ALLOW_PROBE_RESP_DISALLOW 0x0 -#define RAY_MIB_ALLOW_PROBE_RESP_ALLOW 0x1 -#define RAY_MIB_ALLOW_PROBE_RESP_DEFAULT RAY_MIB_ALLOW_PROBE_RESP_DISALLOW - -#define RAY_MIB_PRIVACY_MUST_START_NOWEP 0x0 -#define RAY_MIB_PRIVACY_MUST_START_WEP 0x1 -#define RAY_MIB_PRIVACY_MUST_START_DEFAULT RAY_MIB_PRIVACY_MUST_START_NOWEP - -#define RAY_MIB_PRIVACY_CAN_JOIN_NOWEP 0x0 -#define RAY_MIB_PRIVACY_CAN_JOIN_WEP 0x1 -#define RAY_MIB_PRIVACY_CAN_JOIN_DONT_CARE 0x2 -#define RAY_MIB_PRIVACY_CAN_JOIN_DEFAULT RAY_MIB_PRIVACY_CAN_JOIN_NOWEP - -#define RAY_MIB_BASIC_RATE_SET_MINIMUM 1 -#define RAY_MIB_BASIC_RATE_SET_MAXIMUM 4 -#define RAY_MIB_BASIC_RATE_SET_500K 1 -#define RAY_MIB_BASIC_RATE_SET_1000K 2 -#define RAY_MIB_BASIC_RATE_SET_1500K 3 -#define RAY_MIB_BASIC_RATE_SET_2000K 4 -#define RAY_MIB_BASIC_RATE_SET_DEFAULT RAY_MIB_BASIC_RATE_SET_2000K - -/* - * IOCTL support - */ -struct ray_param_req { - int r_failcause; - u_int8_t r_paramid; - u_int8_t r_len; - u_int8_t r_data[256]; -}; -struct ray_stats_req { - u_int64_t rxoverflow; /* Number of rx overflows */ - u_int64_t rxcksum; /* Number of checksum errors */ - u_int64_t rxhcksum; /* Number of header checksum errors */ - u_int8_t rxnoise; /* Average receiver level */ -}; -#define RAY_FAILCAUSE_EIDRANGE 1 -#define RAY_FAILCAUSE_ELENGTH 2 -/* device can possibly return up to 255 */ -#define RAY_FAILCAUSE_EDEVSTOP 256 - -/* Get a param the data is a ray_param_req structure */ -#define SIOCSRAYPARAM SIOCSIFGENERIC -#define SIOCGRAYPARAM SIOCGIFGENERIC -/* Get the error counters the data is a ray_stats_req structure */ -#define SIOCGRAYSTATS _IOWR('i', 201, struct ifreq) -#define SIOCGRAYSIGLEV _IOWR('i', 202, struct ifreq) - -#define RAY_NSIGLEVRECS 8 -#define RAY_NSIGLEV 8 -#define RAY_NANTENNA 8 - -struct ray_siglev { - u_int8_t rsl_host[ETHER_ADDR_LEN]; /* MAC address */ - u_int8_t rsl_siglevs[RAY_NSIGLEV]; /* levels, newest in [0] */ - u_int8_t rsl_antennas[RAY_NANTENNA]; /* best antenna */ - struct timeval rsl_time; /* time of last packet */ -}; diff --git a/sys/dev/ray/if_rayreg.h b/sys/dev/ray/if_rayreg.h deleted file mode 100644 index cff653f6d0fb..000000000000 --- a/sys/dev/ray/if_rayreg.h +++ /dev/null @@ -1,480 +0,0 @@ -/* - * Copyright (C) 2000 - * Dr. Duncan McLennan Barclay, dmlb@ragnet.demon.co.uk. - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY DUNCAN BARCLAY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL DUNCAN BARCLAY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - * - */ - -/* $NetBSD: if_rayreg.h,v 1.1 2000/01/23 23:59:22 chopps Exp $ */ -/* - * Copyright (c) 2000 Christian E. Hopps - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -/* - * CCR registers, appearing in the attribute memory space - */ -#define RAY_CCR 0xf00 /* CCR register offset */ -#define RAY_COR (RAY_CCR + 0x00) /* config option register */ -#define RAY_CCSR (RAY_CCR + 0x01) /* config/status register */ -#define RAY_PIN (RAY_CCR + 0x02) /* not used by hw */ -#define RAY_SOCKETCOPY (RAY_CCR + 0x03) /* not used by hw */ -#define RAY_HCSIR (RAY_CCR + 0x05) /* HCS intr register */ -#define RAY_ECFIR (RAY_CCR + 0x06) /* ECF intr register */ -/* - * We don't seem to be able to access these in a simple manner - */ -#define RAY_AR0 (RAY_CCR + 0x08) /* authorization register 0 (unused) */ -#define RAY_AR1 (RAY_CCR + 0x09) /* authorization register 1 (unused) */ -#define RAY_PMR (RAY_CCR + 0x0a) /* program mode register (unused) */ -#define RAY_TMR (RAY_CCR + 0x0b) /* pc test mode register (unused) */ -#define RAY_FCWR (RAY_CCR + 0x10) /* frequency control word register */ -#define RAY_TMC1 (RAY_CCR + 0x14) /* test mode control 1 (unused) */ -#define RAY_TMC2 (RAY_CCR + 0x15) /* test mode control 1 (unused) */ -#define RAY_TMC3 (RAY_CCR + 0x16) /* test mode control 1 (unused) */ -#define RAY_TMC4 (RAY_CCR + 0x17) /* test mode control 1 (unused) */ - -/* - * COR register bits - */ -#define RAY_COR_CFG_NUM 0x01 /* currently ignored and set */ -#define RAY_COR_CFG_MASK 0x3f /* mask for function */ -#define RAY_COR_LEVEL_IRQ 0x40 /* currently ignored and set */ -#define RAY_COR_RESET 0x80 /* soft-reset the card */ -#define RAY_COR_DEFAULT (RAY_COR_CFG_NUM | RAY_COR_LEVEL_IRQ) - -/* - * CCS register bits - */ -#define RAY_CCS_NORMAL 0x00 /* normal operation */ -#define RAY_CCS_IRQ 0x02 /* interrupt pending */ -#define RAY_CCS_POWER_DOWN 0x04 /* when written powers down card */ - -/* - * HCSIR bits - * - * the host can only clear this bit. - */ -#define RAY_HCSIR_IRQ 0x01 /* indicates an interrupt */ - -/* - * ECFIR values - */ -#define RAY_ECFIR_IRQ 0x01 /* interrupt the card */ - -/* - * AR0 values - * used for testing/programming the card (unused) - */ -#define RAY_AR0_ON 0x57 - -/* - * AR1 values - * used for testing/programming the card (unused) - */ -#define RAY_AR1_ON 0x82 - -/* - * PMR bits - * these are used to program the card (unused) - */ -#define RAY_PMR_NORMAL 0x00 /* normal operation */ -#define RAY_PMR_PC2PM 0x02 /* grant access to firmware flash */ -#define RAY_PMR_PC2CAL 0x10 /* read access to the A/D modem inp */ -#define RAY_PMR_MLSE 0x20 /* read access to the MSLE prom */ - -/* - * TMR bits - * get access to test modes (unused) - */ -#define RAY_TMR_NORMAL 0x00 /* normal operation */ -#define RAY_TMR_TEST 0x08 /* test mode */ - -/* - * FCWR -- frequency control word, values from [0x02,0xA6] map to - * RF frequency values. - */ - -/* - * 48k of memory - */ -#define RAY_SRAM_MEM_BASE 0 -#define RAY_SRAM_MEM_SIZE 0xc000 - -/* - * offsets into shared ram - */ -#define RAY_SCB_BASE 0x0000 /* cfg/status/ctl area */ -#define RAY_STATUS_BASE 0x0100 -#define RAY_HOST_TO_ECF_BASE 0x0200 -#define RAY_ECF_TO_HOST_BASE 0x0300 -#define RAY_CCS_BASE 0x0400 -#define RAY_RCS_BASE 0x0800 -#define RAY_APOINT_TIM_BASE 0x0c00 -#define RAY_SSID_LIST_BASE 0x0d00 -#define RAY_TX_BASE 0x1000 -#define RAY_TX_SIZE 0x7000 -#define RAY_TX_END 0x8000 -#define RAY_RX_BASE 0x8000 -#define RAY_RX_END 0xc000 -#define RAY_RX_MASK 0x3fff - -/* - * Startup reporting stucture - */ -struct ray_ecf_startup_v4 { - u_int8_t e_status; - u_int8_t e_station_addr[ETHER_ADDR_LEN]; - u_int8_t e_prg_cksum; - u_int8_t e_cis_cksum; - u_int8_t e_resv0[7]; - u_int8_t e_japan_callsign[12]; -}; -struct ray_ecf_startup_v5 { - u_int8_t e_status; - u_int8_t e_station_addr[ETHER_ADDR_LEN]; - u_int8_t e_resv0; - u_int8_t e_rates[8]; - u_int8_t e_japan_callsign[12]; - u_int8_t e_prg_cksum; - u_int8_t e_cis_cksum; - u_int8_t e_fw_build_string; - u_int8_t e_fw_build; - u_int8_t e_fw_resv; - u_int8_t e_asic_version; - u_int8_t e_tibsize; - u_int8_t e_resv1[29]; -}; - -/* - * Startup status word result codes - */ -#define RAY_ECFS_RESERVED0 0x01 -#define RAY_ECFS_PROC_SELF_TEST 0x02 -#define RAY_ECFS_PROG_MEM_CHECKSUM 0x04 -#define RAY_ECFS_DATA_MEM_TEST 0x08 -#define RAY_ECFS_RX_CALIBRATION 0x10 -#define RAY_ECFS_FW_VERSION_COMPAT 0x20 -#define RAY_ECFS_RERSERVED1 0x40 -#define RAY_ECFS_TEST_COMPLETE 0x80 -#define RAY_ECFS_CARD_OK RAY_ECFS_TEST_COMPLETE -#define RAY_ECFS_PRINTFB \ - "\020" \ - "\001RESERVED0" \ - "\002PROC_SELF_TEST" \ - "\003PROG_MEM_CHECKSUM" \ - "\004DATA_MEM_TEST" \ - "\005RX_CALIBRATION" \ - "\006FW_VERSION_COMPAT" \ - "\007RERSERVED1" \ - "\010TEST_COMPLETE" - -/* - * Firmware build codes - */ -#define RAY_ECFS_BUILD_4 0x55 -#define RAY_ECFS_BUILD_5 0x5 - -/* - * System Control Block - */ -#define RAY_SCB_CCSI 0x00 /* host CCS index */ -#define RAY_SCB_RCSI 0x01 /* ecf RCS index */ - -/* - * command control structures (for CCSR commands) - */ - -/* - * commands for CCSR - */ -#define RAY_CMD_DOWNLOAD_PARAMS 0x01 /* download start params */ -#define RAY_CMD_UPDATE_PARAMS 0x02 /* update params */ -#define RAY_CMD_REPORT_PARAMS 0x03 /* report params */ -#define RAY_CMD_UPDATE_MCAST 0x04 /* update mcast list */ -#define RAY_CMD_UPDATE_APM 0x05 /* update power saving mode */ -#define RAY_CMD_START_NET 0x06 -#define RAY_CMD_JOIN_NET 0x07 -#define RAY_CMD_START_ASSOC 0x08 -#define RAY_CMD_TX_REQ 0x09 -#define RAY_CMD_TEST_MEM 0x0a -#define RAY_CMD_SHUTDOWN 0x0b -#define RAY_CMD_DUMP_MEM 0x0c -#define RAY_CMD_START_TIMER 0x0d -#define RAY_CMD_MAX 0x0e - -/* - * unsolicted commands from the ECF - */ -#define RAY_ECMD_RX_DONE 0x80 /* process rx packet */ -#define RAY_ECMD_REJOIN_DONE 0x81 /* rejoined the network */ -#define RAY_ECMD_ROAM_START 0x82 /* romaining started */ -#define RAY_ECMD_JAPAN_CALL_SIGNAL 0x83 /* japan test thing */ - - -/* - * Configure/status/control memory - */ -struct ray_csc { - u_int8_t csc_mrxo_own; /* 0 ECF writes, 1 host write */ - u_int8_t csc_mrxc_own; /* 0 ECF writes, 1 host write */ - u_int8_t csc_rxhc_own; /* 0 ECF writes, 1 host write */ - u_int8_t csc_resv; - u_int16_t csc_mrx_overflow; /* ECF incs on rx overflow */ - u_int16_t csc_mrx_cksum; /* ECF incs on cksum error */ - u_int16_t csc_rx_hcksum; /* ECF incs on header cksum error */ - u_int8_t csc_rx_noise; /* average RSL measuremant */ -}; - -/* - * CCS area - */ -#define RAY_CCS_LINK_NULL 0xff -#define RAY_CCS_SIZE 16 - -#define RAY_CCS_TX_FIRST 0 -#define RAY_CCS_TX_LAST 13 -#define RAY_CCS_NTX (RAY_CCS_TX_LAST - RAY_CCS_TX_FIRST + 1) -#define RAY_TX_BUF_SIZE 2048 -#define RAY_CCS_CMD_FIRST 14 -#define RAY_CCS_CMD_LAST 63 -#define RAY_CCS_NCMD (RAY_CCS_CMD_LAST - RAY_CCS_CMD_FIRST + 1) -#define RAY_CCS_LAST 63 - -#define RAY_CCS_INDEX(ccs) (((ccs) - RAY_CCS_BASE) / RAY_CCS_SIZE) -#define RAY_CCS_ADDRESS(i) (RAY_CCS_BASE + (i) * RAY_CCS_SIZE) - -/* - * RCS area - */ -#define RAY_RCS_FIRST 64 -#define RAY_RCS_LAST 127 - -/* - * CCS commands - */ -struct ray_cmd { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ -}; - -#define RAY_CCS_STATUS_FREE 0x0 -#define RAY_CCS_STATUS_BUSY 0x1 -#define RAY_CCS_STATUS_COMPLETE 0x2 -#define RAY_CCS_STATUS_FAIL 0x3 -#define RAY_CCS_STATUS_STRINGS { \ - "free", \ - "busy", \ - "complete", \ - "fail" \ -} - -/* RAY_CMD_UPDATE_PARAMS */ -struct ray_cmd_update { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_paramid; - u_int8_t c_nparam; - u_int8_t c_failcause; -}; - -/* RAY_CMD_REPORT_PARAMS */ -struct ray_cmd_report { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_paramid; - u_int8_t c_nparam; - u_int8_t c_failcause; - u_int8_t c_len; -}; - -/* RAY_CMD_UPDATE_MCAST */ -struct ray_cmd_update_mcast { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_nmcast; -}; - -/* RAY_CMD_UPDATE_APM */ -struct ray_cmd_udpate_apm { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_mode; -}; - -/* RAY_CMD_START_NET and RAY_CMD_JOIN_NET */ -struct ray_cmd_net { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_upd_param; - u_int8_t c_bss_id[ETHER_ADDR_LEN]; - u_int8_t c_inited; - u_int8_t c_def_txrate; - u_int8_t c_encrypt; -}; -/* Parameters passed in HOST_TO_ECF section when c_upd_param is set in - * ray_cmd_net. */ -struct ray_net_params { - u_int8_t p_net_type; - u_int8_t p_ssid[32]; - u_int8_t p_privacy_must_start; - u_int8_t p_privacy_can_join; -}; - -/* RAY_CMD_START_ASSOC */ -struct ray_cmd_update_assoc { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_astatus; - u_int8_t c_aid[2]; -}; - -/* RAY_CMD_TX_REQ */ -struct ray_cmd_tx { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_bufp[2]; - u_int8_t c_len[2]; - u_int8_t c_resv[5]; - u_int8_t c_tx_rate; - u_int8_t c_apm_mode; - u_int8_t c_nretry; - u_int8_t c_antenna; -}; -struct ray_cmd_tx_4 { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_bufp[2]; - u_int8_t c_len[2]; - u_int8_t c_addr[ETHER_ADDR_LEN]; - u_int8_t c_apm_mode; - u_int8_t c_nretry; - u_int8_t c_antenna; -}; - -/* RAY_CMD_DUMP_MEM */ -struct ray_cmd_dump_mem { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_memtype; - u_int8_t c_memp[2]; - u_int8_t c_len; -}; - -/* RAY_CMD_START_TIMER */ -struct ray_cmd_start_timer { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_duration[2]; -}; - -/* RAY_ECMD_RX_DONE */ -struct ray_cmd_rx { - u_int8_t c_status; /* ccs generic header */ - u_int8_t c_cmd; /* " */ - u_int8_t c_link; /* " */ - u_int8_t c_bufp[2]; /* buffer pointer */ - u_int8_t c_len[2]; /* length */ - u_int8_t c_siglev; /* signal level */ - u_int8_t c_nextfrag; /* next fragment in packet */ - u_int8_t c_pktlen[2]; /* total packet length */ - u_int8_t c_antenna; /* ant. with best reception */ - u_int8_t c_updbss; /* only 1 for beacon messages */ -}; - -/* - * Transmit scratch space and phy header structures - */ -struct ray_tx_tib { - u_int8_t t_ccs_index; - u_int8_t t_psm; - u_int8_t t_pass_fail; - u_int8_t t_retry_count; - u_int8_t t_max_retries; - u_int8_t t_frags_remaining; - u_int8_t t_no_rb; - u_int8_t t_rts_reqd; - u_int8_t t_csma_tx_cntrl_2; - u_int8_t t_sifs_tx_cntrl_2; - u_int8_t t_tx_dma_addr_1[2]; - u_int8_t t_tx_dma_addr_2[2]; - u_int8_t t_var_dur_2mhz[2]; - u_int8_t t_var_dur_1mhz[2]; - u_int8_t t_max_dur_2mhz[2]; - u_int8_t t_max_dur_1mhz[2]; - u_int8_t t_hdr_len; - u_int8_t t_max_frag_len[2]; - u_int8_t t_var_len[2]; - u_int8_t t_phy_hdr_4; - u_int8_t t_mac_hdr_1; - u_int8_t t_mac_hdr_2; - u_int8_t t_sid[2]; -}; - -struct ray_tx_phy_header { - u_int8_t t_sfd[2]; - u_int8_t t_hdr_3; - u_int8_t t_hdr_4; -}; diff --git a/sys/dev/ray/if_rayvar.h b/sys/dev/ray/if_rayvar.h deleted file mode 100644 index d366918b213c..000000000000 --- a/sys/dev/ray/if_rayvar.h +++ /dev/null @@ -1,310 +0,0 @@ -/* - * Copyright (C) 2000 - * Dr. Duncan McLennan Barclay, dmlb@ragnet.demon.co.uk. - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of the author nor the names of any co-contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY DUNCAN BARCLAY AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL DUNCAN BARCLAY OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - * - */ - -/* - * Network parameters, used twice in sotfc to store what we want and what - * we have. - * - * The current parameters are ONLY valid in a function called from the runq - * and should not be accessed directly from ioctls. - */ -struct ray_nw_param { - struct ray_cmd_net p_1; - struct ray_net_params \ - p_2; - u_int8_t np_ap_status; - int np_promisc; -}; -#define np_upd_param p_1.c_upd_param -#define np_bss_id p_1.c_bss_id -#define np_inited p_1.c_inited -#define np_def_txrate p_1.c_def_txrate -#define np_encrypt p_1.c_encrypt -#define np_net_type p_2.p_net_type -#define np_ssid p_2.p_ssid -#define np_priv_start p_2.p_privacy_must_start -#define np_priv_join p_2.p_privacy_can_join - -/* - * One of these structures per allocated device - */ -struct ray_softc { - - device_t dev; /* Device */ - struct arpcom arpcom; /* Ethernet common */ - struct callout_handle - tx_timerh; /* Handle for tx timer */ - struct callout_handle - com_timerh; /* Handle for command timer */ - - bus_space_tag_t am_bst; /* Bus space tag for attribute memory */ - bus_space_handle_t am_bsh; /* Bus space handle for attribute mem */ - int am_rid; /* Resource id for attribute memory */ - struct resource* am_res; /* Resource for attribute memory */ - bus_space_tag_t cm_bst; /* Bus space tag for common memory */ - bus_space_handle_t cm_bsh; /* Bus space handle for common memory */ - int cm_rid; /* Resource id for common memory */ - struct resource* cm_res; /* Resource for common memory */ - int irq_rid; /* Resource id for irq */ - struct resource* irq_res; /* Resource for irq */ - void * irq_handle; /* Handle for irq handler */ - - u_char gone; /* 1 = Card bailed out */ - - int framing; /* Packet framing types */ - - struct ray_ecf_startup_v5 - sc_ecf_startup; /* Startup info from card */ - - TAILQ_HEAD(ray_comq, ray_comq_entry) - sc_comq; /* Command queue */ - - struct ray_nw_param sc_c; /* current network params */ - struct ray_nw_param sc_d; /* desired network params */ - int sc_havenet; /* true if we have a network */ - u_int8_t sc_ccsinuse[64];/* ccss' in use -- not for tx */ - - int sc_checkcounters; - u_int64_t sc_rxoverflow; /* Number of rx overflows */ - u_int64_t sc_rxcksum; /* Number of checksum errors */ - u_int64_t sc_rxhcksum; /* Number of header checksum errors */ - u_int8_t sc_rxnoise; /* Average receiver level */ - struct ray_siglev sc_siglevs[RAY_NSIGLEVRECS]; /* Antenna/levels */ -}; - -#define sc_station_addr sc_ecf_startup.e_station_addr -#define sc_version sc_ecf_startup.e_fw_build_string -#define sc_tibsize sc_ecf_startup.e_tibsize - -/* - * Command queue definitions - */ -typedef void (*ray_comqfn_t)(struct ray_softc *sc, struct ray_comq_entry *com); -MALLOC_DECLARE(M_RAYCOM); -MALLOC_DEFINE(M_RAYCOM, "raycom", "Raylink command queue entry"); -struct ray_comq_entry { - TAILQ_ENTRY(ray_comq_entry) c_chain; /* Tail queue. */ - ray_comqfn_t c_function; /* Function to call */ - int c_flags; /* Flags */ - u_int8_t c_retval; /* Return value */ - void *c_wakeup; /* Sleeping on this */ - size_t c_ccs; /* CCS structure */ - struct ray_nw_param - c_desired; /* network settings */ - struct ray_param_req - *c_pr; /* MIB report/update */ - char *c_mesg; -}; - -/* - * Framing types - */ -/* XXX maybe better as part of the if structure? */ -#define SC_FRAMING_WEBGEAR 0 - -/* - * Macro's and constants - */ -static int mib_info[RAY_MIB_MAX+1][3] = RAY_MIB_INFO; - -/* Indirections for reading/writing memory - from NetBSD/if_ray.c */ -#ifndef offsetof -#define offsetof(type, member) \ - ((size_t)(&((type *)0)->member)) -#endif /* offsetof */ - -#if RAY_NEED_CM_REMAPPING - -#define ATTR_READ_1(sc, off) \ - ray_attr_read_1((sc), (off)) - -#define ATTR_WRITE_1(sc, off, val) \ - ray_attr_write_1((sc), (off), (val)) - -#else - -#define ATTR_READ_1(sc, off) \ - ((u_int8_t)bus_space_read_1((sc)->am_bst, (sc)->am_bsh, (off))) - -#define ATTR_WRITE_1(sc, off, val) \ - bus_space_write_1((sc)->am_bst, (sc)->am_bsh, (off), (val)) - -#endif /* RAY_NEED_CM_REMAPPING */ - -#define SRAM_READ_1(sc, off) \ - ((u_int8_t)bus_space_read_1((sc)->cm_bst, (sc)->cm_bsh, (off))) - -#define SRAM_READ_REGION(sc, off, p, n) \ - bus_space_read_region_1((sc)->cm_bst, (sc)->cm_bsh, (off), (void *)(p), (n)) - -#define SRAM_READ_FIELD_1(sc, off, s, f) \ - SRAM_READ_1((sc), (off) + offsetof(struct s, f)) - -#define SRAM_READ_FIELD_2(sc, off, s, f) \ - ((((u_int16_t)SRAM_READ_1((sc), (off) + offsetof(struct s, f)) << 8) \ - |(SRAM_READ_1((sc), (off) + 1 + offsetof(struct s, f))))) - -#define SRAM_READ_FIELD_N(sc, off, s, f, p, n) \ - SRAM_READ_REGION((sc), (off) + offsetof(struct s, f), (p), (n)) - -#define SRAM_WRITE_1(sc, off, val) \ - bus_space_write_1((sc)->cm_bst, (sc)->cm_bsh, (off), (val)) - -#define SRAM_WRITE_REGION(sc, off, p, n) \ - bus_space_write_region_1((sc)->cm_bst, (sc)->cm_bsh, (off), (void *)(p), (n)) - -#define SRAM_WRITE_FIELD_1(sc, off, s, f, v) \ - SRAM_WRITE_1((sc), (off) + offsetof(struct s, f), (v)) - -#define SRAM_WRITE_FIELD_2(sc, off, s, f, v) do { \ - SRAM_WRITE_1((sc), (off) + offsetof(struct s, f), (((v) >> 8 ) & 0xff)); \ - SRAM_WRITE_1((sc), (off) + 1 + offsetof(struct s, f), ((v) & 0xff)); \ -} while (0) - -#define SRAM_WRITE_FIELD_N(sc, off, s, f, p, n) \ - SRAM_WRITE_REGION((sc), (off) + offsetof(struct s, f), (p), (n)) - -/* Flags for runq entries */ -#define RAY_COM_FWOK 0x0001 /* Wakeup on completion */ -#define RAY_COM_FRUNNING 0x0002 /* This one running */ -#define RAY_COM_FCOMPLETED 0x0004 /* This one completed */ -#define RAY_COM_FWAIT 0x0008 /* Do not run the queue */ -#define RAY_COM_FCHKRUNNING 0x0010 /* Check IFF_RUNNING */ -#define RAY_COM_FDETACHED 0x0020 /* Card is gone */ -#define RAY_COM_FWOKEN 0x0040 /* Woken by detach */ -#define RAY_COM_FLAGS_PRINTFB \ - "\020" \ - "\001WOK" \ - "\002RUNNING" \ - "\003COMPLETED" \ - "\004WAIT" \ - "\005CHKRUNNING" \ - "\006DETACHED" - -#define RAY_COM_NEEDS_TIMO(cmd) ( \ - (cmd == RAY_CMD_DOWNLOAD_PARAMS) || \ - (cmd == RAY_CMD_UPDATE_PARAMS) || \ - (cmd == RAY_CMD_UPDATE_MCAST) \ - ) - -#ifndef RAY_COM_TIMEOUT -#define RAY_COM_TIMEOUT (hz / 2) -#endif - -#ifndef RAY_RESET_TIMEOUT -#define RAY_RESET_TIMEOUT (10 * hz) -#endif - -#ifndef RAY_TX_TIMEOUT -#define RAY_TX_TIMEOUT (hz / 2) -#endif - -#define RAY_CCS_FREE(sc, ccs) \ - SRAM_WRITE_FIELD_1((sc), (ccs), ray_cmd, c_status, RAY_CCS_STATUS_FREE) - -#define RAY_ECF_READY(sc) \ - (!(ATTR_READ_1((sc), RAY_ECFIR) & RAY_ECFIR_IRQ)) - -#define RAY_ECF_START_CMD(sc) ATTR_WRITE_1((sc), RAY_ECFIR, RAY_ECFIR_IRQ) - -#define RAY_HCS_CLEAR_INTR(sc) ATTR_WRITE_1((sc), RAY_HCSIR, 0) - -#define RAY_HCS_INTR(sc) (ATTR_READ_1((sc), RAY_HCSIR) & RAY_HCSIR_IRQ) - -#define RAY_PANIC(sc, fmt, args...) do { \ - panic("ray%d: %s(%d) " fmt "\n", device_get_unit((sc)->dev), \ - __FUNCTION__ , __LINE__ , ##args); \ -} while (0) - -#define RAY_PRINTF(sc, fmt, args...) do { \ - device_printf((sc)->dev, "%s(%d) " fmt "\n", \ - __FUNCTION__ , __LINE__ , ##args); \ -} while (0) - -#define RAY_COM_MALLOC(function, flags) \ - ray_com_malloc((function), (flags), __STRING(function)); - -#define RAY_COM_FREE(com, ncom) do { \ - int i; \ - for (i = 0; i < ncom; i++) \ - FREE(com[i], M_RAYCOM); \ -} while (0) - -/* - * This macro handles adding commands to the runq and quickly - * getting away when the card is detached. The macro returns - * from the current function with ENXIO. - */ -#define RAY_COM_RUNQ(sc, com, ncom, mesg, error) do { \ - (error) = ray_com_runq_add((sc), (com), (ncom), (mesg)); \ - if ((error) == ENXIO) { \ - RAY_COM_FREE((com), (ncom)); \ - return (error); \ - } else if ((error) && ((error) != ENXIO)) \ - RAY_PRINTF(sc, "got error from runq 0x%x", (error)); \ -} while (0) - - -#define RAY_COM_INIT(com, function, flags) \ - ray_com_init((com), (function), (flags), __STRING(function)); - -#ifndef RAY_COM_CHECK -#define RAY_COM_CHECK(sc, com) -#endif /* RAY_COM_CHECK */ - -#ifndef RAY_MBUF_DUMP -#define RAY_MBUF_DUMP(sc, mask, m, s) -#endif /* RAY_MBUF_DUMP */ - -#ifndef RAY_RECERR -#define RAY_RECERR(sc, fmt, args...) do { \ - struct ifnet *ifp = &(sc)->arpcom.ac_if; \ - if (ifp->if_flags & IFF_DEBUG) { \ - device_printf((sc)->dev, "%s(%d) " fmt "\n", \ - __FUNCTION__ , __LINE__ , ##args); \ -} } while (0) -#endif /* RAY_RECERR */ - -/* - * The driver assumes that the common memory is always mapped in, - * for the moment we ensure this with the following macro at the - * head of each function and by using functions to access attribute - * memory. Hysterical raisins led to the non-"reflexive" approach. - * Roll on NEWCARD and it can all die... - */ -#if RAY_NEED_CM_REMAPPING -#define RAY_MAP_CM(sc) ray_attr_mapcm(sc) -#else -#define RAY_MAP_CM(sc) -#endif /* RAY_NEED_CM_REMAPPING */ diff --git a/sys/dev/rp/rpreg.h b/sys/dev/rp/rpreg.h deleted file mode 100644 index a7cde1b03a25..000000000000 --- a/sys/dev/rp/rpreg.h +++ /dev/null @@ -1,1015 +0,0 @@ -/* - * Copyright (c) Comtrol Corporation <support@comtrol.com> - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted prodived that the follwoing conditions - * are met. - * 1. Redistributions of source code must retain the above copyright - * notive, this list of conditions and the following disclainer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials prodided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Comtrol Corporation. - * 4. The name of Comtrol Corporation may not be used to endorse or - * promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY COMTROL CORPORATION ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL COMTROL CORPORATION BE LIABLE FOR - * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, LIFE OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * $FreeBSD$ - */ - -/* - * Begin OS-specific defines - rpreg.h - for RocketPort FreeBSD - */ - -typedef unsigned char Byte_t; -typedef unsigned int ByteIO_t; - -typedef unsigned int Word_t; -typedef unsigned int WordIO_t; - -typedef unsigned long DWord_t; -typedef unsigned int DWordIO_t; - -#define rp_readio(size, ctlp, rid, offset) \ - (bus_space_read_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset)) -#define rp_readmultiio(size, ctlp, rid, offset, addr, count) \ - (bus_space_read_multi_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset, addr, count)) -#define rp_writeio(size, ctlp, rid, offset, data) \ - (bus_space_write_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset, data)) -#define rp_writemultiio(size, ctlp, rid, offset, addr, count) \ - (bus_space_write_multi_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset, addr, count)) - -#define rp_readio1(ctlp, rid, offset) rp_readio(1, ctlp, rid, offset) -#define rp_readio2(ctlp, rid, offset) rp_readio(2, ctlp, rid, offset) -#define rp_readio4(ctlp, rid, offset) rp_readio(4, ctlp, rid, offset) -#define rp_writeio1(ctlp, rid, offset, data) rp_writeio(1, ctlp, rid, offset, data) -#define rp_writeio2(ctlp, rid, offset, data) rp_writeio(2, ctlp, rid, offset, data) -#define rp_writeio4(ctlp, rid, offset, data) rp_writeio(4, ctlp, rid, offset, data) -#define rp_readmultiio1(ctlp, rid, offset, addr, count) rp_readmultiio(1, ctlp, rid, offset, addr, count) -#define rp_readmultiio2(ctlp, rid, offset, addr, count) rp_readmultiio(2, ctlp, rid, offset, addr, count) -#define rp_readmultiio4(ctlp, rid, offset, addr, count) rp_readmultiio(4, ctlp, rid, offset, addr, count) -#define rp_writemultiio1(ctlp, rid, offset, addr, count) rp_writemultiio(1, ctlp, rid, offset, addr, count) -#define rp_writemultiio2(ctlp, rid, offset, addr, count) rp_writemultiio(2, ctlp, rid, offset, addr, count) -#define rp_writemultiio4(ctlp, rid, offset, addr, count) rp_writemultiio(4, ctlp, rid, offset, addr, count) - -#define rp_readaiop1(ctlp, aiop, offset) \ - (rp_readio1((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset))) -#define rp_readaiop2(ctlp, aiop, offset) \ - (rp_readio2((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset))) -#define rp_readaiop4(ctlp, aiop, offset) \ - (rp_readio4((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset))) -#define rp_readmultiaiop1(ctlp, aiop, offset, addr, count) \ - (rp_readmultiio1((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), addr, count)) -#define rp_readmultiaiop2(ctlp, aiop, offset, addr, count) \ - (rp_readmultiio2((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), addr, count)) -#define rp_readmultiaiop4(ctlp, aiop, offset, addr, count) \ - (rp_readmultiio4((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), addr, count)) -#define rp_writeaiop1(ctlp, aiop, offset, data) \ - (rp_writeio1((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), data)) -#define rp_writeaiop2(ctlp, aiop, offset, data) \ - (rp_writeio2((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), data)) -#define rp_writeaiop4(ctlp, aiop, offset, data) \ - (rp_writeio4((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), data)) -#define rp_writemultiaiop1(ctlp, aiop, offset, addr, count) \ - (rp_writemultiio1((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), addr, count)) -#define rp_writemultiaiop2(ctlp, aiop, offset, addr, count) \ - (rp_writemultiio2((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), addr, count)) -#define rp_writemultiaiop4(ctlp, aiop, offset, addr, count) \ - (rp_writemultiio4((ctlp), (ctlp)->aiop2rid(aiop, offset), (ctlp)->aiop2off(aiop, offset), addr, count)) - -#define rp_readch1(chp, offset) \ - (rp_readaiop1((chp)->CtlP, (chp)->AiopNum, offset)) -#define rp_readch2(chp, offset) \ - (rp_readaiop2((chp)->CtlP, (chp)->AiopNum, offset)) -#define rp_readch4(chp, offset) \ - (rp_readaiop4((chp)->CtlP, (chp)->AiopNum, offset)) -#define rp_readmultich1(chp, offset, addr, count) \ - (rp_readmultiaiop1((chp)->CtlP, (chp)->AiopNum, offset, addr, count)) -#define rp_readmultich2(chp, offset, addr, count) \ - (rp_readmultiaiop2((chp)->CtlP, (chp)->AiopNum, offset, addr, count)) -#define rp_readmultich4(chp, offset, addr, count) \ - (rp_readmultiaiop4((chp)->CtlP, (chp)->AiopNum, offset, addr, count)) -#define rp_writech1(chp, offset, data) \ - (rp_writeaiop1((chp)->CtlP, (chp)->AiopNum, offset, data)) -#define rp_writech2(chp, offset, data) \ - (rp_writeaiop2((chp)->CtlP, (chp)->AiopNum, offset, data)) -#define rp_writech4(chp, offset, data) \ - (rp_writeaiop4((chp)->CtlP, (chp)->AiopNum, offset, data)) -#define rp_writemultich1(chp, offset, addr, count) \ - (rp_writemultiaiop1((chp)->CtlP, (chp)->AiopNum, offset, addr, count)) -#define rp_writemultich2(chp, offset, addr, count) \ - (rp_writemultiaiop2((chp)->CtlP, (chp)->AiopNum, offset, addr, count)) -#define rp_writemultich4(chp, offset, addr, count) \ - (rp_writemultiaiop4((chp)->CtlP, (chp)->AiopNum, offset, addr, count)) - -/* - * End of OS-specific defines - */ - -#define ROCKET_H - -#define CTL_SIZE 4 -#define AIOP_CTL_SIZE 4 -#define CHAN_AIOP_SIZE 8 -#define MAX_PORTS_PER_AIOP 8 -#define MAX_AIOPS_PER_BOARD 4 -#define MAX_PORTS_PER_BOARD 32 - -/* Controller ID numbers */ -#define CTLID_NULL -1 /* no controller exists */ -#define CTLID_0001 0x0001 /* controller release 1 */ - -/* AIOP ID numbers, identifies AIOP type implementing channel */ -#define AIOPID_NULL -1 /* no AIOP or channel exists */ -#define AIOPID_0001 0x0001 /* AIOP release 1 */ - -#define NULLDEV -1 /* identifies non-existant device */ -#define NULLCTL -1 /* identifies non-existant controller */ -#define NULLCTLPTR (CONTROLLER_T *)0 /* identifies non-existant controller */ -#define NULLAIOP -1 /* identifies non-existant AIOP */ -#define NULLCHAN -1 /* identifies non-existant channel */ - -/************************************************************************ - Global Register Offsets - Direct Access - Fixed values -************************************************************************/ - -#define _CMD_REG 0x38 /* Command Register 8 Write */ -#define _INT_CHAN 0x39 /* Interrupt Channel Register 8 Read */ -#define _INT_MASK 0x3A /* Interrupt Mask Register 8 Read / Write */ -#define _UNUSED 0x3B /* Unused 8 */ -#define _INDX_ADDR 0x3C /* Index Register Address 16 Write */ -#define _INDX_DATA 0x3E /* Index Register Data 8/16 Read / Write */ - -/************************************************************************ - Channel Register Offsets for 1st channel in AIOP - Direct Access -************************************************************************/ -#define _TD0 0x00 /* Transmit Data 16 Write */ -#define _RD0 0x00 /* Receive Data 16 Read */ -#define _CHN_STAT0 0x20 /* Channel Status 8/16 Read / Write */ -#define _FIFO_CNT0 0x10 /* Transmit/Receive FIFO Count 16 Read */ -#define _INT_ID0 0x30 /* Interrupt Identification 8 Read */ - -/************************************************************************ - Tx Control Register Offsets - Indexed - External - Fixed -************************************************************************/ -#define _TX_ENBLS 0x980 /* Tx Processor Enables Register 8 Read / Write */ -#define _TXCMP1 0x988 /* Transmit Compare Value #1 8 Read / Write */ -#define _TXCMP2 0x989 /* Transmit Compare Value #2 8 Read / Write */ -#define _TXREP1B1 0x98A /* Tx Replace Value #1 - Byte 1 8 Read / Write */ -#define _TXREP1B2 0x98B /* Tx Replace Value #1 - Byte 2 8 Read / Write */ -#define _TXREP2 0x98C /* Transmit Replace Value #2 8 Read / Write */ - -/************************************************************************ - Receive FIFO -************************************************************************/ -#define RXFIFO_DATA 0x5f -#define RXFIFO_OUT 0x5c -#define RXFIFO_EN 0x08 -#define RXFIFO_DIS 0xa7 - -/************************************************************************ -Memory Controller Register Offsets - Indexed - External - Fixed -************************************************************************/ -#define _RX_FIFO 0x000 /* Rx FIFO */ -#define _TX_FIFO 0x800 /* Tx FIFO */ -#define _RXF_OUTP 0x990 /* Rx FIFO OUT pointer 16 Read / Write */ -#define _RXF_INP 0x992 /* Rx FIFO IN pointer 16 Read / Write */ -#define _TXF_OUTP 0x994 /* Tx FIFO OUT pointer 8 Read / Write */ -#define _TXF_INP 0x995 /* Tx FIFO IN pointer 8 Read / Write */ -#define _TXP_CNT 0x996 /* Tx Priority Count 8 Read / Write */ -#define _TXP_PNTR 0x997 /* Tx Priority Pointer 8 Read / Write */ - -#define PRI_PEND 0x80 /* Priority data pending (bit7, Tx pri cnt) */ -#define TXFIFO_SIZE 255 /* size of Tx FIFO */ -#define RXFIFO_SIZE 1023 /* size of Rx FIFO */ - -/************************************************************************ -Tx Priority Buffer - Indexed - External - Fixed -************************************************************************/ -#define _TXP_BUF 0x9C0 /* Tx Priority Buffer 32 Bytes Read / Write */ -#define TXP_SIZE 0x20 /* 32 bytes */ - -/************************************************************************ -Channel Register Offsets - Indexed - Internal - Fixed -************************************************************************/ - -#define _TX_CTRL 0xFF0 /* Transmit Control 16 Write */ -#define _RX_CTRL 0xFF2 /* Receive Control 8 Write */ -#define _BAUD 0xFF4 /* Baud Rate 16 Write */ -#define _CLK_PRE 0xFF6 /* Clock Prescaler 8 Write */ - -#define CLOCK_PRESC 0x19 /* mod 9 (divide by 10) prescale */ - -#define BRD50 4607 -#define BRD75 3071 -#define BRD110 2094 -#define BRD134 1712 -#define BRD150 1535 -#define BRD200 1151 -#define BRD300 767 -#define BRD600 383 -#define BRD1200 191 -#define BRD1800 127 -#define BRD2000 114 -#define BRD2400 95 -#define BRD3600 64 -#define BRD4800 47 -#define BRD7200 31 -#define BRD9600 23 -#define BRD14400 15 -#define BRD19200 11 -#define BRD38400 5 -#define BRD57600 3 -#define BRD76800 2 -#define BRD115200 1 -#define BRD230400 0 - -#define STMBREAK 0x08 /* BREAK */ -#define STMFRAME 0x04 /* framing error */ -#define STMRCVROVR 0x02 /* receiver over run error */ -#define STMPARITY 0x01 /* parity error */ -#define STMERROR (STMBREAK | STMFRAME | STMPARITY) -#define STMBREAKH 0x800 /* BREAK */ -#define STMFRAMEH 0x400 /* framing error */ -#define STMRCVROVRH 0x200 /* receiver over run error */ -#define STMPARITYH 0x100 /* parity error */ -#define STMERRORH (STMBREAKH | STMFRAMEH | STMPARITYH) - -#define CTS_ACT 0x20 /* CTS input asserted */ -#define DSR_ACT 0x10 /* DSR input asserted */ -#define CD_ACT 0x08 /* CD input asserted */ -#define TXFIFOMT 0x04 /* Tx FIFO is empty */ -#define TXSHRMT 0x02 /* Tx shift register is empty */ -#define RDA 0x01 /* Rx data available */ -#define DRAINED (TXFIFOMT | TXSHRMT) /* indicates Tx is drained */ - -#define STATMODE 0x8000 /* status mode enable bit */ -#define RXFOVERFL 0x2000 /* receive FIFO overflow */ -#define RX2MATCH 0x1000 /* receive compare byte 2 match */ -#define RX1MATCH 0x0800 /* receive compare byte 1 match */ -#define RXBREAK 0x0400 /* received BREAK */ -#define RXFRAME 0x0200 /* received framing error */ -#define RXPARITY 0x0100 /* received parity error */ -#define STATERROR (RXBREAK | RXFRAME | RXPARITY) - -#define CTSFC_EN 0x80 /* CTS flow control enable bit */ -#define RTSTOG_EN 0x40 /* RTS toggle enable bit */ -#define TXINT_EN 0x10 /* transmit interrupt enable */ -#define STOP2 0x08 /* enable 2 stop bits (0 = 1 stop) */ -#define PARITY_EN 0x04 /* enable parity (0 = no parity) */ -#define EVEN_PAR 0x02 /* even parity (0 = odd parity) */ -#define DATA8BIT 0x01 /* 8 bit data (0 = 7 bit data) */ - -#define SETBREAK 0x10 /* send break condition (must clear) */ -#define LOCALLOOP 0x08 /* local loopback set for test */ -#define SET_DTR 0x04 /* assert DTR */ -#define SET_RTS 0x02 /* assert RTS */ -#define TX_ENABLE 0x01 /* enable transmitter */ - -#define RTSFC_EN 0x40 /* RTS flow control enable */ -#define RXPROC_EN 0x20 /* receive processor enable */ -#define TRIG_NO 0x00 /* Rx FIFO trigger level 0 (no trigger) */ -#define TRIG_1 0x08 /* trigger level 1 char */ -#define TRIG_1_2 0x10 /* trigger level 1/2 */ -#define TRIG_7_8 0x18 /* trigger level 7/8 */ -#define TRIG_MASK 0x18 /* trigger level mask */ -#define SRCINT_EN 0x04 /* special Rx condition interrupt enable */ -#define RXINT_EN 0x02 /* Rx interrupt enable */ -#define MCINT_EN 0x01 /* modem change interrupt enable */ - -#define RXF_TRIG 0x20 /* Rx FIFO trigger level interrupt */ -#define TXFIFO_MT 0x10 /* Tx FIFO empty interrupt */ -#define SRC_INT 0x08 /* special receive condition interrupt */ -#define DELTA_CD 0x04 /* CD change interrupt */ -#define DELTA_CTS 0x02 /* CTS change interrupt */ -#define DELTA_DSR 0x01 /* DSR change interrupt */ - -#define REP1W2_EN 0x10 /* replace byte 1 with 2 bytes enable */ -#define IGN2_EN 0x08 /* ignore byte 2 enable */ -#define IGN1_EN 0x04 /* ignore byte 1 enable */ -#define COMP2_EN 0x02 /* compare byte 2 enable */ -#define COMP1_EN 0x01 /* compare byte 1 enable */ - -#define RESET_ALL 0x80 /* reset AIOP (all channels) */ -#define TXOVERIDE 0x40 /* Transmit software off override */ -#define RESETUART 0x20 /* reset channel's UART */ -#define RESTXFCNT 0x10 /* reset channel's Tx FIFO count register */ -#define RESRXFCNT 0x08 /* reset channel's Rx FIFO count register */ - -#define INTSTAT0 0x01 /* AIOP 0 interrupt status */ -#define INTSTAT1 0x02 /* AIOP 1 interrupt status */ -#define INTSTAT2 0x04 /* AIOP 2 interrupt status */ -#define INTSTAT3 0x08 /* AIOP 3 interrupt status */ - -#define INTR_EN 0x08 /* allow interrupts to host */ -#define INT_STROB 0x04 /* strobe and clear interrupt line (EOI) */ - -#define CHAN3_EN 0x08 /* enable AIOP 3 */ -#define CHAN2_EN 0x04 /* enable AIOP 2 */ -#define CHAN1_EN 0x02 /* enable AIOP 1 */ -#define CHAN0_EN 0x01 /* enable AIOP 0 */ -#define FREQ_DIS 0x00 -#define FREQ_274HZ 0x60 -#define FREQ_137HZ 0x50 -#define FREQ_69HZ 0x40 -#define FREQ_34HZ 0x30 -#define FREQ_17HZ 0x20 -#define FREQ_9HZ 0x10 -#define PERIODIC_ONLY 0x80 /* only PERIODIC interrupt */ - -#define CHANINT_EN 0x0100 /* flags to enable/disable channel ints */ - -#define RDATASIZE 72 -#define RREGDATASIZE 52 - -#ifndef TRUE -#define TRUE 1 -#endif - -#ifndef FALSE -#define FALSE 0 -#endif - -struct CONTROLLER_str; -struct CHANNEL_str; - -/* The types of bus-specific methods */ -typedef int rp_aiop2rid_t(int, int); -typedef int rp_aiop2off_t(int, int); -typedef unsigned char rp_ctlmask_t(struct CONTROLLER_str *); - -/* Controller level information structure */ -struct CONTROLLER_str -{ - int CtlID; - int NumAiop; - int AiopID[AIOP_CTL_SIZE]; - int AiopNumChan[AIOP_CTL_SIZE]; - - /* Device and resource management */ - device_t dev; /* device */ - int io_num; /* Number of IO resources */ - int *io_rid; /* IO resource IDs */ - struct resource **io; /* IO resources */ - - struct rp_port *rp; /* port */ - struct tty *tty; /* tty */ - - /* Device nodes */ - dev_t *dev_nodes; - - /* Bus-specific properties */ - void *bus_ctlp; - - /* Bus-specific methods */ - rp_aiop2rid_t *aiop2rid; /* (aiop, offset) -> rid */ - rp_aiop2off_t *aiop2off; /* (aiop, offset) -> off */ - rp_ctlmask_t *ctlmask; /* Int status */ -}; -typedef struct CONTROLLER_str CONTROLLER_T; -typedef CONTROLLER_T CONTROLLER_t; - -/* Channel level information structure */ -struct CHANNEL_str -{ - CONTROLLER_t *CtlP; - int AiopNum; - int ChanID; - int ChanNum; - - Word_t TxFIFO; - Word_t TxFIFOPtrs; - Word_t RxFIFO; - Word_t RxFIFOPtrs; - Word_t TxPrioCnt; - Word_t TxPrioPtr; - Word_t TxPrioBuf; - - Byte_t R[RREGDATASIZE]; - - Byte_t BaudDiv[4]; - Byte_t TxControl[4]; - Byte_t RxControl[4]; - Byte_t TxEnables[4]; - Byte_t TxCompare[4]; - Byte_t TxReplace1[4]; - Byte_t TxReplace2[4]; -}; - -typedef struct CHANNEL_str CHANNEL_T; -typedef CHANNEL_T CHANNEL_t; -typedef CHANNEL_T * CHANPTR_T; - -#define CHNOFF_TXRXDATA(chp) ((chp)->ChanNum * 2 + _TD0) -#define CHNOFF_CHANSTAT(chp) ((chp)->ChanNum * 2 + _CHN_STAT0) -#define CHNOFF_TXRXCOUNT(chp) ((chp)->ChanNum * 2 + _FIFO_CNT0) -#define CHNOFF_INTID(chp) ((chp)->ChanNum + _INT_ID0) - -/*************************************************************************** -Function: sClrBreak -Purpose: Stop sending a transmit BREAK signal -Call: sClrBreak(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sClrBreak(ChP) \ -{ \ - (ChP)->TxControl[3] &= ~SETBREAK; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sClrDTR -Purpose: Clr the DTR output -Call: sClrDTR(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sClrDTR(ChP) \ -{ \ - (ChP)->TxControl[3] &= ~SET_DTR; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sClrRTS -Purpose: Clr the RTS output -Call: sClrRTS(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sClrRTS(ChP) \ -{ \ - (ChP)->TxControl[3] &= ~SET_RTS; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sClrTxXOFF -Purpose: Clear any existing transmit software flow control off condition -Call: sClrTxXOFF(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sClrTxXOFF(ChP) \ -{ \ - rp_writech1(ChP,_CMD_REG,TXOVERIDE | (Byte_t)(ChP)->ChanNum); \ - rp_writech1(ChP,_CMD_REG,(Byte_t)(ChP)->ChanNum); \ -} - -/*************************************************************************** -Function: sDisCTSFlowCtl -Purpose: Disable output flow control using CTS -Call: sDisCTSFlowCtl(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sDisCTSFlowCtl(ChP) \ -{ \ - (ChP)->TxControl[2] &= ~CTSFC_EN; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: DisParity -Purpose: Disable parity -Call: sDisParity(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: Function sSetParity() can be used in place of functions sEnParity(), - sDisParity(), sSetOddParity(), and sSetEvenParity(). -*/ -#define sDisParity(ChP) \ -{ \ - (ChP)->TxControl[2] &= ~PARITY_EN; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sDisRxFIFO -Purpose: Disable Rx FIFO -Call: sDisRxFIFO(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sDisRxFIFO(ChP) \ -{ \ - (ChP)->R[0x32] = 0x0a; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0x30]); \ -} - -/*************************************************************************** -Function: sDisRxStatusMode -Purpose: Disable the Rx status mode -Call: sDisRxStatusMode(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: This takes the channel out of the receive status mode. All - subsequent reads of receive data using sReadRxWord() will return - two data bytes. -*/ -#define sDisRxStatusMode(ChP) rp_writech2(ChP,CHNOFF_CHANSTAT(ChP),0) - -/*************************************************************************** -Function: sDisTransmit -Purpose: Disable transmit -Call: sDisTransmit(ChP) - CHANNEL_T *ChP; Ptr to channel structure - This disables movement of Tx data from the Tx FIFO into the 1 byte - Tx buffer. Therefore there could be up to a 2 byte latency - between the time sDisTransmit() is called and the transmit buffer - and transmit shift register going completely empty. -*/ -#define sDisTransmit(ChP) \ -{ \ - (ChP)->TxControl[3] &= ~TX_ENABLE; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sDisTxSoftFlowCtl -Purpose: Disable Tx Software Flow Control -Call: sDisTxSoftFlowCtl(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sDisTxSoftFlowCtl(ChP) \ -{ \ - (ChP)->R[0x06] = 0x8a; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0x04]); \ -} - -/*************************************************************************** -Function: sEnCTSFlowCtl -Purpose: Enable output flow control using CTS -Call: sEnCTSFlowCtl(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sEnCTSFlowCtl(ChP) \ -{ \ - (ChP)->TxControl[2] |= CTSFC_EN; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: EnParity -Purpose: Enable parity -Call: sEnParity(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: Function sSetParity() can be used in place of functions sEnParity(), - sDisParity(), sSetOddParity(), and sSetEvenParity(). - -Warnings: Before enabling parity odd or even parity should be chosen using - functions sSetOddParity() or sSetEvenParity(). -*/ -#define sEnParity(ChP) \ -{ \ - (ChP)->TxControl[2] |= PARITY_EN; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sEnRTSFlowCtl -Return: void -*/ -#define sEnRTSFlowCtl(ChP) \ -{ \ - (ChP)->TxControl[2] &= ~RTSTOG_EN; \ - (ChP)->TxControl[3] &= ~SET_RTS; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ - (ChP)->RxControl[2] |= RTSFC_EN; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \ -} - -/*************************************************************************** -Function: sDisRTSFlowCtl -Return: void -*/ -#define sDisRTSFlowCtl(ChP) \ -{ \ - (ChP)->RxControl[2] &= ~RTSFC_EN; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \ -} - -/*************************************************************************** -Function: sEnRxFIFO -Purpose: Enable Rx FIFO -Call: sEnRxFIFO(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sEnRxFIFO(ChP) \ -{ \ - (ChP)->R[0x32] = 0x08; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0x30]); \ -} - -/*************************************************************************** -Function: sEnRxProcessor -Purpose: Enable the receive processor -Call: sEnRxProcessor(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: This function is used to start the receive processor. When - the channel is in the reset state the receive processor is not - running. This is done to prevent the receive processor from - executing invalid microcode instructions prior to the - downloading of the microcode. - -Warnings: This function must be called after valid microcode has been - downloaded to the AIOP, and it must not be called before the - microcode has been downloaded. -*/ -#define sEnRxProcessor(ChP) \ -{ \ - (ChP)->RxControl[2] |= RXPROC_EN; \ - rp_writech2(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \ -} - -/*************************************************************************** -Function: sEnRxStatusMode -Purpose: Enable the Rx status mode -Call: sEnRxStatusMode(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: This places the channel in the receive status mode. All subsequent - reads of receive data using sReadRxWord() will return a data byte - in the low word and a status byte in the high word. - -*/ -#define sEnRxStatusMode(ChP) rp_writech2(ChP,CHNOFF_CHANSTAT(ChP),STATMODE) - -/*************************************************************************** -Function: sEnTransmit -Purpose: Enable transmit -Call: sEnTransmit(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sEnTransmit(ChP) \ -{ \ - (ChP)->TxControl[3] |= TX_ENABLE; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sGetAiopIntStatus -Purpose: Get the AIOP interrupt status -Call: sGetAiopIntStatus(CtlP,AiopNum) - CONTROLLER_T *CtlP; Ptr to controller structure - int AiopNum; AIOP number -Return: Byte_t: The AIOP interrupt status. Bits 0 through 7 - represent channels 0 through 7 respectively. If a - bit is set that channel is interrupting. -*/ -#define sGetAiopIntStatus(CtlP,AIOPNUM) rp_readaiop1(CtlP,AIOPNUM,_INT_CHAN) - -/*************************************************************************** -Function: sGetAiopNumChan -Purpose: Get the number of channels supported by an AIOP -Call: sGetAiopNumChan(CtlP,AiopNum) - CONTROLLER_T *CtlP; Ptr to controller structure - int AiopNum; AIOP number -Return: int: The number of channels supported by the AIOP -*/ -#define sGetAiopNumChan(CtlP,AIOPNUM) CtlP->AiopNumChan[AIOPNUM] - -/*************************************************************************** -Function: sGetChanIntID -Purpose: Get a channel's interrupt identification byte -Call: sGetChanIntID(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: Byte_t: The channel interrupt ID. Can be any - combination of the following flags: - RXF_TRIG: Rx FIFO trigger level interrupt - TXFIFO_MT: Tx FIFO empty interrupt - SRC_INT: Special receive condition interrupt - DELTA_CD: CD change interrupt - DELTA_CTS: CTS change interrupt - DELTA_DSR: DSR change interrupt -*/ -#define sGetChanIntID(ChP) (rp_readch1(ChP,(ChP)->ChanNum+_INT_ID0) & (RXF_TRIG | TXFIFO_MT | SRC_INT | DELTA_CD | DELTA_CTS | DELTA_DSR)) - -/*************************************************************************** -Function: sGetChanNum -Purpose: Get the number of a channel within an AIOP -Call: sGetChanNum(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: int: Channel number within AIOP, or NULLCHAN if channel does - not exist. -*/ -#define sGetChanNum(ChP) (ChP)->ChanNum - -/*************************************************************************** -Function: sGetChanStatus -Purpose: Get the channel status -Call: sGetChanStatus(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: Word_t: The channel status. Can be any combination of - the following flags: - LOW BYTE FLAGS - CTS_ACT: CTS input asserted - DSR_ACT: DSR input asserted - CD_ACT: CD input asserted - TXFIFOMT: Tx FIFO is empty - TXSHRMT: Tx shift register is empty - RDA: Rx data available - - HIGH BYTE FLAGS - STATMODE: status mode enable bit - RXFOVERFL: receive FIFO overflow - RX2MATCH: receive compare byte 2 match - RX1MATCH: receive compare byte 1 match - RXBREAK: received BREAK - RXFRAME: received framing error - RXPARITY: received parity error -Warnings: This function will clear the high byte flags in the Channel - Status Register. -*/ -#define sGetChanStatus(ChP) rp_readch2(ChP,CHNOFF_CHANSTAT(ChP)) - -/*************************************************************************** -Function: sGetChanStatusLo -Purpose: Get the low byte only of the channel status -Call: sGetChanStatusLo(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: Byte_t: The channel status low byte. Can be any combination - of the following flags: - CTS_ACT: CTS input asserted - DSR_ACT: DSR input asserted - CD_ACT: CD input asserted - TXFIFOMT: Tx FIFO is empty - TXSHRMT: Tx shift register is empty - RDA: Rx data available -*/ -#define sGetChanStatusLo(ChP) rp_readch1(ChP,CHNOFF_CHANSTAT(ChP)) - -/*************************************************************************** -Function: sGetRxCnt -Purpose: Get the number of data bytes in the Rx FIFO -Call: sGetRxCnt(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: int: The number of data bytes in the Rx FIFO. -Comments: Byte read of count register is required to obtain Rx count. - -*/ -#define sGetRxCnt(ChP) rp_readch2(ChP,CHNOFF_TXRXCOUNT(ChP)) - -/*************************************************************************** -Function: sGetTxCnt -Purpose: Get the number of data bytes in the Tx FIFO -Call: sGetTxCnt(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: Byte_t: The number of data bytes in the Tx FIFO. -Comments: Byte read of count register is required to obtain Tx count. - -*/ -#define sGetTxCnt(ChP) rp_readch1(ChP,CHNOFF_TXRXCOUNT(ChP)) - -/***************************************************************************** -Function: sGetTxRxDataIO -Purpose: Get the offset of a channel's TxRx Data register -Call: sGetTxRxDataIO(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Return: WordIO_t: offset of a channel's TxRx Data register -*/ -#define sGetTxRxDataIO(ChP) CHNOFF_TXRXDATA(ChP) - -/*************************************************************************** -Function: sInitChanDefaults -Purpose: Initialize a channel structure to its default state. -Call: sInitChanDefaults(ChP) - CHANNEL_T *ChP; Ptr to the channel structure -Comments: This function must be called once for every channel structure - that exists before any other SSCI calls can be made. - -*/ -#define sInitChanDefaults(ChP) \ -{ \ - (ChP)->CtlP = NULLCTLPTR; \ - (ChP)->AiopNum = NULLAIOP; \ - (ChP)->ChanID = AIOPID_NULL; \ - (ChP)->ChanNum = NULLCHAN; \ -} - -/*************************************************************************** -Function: sResetAiopByNum -Purpose: Reset the AIOP by number -Call: sResetAiopByNum(CTLP,AIOPNUM) - CONTROLLER_T CTLP; Ptr to controller structure - AIOPNUM; AIOP index -*/ -#define sResetAiopByNum(CTLP,AIOPNUM) \ -{ \ - rp_writeaiop1(CTLP,AIOPNUM,_CMD_REG,RESET_ALL); \ - rp_writeaiop1(CTLP,AIOPNUM,_CMD_REG,0x0); \ -} - -/*************************************************************************** -Function: sSendBreak -Purpose: Send a transmit BREAK signal -Call: sSendBreak(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSendBreak(ChP) \ -{ \ - (ChP)->TxControl[3] |= SETBREAK; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetBaud -Purpose: Set baud rate -Call: sSetBaud(ChP,Divisor) - CHANNEL_T *ChP; Ptr to channel structure - Word_t Divisor; 16 bit baud rate divisor for channel -*/ -#define sSetBaud(ChP,DIVISOR) \ -{ \ - (ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \ - (ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->BaudDiv[0]); \ -} - -/*************************************************************************** -Function: sSetData7 -Purpose: Set data bits to 7 -Call: sSetData7(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSetData7(ChP) \ -{ \ - (ChP)->TxControl[2] &= ~DATA8BIT; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetData8 -Purpose: Set data bits to 8 -Call: sSetData8(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSetData8(ChP) \ -{ \ - (ChP)->TxControl[2] |= DATA8BIT; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetDTR -Purpose: Set the DTR output -Call: sSetDTR(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSetDTR(ChP) \ -{ \ - (ChP)->TxControl[3] |= SET_DTR; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetEvenParity -Purpose: Set even parity -Call: sSetEvenParity(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: Function sSetParity() can be used in place of functions sEnParity(), - sDisParity(), sSetOddParity(), and sSetEvenParity(). - -Warnings: This function has no effect unless parity is enabled with function - sEnParity(). -*/ -#define sSetEvenParity(ChP) \ -{ \ - (ChP)->TxControl[2] |= EVEN_PAR; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetOddParity -Purpose: Set odd parity -Call: sSetOddParity(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: Function sSetParity() can be used in place of functions sEnParity(), - sDisParity(), sSetOddParity(), and sSetEvenParity(). - -Warnings: This function has no effect unless parity is enabled with function - sEnParity(). -*/ -#define sSetOddParity(ChP) \ -{ \ - (ChP)->TxControl[2] &= ~EVEN_PAR; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetRTS -Purpose: Set the RTS output -Call: sSetRTS(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSetRTS(ChP) \ -{ \ - (ChP)->TxControl[3] |= SET_RTS; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetRxTrigger -Purpose: Set the Rx FIFO trigger level -Call: sSetRxProcessor(ChP,Level) - CHANNEL_T *ChP; Ptr to channel structure - Byte_t Level; Number of characters in Rx FIFO at which the - interrupt will be generated. Can be any of the following flags: - - TRIG_NO: no trigger - TRIG_1: 1 character in FIFO - TRIG_1_2: FIFO 1/2 full - TRIG_7_8: FIFO 7/8 full -Comments: An interrupt will be generated when the trigger level is reached - only if function sEnInterrupt() has been called with flag - RXINT_EN set. The RXF_TRIG flag in the Interrupt Idenfification - register will be set whenever the trigger level is reached - regardless of the setting of RXINT_EN. - -*/ -#define sSetRxTrigger(ChP,LEVEL) \ -{ \ - (ChP)->RxControl[2] &= ~TRIG_MASK; \ - (ChP)->RxControl[2] |= LEVEL; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \ -} - -/*************************************************************************** -Function: sSetStop1 -Purpose: Set stop bits to 1 -Call: sSetStop1(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSetStop1(ChP) \ -{ \ - (ChP)->TxControl[2] &= ~STOP2; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sSetStop2 -Purpose: Set stop bits to 2 -Call: sSetStop2(ChP) - CHANNEL_T *ChP; Ptr to channel structure -*/ -#define sSetStop2(ChP) \ -{ \ - (ChP)->TxControl[2] |= STOP2; \ - rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \ -} - -/*************************************************************************** -Function: sStartRxProcessor -Purpose: Start a channel's receive processor -Call: sStartRxProcessor(ChP) - CHANNEL_T *ChP; Ptr to channel structure -Comments: This function is used to start a Rx processor after it was - stopped with sStopRxProcessor() or sStopSWInFlowCtl(). It - will restart both the Rx processor and software input flow control. - -*/ -#define sStartRxProcessor(ChP) rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0]) - -/*************************************************************************** -Function: sWriteTxByte -Purpose: Write a transmit data byte to a channel. - CHANNEL_T *ChP; Ptr to channel structure - ByteIO_t io: Channel transmit register I/O address. This can - be obtained with sGetTxRxDataIO(). - Byte_t Data; The transmit data byte. -Warnings: This function writes the data byte without checking to see if - sMaxTxSize is exceeded in the Tx FIFO. -*/ -#define sWriteTxByte(ChP,IO,DATA) rp_writech1(ChP,IO,DATA) - -int sReadAiopID(CONTROLLER_T *CtlP, int aiop); -int sReadAiopNumChan(CONTROLLER_T *CtlP, int aiop); -int sInitChan( CONTROLLER_T *CtlP, - CHANNEL_T *ChP, - int AiopNum, - int ChanNum); -Byte_t sGetRxErrStatus(CHANNEL_T *ChP); -void sStopRxProcessor(CHANNEL_T *ChP); -void sStopSWInFlowCtl(CHANNEL_T *ChP); -void sFlushRxFIFO(CHANNEL_T *ChP); -void sFlushTxFIFO(CHANNEL_T *ChP); -int sWriteTxPrioByte(CHANNEL_T *ChP, Byte_t Data); -void sEnInterrupts(CHANNEL_T *ChP,Word_t Flags); -void sDisInterrupts(CHANNEL_T *ChP,Word_t Flags); -int rp_attachcommon(CONTROLLER_T *ctlp, int num_aiops, int num_ports); -void rp_releaseresource(CONTROLLER_t *ctlp); - -#ifndef ROCKET_C -extern Byte_t R[RDATASIZE]; -extern CONTROLLER_T sController[CTL_SIZE]; -extern Byte_t sIRQMap[16]; -#endif -extern Byte_t rp_sBitMapClrTbl[8]; -extern Byte_t rp_sBitMapSetTbl[8]; diff --git a/sys/dev/usb/rio500_usb.h b/sys/dev/usb/rio500_usb.h deleted file mode 100644 index c2da72e91b11..000000000000 --- a/sys/dev/usb/rio500_usb.h +++ /dev/null @@ -1,58 +0,0 @@ -/* ---------------------------------------------------------------------- - - Copyright (C) 2000 Cesar Miquel (miquel@df.uba.ar) - - Redistribution and use in source and binary forms, with or without - modification, are permitted under any licence of your choise which - meets the open source licence definiton - http://www.opensource.org/opd.html such as the GNU licence or the - BSD licence. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - General Public License or the BSD license for more details. - - ---------------------------------------------------------------------- - - Modified for FreeBSD by Iwasa Kazmi <kzmi@ca2.so-net.ne.jp> - - ---------------------------------------------------------------------- */ - -/* $FreeBSD$ */ - -#if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) -#include <sys/ioccom.h> -#ifndef USB_VENDOR_DIAMOND -#define USB_VENDOR_DIAMOND 0x841 -#endif -#ifndef USB_PRODUCT_DIAMOND_RIO500USB -#define USB_PRODUCT_DIAMOND_RIO500USB 0x1 -#endif -#endif - -struct RioCommand -{ -#if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) - u_int16_t length; -#else - short length; -#endif - int request; - int requesttype; - int value; - int index; - void *buffer; - int timeout; -}; - -#if defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__) -#define RIO_SEND_COMMAND _IOWR('U', 200, struct RioCommand) -#define RIO_RECV_COMMAND _IOWR('U', 201, struct RioCommand) -#else -#define RIO_SEND_COMMAND 0x1 -#define RIO_RECV_COMMAND 0x2 -#endif - -#define RIO_DIR_OUT 0x0 -#define RIO_DIR_IN 0x1 |