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-rw-r--r--test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir87
1 files changed, 83 insertions, 4 deletions
diff --git a/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir b/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
index 630b34028162..c9ff2cd0d514 100644
--- a/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
+++ b/test/CodeGen/AArch64/aarch64-combine-fmul-fsub.mir
@@ -1,7 +1,7 @@
-# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=cortex-a57 -enable-unsafe-fp-math %s | FileCheck --check-prefix=UNPROFITABLE %s
-# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=falkor -enable-unsafe-fp-math %s | FileCheck --check-prefix=PROFITABLE %s
-# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=exynosm1 -enable-unsafe-fp-math %s | FileCheck --check-prefix=PROFITABLE %s
-# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=thunderx2t99 -enable-unsafe-fp-math %s | FileCheck --check-prefix=PROFITABLE %s
+# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=cortex-a57 -enable-unsafe-fp-math %s | FileCheck --check-prefixes=UNPROFITABLE,ALL %s
+# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=falkor -enable-unsafe-fp-math %s | FileCheck --check-prefixes=PROFITABLE,ALL %s
+# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=exynosm1 -enable-unsafe-fp-math %s | FileCheck --check-prefixes=PROFITABLE,ALL %s
+# RUN: llc -run-pass=machine-combiner -o - -mtriple=aarch64-unknown-linux -mcpu=thunderx2t99 -enable-unsafe-fp-math %s | FileCheck --check-prefixes=PROFITABLE,ALL %s
#
name: f1_2s
registers:
@@ -80,3 +80,82 @@ body: |
# PROFITABLE-LABEL: name: f1_2d
# PROFITABLE: %5:fpr128 = FNEGv2f64 %2
# PROFITABLE-NEXT: FMLAv2f64 killed %5, %0, %1
+---
+name: f1_both_fmul_2s
+registers:
+ - { id: 0, class: fpr64 }
+ - { id: 1, class: fpr64 }
+ - { id: 2, class: fpr64 }
+ - { id: 3, class: fpr64 }
+ - { id: 4, class: fpr64 }
+ - { id: 5, class: fpr64 }
+ - { id: 6, class: fpr64 }
+body: |
+ bb.0.entry:
+ %3:fpr64 = COPY %q3
+ %2:fpr64 = COPY %q2
+ %1:fpr64 = COPY %q1
+ %0:fpr64 = COPY %q0
+ %4:fpr64 = FMULv2f32 %0, %1
+ %5:fpr64 = FMULv2f32 %2, %3
+ %6:fpr64 = FSUBv2f32 killed %4, %5
+ %q0 = COPY %6
+ RET_ReallyLR implicit %q0
+
+...
+# ALL-LABEL: name: f1_both_fmul_2s
+# ALL: %4:fpr64 = FMULv2f32 %0, %1
+# ALL-NEXT: FMLSv2f32 killed %4, %2, %3
+---
+name: f1_both_fmul_4s
+registers:
+ - { id: 0, class: fpr128 }
+ - { id: 1, class: fpr128 }
+ - { id: 2, class: fpr128 }
+ - { id: 3, class: fpr128 }
+ - { id: 4, class: fpr128 }
+ - { id: 5, class: fpr128 }
+ - { id: 6, class: fpr128 }
+body: |
+ bb.0.entry:
+ %3:fpr128 = COPY %q3
+ %2:fpr128 = COPY %q2
+ %1:fpr128 = COPY %q1
+ %0:fpr128 = COPY %q0
+ %4:fpr128 = FMULv4f32 %0, %1
+ %5:fpr128 = FMULv4f32 %2, %3
+ %6:fpr128 = FSUBv4f32 killed %4, %5
+ %q0 = COPY %6
+ RET_ReallyLR implicit %q0
+
+...
+# ALL-LABEL: name: f1_both_fmul_4s
+# ALL: %4:fpr128 = FMULv4f32 %0, %1
+# ALL-NEXT: FMLSv4f32 killed %4, %2, %3
+---
+name: f1_both_fmul_2d
+registers:
+ - { id: 0, class: fpr128 }
+ - { id: 1, class: fpr128 }
+ - { id: 2, class: fpr128 }
+ - { id: 3, class: fpr128 }
+ - { id: 4, class: fpr128 }
+ - { id: 5, class: fpr128 }
+ - { id: 6, class: fpr128 }
+body: |
+ bb.0.entry:
+ %3:fpr128 = COPY %q3
+ %2:fpr128 = COPY %q2
+ %1:fpr128 = COPY %q1
+ %0:fpr128 = COPY %q0
+ %4:fpr128 = FMULv2f64 %0, %1
+ %5:fpr128 = FMULv2f64 %2, %3
+ %6:fpr128 = FSUBv2f64 killed %4, %5
+ %q0 = COPY %6
+ RET_ReallyLR implicit %q0
+
+...
+# ALL-LABEL: name: f1_both_fmul_2d
+# ALL: %4:fpr128 = FMULv2f64 %0, %1
+# ALL-NEXT: FMLSv2f64 killed %4, %2, %3
+