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-rw-r--r--test/CodeGen/AArch64/arm64-platform-reg.ll15
-rw-r--r--test/CodeGen/AArch64/ghc-cc.ll89
2 files changed, 97 insertions, 7 deletions
diff --git a/test/CodeGen/AArch64/arm64-platform-reg.ll b/test/CodeGen/AArch64/arm64-platform-reg.ll
index 651c793f73a4..b0d3ee0ff8a3 100644
--- a/test/CodeGen/AArch64/arm64-platform-reg.ll
+++ b/test/CodeGen/AArch64/arm64-platform-reg.ll
@@ -1,4 +1,5 @@
-; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-DARWIN
+; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
+; RUN: llc -mtriple=arm64-freebsd-gnu -aarch64-reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
; x18 is reserved as a platform register on Darwin but not on other
@@ -16,11 +17,11 @@ define void @keep_live() {
; CHECK: ldr x18
; CHECK: str x18
-; CHECK-DARWIN-NOT: ldr fp
-; CHECK-DARWIN-NOT: ldr x18
-; CHECK-DARWIN: Spill
-; CHECK-DARWIN-NOT: ldr fp
-; CHECK-DARWIN-NOT: ldr x18
-; CHECK-DARWIN: ret
+; CHECK-RESERVE-X18-NOT: ldr fp
+; CHECK-RESERVE-X18-NOT: ldr x18
+; CHECK-RESERVE-X18: Spill
+; CHECK-RESERVE-X18-NOT: ldr fp
+; CHECK-RESERVE-X18-NOT: ldr x18
+; CHECK-RESERVE-X18: ret
ret void
}
diff --git a/test/CodeGen/AArch64/ghc-cc.ll b/test/CodeGen/AArch64/ghc-cc.ll
new file mode 100644
index 000000000000..505bd5fca66d
--- /dev/null
+++ b/test/CodeGen/AArch64/ghc-cc.ll
@@ -0,0 +1,89 @@
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
+
+; Check the GHC call convention works (aarch64)
+
+@base = external global i64 ; assigned to register: r19
+@sp = external global i64 ; assigned to register: r20
+@hp = external global i64 ; assigned to register: r21
+@r1 = external global i64 ; assigned to register: r22
+@r2 = external global i64 ; assigned to register: r23
+@r3 = external global i64 ; assigned to register: r24
+@r4 = external global i64 ; assigned to register: r25
+@r5 = external global i64 ; assigned to register: r26
+@r6 = external global i64 ; assigned to register: r27
+@splim = external global i64 ; assigned to register: r28
+
+@f1 = external global float ; assigned to register: s8
+@f2 = external global float ; assigned to register: s9
+@f3 = external global float ; assigned to register: s10
+@f4 = external global float ; assigned to register: s11
+
+@d1 = external global double ; assigned to register: d12
+@d2 = external global double ; assigned to register: d13
+@d3 = external global double ; assigned to register: d14
+@d4 = external global double ; assigned to register: d15
+
+define ghccc i64 @addtwo(i64 %x, i64 %y) nounwind {
+entry:
+ ; CHECK-LABEL: addtwo
+ ; CHECK: add x0, x19, x20
+ ; CHECK-NEXT: ret
+ %0 = add i64 %x, %y
+ ret i64 %0
+}
+
+define void @zap(i64 %a, i64 %b) nounwind {
+entry:
+ ; CHECK-LABEL: zap
+ ; CHECK-NOT: mov {{x[0-9]+}}, sp
+ ; CHECK: bl addtwo
+ ; CHECK-NEXT: bl foo
+ %0 = call ghccc i64 @addtwo(i64 %a, i64 %b)
+ call void @foo() nounwind
+ ret void
+}
+
+define ghccc void @foo_i64 () nounwind {
+entry:
+ ; CHECK-LABEL: foo_i64
+ ; CHECK: adrp {{x[0-9]+}}, base
+ ; CHECK-NEXT: ldr x19, [{{x[0-9]+}}, :lo12:base]
+ ; CHECK-NEXT: bl bar_i64
+ ; CHECK-NEXT: ret
+
+ %0 = load i64* @base
+ tail call ghccc void @bar_i64( i64 %0 ) nounwind
+ ret void
+}
+
+define ghccc void @foo_float () nounwind {
+entry:
+ ; CHECK-LABEL: foo_float
+ ; CHECK: adrp {{x[0-9]+}}, f1
+ ; CHECK-NEXT: ldr s8, [{{x[0-9]+}}, :lo12:f1]
+ ; CHECK-NEXT: bl bar_float
+ ; CHECK-NEXT: ret
+
+ %0 = load float* @f1
+ tail call ghccc void @bar_float( float %0 ) nounwind
+ ret void
+}
+
+define ghccc void @foo_double () nounwind {
+entry:
+ ; CHECK-LABEL: foo_double
+ ; CHECK: adrp {{x[0-9]+}}, d1
+ ; CHECK-NEXT: ldr d12, [{{x[0-9]+}}, :lo12:d1]
+ ; CHECK-NEXT: bl bar_double
+ ; CHECK-NEXT: ret
+
+ %0 = load double* @d1
+ tail call ghccc void @bar_double( double %0 ) nounwind
+ ret void
+}
+
+declare ghccc void @foo ()
+
+declare ghccc void @bar_i64 (i64)
+declare ghccc void @bar_float (float)
+declare ghccc void @bar_double (double)