diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll')
| -rw-r--r-- | test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll b/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll index d38411dcca61..9b771ebdf7b3 100644 --- a/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll +++ b/test/CodeGen/AMDGPU/cvt_rpi_i32_f32.ll @@ -9,7 +9,7 @@ declare float @llvm.floor.f32(float) #1 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32 ; SI-NONAN: v_cvt_rpi_i32_f32_e32 v{{[0-9]+}}, s{{[0-9]+}} ; SI: s_endpgm -define void @cvt_rpi_i32_f32(i32 addrspace(1)* %out, float %x) #0 { +define amdgpu_kernel void @cvt_rpi_i32_f32(i32 addrspace(1)* %out, float %x) #0 { %fadd = fadd float %x, 0.5 %floor = call float @llvm.floor.f32(float %fadd) #1 %cvt = fptosi float %floor to i32 @@ -21,7 +21,7 @@ define void @cvt_rpi_i32_f32(i32 addrspace(1)* %out, float %x) #0 { ; SI-SAFE-NOT: v_cvt_rpi_i32_f32 ; SI-NONAN: v_cvt_rpi_i32_f32_e64 v{{[0-9]+}}, |s{{[0-9]+}}|{{$}} ; SI: s_endpgm -define void @cvt_rpi_i32_f32_fabs(i32 addrspace(1)* %out, float %x) #0 { +define amdgpu_kernel void @cvt_rpi_i32_f32_fabs(i32 addrspace(1)* %out, float %x) #0 { %x.fabs = call float @llvm.fabs.f32(float %x) #1 %fadd = fadd float %x.fabs, 0.5 %floor = call float @llvm.floor.f32(float %fadd) #1 @@ -37,7 +37,7 @@ define void @cvt_rpi_i32_f32_fabs(i32 addrspace(1)* %out, float %x) #0 { ; SI-SAFE-NOT: v_cvt_flr_i32_f32 ; SI-NONAN: v_cvt_flr_i32_f32_e32 {{v[0-9]+}}, [[TMP]] ; SI: s_endpgm -define void @cvt_rpi_i32_f32_fneg(i32 addrspace(1)* %out, float %x) #0 { +define amdgpu_kernel void @cvt_rpi_i32_f32_fneg(i32 addrspace(1)* %out, float %x) #0 { %x.fneg = fsub float -0.000000e+00, %x %fadd = fadd float %x.fneg, 0.5 %floor = call float @llvm.floor.f32(float %fadd) #1 @@ -55,7 +55,7 @@ define void @cvt_rpi_i32_f32_fneg(i32 addrspace(1)* %out, float %x) #0 { ; SI-SAFE-NOT: v_cvt_flr_i32_f32 ; SI-NONAN: v_cvt_flr_i32_f32_e32 {{v[0-9]+}}, [[TMP]] ; SI: s_endpgm -define void @cvt_rpi_i32_f32_fabs_fneg(i32 addrspace(1)* %out, float %x) #0 { +define amdgpu_kernel void @cvt_rpi_i32_f32_fabs_fneg(i32 addrspace(1)* %out, float %x) #0 { %x.fabs = call float @llvm.fabs.f32(float %x) #1 %x.fabs.fneg = fsub float -0.000000e+00, %x.fabs %fadd = fadd float %x.fabs.fneg, 0.5 @@ -71,7 +71,7 @@ define void @cvt_rpi_i32_f32_fabs_fneg(i32 addrspace(1)* %out, float %x) #0 { ; SI: v_floor_f32 ; SI: v_cvt_u32_f32 ; SI: s_endpgm -define void @no_cvt_rpi_i32_f32_0(i32 addrspace(1)* %out, float %x) #0 { +define amdgpu_kernel void @no_cvt_rpi_i32_f32_0(i32 addrspace(1)* %out, float %x) #0 { %fadd = fadd float %x, 0.5 %floor = call float @llvm.floor.f32(float %fadd) #1 %cvt = fptoui float %floor to i32 |