diff options
Diffstat (limited to 'test/CodeGen/AMDGPU/store-global.ll')
| -rw-r--r-- | test/CodeGen/AMDGPU/store-global.ll | 48 |
1 files changed, 12 insertions, 36 deletions
diff --git a/test/CodeGen/AMDGPU/store-global.ll b/test/CodeGen/AMDGPU/store-global.ll index a40e6b2683e5..8f8df884502b 100644 --- a/test/CodeGen/AMDGPU/store-global.ll +++ b/test/CodeGen/AMDGPU/store-global.ll @@ -24,23 +24,12 @@ entry: ; EG: MEM_RAT MSKOR T[[RW_GPR:[0-9]]].XW, T{{[0-9]}}.X ; EG-NOT: MEM_RAT MSKOR -; IG 0: Get the byte index and truncate the value -; EG: AND_INT * T{{[0-9]}}.[[BI_CHAN:[XYZW]]], KC0[2].Y, literal.x -; EG: LSHL T{{[0-9]}}.[[SHIFT_CHAN:[XYZW]]], PV.[[BI_CHAN]], literal.x -; EG: AND_INT * T{{[0-9]}}.[[TRUNC_CHAN:[XYZW]]], KC0[2].Z, literal.y -; EG-NEXT: 3(4.203895e-45), 255(3.573311e-43) - - -; IG 1: Truncate the calculated the shift amount for the mask - -; IG 2: Shift the value and the mask -; EG: LSHL T[[RW_GPR]].X, PS, PV.[[SHIFT_CHAN]] -; EG: LSHL * T[[RW_GPR]].W, literal.x, PV.[[SHIFT_CHAN]] -; EG-NEXT: 255 -; IG 3: Initialize the Y and Z channels to zero -; XXX: An optimal scheduler should merge this into one of the prevous IGs. -; EG: MOV T[[RW_GPR]].Y, 0.0 -; EG: MOV * T[[RW_GPR]].Z, 0.0 +; EG: VTX_READ_8 +; EG: AND_INT +; EG: AND_INT +; EG: LSHL +; EG: LSHL +; EG: LSHL ; SIVI: buffer_store_byte ; GFX9: global_store_byte @@ -55,26 +44,13 @@ entry: ; EG: MEM_RAT MSKOR T[[RW_GPR:[0-9]]].XW, T{{[0-9]}}.X ; EG-NOT: MEM_RAT MSKOR -; IG 0: Get the byte index and truncate the value - - -; EG: AND_INT * T{{[0-9]}}.[[BI_CHAN:[XYZW]]], KC0[2].Y, literal.x -; EG-NEXT: 3(4.203895e-45), - -; EG: LSHL T{{[0-9]}}.[[SHIFT_CHAN:[XYZW]]], PV.[[BI_CHAN]], literal.x -; EG: AND_INT * T{{[0-9]}}.[[TRUNC_CHAN:[XYZW]]], KC0[2].Z, literal.y - -; EG-NEXT: 3(4.203895e-45), 65535(9.183409e-41) -; IG 1: Truncate the calculated the shift amount for the mask +; EG: VTX_READ_16 +; EG: AND_INT +; EG: AND_INT +; EG: LSHL +; EG: LSHL +; EG: LSHL -; IG 2: Shift the value and the mask -; EG: LSHL T[[RW_GPR]].X, PS, PV.[[SHIFT_CHAN]] -; EG: LSHL * T[[RW_GPR]].W, literal.x, PV.[[SHIFT_CHAN]] -; EG-NEXT: 65535 -; IG 3: Initialize the Y and Z channels to zero -; XXX: An optimal scheduler should merge this into one of the prevous IGs. -; EG: MOV T[[RW_GPR]].Y, 0.0 -; EG: MOV * T[[RW_GPR]].Z, 0.0 ; SIVI: buffer_store_short ; GFX9: global_store_short |