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-rw-r--r--test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir136
1 files changed, 122 insertions, 14 deletions
diff --git a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
index 4e94fb4e3481..dfccc47c277c 100644
--- a/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
+++ b/test/CodeGen/ARM/GlobalISel/arm-regbankselect.mir
@@ -25,6 +25,9 @@
define void @test_constants() { ret void }
+ define void @test_anyext_s8_32() { ret void }
+ define void @test_anyext_s16_32() { ret void }
+
define void @test_trunc_s32_16() { ret void }
define void @test_fadd_s32() #0 { ret void }
@@ -71,19 +74,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
- %2(s16) = G_ADD %0, %1
- %r0 = COPY %2(s16)
+ %2(s32) = G_ANYEXT %0(s16)
+ %3(s32) = G_ANYEXT %1(s16)
+ %4(s32) = G_ADD %2, %3
+ %5(s16) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s16)
BX_RET 14, _, implicit %r0
...
@@ -97,19 +109,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
- %2(s8) = G_ADD %0, %1
- %r0 = COPY %2(s8)
+ %2(s32) = G_ANYEXT %0(s8)
+ %3(s32) = G_ANYEXT %1(s8)
+ %4(s32) = G_ADD %2, %3
+ %5(s8) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s8)
BX_RET 14, _, implicit %r0
...
@@ -123,19 +144,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s1) = COPY %r0
%1(s1) = COPY %r1
- %2(s1) = G_ADD %0, %1
- %r0 = COPY %2(s1)
+ %2(s32) = G_ANYEXT %0(s1)
+ %3(s32) = G_ANYEXT %1(s1)
+ %4(s32) = G_ADD %2, %3
+ %5(s1) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s1)
BX_RET 14, _, implicit %r0
...
@@ -175,19 +205,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
- %2(s16) = G_SUB %0, %1
- %r0 = COPY %2(s16)
+ %2(s32) = G_ANYEXT %0(s16)
+ %3(s32) = G_ANYEXT %1(s16)
+ %4(s32) = G_SUB %2, %3
+ %5(s16) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s16)
BX_RET 14, _, implicit %r0
...
@@ -201,19 +240,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
- %2(s8) = G_SUB %0, %1
- %r0 = COPY %2(s8)
+ %2(s32) = G_ANYEXT %0(s8)
+ %3(s32) = G_ANYEXT %1(s8)
+ %4(s32) = G_SUB %2, %3
+ %5(s8) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s8)
BX_RET 14, _, implicit %r0
...
@@ -253,19 +301,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s16) = COPY %r0
%1(s16) = COPY %r1
- %2(s16) = G_MUL %0, %1
- %r0 = COPY %2(s16)
+ %2(s32) = G_ANYEXT %0(s16)
+ %3(s32) = G_ANYEXT %1(s16)
+ %4(s32) = G_MUL %2, %3
+ %5(s16) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s16)
BX_RET 14, _, implicit %r0
...
@@ -279,19 +336,28 @@ selected: false
# CHECK: - { id: 0, class: gprb }
# CHECK: - { id: 1, class: gprb }
# CHECK: - { id: 2, class: gprb }
+# CHECK: - { id: 3, class: gprb }
+# CHECK: - { id: 4, class: gprb }
+# CHECK: - { id: 5, class: gprb }
registers:
- { id: 0, class: _ }
- { id: 1, class: _ }
- { id: 2, class: _ }
+ - { id: 3, class: _ }
+ - { id: 4, class: _ }
+ - { id: 5, class: _ }
body: |
bb.0:
liveins: %r0, %r1
%0(s8) = COPY %r0
%1(s8) = COPY %r1
- %2(s8) = G_MUL %0, %1
- %r0 = COPY %2(s8)
+ %2(s32) = G_ANYEXT %0(s8)
+ %3(s32) = G_ANYEXT %1(s8)
+ %4(s32) = G_MUL %2, %3
+ %5(s8) = G_TRUNC %4(s32)
+ %r0 = COPY %5(s8)
BX_RET 14, _, implicit %r0
...
@@ -500,6 +566,48 @@ body: |
BX_RET 14, _, implicit %r0
...
---
+name: test_anyext_s8_32
+# CHECK-LABEL: name: test_anyext_s8_32
+legalized: true
+regBankSelected: false
+selected: false
+# CHECK: registers:
+# CHECK: - { id: 0, class: gprb }
+# CHECK: - { id: 1, class: gprb }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+body: |
+ bb.0:
+ liveins: %r0
+
+ %0(s8) = COPY %r0
+ %1(s32) = G_ANYEXT %0(s8)
+ %r0 = COPY %1(s32)
+ BX_RET 14, _, implicit %r0
+...
+---
+name: test_anyext_s16_32
+# CHECK-LABEL: name: test_anyext_s16_32
+legalized: true
+regBankSelected: false
+selected: false
+# CHECK: registers:
+# CHECK: - { id: 0, class: gprb }
+# CHECK: - { id: 1, class: gprb }
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+body: |
+ bb.0:
+ liveins: %r0
+
+ %0(s16) = COPY %r0
+ %1(s32) = G_ANYEXT %0(s16)
+ %r0 = COPY %1(s32)
+ BX_RET 14, _, implicit %r0
+...
+---
name: test_trunc_s32_16
# CHECK-LABEL: name: test_trunc_s32_16
legalized: true
generated by cgit v1.2.3 (git 2.25.1) at 2025-08-02 01:19:34 +0000