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Diffstat (limited to 'test/CodeGen/ARM/neon_vabs.ll')
-rw-r--r--test/CodeGen/ARM/neon_vabs.ll95
1 files changed, 82 insertions, 13 deletions
diff --git a/test/CodeGen/ARM/neon_vabs.ll b/test/CodeGen/ARM/neon_vabs.ll
index d32e7b78879b..109d09582afd 100644
--- a/test/CodeGen/ARM/neon_vabs.ll
+++ b/test/CodeGen/ARM/neon_vabs.ll
@@ -1,8 +1,15 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=arm-eabi -mattr=+neon %s -o - | FileCheck %s
define <4 x i32> @test1(<4 x i32> %a) nounwind {
; CHECK-LABEL: test1:
-; CHECK: vabs.s32 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d17, r2, r3
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s32 q8, q8
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <4 x i32> zeroinitializer, %a
%b = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1>
%abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg
@@ -11,7 +18,13 @@ define <4 x i32> @test1(<4 x i32> %a) nounwind {
define <4 x i32> @test2(<4 x i32> %a) nounwind {
; CHECK-LABEL: test2:
-; CHECK: vabs.s32 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d17, r2, r3
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s32 q8, q8
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <4 x i32> zeroinitializer, %a
%b = icmp sge <4 x i32> %a, zeroinitializer
%abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg
@@ -20,7 +33,13 @@ define <4 x i32> @test2(<4 x i32> %a) nounwind {
define <8 x i16> @test3(<8 x i16> %a) nounwind {
; CHECK-LABEL: test3:
-; CHECK: vabs.s16 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d17, r2, r3
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s16 q8, q8
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <8 x i16> zeroinitializer, %a
%b = icmp sgt <8 x i16> %a, zeroinitializer
%abs = select <8 x i1> %b, <8 x i16> %a, <8 x i16> %tmp1neg
@@ -29,7 +48,13 @@ define <8 x i16> @test3(<8 x i16> %a) nounwind {
define <16 x i8> @test4(<16 x i8> %a) nounwind {
; CHECK-LABEL: test4:
-; CHECK: vabs.s8 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d17, r2, r3
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s8 q8, q8
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <16 x i8> zeroinitializer, %a
%b = icmp slt <16 x i8> %a, zeroinitializer
%abs = select <16 x i1> %b, <16 x i8> %tmp1neg, <16 x i8> %a
@@ -38,7 +63,13 @@ define <16 x i8> @test4(<16 x i8> %a) nounwind {
define <4 x i32> @test5(<4 x i32> %a) nounwind {
; CHECK-LABEL: test5:
-; CHECK: vabs.s32 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d17, r2, r3
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s32 q8, q8
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <4 x i32> zeroinitializer, %a
%b = icmp sle <4 x i32> %a, zeroinitializer
%abs = select <4 x i1> %b, <4 x i32> %tmp1neg, <4 x i32> %a
@@ -47,7 +78,11 @@ define <4 x i32> @test5(<4 x i32> %a) nounwind {
define <2 x i32> @test6(<2 x i32> %a) nounwind {
; CHECK-LABEL: test6:
-; CHECK: vabs.s32 d
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s32 d16, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <2 x i32> zeroinitializer, %a
%b = icmp sgt <2 x i32> %a, <i32 -1, i32 -1>
%abs = select <2 x i1> %b, <2 x i32> %a, <2 x i32> %tmp1neg
@@ -56,7 +91,11 @@ define <2 x i32> @test6(<2 x i32> %a) nounwind {
define <2 x i32> @test7(<2 x i32> %a) nounwind {
; CHECK-LABEL: test7:
-; CHECK: vabs.s32 d
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s32 d16, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <2 x i32> zeroinitializer, %a
%b = icmp sge <2 x i32> %a, zeroinitializer
%abs = select <2 x i1> %b, <2 x i32> %a, <2 x i32> %tmp1neg
@@ -65,7 +104,11 @@ define <2 x i32> @test7(<2 x i32> %a) nounwind {
define <4 x i16> @test8(<4 x i16> %a) nounwind {
; CHECK-LABEL: test8:
-; CHECK: vabs.s16 d
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s16 d16, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <4 x i16> zeroinitializer, %a
%b = icmp sgt <4 x i16> %a, zeroinitializer
%abs = select <4 x i1> %b, <4 x i16> %a, <4 x i16> %tmp1neg
@@ -74,7 +117,11 @@ define <4 x i16> @test8(<4 x i16> %a) nounwind {
define <8 x i8> @test9(<8 x i8> %a) nounwind {
; CHECK-LABEL: test9:
-; CHECK: vabs.s8 d
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s8 d16, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <8 x i8> zeroinitializer, %a
%b = icmp slt <8 x i8> %a, zeroinitializer
%abs = select <8 x i1> %b, <8 x i8> %tmp1neg, <8 x i8> %a
@@ -83,7 +130,11 @@ define <8 x i8> @test9(<8 x i8> %a) nounwind {
define <2 x i32> @test10(<2 x i32> %a) nounwind {
; CHECK-LABEL: test10:
-; CHECK: vabs.s32 d
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r0, r1
+; CHECK-NEXT: vabs.s32 d16, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: mov pc, lr
%tmp1neg = sub <2 x i32> zeroinitializer, %a
%b = icmp sle <2 x i32> %a, zeroinitializer
%abs = select <2 x i1> %b, <2 x i32> %tmp1neg, <2 x i32> %a
@@ -95,7 +146,13 @@ define <2 x i32> @test10(<2 x i32> %a) nounwind {
define <4 x i32> @test11(<4 x i16> %a, <4 x i16> %b) nounwind {
; CHECK-LABEL: test11:
-; CHECK: vabdl.u16 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r2, r3
+; CHECK-NEXT: vmov d17, r0, r1
+; CHECK-NEXT: vabdl.u16 q8, d17, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%zext1 = zext <4 x i16> %a to <4 x i32>
%zext2 = zext <4 x i16> %b to <4 x i32>
%diff = sub <4 x i32> %zext1, %zext2
@@ -106,7 +163,13 @@ define <4 x i32> @test11(<4 x i16> %a, <4 x i16> %b) nounwind {
}
define <8 x i16> @test12(<8 x i8> %a, <8 x i8> %b) nounwind {
; CHECK-LABEL: test12:
-; CHECK: vabdl.u8 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r2, r3
+; CHECK-NEXT: vmov d17, r0, r1
+; CHECK-NEXT: vabdl.u8 q8, d17, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%zext1 = zext <8 x i8> %a to <8 x i16>
%zext2 = zext <8 x i8> %b to <8 x i16>
%diff = sub <8 x i16> %zext1, %zext2
@@ -118,7 +181,13 @@ define <8 x i16> @test12(<8 x i8> %a, <8 x i8> %b) nounwind {
define <2 x i64> @test13(<2 x i32> %a, <2 x i32> %b) nounwind {
; CHECK-LABEL: test13:
-; CHECK: vabdl.u32 q
+; CHECK: @ BB#0:
+; CHECK-NEXT: vmov d16, r2, r3
+; CHECK-NEXT: vmov d17, r0, r1
+; CHECK-NEXT: vabdl.u32 q8, d17, d16
+; CHECK-NEXT: vmov r0, r1, d16
+; CHECK-NEXT: vmov r2, r3, d17
+; CHECK-NEXT: mov pc, lr
%zext1 = zext <2 x i32> %a to <2 x i64>
%zext2 = zext <2 x i32> %b to <2 x i64>
%diff = sub <2 x i64> %zext1, %zext2
generated by cgit v1.2.3 (git 2.25.1) at 2025-10-17 20:40:26 +0000