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-rw-r--r--test/CodeGen/ARM/swifterror.ll28
1 files changed, 28 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/swifterror.ll b/test/CodeGen/ARM/swifterror.ll
index 78764202f627..3fd57c592bfb 100644
--- a/test/CodeGen/ARM/swifterror.ll
+++ b/test/CodeGen/ARM/swifterror.ll
@@ -528,3 +528,31 @@ entry:
tail call void @acallee(i8* null)
ret void
}
+
+
+declare swiftcc void @foo2(%swift_error** swifterror)
+
+; Make sure we properly assign registers during fast-isel.
+; CHECK-O0-LABEL: testAssign
+; CHECK-O0: mov r8, #0
+; CHECK-O0: bl _foo2
+; CHECK-O0: str r8, [s[[STK:p.*]]]
+; CHECK-O0: ldr r0, [s[[STK]]]
+; CHECK-O0: pop
+
+; CHECK-APPLE-LABEL: testAssign
+; CHECK-APPLE: mov r8, #0
+; CHECK-APPLE: bl _foo2
+; CHECK-APPLE: mov r0, r8
+
+define swiftcc %swift_error* @testAssign(i8* %error_ref) {
+entry:
+ %error_ptr = alloca swifterror %swift_error*
+ store %swift_error* null, %swift_error** %error_ptr
+ call swiftcc void @foo2(%swift_error** swifterror %error_ptr)
+ br label %a
+
+a:
+ %error = load %swift_error*, %swift_error** %error_ptr
+ ret %swift_error* %error
+}