diff options
Diffstat (limited to 'test/CodeGen/ARM/vldm-liveness.ll')
| -rw-r--r-- | test/CodeGen/ARM/vldm-liveness.ll | 19 |
1 files changed, 3 insertions, 16 deletions
diff --git a/test/CodeGen/ARM/vldm-liveness.ll b/test/CodeGen/ARM/vldm-liveness.ll index e114e6970a32..63dc9d61ebcc 100644 --- a/test/CodeGen/ARM/vldm-liveness.ll +++ b/test/CodeGen/ARM/vldm-liveness.ll @@ -1,26 +1,13 @@ ; RUN: llc -mtriple thumbv7-apple-ios -verify-machineinstrs -o - %s | FileCheck %s -; ARM load store optimizer was dealing with a sequence like: -; s1 = VLDRS [r0, 1], Q0<imp-def> -; s3 = VLDRS [r0, 2], Q0<imp-use,kill>, Q0<imp-def> -; s0 = VLDRS [r0, 0], Q0<imp-use,kill>, Q0<imp-def> -; s2 = VLDRS [r0, 4], Q0<imp-use,kill>, Q0<imp-def> +; Make sure we emit the loads in ascending order, and form a vldmia. ; -; It decided to combine the {s0, s1} loads into a single instruction in the -; third position. However, this leaves the instruction defining s3 with a stray -; imp-use of Q0, which is undefined. -; -; The verifier catches this, so this test just makes sure that appropriate -; liveness flags are added. -; -; I believe the change will be tested as long as the vldmia is not the first of -; the loads. Earlier optimisations may perturb the output over time, but -; fiddling the indices should be sufficient to restore the test. +; See vldm-liveness.mir for the bug this file originally testing. define arm_aapcs_vfpcc <4 x float> @foo(float* %ptr) { ; CHECK-LABEL: foo: -; CHECK: vldr s3, [r0, #8] ; CHECK: vldmia r0, {s0, s1} +; CHECK: vldr s3, [r0, #8] ; CHECK: vldr s2, [r0, #16] %off0 = getelementptr float, float* %ptr, i32 0 %val0 = load float, float* %off0 |