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-rw-r--r--test/CodeGen/Hexagon/inline-asm-qv.ll19
1 files changed, 19 insertions, 0 deletions
diff --git a/test/CodeGen/Hexagon/inline-asm-qv.ll b/test/CodeGen/Hexagon/inline-asm-qv.ll
new file mode 100644
index 000000000000..256342170313
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+++ b/test/CodeGen/Hexagon/inline-asm-qv.ll
@@ -0,0 +1,19 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that constraints q and v are handled correctly.
+; CHECK: q{{.}} = vgtw(v{{.}}.w,v{{.}}.w)
+; CHECK: vand
+; CHECK: vmem
+
+target triple = "hexagon"
+
+; Function Attrs: nounwind
+define void @foo(<16 x i32> %v0, <16 x i32> %v1, <16 x i32>* nocapture %p) #0 {
+entry:
+ %0 = tail call <16 x i32> asm "$0 = vgtw($1.w,$2.w)", "=q,v,v"(<16 x i32> %v0, <16 x i32> %v1) #1
+ store <16 x i32> %0, <16 x i32>* %p, align 64
+ ret void
+}
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,-hvx-double" }
+attributes #1 = { nounwind readnone }