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-rw-r--r--test/CodeGen/Mips/prevent-hoisting.ll8
1 files changed, 4 insertions, 4 deletions
diff --git a/test/CodeGen/Mips/prevent-hoisting.ll b/test/CodeGen/Mips/prevent-hoisting.ll
index 81b14d7441b3..200848ac5485 100644
--- a/test/CodeGen/Mips/prevent-hoisting.ll
+++ b/test/CodeGen/Mips/prevent-hoisting.ll
@@ -1,4 +1,4 @@
-; RUN: llc -march=mipsel -O3 < %s | FileCheck %s
+; RUN: llc -march=mipsel -O3 -relocation-model=pic < %s | FileCheck %s
; MIPS direct branches implicitly define register $at. This test makes sure that
@@ -11,12 +11,12 @@
; CHECK-LABEL: readLumaCoeff8x8_CABAC
; The check for first "addiu" instruction is added so that we can match the correct "b" instruction.
-; CHECK: addiu ${{[0-9]+}}, $zero, -1
+; CHECK: andi
; CHECK: b $[[BB0:BB[0-9_]+]]
-; CHECK-NEXT: addiu ${{[0-9]+}}, $zero, 0
+; CHECK-NEXT: sll
; Check that at the start of a fallthrough block there is a instruction that writes to $1.
-; CHECK-NEXT: {{BB[0-9_#]+}}:
+; CHECK-NEXT: {{BB[0-9_#]+}}:
; CHECK-NEXT: lw $[[R1:[0-9]+]], %got(assignSE2partition)($[[R2:[0-9]+]])
; CHECK-NEXT: sll $1, $[[R0:[0-9]+]], 4