diff options
Diffstat (limited to 'test/CodeGen/PowerPC/setcc-to-sub.ll')
-rw-r--r-- | test/CodeGen/PowerPC/setcc-to-sub.ll | 73 |
1 files changed, 39 insertions, 34 deletions
diff --git a/test/CodeGen/PowerPC/setcc-to-sub.ll b/test/CodeGen/PowerPC/setcc-to-sub.ll index 335bb403cd7f..752ebe0c9d8b 100644 --- a/test/CodeGen/PowerPC/setcc-to-sub.ll +++ b/test/CodeGen/PowerPC/setcc-to-sub.ll @@ -1,3 +1,4 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \ ; RUN: -mcpu=pwr8 < %s | FileCheck %s @@ -6,6 +7,15 @@ ; Function Attrs: norecurse nounwind readonly define zeroext i1 @test1(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 { +; CHECK-LABEL: test1: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: lwz 3, 0(3) +; CHECK-NEXT: lwz 4, 0(4) +; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28 +; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28 +; CHECK-NEXT: sub 3, 3, 4 +; CHECK-NEXT: rldicl 3, 3, 1, 63 +; CHECK-NEXT: blr entry: %arrayidx.i6 = bitcast %class.PB2* %s_a to i32* %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1 @@ -15,18 +25,20 @@ entry: %and.i4 = and i32 %1, 8 %cmp.i5 = icmp ult i32 %and.i, %and.i4 ret i1 %cmp.i5 - -; CHECK-LABEL: @test1 -; CHECK: rlwinm [[REG1:[0-9]*]] -; CHECK-NEXT: rlwinm [[REG2:[0-9]*]] -; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG1]], [[REG2]] -; CHECK-NEXT: rldicl 3, [[REG3]] -; CHECK: blr - } ; Function Attrs: norecurse nounwind readonly define zeroext i1 @test2(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 { +; CHECK-LABEL: test2: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: lwz 3, 0(3) +; CHECK-NEXT: lwz 4, 0(4) +; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28 +; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28 +; CHECK-NEXT: sub 3, 4, 3 +; CHECK-NEXT: rldicl 3, 3, 1, 63 +; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: blr entry: %arrayidx.i6 = bitcast %class.PB2* %s_a to i32* %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1 @@ -36,19 +48,19 @@ entry: %and.i4 = and i32 %1, 8 %cmp.i5 = icmp ule i32 %and.i, %and.i4 ret i1 %cmp.i5 - -; CHECK-LABEL: @test2 -; CHECK: rlwinm [[REG1:[0-9]*]] -; CHECK-NEXT: rlwinm [[REG2:[0-9]*]] -; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG2]], [[REG1]] -; CHECK-NEXT: rldicl [[REG4:[0-9]*]], [[REG3]] -; CHECK-NEXT: xori 3, [[REG4]], 1 -; CHECK: blr - } ; Function Attrs: norecurse nounwind readonly define zeroext i1 @test3(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 { +; CHECK-LABEL: test3: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: lwz 3, 0(3) +; CHECK-NEXT: lwz 4, 0(4) +; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28 +; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28 +; CHECK-NEXT: sub 3, 4, 3 +; CHECK-NEXT: rldicl 3, 3, 1, 63 +; CHECK-NEXT: blr entry: %arrayidx.i6 = bitcast %class.PB2* %s_a to i32* %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1 @@ -58,18 +70,20 @@ entry: %and.i4 = and i32 %1, 8 %cmp.i5 = icmp ugt i32 %and.i, %and.i4 ret i1 %cmp.i5 - -; CHECK-LABEL: @test3 -; CHECK: rlwinm [[REG1:[0-9]*]] -; CHECK-NEXT: rlwinm [[REG2:[0-9]*]] -; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG2]], [[REG1]] -; CHECK-NEXT: rldicl 3, [[REG3]] -; CHECK: blr - } ; Function Attrs: norecurse nounwind readonly define zeroext i1 @test4(%class.PB2* %s_a, %class.PB2* %s_b) local_unnamed_addr #0 { +; CHECK-LABEL: test4: +; CHECK: # BB#0: # %entry +; CHECK-NEXT: lwz 3, 0(3) +; CHECK-NEXT: lwz 4, 0(4) +; CHECK-NEXT: rlwinm 3, 3, 0, 28, 28 +; CHECK-NEXT: rlwinm 4, 4, 0, 28, 28 +; CHECK-NEXT: sub 3, 3, 4 +; CHECK-NEXT: rldicl 3, 3, 1, 63 +; CHECK-NEXT: xori 3, 3, 1 +; CHECK-NEXT: blr entry: %arrayidx.i6 = bitcast %class.PB2* %s_a to i32* %0 = load i32, i32* %arrayidx.i6, align 8, !tbaa !1 @@ -79,15 +93,6 @@ entry: %and.i4 = and i32 %1, 8 %cmp.i5 = icmp uge i32 %and.i, %and.i4 ret i1 %cmp.i5 - -; CHECK-LABEL: @test4 -; CHECK: rlwinm [[REG1:[0-9]*]] -; CHECK-NEXT: rlwinm [[REG2:[0-9]*]] -; CHECK-NEXT: sub [[REG3:[0-9]*]], [[REG1]], [[REG2]] -; CHECK-NEXT: rldicl [[REG4:[0-9]*]], [[REG3]] -; CHECK-NEXT: xori 3, [[REG4]], 1 -; CHECK: blr - } !1 = !{!2, !2, i64 0} |